A quantum state transmission method and device and a quantum computer

Abstract

This invention relates to the field of quantum computer technology, specifically to a quantum state transmission method, device, and quantum computer. This application transforms the quantum circuit cutting problem into solving a quadratic unconstrained binary optimization model, finding a way to minimize the number of global gates required for transmission and the transmission cost. Based on minimizing the number of global gates required for transmission and the transmission cost, the quantum circuit is cut, and quantum state transmission is performed based on selected qubits as transmission bits. This reduces the frequency and communication cost of quantum communication within distributed quantum circuits and improves the computational efficiency of distributed quantum circuits.

Description

Technical Field

[0001] This invention relates to the field of quantum computer technology, and in particular to a quantum state transmission method, apparatus, and quantum computer. Background Technology

[0002] Distributed quantum circuit compilation employs various technical approaches, such as circuit slicing, quantum state transfer, and nonlocal quantum gate operations. While distributed quantum computing schemes based on circuit slicing require only classical communication, their sampling complexity increases exponentially and is therefore not considered. In recent years, significant progress has been made in entanglement-based quantum communication, quantum teleportation, and direct quantum state transfer based on quantum interconnects, enabling the transfer of quantum gates and quantum states between qubit processing units (QPUs).

[0003] However, quantum communication technology is limited by factors such as qubit stability, qubit transmission loss, and environmental noise. These limitations indicate that excessive quantum communication can negatively impact the overall performance of distributed systems. Therefore, reducing the frequency of quantum communication within distributed quantum circuits helps improve performance metrics such as latency and fidelity. To reduce the frequency of quantum communication within distributed quantum circuits, algorithms need to be optimized to decrease the number of long-range quantum gates between qubit processing units, thereby optimizing the quantum communication frequency. Furthermore, each long-range two-qubit gate between qubit processing units requires independent quantum communication, leading to high communication costs. Summary of the Invention

[0004] This invention provides a quantum state transmission method, device, and quantum computer to solve the problems of high frequency and high communication cost in quantum communication within distributed quantum circuits.

[0005] This specification provides an embodiment of a quantum state transmission method, including:

[0006] Obtain the bit-weighted graph of the quantum circuit representing the quantum state to be transmitted. Based on the subprocessors to which the quantum circuit is to be transmitted, determined by the distributed quantum processor, and the transmission allocation constraints, construct and solve a quadratic unconstrained binary optimization problem representing the allocation of the quantum circuit on the subprocessors to obtain the optimal allocation combination of the quantum circuit for the distributed quantum processor. Here, whether a node in the bit-weighted graph belongs to a certain subprocessor is a binary variable of the quadratic unconstrained binary optimization problem, and the transmission allocation constraints constitute the quadratic term of the quadratic unconstrained binary optimization problem. The optimal allocation combination is represented by a quantum circuit that includes at least a global gate determined by the distributed quantum processor.

[0007] For a quantum circuit containing a global gate, obtain a bit of any selected global gate as the target transmission bit, and determine the associated global gate that is merged and transmitted with the target transmission bit of the selected global gate;

[0008] Based on the target transmission bit transmission, the quantum states of the selected global gate and the associated global gate are transmitted.

[0009] Optionally, the construction and solution of a quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits on subprocessors, based on the subprocessors to which the quantum circuits are to be transmitted and the transmission allocation constraints determined by the distributed quantum processor, includes:

[0010] The transmission allocation constraints include qubit subprocessor constraints, which state that each qubit can only be assigned to one subprocessor.

[0011] Based on the edges of the global representation gates between nodes when nodes are partitioned into subprocessors, determine the first objective function that minimizes the weights and values ​​of the representation edges;

[0012] By combining the first objective function and the penalty term obtained from the quadratic result of the constraint on the qubit subprocessor, a quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits on the subprocessor is constructed and solved.

[0013] Optionally, the first objective function is:

[0014]

[0015] Where F1 represents minimizing the number of global gates, i and j represent the indices of the qubits, K represents the number of subprocessors, N represents the number of qubits, and X is the decision variable. ik The decision variable X represents whether the qubit with index i is assigned to the k-th subprocessor. jk W indicates whether the qubit with index j is assigned to the k-th subprocessor. ij W represents the logic gate acting on qubit i and qubit j. ij (1-X ik X jk ) represents the number of global gates, the subprocessor index k ranges from [0, K], and the qubit indices i and j range from [0, N]; when X ik When = 1, it means that the qubit with index i is assigned to the kth subprocessor;

[0016] The constraints of the quantum bit subprocessor are expressed as follows:

[0017] Where i represents the index of the qubit, K represents the number of molecular processors, N represents the number of qubits, and X is the decision variable. ik Indicates whether the qubit with index i is assigned to the k-th subprocessor, X ik Take 0 or 1.

[0018] Optionally, the construction and solution of the quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits on subprocessors, based on the subprocessors to which the quantum circuits are to be transmitted and the transmission allocation constraints determined by the distributed quantum processor, further includes:

[0019] Based on the edges representing global gates between nodes when nodes are partitioned into subprocessors, a second objective function is determined to maximize the discreteness of the representation edges; where the discreteness of the edges is the ratio of the sum of edge weights to the sum of the number of edges.

[0020] The problem involves combining the first objective function, the penalty term obtained by quadraticizing the constraint on the qubit subprocessor, and the second objective function to construct and solve a quadratic unconstrained binary optimization problem that characterizes the allocation of quantum circuits on the subprocessor.

[0021] Optionally, the construction and solution of the second objective function, the penalty term obtained by quadratizing the constraint on the qubit subprocessor, and the second objective function to characterize the allocation of quantum circuits on the subprocessor, includes:

[0022] The second objective function is transformed into a third objective function that minimizes the difference between the first objective function representing the weights and values ​​and the objective function representing the edge sums and values.

[0023] The problem involves combining the first objective function, the penalty term obtained by quadraticizing the constraint on the qubit subprocessor, and the third objective function to construct and solve a quadratic unconstrained binary optimization problem that characterizes the allocation of quantum circuits on the subprocessor.

[0024] Optionally, the second objective function is:

[0025]

[0026] The third objective function is:

[0027]

[0028] Where F2 and F3 both represent maximizing the global gate discreteness value, φ represents the conversion coefficient, i and j represent the indices of the qubits, K represents the number of subprocessors, N represents the number of qubits, and X is the decision variable. ik The decision variable X represents whether the qubit with index i is assigned to the k-th subprocessor. jk W indicates whether the qubit with index j is assigned to the k-th subprocessor. ij This represents the logic gate that operates on qubit i and qubit j.

[0029] Optionally, the construction and solution of a quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits on subprocessors, based on the subprocessors to which the quantum circuits are to be transmitted and the transmission allocation constraints determined by the distributed quantum processor, includes:

[0030] The transmission allocation constraints also include load balancing constraints, which state that the difference between the number of nodes assigned to the same subprocessor and the average number of nodes assigned to each subprocessor is less than the load balancing tolerance.

[0031] By combining the first objective function, the penalty term obtained by quadratic transformation of the qubit subprocessor constraint, and the penalty term obtained by quadratic transformation of the load balancing constraint, a quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits on the subprocessor is constructed and solved.

[0032] Optionally, the load balancing constraint is expressed as:

[0033]

[0034] Where i represents the node index, K represents the number of molecular processors, N represents the number of nodes, and X is the decision variable. ik This indicates whether the node with index i is assigned to the k-th partition. This represents the average number of nodes allocated to each partition, and ρ represents the load balancing tolerance.

[0035] This specification also provides a quantum state transmission device, comprising:

[0036] The optimal allocation combination determination module is used to obtain the bit weighted graph of the quantum circuit representing the quantum state to be transmitted, and based on the sub-processors to which the quantum circuit is to be transmitted and the transmission allocation constraints determined by the distributed quantum processor, it constructs and solves a quadratic unconstrained binary optimization problem representing the allocation of the quantum circuit on the sub-processors to obtain the optimal allocation combination of the quantum circuit for the distributed quantum processor. Here, whether a node in the bit weighted graph belongs to a certain sub-processor is a binary variable of the quadratic unconstrained binary optimization problem, and the transmission allocation constraints constitute the quadratic term of the quadratic unconstrained binary optimization problem. The optimal allocation combination is represented by a quantum circuit that includes at least a global gate determined by the distributed quantum processor.

[0037] The associated global gate determination module is used to obtain a bit of any selected global gate as the target transmission bit for a quantum circuit containing global gates, and determine the associated global gate that is merged and transmitted with the target transmission bit of the selected global gate.

[0038] The quantum state transmission module is used to transmit the quantum states of selected global gates and associated global gates based on the target transmission bit.

[0039] A quantum control system is characterized by performing quantum computing tasks using the quantum state transmission method described above, or including the quantum state transmission device described above.

[0040] A quantum computer, characterized in that it includes a quantum control system as described above.

[0041] A readable storage medium storing a computer program thereon, characterized in that the computer program, when executed by a processor, can implement the quantum state transmission optimization method described above.

[0042] Its beneficial effects are as follows: This application transforms the quantum circuit cutting problem into solving a quadratic unconstrained binary optimization model, finds the minimum number of global gates to be transmitted and the transmission cost, and cuts the quantum circuit based on minimizing the number of global gates to be transmitted and the transmission cost, and uses selected qubits as transmission bits to transfer quantum states, thereby reducing the frequency and communication cost of quantum communication in distributed quantum circuits and improving the computational efficiency of distributed quantum circuits. Attached Figure Description

[0043] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0044] Figure 1 A schematic diagram of a quantum circuit provided for an embodiment of this specification;

[0045] Figure 2 A qubit weighting diagram corresponding to a quantum circuit provided in the embodiments of this specification;

[0046] Figure 3 A flowchart of a quantum state transmission method provided in the embodiments of this specification;

[0047] Figure 4 This specification provides an embodiment of a graph showing the relationship between the sum of edge weights and the sum of edge counts when bits in a quantum circuit are partitioned into distributed quantum processors.

[0048] Figure 5 This is a schematic diagram of a quantum circuit with a transmission bit of q0 provided in the embodiments of this specification;

[0049] Figure 6 Another quantum circuit diagram provided for embodiments of this specification;

[0050] Figure 7 A schematic diagram of a quantum circuit with q3 transmission bits provided in the embodiments of this specification;

[0051] Figure 8 A schematic diagram of a quantum circuit with different effects for an embodiment of this specification;

[0052] Figure 9 This is a schematic diagram of a quantum state transmission device provided in the embodiments of this specification;

[0053] Figure 10 This is a schematic diagram of a computer-readable medium provided for embodiments of this specification. Detailed Implementation

[0054] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0055] It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of the invention.

[0056] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0057] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0058] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0059] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0060] The metric for quantum circuit partitioning typically aims to minimize the global gate count or transmission cost. In a weighted graph of qubits, this manifests as minimizing the weights of edges between sets of nodes, such as... Figure 1 The diagram shows a quantum circuit, and the weighted graph of its qubits is as follows. Figure 2As shown, assuming the quantum circuit is divided into two partitions, i.e., assigned to two quantum processors, with {q0, q1, q2} and {q3, q4, q5} as the first set of nodes and {q0, q1, q2, q3, q4} and {q5} as the second set of nodes, based on these two sets of nodes and the qubit weighting graph, we know that the sum of the weights in the first set of nodes is 7, meaning the number of global gates is 7, while the sum of the weights in the second set of nodes is 2, meaning the number of global gates is 2. Since the number of global gates is 2, when quantum state transmission is required, only these two global gates need to be used to transmit the quantum state on the transmitting qubit, saving transmission attempts and thus reducing communication transmission costs. To minimize the determination of the number of global gates, this application proposes a quantum state transmission method, device, and quantum computer.

[0061] Reference Figure 3 A flowchart of a quantum state transmission method provided in this specification includes: S101: Obtaining a bit-weighted graph representing the quantum state to be transmitted, and based on the sub-processors to which the quantum state is to be transmitted, determined by a distributed quantum processor, and the transmission allocation constraints, constructing and solving a quadratic unconstrained binary optimization problem representing the allocation of the quantum state on the sub-processors to obtain the optimal allocation combination of the quantum state to the distributed quantum processor. The node in the bit-weighted graph, whether it belongs to a certain sub-processor, is a binary variable in the quadratic unconstrained binary optimization problem, and the transmission allocation constraints constitute a quadratic term in the problem. The optimal allocation combination is represented by a quantum state that includes at least a global gate determined by the distributed quantum processor. The edges in the bit-weighted graph represent the two quantum logic gates between qubits, and the weights represent the number of these gates. The sum of the weights is the total weights on the edges.

[0062] Specifically, the transmission allocation constraints include qubit sub-processor constraints, which state that each qubit can only be assigned to one sub-processor. These qubit sub-processor constraints are expressed as follows:

[0063] Where i represents the index of the qubit, K represents the number of molecular processors, N represents the number of qubits, and X is the decision variable. ik Indicates whether the qubit with index i is assigned to the k-th subprocessor, X ik Take 0 or 1;

[0064] Then, based on the edges representing the global gates between nodes when nodes are partitioned into subprocessors, a first objective function is determined to minimize the weights and values ​​of the representation edges; the first objective function is:

[0065]

[0066] Where F1 represents minimizing the number of global gates, i and j represent the indices of the qubits, K represents the number of subprocessors, N represents the number of qubits, and X is the decision variable. ik The decision variable X represents whether the qubit with index i is assigned to the k-th subprocessor. jk W indicates whether the qubit with index j is assigned to the k-th subprocessor. ij W represents the logic gate acting on qubit i and qubit j. ij (1-X ik X jk ) represents the number of global gates, the subprocessor index k ranges from [0, K], and the qubit indices i and j range from [0, N]; when X ik When = 1, it means that the qubit with index i is assigned to the kth subprocessor.

[0067] Finally, combine the first objective function The penalty term obtained from the quadratic result of the constraint on the qubit subprocessor A quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits across subprocessors is constructed and solved. By solving this problem, the optimal allocation combination of quantum circuits to distributed quantum processors is obtained; that is, the allocation of each bit in the quantum circuit to the distributed quantum processors minimizes the number of global gates. This result ensures that the number of quantum state transmissions is minimized during quantum computation, thereby reducing communication transmission costs. Here, λ1 represents the first penalty coefficient.

[0068] In an optional embodiment, the transmission allocation constraint further includes a load balancing constraint, wherein the load balancing constraint indicates that the difference between the number of nodes allocated to the same subprocessor and the average number of nodes allocated to each subprocessor is less than a load balancing tolerance; optionally, the load balancing constraint is expressed as:

[0069]

[0070] Where i represents the node index, K represents the number of molecular processors, N represents the number of nodes, and X is the decision variable. ik This indicates whether the node with index i is assigned to the k-th partition. This represents the average number of nodes allocated to each partition, and ρ represents the load balancing tolerance.

[0071] Then, combine the first objective function. The penalty term obtained from the quadratic result of the constraint on the qubit subprocessor The penalty term obtained from the quadratic result of the load balancing constraint A quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits across subprocessors is constructed and solved. By solving this problem, the optimal allocation combination of quantum circuits to distributed quantum processors is obtained. This optimal allocation minimizes the number of global gates required to distribute the bits of the quantum circuit across distributed quantum processors, ensuring a balanced distribution of bits to improve computational efficiency. This result minimizes the number of quantum state transfers during quantum circuit execution, thereby reducing communication costs.

[0072] Since different quantum circuits may have multiple sets of qubits, ensuring that the allocation to a distributed quantum processor minimizes the number of global gates is crucial. Therefore, to select the most suitable allocation scheme, the maximum edge dispersion needs to be determined based on the ratio of the sum of edge weights to the sum of the number of edges. Figure 4 As shown in Figure a, nodes {q0, q1, q2} are divided into one part, and nodes {q3, q4, q5} are divided into another part. In this case, the sum of the edge weights of the distribution scheme of {q0, q1, q2} and {q3, q4, q5} to the distributed quantum processor is 6, and the number of edges is 5, that is, there are 6 global gates. The 6 global gates affect 5 types of qubit pairs. The edge dispersion can be expressed as the impact of the number of global gates and the types of qubit pairs affected by the global gates on the communication transmission cost. The edge dispersion can be expressed using the formula F2=∑W / N E Let F2 represent the degree of dispersion of the F2 edge, ∑W represent the total number of global gates, and N represent the total number of global gates. E This represents the number of types of qubit pairs affected by the global gate. For example... Figure 4 As shown in a, F2 = 6 / 5; similarly, in Figure 4 In step b, F2 = 6 / 6. Since the greater the edge dispersion, the lower the communication transmission cost, the target node set {q0, q1, q2} and {q3, q4, q5} will be selected as the final target node set to cut the quantum circuit. That is, after cutting, the partitioned quantum circuit corresponding to {q0, q1, q2} will be executed in one quantum computing processing unit, and the partitioned quantum circuit corresponding to {q3, q4, q5} will be executed in another quantum computing processing unit, thereby minimizing the communication transmission cost and improving the efficiency of quantum computing.

[0073] As shown above, choosing a bit allocation scheme to distributed quantum processors that maximizes edge discreteness can achieve the minimum communication transmission cost and improve quantum computing efficiency. To determine the maximum edge discreteness, firstly, based on the edges representing global gates between nodes when nodes are allocated to subprocessors, a second objective function for maximizing the edge discreteness is determined; the second objective function is:

[0074]

[0075] F2 represents maximizing the global gate discreteness value, where i and j represent the indices of the qubits, K represents the number of subprocessors, N represents the number of qubits, and X is the decision variable. ik The decision variable X represents whether the qubit with index i is assigned to the k-th subprocessor. jk W indicates whether the qubit with index j is assigned to the k-th subprocessor. ij This represents the logic gates acting on qubits i and j. The edge discreteness is the ratio of the sum of edge weights to the sum of the number of edges.

[0076] Then, combine the first objective function. The penalty term obtained from the quadratic result of the constraint on the qubit subprocessor Second objective function Construct and solve a quadratic unconstrained binary optimization problem that characterizes the allocation of quantum circuits on subprocessors.

[0077] Since the quadratic unconstrained binary optimization problem cannot directly solve for the maximum score, it is necessary to modify the second objective function. Transform it into a first objective function that minimizes the sum of the representation weights and values. With the objective function representing the edge sum value The third objective function of the difference That is, combining the first objective function The penalty term obtained from the quadratic result of the constraint on the qubit subprocessor Third objective function A quadratic unconstrained binary optimization problem is constructed and solved to characterize the allocation of quantum circuits across subprocessors. Here, F2 and F3 both represent maximizing the global gate discreteness, and φ represents the transformation coefficient. By solving this quadratic unconstrained binary optimization problem, the allocation scheme of quantum circuits across distributed quantum processors can be further optimized, reducing the number of quantum state transmissions, lowering communication costs, and improving the computational efficiency of quantum circuits.

[0078] In an alternative embodiment, the first objective function can also be combined. The penalty term obtained from the quadratic result of the constraint on the qubit subprocessor The penalty term obtained from the quadratic result of the load balancing constraint Third objective function We construct and solve a quadratic unconstrained binary optimization problem that characterizes the allocation of quantum circuits on subprocessors, thereby ensuring uniform bit partitioning while reducing the number of quantum state transmissions and improving the computational efficiency of quantum circuits.

[0079] S102: For a quantum circuit containing a global gate, obtain a bit of any selected global gate as the target transmission bit, and determine the associated global gate that is merged and transmitted with the target transmission bit of the selected global gate; S103: Based on the target transmission bit, transmit the quantum states of the selected global gate and the associated global gate to realize the transmission of quantum states.

[0080] This application transforms the quantum circuit cutting problem into solving a quadratic unconstrained binary optimization model, finding a way to minimize the number of global gates required for transmission and the transmission cost. Based on minimizing the number of global gates required for transmission and the transmission cost, the quantum circuit is cut, and quantum state transfer is performed based on selected qubits as transmission bits. This reduces the frequency and communication cost of quantum communication within distributed quantum circuits and improves the computational efficiency of distributed quantum circuits.

[0081] In one alternative embodiment, a merge transmission model has been proposed in the prior art, in which consecutive global gates with a common qubit are transmitted through a single teleportation. Merge transmission requires two conditions: first, multiple consecutive global gates; and second, they must share a common qubit. However, the process of determining the global gates for merge transmission in the prior art is complex, resulting in low computational efficiency. Furthermore, since each global gate performs calculations for other global gates it merges with, the computational results are excessive, leading to significant data storage requirements.

[0082] To address the aforementioned issues, for quantum circuits containing global gates, specifically the allocation scheme of bits in the quantum circuit to distributed quantum processors obtained by solving the aforementioned quadratic unconstrained binary optimization problem, a quantum circuit containing global gates is obtained. Then, global gates in the quantum circuit are selected according to the execution sequence of the quantum circuit. For each selected global gate, the process is repeated to obtain a bit acting on the selected global gate as the target transmission bit, determine the associated global gates that are merged with the target transmission bit of the selected global gate for transmission, and use the target transmission bit and the associated global gates as transmission queue parameters for the selected global gate, adding the queue parameters to the transmission list. When the selected global gate is an already determined associated global gate, the global gate in the next execution sequence of the already determined associated global gate in the quantum circuit is selected as the selected global gate according to the execution sequence of the quantum circuit. This process continues until all global gates in the quantum circuit have been selected, and then the quantum states of the selected global gate and associated global gates are transmitted based on the target transmission bits in the transmission list composed of the transmission queue parameters.

[0083] In one alternative embodiment, a quantum circuit is first obtained, comprising at least a global gate determined by a distributed quantum processor, to... Figure 5Taking the quantum circuit shown as an example, the global gate in the quantum circuit, namely global gate G0, is selected according to the execution time sequence of the quantum circuit. For global gate G0, one of the two qubits that global gate G0 acts on is selected as the target transmission bit. For example, if qubit q0 is selected as the target transmission bit, then the subsequent logic gates are traversed according to the execution time sequence starting from the current global gate to determine the associated global gates that are merged and transmitted with the target transmission bit q0 selected by the current global gate G0. That is, the associated global gates of the current global gate G0 are determined to be G2 and G9. Then, the target transmission bit q0 and the associated associated global gates G2 and G9 are used as the transmission queue parameters of the selected global gate, and the queue parameters are added to the transmission list. By using the target transmission bit and the associated associated global gates as the transmission queue parameters of the selected global gate, the merging and transmission of global gates can be achieved, which can reduce the number of quantum state transmissions and effectively improve the computational efficiency of distributed quantum circuits.

[0084] Then, the next global gate is selected according to the execution sequence, and the above process is repeated until all global gates in the quantum circuit are selected. Based on the target transmission bit in the transmission list composed of all transmission queue parameters, the quantum states of the selected global gate and associated global gate are transmitted. For example, the quantum states of the selected global gate G0 and associated global gates G2 and G9 are transmitted with q0 as the target transmission bit, and the quantum states of the selected global gate G6 and associated global gate G7 are transmitted with q1 as the target transmission bit.

[0085] It should be noted that when a global gate is selected as a known associated global gate, the global gate in the next execution sequence of the known associated global gate in the quantum circuit is selected as the selected global gate according to the execution sequence of the quantum circuit. For example, if the quantum bit q0 acting on global gate G0 is selected as the target transmission bit, then the associated global gates G2 and G9 are known associated global gates. In this case, in order to reduce redundant calculations, associated global gate G2 will not be selected as the global gate for subsequent calculations. Therefore, the global gate G4 in the next execution sequence of the known associated global gate G2 will be selected as the global gate and the above process will be repeated. By eliminating the known associated global gates, the redundant calculation of finding and merging transmission global gates is avoided, the amount of calculation result data is reduced, and thus the storage space occupied by the data is reduced.

[0086] Optionally, the step of selecting global gates in a quantum circuit according to the execution timing of the quantum circuit includes: selecting all global gates in the quantum circuit at different sorting positions within the same timing sequence from front to back according to the execution timing of the quantum circuit.

[0087] like Figure 6As shown, since multiple global gates may exist within the same time sequence in this quantum circuit, it is necessary to select all global gates at different sorting positions within the same time sequence in the quantum circuit, namely global gate G0 and global gate G1, according to the execution time sequence of the quantum circuit. Then, using qubit q0 and qubit q5 as the target transmission bits of global gate G0 and global gate G1 respectively, the associated global gates of global gate G0 and global gate G1 are determined, as well as the associated global gates that are merged and transmitted with the target transmission bits of global gate G0 and global gate G1 respectively. The associated global gate of global gate G0 is G2, and the associated global gate of global gate G1 is G3. The target transmission bits q0 and q5 and the associated global gates are used as the transmission queue parameters of the selected global gates, and the queue parameters are added to the transmission list. Since the target transmission bits of these two global gates are not in the same partition, that is, the target transmission bit q0 is in partition P1 and the target transmission bit q5 is in partition P2, the quantum state can be transmitted to different quantum processors at the same time, saving transmission time and improving quantum computing efficiency.

[0088] Optionally, determining the associated global gate for transmission of the target transmission bit combined with the selected global gate includes: determining the relevant logic gate between the selected global gate and the second logic gate as the associated global gate, wherein the second logic gate is the logic gate in which the target transmission bit has a negative impact on the quantum state of the logic gate, or the last logic gate of the quantum circuit, and the relevant logic gate refers to the logic gate in which the target transmission bit has a positive impact on the quantum state of the logic gate.

[0089] In an alternative embodiment, the associated global gate is further defined, such as Figure 5 As shown, for global gate G0, when the target transmission bit is determined to be q0, the associated global gates of the current global gate G0 are G2 and G9. However, since the target transmission bit q0 has a negative impact on the quantum state of the associated global gate G9, it will cause repeated data transmission, resulting in an increase in data transmission volume. On the other hand, the target transmission bit q0 has a positive impact on the quantum state of global gate G2, which will reduce the number of quantum state transmissions. Therefore, the related logic gate between the current global gate G0 and the second logic gate G9 is determined as the associated global gate. That is, when the target transmission bit is q0, the associated global gate of global gate G0 is only global gate G2. This will not cause repeated data transmission, and at the same time reduce the number of quantum state transmissions, effectively improving the computational efficiency of the distributed quantum circuit.

[0090] Optionally, obtaining a bit of the selected global gate's effect as the target transmission bit includes: obtaining any bit of the selected global gate's effect as the target transmission bit; or, for all qubits of the selected global gate's effect, determining the transmission bit with the largest total influence cost as the target transmission bit of the selected global gate, wherein the total influence cost is the sum of the transmission influence costs of the logic gates, including the associated global gate and the second logic gate, and the transmission influence cost is the product of the influence factor value and influence weight corresponding to the logic gate. The influence factor value corresponding to the logic gate is determined according to one of the positive influence, negative influence, or no influence of the target transmission bit on the existence of the logic gate's quantum state, and the influence weight is determined by the ranking position of the quantum logic gate relative to the first global gate and / or the second logic gate.

[0091] In one optional embodiment, a quantum circuit with logic gates arranged in sequence and including at least a global gate is obtained. One of the qubits acting on the first global gate in the quantum circuit is used as the transmission bit. The corresponding influence factor value is determined according to one of the following cases: positive influence, negative influence, or no influence on the quantum state of the logic gate. The subsequent logic gates arranged after the first global gate are traversed in order of logic gates until a second logic gate is detected. The second logic gate is either a logic gate with a negative influence or the last logic gate of the quantum circuit. The total transmission influence cost of all subsequent quantum logic gates from the first global gate to the second logic gate on the transmission bit is determined according to the transmission influence cost determined by the influence factor value and the influence weight. The influence weight is determined by the order position of the subsequent quantum logic gate relative to the first global gate and / or the second logic gate.

[0092] Specifically, first obtain a quantum circuit with logic gates arranged in order and including at least global gates, such as Figure 5 As shown, the qubit q0 acting on the first global gate G0 in the quantum circuit is used as the transmission bit, and the corresponding influence factor value is determined according to one of the positive, negative and no influence of the transmission bit q0 on the quantum state of other logic gates in the quantum circuit. In order to ensure that the positive and negative influences are relative, the influence factor value corresponding to the positive influence is the opposite of the influence factor value corresponding to the negative influence, and the influence factor value corresponding to no influence is 0, so as to avoid the logic gates without influence from affecting the calculation of the total cost of subsequent transmission influence.

[0093] For example, if the influence factor value corresponding to a positive influence is +1, then the influence factor value corresponding to a negative influence is -1. Therefore, when the transmitted bit is q0, the influence factor values ​​of the transmitted bit q0 on the other logic gates in the quantum circuit are as follows: If the transmitted bit q0 has no influence on the quantum states of logic gates G1, G3, G4, G5, and G6 in the quantum circuit, then the influence factor values ​​for logic gates G1, G3, G4, G5, and G6 are 0; if the transmitted bit q0 has a positive influence on the quantum state of logic gate G2 in the quantum circuit, then the influence factor value for logic gate G2 is 1; if the transmitted bit q0 has a negative influence on the quantum state of logic gate G7 in the quantum circuit, then the influence factor value for logic gate G7 is -1.

[0094] Then, the logic gates arranged after the first global gate G0 are traversed in order of logic gates until the second logic gate is detected. The second logic gate is either a logic gate with a negative impact or the last logic gate of the quantum circuit, such as... Figure 5 As shown, the logic gates are traversed and detected in order of logic gates following the first global gate G0. The detected second logic gate is logic gate G7. Finally, the total transmission impact cost of all subsequent quantum logic gates from the first global gate to the second logic gate is determined based on the transmission impact cost determined by the influence factor value and influence weight. The influence weight is determined by the order of the subsequent quantum logic gates relative to the first global gate and / or the second logic gate. Specifically, the total transmission impact cost can be calculated using the following formula:

[0095]

[0096] Among them, F qi E represents the total cost of transmission impact. qi D represents the impact factor value. p -k represents the influence weight, D p It represents the influence distance from the second logic gate to the first global gate, where qi is the qubit numbered i and k is the distance number of the logic gate.

[0097] like Figure 5 As shown, using the above formula, the total cost F of the transmission impact of all subsequent quantum logic gates from the first global gate to the second logic gate on the transmitted bit q0 can be calculated. q0 = (8-2)*1+(8-7)*(-1)=5; The total transmission impact cost represents the optimization effect of selecting the transmission bit q of the current global gate on the subsequent quantum gate transmission. The larger the total transmission impact cost, the better the optimization effect of transmission based on that transmission bit.

[0098] The lower the cost of quantum transmission, the fewer quantum state transmissions can be achieved. Therefore, by using the transmission bit with the highest total transmission cost as the target transmission bit for quantum state transmission, the number of quantum state transmissions can be reduced, effectively improving the computational efficiency of distributed quantum circuits.

[0099] Based on the above method, when the qubit q3, which acts as the first global gate G0 in the quantum circuit, is selected as the transmission bit, as follows: Figure 7 As shown, the influence distance D p =8-0+1=9, so the total cost F of the transmission impact of all subsequent quantum logic gates from the first global gate to the second logic gate on the transmitted bit q3 can be calculated. q3 = (9-4)*1+(9-5)*1+(9-8)*(-1)=8. Therefore, for all qubits affected by the first global gate, the one with the largest total cost is selected as the target transmission bit for quantum state transmission of the first global gate. That is, qubit q3 is selected as the target transmission bit for quantum state transmission of the first global gate. This avoids transmitting the quantum states generated when qubits are affected by logic gates G4 and G5, reduces the number of quantum state transmissions, and effectively improves the computational efficiency of distributed quantum circuits.

[0100] In one optional embodiment, when the effect of the transmitted bits on the quantum state of subsequent logic gates is positive, the transmission cost of subsequent logic gates is reduced by merging the transmitted bits during transmission; specifically, as shown in the example... Figure 5 As shown, global gates G0 and G2 on the quantum circuit have a common qubit q0, and global gates G0 and G2 belong to the same partition of global gates. Therefore, when qubit q0 is used as the transmission bit, global gates G0 and G2 can be merged and transmitted to the target partition, that is, the quantum state of q0 is transmitted from region P1 to region P2 without transmitting the quantum state twice. Therefore, the number of communication transmissions can be saved, which has a positive effect and reduces the transmission cost of subsequent logic gates.

[0101] When the transmitted bits have a negative impact on the quantum state of subsequent logic gates, the transmitted bits cannot be combined with subsequent logic gates to avoid increasing the transmission cost of subsequent logic gates; specifically, for example... Figure 5 As shown, the global gate G0 and logic gate G7 on the quantum circuit have a common qubit q0. However, logic gate G7 is only executed in partition P1 and does not need to be transmitted. Therefore, when qubit q0 is used as a transmission bit for quantum state transmission, it will cause unnecessary quantum state transmission, thereby increasing the communication transmission cost. Therefore, the transmission bit q0 has a negative impact on the quantum state of logic gate G7.

[0102] A global gate whose partition does not perfectly match the partition of the current global gate, or a logic gate that does not act on the transmitted qubit, has no effect on the quantum state of the transmitted bit of the current global gate. Figure 5 As shown, when the transmitted qubit is q0, there is no influence between global gates G0 and G6, and also no influence between global gate G0 and logic gates G4 and G5. That is, the transmitted qubit has no effect on the quantum states of these logic gates, and the influence of these logic gates on the quantum states does not need to be considered. Furthermore, the transmission cost is inversely proportional to the transmission influence cost; the lower the transmission cost of the quantum state, the higher its transmission influence cost. Therefore, the optimal qubit for transmitting the quantum state can be determined based on the value of the transmission influence cost to reduce the transmission cost.

[0103] Optionally, the global gate refers to the logic gate of at least two processors corresponding to the distributed quantum processor in the quantum circuit; when the influence of the transmission bit on the quantum state of the logic gate is positive, the logic gate is a global gate that acts on the transmission bit and is to be transmitted to the target processor corresponding to the first global gate; when the influence of the transmission bit on the quantum state of the logic gate is negative, the logic gate is a local gate that acts on the transmission bit and is located in the target processor containing the transmission bit of the first global gate; the local gate refers to the logic gate of at least two qubits of one processor corresponding to the distributed quantum processor in the quantum circuit; when the influence of the transmission bit on the quantum state of the logic gate is no effect, the logic gate is a local gate or a global gate that is not related to the transmission bit of the first global gate.

[0104] In one alternative embodiment, a global gate refers to a logic gate in a quantum circuit corresponding to at least two processors of a distributed quantum processor, such as... Figure 8 As shown in diagram a, the quantum circuit is divided into partitions P1 and P2. The quantum circuits in partitions P1 and P2 execute computations in different processors. When at least two qubits acted upon by a logic gate belong to quantum circuits in different partitions, the dual-quantum logic gate is a global gate. Figure 8 The logic gates G0 and G1 shown in diagram a are the global gates mentioned above. For example... Figure 8 As shown in Figure a, logic gate G0 is used as the first global gate, and qubit q0 is used as the transmission bit. Since logic gate G1 also acts on qubit q0, and the other qubit q2 acted by logic gate G1 and the qubit q3 acted by the first global gate G0 belong to the same partition P2, logic gate G1 is a global gate that acts on transmission bit q0 and is to be transmitted to the target processor corresponding to the first global gate G0. When quantum state transmission is performed using transmission bit q0, the merging transmission of logic gates can be realized to reduce the number of communication transmissions. Therefore, the influence of transmission bit q0 on the quantum state of logic gate G1 is positive.

[0105] like Figure 8 As shown in diagram b, with logic gate G0 as the first global gate and qubit q0 as the transmission bit, although logic gate G1 also acts on qubit q0, the other qubit q1 acted upon by logic gate G1 does not belong to the same partition P2 as qubit q3 acted upon by the first global gate G0. That is, logic gate G1 acts on transmission bit q0 and is located in the local partition of the target processor containing the first global gate's transmission bit q0. When quantum state transmission is performed using transmission bit q0, since the quantum state of qubit q0 acted upon by logic gate G1 does not need to be transmitted, unnecessary transmission costs are increased. Therefore, the influence of transmission bit q0 on the quantum state of logic gate G1 is negative. Here, "local partition" refers to the qubits acted upon by logic gates in a quantum circuit being located within a partition, i.e., at least two qubit logic gates corresponding to one processor in the distributed quantum processor within the quantum circuit.

[0106] like Figure 8 As shown in Figure c, logic gate G0 is used as the first global gate, and qubit q0 is used as the transmission bit. Since the two qubits acting on logic gate G1 are different from the two qubits acting on the first global gate G0, the first global gate G0 does not affect logic gate G1 when it uses qubit q0 as the transmission bit for quantum state transmission. That is, the transmission bit q0 has no effect on the quantum state of logic gate G1.

[0107] Optionally, the influence weight is determined by the ordering position of the subsequent quantum logic gate relative to the first global gate and / or the second logic gate, including: the influence weight of any target subsequent quantum logic gate is linearly negatively correlated with the distance of any target subsequent quantum logic gate to the first global gate; or the influence weight of any target subsequent quantum logic gate is linearly positively correlated with the distance of any target subsequent quantum logic gate to the second logic gate; or the influence weight of any target subsequent quantum logic gate is linearly positively correlated with the difference between the distance between the first global gate and the second logic gate and the ordering position of any target subsequent quantum logic gate.

[0108] In one alternative embodiment, the smaller the distance from any subsequent quantum logic gate to the first global gate, the smaller the distance number of any subsequent quantum logic gate to the target, and the influence weight is D. p -k, therefore the greater the influence weight, the more linearly negatively correlated the influence weight of any subsequent quantum logic gate of any target is with the distance from the subsequent quantum logic gate of any target to the first global gate. The smaller the distance from the subsequent quantum logic gate of any target to the second logic gate, the larger the distance number of the subsequent quantum logic gate of any target, and the greater the influence weight is D. p -k, so the influence weight will be smaller, that is, the influence weight of any target's subsequent quantum logic gate is linearly positively correlated with the distance from any target's subsequent quantum logic gate to the second logic gate.

[0109] The greater the difference between the distance between the first global gate and the second logic gate and the ordering position of any subsequent quantum logic gate for a given target, the greater the influence distance D between the first global gate and the second logic gate. p The ordering position of any target's subsequent quantum logic gates is the distance number k of those gates, and the influence weight is D. p Therefore, the greater the difference between the distance between the first global gate and the second logic gate and the ordering position of any subsequent quantum logic gate, the greater the influence weight of any subsequent quantum logic gate. In other words, the influence weight of any subsequent quantum logic gate is linearly and positively correlated with the difference between the distance between the first global gate and the second logic gate and the ordering position of any subsequent quantum logic gate. Determining the influence weight provides data support for the total transmission influence cost of subsequent transmitted bits, facilitating the selection of suitable qubits as transmission bits to reduce the number of quantum state transmissions and improve the computational efficiency of distributed quantum circuits.

[0110] In one alternative embodiment, the total transmission influence cost of all subsequent quantum logic gates from the first global gate to the second logic gate on the transmitted bit is determined by the transmission influence cost determined according to the influence factor value and influence weight. The higher the total transmission influence cost, the lower the quantum transmission cost. Therefore, by using the transmitted bit with the largest total transmission influence cost as the target transmitted bit for quantum state transmission, the number of quantum state transmissions can be reduced, effectively improving the computational efficiency of distributed quantum circuits.

[0111] Reference Figure 9 An embodiment of this specification also provides a quantum state transmission device, comprising:

[0112] The optimal allocation combination determination module 201 is used to obtain the bit weighted graph of the quantum circuit representing the quantum state to be transmitted, and based on the sub-processors to which the quantum circuit is to be transmitted and the transmission allocation constraints determined by the distributed quantum processor, construct and solve a quadratic unconstrained binary optimization problem representing the allocation of the quantum circuit on the sub-processors to obtain the optimal allocation combination of the quantum circuit for the distributed quantum processor. Here, whether a node in the bit weighted graph belongs to a certain sub-processor is a binary variable of the quadratic unconstrained binary optimization problem, and the transmission allocation constraints constitute the quadratic term of the quadratic unconstrained binary optimization problem. The optimal allocation combination is represented by a quantum circuit that includes at least a global gate determined by the distributed quantum processor.

[0113] The associated global gate determination module 202 is used to, for a quantum circuit containing a global gate, obtain a bit of any selected global gate as the target transmission bit, and determine the associated global gate that is merged and transmitted with the target transmission bit of the selected global gate.

[0114] Quantum state transmission module 203 is used to transmit the quantum states of selected global gates and associated global gates based on the target transmission bit.

[0115] A quantum control system is characterized by performing quantum computing tasks using the quantum state transmission method described above, or including the quantum state transmission device described above.

[0116] A quantum computer, characterized in that it includes a quantum control system as described above.

[0117] A readable storage medium storing a computer program thereon, characterized in that the computer program, when executed by a processor, can implement the quantum state transmission optimization method described above.

[0118] Regarding the apparatus in the above embodiments, the process of performing each step has been described in detail in the embodiments of the method, and will not be elaborated here.

[0119] Reference Figure 10 This is a schematic diagram of a computer-readable medium provided for embodiments of this specification.

[0120] accomplish Figure 3 The computer instructions of the method shown can be stored on one or more computer-readable media. A computer-readable medium can be a readable signal medium or a readable storage medium. A readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor device, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0121] The computer-readable storage medium may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The readable storage medium may also be any readable medium other than a readable storage medium, capable of transmitting, propagating, or transmitting a program for use by or in connection with an instruction execution device, apparatus, or apparatus. The program code contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0122] Program code for performing the operations of this invention can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0123] In summary, this invention can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that in practice, general-purpose data processing devices such as microprocessors or digital signal processors (DSPs) can be used to implement some or all of the functions of some or all of the components according to the embodiments of the invention. The invention can also be implemented as a device or apparatus program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such programs implementing the invention can be stored on a computer-readable medium or can take the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0124] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the present invention is not inherently related to any specific computer, virtual device, or electronic device, and various general-purpose devices can also implement the present invention. The above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

[0125] The various embodiments in this specification are described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0126] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A quantum state transmission method, characterized in that, include: Obtain the bit-weighted graph of the quantum circuit representing the quantum state to be transmitted. Based on the subprocessors to which the quantum circuit is to be transmitted, determined by the distributed quantum processor, and the transmission allocation constraints, construct and solve a quadratic unconstrained binary optimization problem representing the allocation of the quantum circuit on the subprocessors to obtain the optimal allocation combination of the quantum circuit for the distributed quantum processor. Here, whether a node in the bit-weighted graph belongs to a certain subprocessor is a binary variable of the quadratic unconstrained binary optimization problem, and the transmission allocation constraints constitute the quadratic term of the quadratic unconstrained binary optimization problem. The optimal allocation combination is represented by a quantum circuit that includes at least a global gate determined by the distributed quantum processor. For a quantum circuit containing a global gate, obtain a bit of any selected global gate as the target transmission bit, and determine the associated global gate that is merged and transmitted with the target transmission bit of the selected global gate; Based on the target transmission bit transmission, the quantum states of the selected global gate and the associated global gate are transmitted.

2. The method as described in claim 1, characterized in that, The process involves constructing and solving a quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits across subprocessors, based on the subprocessors to which the quantum circuits are to be transmitted, and the transmission allocation constraints determined by the distributed quantum processor. This includes: The transmission allocation constraints include qubit subprocessor constraints, which state that each qubit can only be assigned to one subprocessor. Based on the edges of the global representation gates between nodes when nodes are partitioned into subprocessors, determine the first objective function that minimizes the weights and values ​​of the representation edges; By combining the first objective function and the penalty term obtained from the quadratic result of the constraint on the qubit subprocessor, a quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits on the subprocessor is constructed and solved.

3. The method as described in claim 2, characterized in that, The first objective function is: Wherein, F1 represents minimizing the number of global gates, i, j represents the index of the quantum bit, K represents the number of sub-processors, N represents the number of quantum bits, decision variable X ik represents whether the quantum bit with index i is divided into the kth sub-processor, decision variable X jk represents whether the quantum bit with index j is divided into the kth sub-processor, W ij represents the logic gate acting on quantum bit i and quantum bit j; W ij (1-X ik X jk ) represents the number of global gates, the range of sub-processor index k is [0, K], and the range of quantum bit index i, j is [0, N]; when X ik =1, it indicates that the quantum bit with index i is divided into the kth sub-processor; The constraints of the quantum bit subprocessor are expressed as follows: Where i represents the index of the qubit, K represents the number of molecular processors, N represents the number of qubits, and X is the decision variable. ik Indicates whether the qubit with index i is assigned to the k-th subprocessor, X ik Take 0 or 1.

4. The method as described in claim 2, characterized in that, The process of constructing and solving a quadratic unconstrained binary optimization problem characterizing the allocation of quantum lines on subprocessors, based on the subprocessors to which the quantum lines are to be transmitted and the transmission allocation constraints determined by the distributed quantum processor, also includes: Based on the edges representing global gates between nodes when nodes are partitioned into subprocessors, a second objective function is determined to maximize the discreteness of the representation edges; where the discreteness of the edges is the ratio of the sum of edge weights to the sum of the number of edges. The problem involves combining the first objective function, the penalty term obtained by quadraticizing the constraint on the qubit subprocessor, and the second objective function to construct and solve a quadratic unconstrained binary optimization problem that characterizes the allocation of quantum circuits on the subprocessor.

5. The method as described in claim 4, characterized in that, The combination of the first objective function, the penalty term obtained by quadraticizing the constraints on the qubit subprocessor, the second objective function, and the construction and solving of the quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits on the subprocessor includes: The second objective function is transformed into a third objective function that minimizes the difference between the first objective function representing the weights and values ​​and the objective function representing the edge sums and values. The problem involves combining the first objective function, the penalty term obtained by quadraticizing the constraint on the qubit subprocessor, and the third objective function to construct and solve a quadratic unconstrained binary optimization problem that characterizes the allocation of quantum circuits on the subprocessor.

6. The method according to any one of claims 4-5, characterized in that, The second objective function is: The third objective function is: Where F2 and F3 both represent maximizing the global gate discreteness value, φ represents the conversion coefficient, i and j represent the indices of the qubits, K represents the number of subprocessors, N represents the number of qubits, and X is the decision variable. ik The decision variable X represents whether the qubit with index i is assigned to the k-th subprocessor. jk W indicates whether the qubit with index j is assigned to the k-th subprocessor. ij This represents the logic gate that operates on qubit i and qubit j.

7. The method according to any one of claims 2-3, characterized in that, The process involves constructing and solving a quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits across subprocessors, based on the subprocessors to which the quantum circuits are to be transmitted, and the transmission allocation constraints determined by the distributed quantum processor. This includes: The transmission allocation constraints also include load balancing constraints, which state that the difference between the number of nodes assigned to the same subprocessor and the average number of nodes assigned to each subprocessor is less than the load balancing tolerance. By combining the first objective function, the penalty term obtained by quadratic transformation of the qubit subprocessor constraint, and the penalty term obtained by quadratic transformation of the load balancing constraint, a quadratic unconstrained binary optimization problem characterizing the allocation of quantum circuits on the subprocessor is constructed and solved.

8. The method as described in claim 7, characterized in that, The load balancing constraint is expressed as follows: Where i represents the node index, K represents the number of molecular processors, N represents the number of nodes, and X is the decision variable. ik This indicates whether the node with index i is assigned to the k-th partition. This represents the average number of nodes allocated to each partition, and ρ represents the load balancing tolerance.

9. A quantum state transmission device, characterized in that... ,include: The optimal allocation combination determination module is used to obtain the bit weighted graph of the quantum circuit representing the quantum state to be transmitted, and based on the sub-processors to which the quantum circuit is to be transmitted and the transmission allocation constraints determined by the distributed quantum processor, it constructs and solves a quadratic unconstrained binary optimization problem representing the allocation of the quantum circuit on the sub-processors to obtain the optimal allocation combination of the quantum circuit for the distributed quantum processor. Here, whether a node in the bit weighted graph belongs to a certain sub-processor is a binary variable of the quadratic unconstrained binary optimization problem, and the transmission allocation constraints constitute the quadratic term of the quadratic unconstrained binary optimization problem. The optimal allocation combination is represented by a quantum circuit that includes at least a global gate determined by the distributed quantum processor. The associated global gate determination module is used to obtain a bit of any selected global gate as the target transmission bit for a quantum circuit containing global gates, and determine the associated global gate that is merged and transmitted with the target transmission bit of the selected global gate. The quantum state transmission module is used to transmit the quantum states of selected global gates and associated global gates based on the target transmission bit.

10. A quantum control system, characterized in that, The execution of quantum computing tasks is carried out using the quantum state transmission method as described in any one of claims 1 to 8, or includes the quantum state transmission device as described in claim 9.

11. A quantum computer, characterized in that, Including the quantum control system as described in claim 10.

12. A readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it can implement the quantum state transmission optimization method as described in any one of claims 1 to 8.

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