Techniques for visualizing multiple time domain reflectometry waveforms

Abstract

The present disclosure relates to techniques for visualizing multiple time domain reflectometry waveforms. Various embodiments include a TDR viewer for visualizing a large number of reflected TDR signals on a 3D display system. The TDR system captures waveforms of reflected TDR signals associated with signal propagation and delay. The TDR viewer displays waveforms of signals as they propagate through a transmission line. These waveforms can show changes in the reflected TDR signals due to transmission between various printed circuit board layers, through printed circuit board component connectors and vias, and across interconnects and socket pins. The 3D visualization of the reflected TDR signals can be rotated, zoomed in or out, and filtered to display a subset of signals in the 3D space. The 3D visualization enables a test engineer to more quickly identify TDR signals of interest, including signals with longer or shorter delay times relative to other TDR signals and signals exhibiting undesirable signal properties.

Description

Technical Field

[0001] Various embodiments generally relate to integrated circuit manufacturing and testing, and more specifically, to techniques for visualizing multiple time-domain reflectometry waveforms. Background Technology

[0002] Time-domain reflectometry (TDR) is a signal measurement technique that involves sending a signal along a transmission line and measuring the signal reflected back across the transmission line. TDR involves placing a signal transmitter and a signal receiver at one end of the transmission line. For example, TDR can be used to measure the time delay between the transmission of a pulse, step, or other signal by the transmitter along the transmission line and the reception of the corresponding reflected signal by a receiver at the same point as the transmitter. The time difference between a specific characteristic of the transmitted signal and a corresponding characteristic of the received signal is a measure of the round-trip time of the transmission line. Therefore, half of this round-trip time is the one-way travel time required for the signal to travel from one end of the transmission line to the other. This one-way time can be converted to the length of the transmission line using a mathematical function.

[0003] A Test Receiver (TDR) can be used in device test systems where multiple transmission lines (e.g., multiple electrical traces on a printed circuit board or load board) connect multiple test signal transmitters to corresponding interconnects (e.g., spring probes) on a test fixture. Furthermore, a TDR can be used in device test systems where a test socket is installed that contacts an interconnect and connects the interconnect to corresponding pins on the socket. During the test, the pins on the socket are connected to corresponding pins on the device under test (DUT). The TDR can be used to measure a first distance between the transmitter and the interconnect, and a second distance between the transmitter and the pins on the socket. The difference between the first and second distances is a measure of the distance between the interconnect and the pins on the socket.

[0004] In high-speed test systems, timing the transmitted test signals so that they arrive at the socket pins simultaneously can be advantageous. By using the transmission line distance measured via a TDR, test signals can be transmitted earlier along a longer transmission line and / or later along a shorter transmission line, ensuring simultaneous arrival at the socket pins. Furthermore, one or more reflected signals can be displayed on a display device to visualize transmission time and reflected signal properties, such as overshoot, undershoot, rise time, fall time, and / or similar properties. These properties can indicate impedance mismatch, short circuits, open circuits, and / or similar problems.

[0005] One drawback of existing visualization techniques for reflected TDR signals is that the TDR signals overlap on a two-dimensional (2D) display showing voltage (y-axis) changing over time (x-axis). In this 2D display, it is difficult to distinguish these signals, especially when a large number of signals (typically hundreds or thousands in high-volume production environments within automated test systems) overlap on a single 2D display. The situation becomes even more complex when multiple devices are present on the same test board. As a result, diagnosing problems and adjusting transmitter timings for specific transmitters can be extremely tedious, difficult, time-consuming, and error-prone.

[0006] As mentioned above, what is needed in the art is a more efficient technique for visualizing reflected TDR signals in electronic device testing systems. Summary of the Invention

[0007] Various embodiments of this disclosure provide a method. The method includes receiving a plurality of time-domain reflectometry (TDR) signals from a test system. The method also includes generating a corresponding waveform included in a plurality of waveforms for each TDR signal included in the plurality of TDR signals. The method further includes generating a three-dimensional (3D) visualization of the plurality of waveforms. In this method, each waveform included in the plurality of waveforms is offset differently from all other waveforms included in the plurality of waveforms along one dimension of the 3D visualization.

[0008] Other embodiments include, but are not limited to, systems for implementing one or more aspects of the disclosed technology, one or more computer-readable media including instructions for performing one or more aspects of the disclosed technology, and methods for performing one or more aspects of the disclosed technology.

[0009] Compared to existing technologies, at least one technical advantage of the disclosed technology is that it allows test engineers to visually observe a large number of waveforms simultaneously in 3D space. 3D visualization technology enables test engineers to more quickly identify TDR signals of interest, including signals with longer or shorter delay times relative to other TDR signals, signals exhibiting undesirable signal properties, and / or similar signals. More specifically, test engineers can visually determine whether waveforms deviate from nominal values ​​and whether manufacturing processes should be improved, whether printed circuit boards and / or interconnects should be repaired or replaced, whether the layout of transmission lines on the printed circuit board should be changed, whether the timing of one or more transmitters should be adjusted, and / or similar operations.

[0010] Furthermore, the TDR viewer allows test engineers to select individual transmission lines and / or groups of transmission lines separately, enabling them to easily compare the waveforms of certain transmission lines of interest. Test engineers can quickly identify whether abnormal waveforms indicate manufacturing problems, layout issues, PCB quality problems, and / or similar issues. As a result, compared to previous conventional methods, test engineers can identify and resolve transmission line problems faster and more effectively. This improves the efficiency of the engineering environment and the productivity of the manufacturing process. This increased efficiency can lead to reduced manufacturing test time, increased test equipment utilization, reduced test equipment power consumption, and therefore lower test costs. These advantages represent one or more technological improvements over existing methods. Attached Figure Description

[0011] To gain a more detailed understanding of the features described above in the various embodiments, reference can be made to a more specific description of the inventive concept briefly summarized above, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings illustrate only typical embodiments of the inventive concept and should therefore not be construed as limiting the scope in any way, and that other equally effective embodiments exist.

[0012] Figure 1 This is a block diagram illustrating a computing system that can be used as a platform and / or control system configured to implement one or more aspects of various embodiments; Figure 2 The illustration shows various embodiments including Figure 1 Application load boards in computing systems; Figure 3 This illustrates the inclusion of various embodiments. Figure 1 A block diagram of the TDR test circuit in the computing system; Figure 4 The following are illustrations illustrating the test socket being disconnected from the application load board according to various embodiments. Figure 3 How does a TDR test circuit measure the propagation delay of a transmission line? Figure 5 The following are illustrations showing the test socket connected to the application load board according to various embodiments. Figure 3 How does a TDR test circuit measure the propagation delay of a transmission line? Figure 6 Various embodiments are shown. Figure 3 How does the TDR test circuit measure the propagation delay of the test socket connected to the application load board? Figure 7 It is a 3D visualization of the reflected TDR signal when the application load board is in an off state, according to various embodiments; Figure 8 Viewed from an alternative view according to various embodiments Figure 7 3D visualization of reflected TDR signals; Figure 9 It is a 3D visualization of the reflected TDR signal when the application load board is in a connected state, according to various embodiments; Figure 10 Viewed from an alternative view according to various embodiments Figure 9 3D visualization of reflected TDR signals; Figure 11 It is a 3D visualization of reflected TDR signals according to various embodiments; Figure 12 This is an alternative view taken from when the application load board is in a disconnected state, according to various embodiments. Figure 11 3D visualization of reflected TDR signals; Figure 13 This is an alternative view viewed from the perspective of various embodiments when the application loadboard is in a connected state. Figure 11 3D visualization of reflected TDR signals; Figure 14 According to various embodiments Figure 13 3D visualization of a subset of reflected TDR signals; Figure 15 Viewed from an alternative view according to various embodiments Figure 14 3D visualization of a subset of reflected TDR signals; and Figure 16 It is according to various embodiments for utilization Figures 1-3 The flowchart shows the steps of the method for generating 3D visualization of the reflection time-domain reflection method signal in the test system. Detailed Implementation

[0013] Various embodiments of the disclosed technology include a TDR viewer for visualizing a large number of reflected TDR signals on a 3D display system. The TDR system captures waveforms of the reflected TDR signals associated with signal propagation and delay. The TDR viewer displays the signal waveforms as the signal propagates through transmission lines. These waveforms can show variations in the reflected TDR signals due to transmission between various printed circuit board layers, through component connectors and vias on the printed circuit board, and across interconnects and socket pins. 3D visualization of the reflected TDR signals can be rotated, zoomed in or out in 3D space, and filtered to display subsets of the signal.

[0014] In the following description, numerous specific details are set forth to provide a more thorough understanding of the various embodiments. However, those skilled in the art will recognize that the inventive concept can be practiced even without one or more of these specific details.

[0015] System Overview Figure 1 This is a block diagram illustrating a computing system 100, which can be used as a platform and / or control system configured to implement one or more aspects of various embodiments. As shown, in some embodiments, the computing system 100 may be a "server" computer system. The computing system 100 includes an address / data bus 150 for transmitting information and a central processing unit complex 105 functionally coupled to the bus 150 for processing information and instructions. The bus 150 may include, for example, a Peripheral Component Interconnect Express (PCIe) computer expansion bus, an industry standard architecture (ISA), an extended ISA (EISA), Microchannel, multiplexed buses, IEEE 796, IEEE 1196, IEEE 1496, PCI, Computer Automated Measurement and Control (CAMAC), MBus, Runway bus, Compute Express Link (CXL), and so on.

[0016] In some embodiments, the central processing unit (CPU) complex 105 may include a single processor or multiple processors, such as a multi-core processor or multiple independent processors. The CPU complex 105 may include any combination of various types of well-known processors, including but not limited to digital signal processors (DSPs), graphics processors (GPUs), complex instruction set (CISC) processors, reduced instruction set (RISC) processors, very long word (VLIW) processors, and so on. The computing system 100 also includes volatile memory 115 (e.g., random access memory RAM) coupled to bus 150 for storing information and instructions of the CPU complex 105, and non-volatile memory 110 (e.g., read-only memory ROM) coupled to bus 150 for storing static information and instructions of the CPU complex 105. The computing system 100 may optionally include a modifiable non-volatile memory 120 (e.g., NOR flash memory) for storing information and instructions of the central processing unit complex 105, which may be updated after the computing system 100 is manufactured. In some embodiments, only one of the non-volatile memory 110 or the modifiable non-volatile memory 120 may exist.

[0017] Figure 1 The computing system 100 also includes an optional input device 130. The input device 130 can selectively transmit information and commands to the central processing unit complex 105. The input device 130 can be any suitable device for transmitting information and / or commands to the computing system 100. For example, the input device 130 can take the form of a keyboard, buttons, joystick, trackball, audio sensor (e.g., microphone), touch-sensitive digitizer panel, eye scanner, etc.

[0018] The computing system 100 may include a display unit 125. The display unit 125 may include a liquid crystal display (LCD), a cathode ray tube (CRT), a field emission display (FED, also known as a flat panel CRT), a light-emitting diode (LED), a plasma display, an electroluminescent (EL) display, electronic paper, electronic ink (e-ink), and / or other display devices suitable for creating user-recognizable graphic images and / or alphanumeric characters. In some embodiments, the display unit 125 may have an associated lighting device.

[0019] The computing system 100 may also optionally include an expansion interface 135 coupled to the bus 150. The expansion interface 135 may implement many well-known standard expansion interfaces, including but not limited to Secure Digital Card (SDC) interfaces, Universal Serial Bus (USB) interfaces, Compact Flash, Personal Computer (PC) Card (PCC) interfaces, Card Bus, Peripheral Component Interconnect (PCI) interfaces, Peripheral Component Interconnect High Speed ​​(PCI High Speed), Mini PCI interfaces, IEEE 1394, Small Computer System Interface (SCSI), PCMCIA (Personal Computer Memory Card International Association) interfaces, Industry Standard Architecture (ISA) interfaces, RS-232 interfaces, and so on. In some embodiments of this disclosure, the expansion interface 135 may include signals substantially compatible with the signals of the bus 150.

[0020] A variety of well-known devices can be attached to the computing system 100 via bus 150 and / or expansion interface 135. Examples of such devices include, but are not limited to, rotating magnetic storage devices, flash memory devices, digital cameras, wireless communication modules, digital audio players, and global positioning system (GPS) devices.

[0021] The computing system 100 may also optionally include a communication port 140. The communication port 140 may be implemented as part of the expansion interface 135. When implemented as a standalone interface, the communication port 140 is typically used to exchange information with other devices via communication-oriented data transmission protocols. Examples of communication ports include, but are not limited to, RS-232 ports, Universal Asynchronous Receiver / Transmitter (UART), USB ports, infrared transceivers, Ethernet ports, IEEE 1394, and synchronous ports.

[0022] The computing system 100 may optionally include a network interface 160, which may implement a wired or wireless network interface. In some embodiments, the computing system 100 may include additional software and / or hardware features (not shown).

[0023] 3D visualization of multiple time-domain reflection waveforms In some embodiments, the computing system 100 may be configured as a test system for testing one or more Devices Under Test (DUTs). In such embodiments, the computing system 100 may be coupled to an application load board. The application load board includes one or more mounting bases, each of which can accommodate a test socket. One or more DUTs may be mounted on one or more test sockets. The computing system 100 may execute test procedures to test the DUTs mounted on the test sockets. Before executing test procedures on one or more DUTs, the computing system 100 may perform TDR measurements using the techniques described herein. Test engineers may use these TDR measurements to determine the propagation delay and / or length of electrical signal traces that connect signal drivers to the application load board and, consequently, to the test sockets. Test engineers may use these TDR measurements to calibrate the test sockets by advancing and / or delaying certain signals from one or more signal drivers such that these signals from the signal drivers arrive at the test sockets simultaneously. Furthermore, test engineers may use these TDR measurements to determine whether certain electrical signal traces, certain spring probes on the application load board, and / or certain connections on the test sockets indicate that the application load board and / or the test sockets should be repaired or replaced.

[0024] Figure 2 The illustration shows various embodiments including Figure 1 The application load board 200 in the computing system 100. The application load board 200 and / or any of its components can be in one or more computing systems (e.g., Figure 1 The application load board 200 is implemented on the computing system 100. As shown, the application load board 200 includes, but is not limited to, a distribution board (PDB) 210 and a test interface board (TIB) 215. The test interface board 215 can be attached to the distribution board 210 before the test procedure is executed, and can be detached from the distribution board 210 upon completion of the test procedure. The application load board 200 can be associated with an automated placement machine (not shown) that can automatically attach and / or detach the test interface board 215 from the distribution board 210. Additionally or alternatively, the user can manually attach and / or detach the test interface board 215 from the distribution board 210.

[0025] The power distribution board 210 supplies power to the test interface board 215 to power the test process and the TDR measurement techniques described herein. The test interface board 215 of the application load board 200 includes one or more mounting bases, each of which can accommodate a test socket 220. One or more DUTs can be mounted on one or more test sockets 220. The computing system 100 can perform TDR measurements on the test interface board 215 and test sockets 220 of the application load board 200 using the techniques described herein. Test engineers can use these TDR measurements to determine the propagation delay and / or length of electrical signal traces that connect signal drivers to the application load board 200 and, consequently, to the test sockets 220. Test engineers can use these TDR measurements to calibrate the test sockets 220 by advancing and / or delaying certain signals from one or more signal drivers such that these signals from the signal drivers arrive at the test sockets 220 simultaneously. In addition, test engineers can use these TDR measurements to determine whether certain electrical signal traces, certain spring probes on the application load board 200, and / or certain connections on the test socket 220 indicate that the application load board 200 and / or test socket 220 should be repaired or replaced.

[0026] Figure 3 This illustrates the inclusion of various embodiments. Figure 1 A block diagram of the TDR test circuit 300 in the computing system 100. The TDR test circuit 300 and / or any of its components may be present in one or more computing systems (e.g., Figure 1 The TDR test circuit 300 is implemented on the computing system 100. When one or more instances of the TDR test circuit 300 are implemented on the computing system 100, the computing system 100 may be referred to as a test system, or more specifically, as an automated test apparatus (ATE). As shown, the TDR test circuit 300 includes, but is not limited to, a signal generator 310, test ATE input / output (IO) channels 320, a transmission line 330, a time domain reflectometer 340, and... Figure 2 A test socket 220. Additionally, the tester ATE IO channel 320 includes a signal driver 322 and a signal receiver 324.

[0027] In operation, signal generator 310 generates a test signal and sends it to signal driver 322 in tester ATE IO channel 320. In some embodiments, signal generator 310 generates a step test signal that causes the output of signal generator 310 to step from zero volts (0 V) to three volts (3 V) relative to ground 312. Alternatively or additionally, signal generator 310 generates a step test signal that causes the output of signal generator 310 to step from any first voltage to any other second voltage relative to ground 312. Alternatively or additionally, signal generator 310 generates any other test signal suitable for time-domain reflectometry at any technically feasible voltage.

[0028] The signal driver 322 included in the tester ATE IO channel 320 receives test signals from the signal generator 310 and sends the test signals to the transmission line 330. The transmission line 330 may be an electrical trace on the printed circuit board (PCB) of the application load board 200, a wire or wire harness in a cable connected to the application load board 200, etc.

[0029] The test signal sent by the signal driver 322 propagates along the transmission line 330. The transmission line 330 is connected to a spring probe mounted on the application load board 200. Figure 3 (Not shown in the image). The application load board 200 includes a probe field with multiple spring probes. Each spring probe included in the probe field is configured to connect to a different pin of the test socket 220. When the test socket 220 is mounted, each spring probe of the probe field can retract and / or expand to contact a different connection point on the DUT. Similarly, each spring probe of the probe field can retract and / or expand to contact a different electrical signal trace on the application load board 200. In this way, the spring probes can carry signals, including test signals, between the reference DUT mounted in the test socket 220 and the application load board 200.

[0030] When the test signal generated by signal generator 310 and transmitted by signal driver 322 via transmission line 330 reaches the pin of the spring probe and / or test socket 220 mounted on application load board 200, the test signal is reflected back as a reflected TDR signal. The reflected TDR signal propagates along transmission line 330 until it reaches signal receiver 324 included in tester ATEIO channel 320. Signal receiver 324 receives the reflected TDR signal from transmission line 330 and sends it to time domain reflectometer 340. Signal driver 322 is located near signal receiver 324, and the connection point between the output of signal driver 322 and the input of signal receiver 324 is called the observation point.

[0031] Time-Domain Reflectometer 340 receives the reflected TDR signal from signal receiver 324 and can perform and / or facilitate various measurements of the reflected TDR signal, including comparing the reflected TDR signal with the originally transmitted test signal. In this regard, Time-Domain Reflectometer 340 performs time-domain reflectometry, a measurement technique for determining the time required for a test signal generated by signal generator 310 and transmitted by signal driver 322 to travel through transmission line 330 and be reflected back to signal receiver 324. This time is called propagation delay. Time-Domain Reflectometer 340 can measure the propagation delay of the test signal transmission through electrical traces on application load board 200 and / or through pins of test socket 220.

[0032] The technique of using time-domain reflectometry to measure propagation delay on the electrical traces of the application load board 200 is called fixture delay calibration. The time-domain reflectometer 340 performs fixture delay calibration in several steps. In the first step, with the application load board 200 disconnected relative to the test socket 220, the time-domain reflectometer 340 measures a first propagation delay between the test signal sent by the signal driver 322 and the reflected TDR signal received by the signal receiver 324. The time-domain reflectometer 340 can convert this first propagation delay (referred to as the disconnection propagation delay) into the distance from the signal driver 322 to the spring probe mounted on the application load board 200. In the second step, with the application load board 200 connected relative to the test socket 220, the time-domain reflectometer 340 measures a second propagation delay between the test signal sent by the signal driver 322 and the reflected TDR signal received by the signal receiver 324. The time-domain reflectometer 340 can convert this second propagation delay (referred to as the connection state propagation delay) into the distance from the signal driver 322 to the pin of the test socket 220 mounted on the application load board 200. In the third step, the time-domain reflectometer 340 determines the third propagation delay by subtracting the first propagation delay (disconnection propagation delay) from the second propagation delay (connection propagation delay). The time-domain reflectometer 340 can convert this third propagation delay (referred to as the test socket propagation delay) into the distance between the spring probe mounted on the application load board 200 and the test socket 220 mounted on the application load board 200.

[0033] Furthermore, the time-domain reflectometer 340 may include a TDR viewer that generates a 3D visualization of the waveform generated by the reflected TDR signal received from the tester ATE IO channel 320. The time-domain reflectometer 340 may display this 3D visualization on a display unit (e.g., display unit 125). From this 3D visualization, the test engineer can view the propagation delay of the test signal generated by the signal generator 310 and transmitted by the signal driver 322 as it propagates along the transmission line 330 to the application load board 200 and the test socket 220. The test engineer can also view the propagation delay of the reflected TDR signal as it reflects from the application load board 200 and the test socket 220, propagates along the transmission line 330, and reaches the signal receiver 324.

[0034] In some embodiments, each transmission line 330 may include various features, including one or more layers of a PCB, one or more cable connectors, one or more PCB connectors, one or more vias on the PCB, etc. These features may cause various distortions in the test signal and / or the reflected TDR signal. Furthermore, each transmission line 330 may be affected by various forms of damage, including tears and scratches in the cable shield, tears and scratches in electrical signal traces, vias, and layers on the application load board 200, impedance mismatch, short circuits, open circuits, etc. These forms of damage may also cause various distortions in the test signal and / or the reflected TDR signal. These distortions can be observed in the reflected TDR signal received by the time domain reflectometer 340. The time domain reflectometer 340 may include a TDR viewer that generates a 3D visualization of the waveform generated by the reflected TDR signal received from the tester ATE IO channel 320. The time domain reflectometer 340 may display this 3D visualization on a display unit (e.g., display unit 125). From this 3D visualization, test engineers can view signal distortion as the test signal generated by signal generator 310 and transmitted by signal driver 322 propagates along transmission line 330 through PCB layers, connectors, vias, impedance mismatches, and damaged areas, and reaches application load board 200 and / or test socket 220. Test engineers can also view the propagation delay of the reflected TDR signal as it reflects from application load board 200 and test socket 220, propagates along transmission line 330 through PCB layers, connectors, vias, impedance mismatches, and damaged areas, and reaches signal receiver 324. Distortion indicators in the waveform that may suggest the need for further analysis include: slower or faster rise times than average, later or earlier rise times than average, dips and peaks in the waveform, waveforms maintaining a constant voltage, etc.

[0035] The test system may include multiple TDR test circuits 300 to simultaneously test multiple pins of a specific test socket 220 mounted at a test site on the application load board 200. Furthermore, the test system may include additional multiple TDR test circuits 300 to simultaneously test multiple pins of other test sockets 220 mounted at other test sites on the application load board 200. Therefore, the computing system 100 may include hundreds or thousands of instances of the TDR test circuits 300 that concurrently generate test signals and perform time-domain reflectometry on the reflected TDR signals of the generated test signals to multiple pins of multiple test sockets.

[0036] In this respect, the TDR test circuit 300 can be replicated for each different spring probe mounted on the application load board 200 and correspondingly for each different pin of the test socket 220 connected to the corresponding pin of the DUT. The time domain reflectometer 340 can simultaneously measure the propagation delay associated with multiple instances of the TDR test circuit 300 to calibrate the test fixture delay. The time domain reflectometer 340 can advance and / or delay test signals sent to multiple signal drivers 322, such that all test signals sent by the multiple signal drivers 322 from multiple instances of the tester ATE IO channel 320 arrive at the corresponding pin of the test socket 220 simultaneously. In this respect, the time domain reflectometer 340 can store the off-state propagation delay, the connected state propagation delay, and / or the test socket propagation delay in a database. The time domain reflectometer 340 can determine the average propagation delay of the transmission lines 330 of multiple tester ATE IO channels 320 connected to different pins of the test socket 220. This average propagation delay can be the mean propagation delay, the median propagation delay, the mode propagation delay, etc.

[0037] The test system implemented on the computing system 100 can compare the average propagation delay with the individual propagation delay of each individual tester ATE IO channel 320. If the propagation delay of a particular tester ATE IO channel 320 is greater than the average propagation delay, the test system can advance the test signal sent to the signal driver 322 of that tester ATE IO channel 320. The test system can advance the test signal by the difference between the propagation delay of that particular tester ATE IO channel 320 and the average propagation delay. If the propagation delay of a particular tester ATE IO channel 320 is less than the average propagation delay, the test system can delay the test signal sent to the signal driver 322 of that tester ATE IO channel 320. The test system can delay the test signal by the difference between the average propagation delay and the propagation delay of that particular tester ATE IO channel 320. In this way, the test signals sent to the various signal drivers 322 of the multiple tester ATE IO channels 320 can be calibrated to arrive at the corresponding pins of the test socket 220 simultaneously.

[0038] The time domain reflectometer 340 may include a TDR viewer that generates a 3D visualization of multiple waveforms generated by reflected TDR signals received through multiple tester ATE IO channels 320. The time domain reflectometer 340 can display this 3D visualization on a display unit (e.g., display unit 125) using the TDR viewer. The time domain reflectometer 340 displays each waveform along one dimension of the 3D visualization with an offset different from all other waveforms. Furthermore, the time domain reflectometer 340 can receive user input to rotate, resize, translate, and zoom the 3D visualization in 3D space.

[0039] The time-domain reflectometer 340 can simultaneously display many, most, or all of the reflected TDR waveforms from the application load board 200 and / or test socket 220. The time-domain reflectometer 340 receives reflected TDR signals from multiple transmission lines 330 connected to the application load board 200 and / or test socket 220. From these reflected TDR signals, the time-domain reflectometer 340 generates waveforms associated with the propagation and delay of the test signal, where each waveform corresponds to a different reflected TDR signal. Each waveform displays the test signal as it propagates through the corresponding transmission line 330 (including propagation between PCB layers, connectors, and vias of the application load board 200). As a result, a 3D visualization displays the various waveforms and visually indicates the associated performance of the corresponding reflected TDR signals. Test engineers can review the 3D visualization to determine if the waveforms show any deviation from expected and / or nominal values, shapes, and characteristics. Through this 3D visualization of multiple reflected waveforms, test engineers can measure the propagation delay of various reflected TDR signals. Furthermore, test engineers can quickly identify and isolate certain TDR signals indicating specific problems, defects, damage, and / or other issues. The test engineer can then determine what remedial measures (if any) should be recommended, including repairing the application load board 200 or test socket 220, replacing the application load board 200 or test socket 220, improving the manufacturing process of the application load board 200 or test socket 220, changing the electrical signal routing layout and / or cable construction of the application load board 200 or test socket 220, etc.

[0040] Figure 4 The following are illustrations illustrating the test socket being disconnected from the application load board according to various embodiments. Figure 3 The TDR test circuit 300 measures the propagation delay of a transmission line. The figure illustrates the change of voltage 420 at the output of signal driver 322 and the input of signal receiver 324 over time 430. As previously described, signal generator 310 generates a test signal and sends it to signal driver 322 in the tester ATE IO channel 320. In some embodiments, the test signal generated by signal generator 310 is a step signal that causes the output of signal generator 310 to step from 0 V to 3.0 V relative to ground 312. The output impedance of signal driver 322 and the input impedance of transmission line 330 form a voltage divider based on the ratio of output impedance to input impedance. In some embodiments, the output impedance of signal driver 322 and the input impedance of transmission line 330 are the same. For example, the output impedance of signal driver 322 could be 50 ohms (50... Furthermore, the input impedance of transmission line 330 can also be 50Ω. .

[0041] In this embodiment, the voltage of the test signal generated by signal generator 310 is evenly distributed between the output of signal driver 322 and transmission line 330. Therefore, at the moment when the voltage of the test signal generated by signal generator 310 steps from 0 V to 3.0 V, half of this voltage (i.e., 1.5 V) is measured at the output of signal driver 322 and also at the input of signal receiver 324. The remaining 1.5 V of the test signal propagates along transmission line 330 until the test signal reaches the spring probe mounted on application load board 200. The test signal is then reflected back through transmission line 330 to the output of signal driver 322 and the input of signal receiver 324.

[0042] When the test signal reaches the output of signal driver 322 and the input of signal receiver 324, the voltage at that point increases from 1.5 V to 3.0 V. Time-domain reflectometry (TDDR) 340 measures the total disconnection delay 432 from the moment the output of signal driver 322 steps from 0 V to 1.5 V until the moment the output of signal driver 322 steps from 1.5 V to 3.0 V. This time (denoted as time t1) represents the round-trip time of the test signal propagating from the output of signal driver 322 through transmission line 330 and reflected back to the input of signal receiver 324. Assuming the propagation speed is the same in both directions, the transmission line delay 400 of the test signal propagating from the output of signal driver 322 to the spring probe mounted on application load board 200 is equal to the reflection delay 410 of the reflected TDR signal propagating from the spring probe mounted on application load board 200 to the input of signal receiver 324. Therefore, the unidirectional clamping delay 434 is half of the total disconnection delay 432, i.e., t1 / 2.

[0043] Figure 5 The following are illustrations showing the test socket connected to the application load board according to various embodiments. Figure 3 The TDR test circuit 300 measures the propagation delay of a transmission line. The figure illustrates the change of voltage 520 at the output of signal driver 322 and the input of signal receiver 324 over time 530. As previously described, signal generator 310 generates a test signal and sends it to signal driver 322 in the tester ATE IO channel 320. In some embodiments, the test signal generated by signal generator 310 is a step signal that causes the output of signal generator 310 to step from 0 V to 3.0 V relative to ground 312. The output impedance of signal driver 322 and the input impedance of transmission line 330 form a voltage divider based on the ratio of output impedance to input impedance. In some embodiments, the output impedance of signal driver 322 and the input impedance of transmission line 330 are the same. For example, the output impedance of signal driver 322 could be 50 Ω. Furthermore, the input impedance of transmission line 330 can also be 50Ω. .

[0044] In this embodiment, the voltage of the test signal generated by signal generator 310 is evenly distributed between the output of signal driver 322 and transmission line 330. Therefore, at the moment when the voltage of the test signal generated by signal generator 310 steps from 0 V to 3.0 V, half of that voltage (i.e., 1.5 V) is measured at the output of signal driver 322 and also at the input of signal receiver 324. The remaining 1.5 V of the test signal propagates along transmission line 330 until the test signal reaches the pin of test socket 220 mounted on application load board 200. The test signal is then reflected back through transmission line 330 to the output of signal driver 322 and the input of signal receiver 324.

[0045] When the test signal reaches the output of signal driver 322 and the input of signal receiver 324, the voltage at that point increases from 1.5 V to 3.0 V. Time-domain reflectometer 340 measures the total connection delay 532 from the moment the output of signal driver 322 steps from 0 V to 1.5 V until the moment the output of signal driver 322 steps from 1.5 V to 3.0 V. This time (denoted as time t2) represents the round-trip time of the test signal propagating from the output of signal driver 322 through transmission line 330 and reflected back to the input of signal receiver 324. Assuming the propagation speed is the same in both directions, the transmission line delay 500 of the test signal propagating from the output of signal driver 322 to the test socket 220 mounted on application load board 200 is equal to the reflection delay 510 of the reflected TDR signal propagating from the test socket 220 mounted on application load board 200 to the input of signal receiver 324. Therefore, the unidirectional fixture delay 534 is half of the total connection delay 532, i.e., t2 / 2.

[0046] Figure 6 Various embodiments are shown. Figure 3The TDR test circuit 300 measures the propagation delay of a test socket connected to an application load board. The figure illustrates the change of voltage 620 at the output of signal driver 322 and the input of signal receiver 324 over time 630. As shown, the transmission line delay 600 is the time it takes for the test signal to propagate from the output of signal driver 322 to the spring probe mounted on application load board 200. The incremental delay 615 is the round-trip time for the test signal to propagate from the spring probe mounted on application load board 200 to the pin on test socket 220 and reflect back to the spring probe. The reflection delay 610 is the time it takes for the test signal to reflect from the spring probe mounted on application load board 200 back to the input of signal receiver 324. The time domain reflectometer 340 can determine this incremental delay 615 by subtracting the total disconnection delay 634 (t1) from the total connection delay 632 (t2). Therefore, the time domain reflectometer 340 determines the incremental delay 615 as t2 – t1. Assuming the propagation speed is the same in both directions, the delay of the test signal propagating from the spring probe mounted on the application load board 200 to the test socket 220 mounted on the application load board 200 is equal to the reflection delay of the reflected TDR signal propagating from the test socket 220 mounted on the application load board 200 to the spring probe mounted on the application load board 200. Therefore, the unidirectional clamp delay 636 is half of the incremental delay 615, i.e., (t2 – t1) / 2.

[0047] Figure 7 This is a 3D visualization 700 of reflected TDR signals when the application load board 200 is in an off state, according to various embodiments. As shown, the 3D visualization 700 displays the waveform of the reflected TDR signal as a 2D projection, where the vertical dimension represents the signal voltage and the horizontal dimension represents time. Region 710 of the 3D visualization 700 corresponds to the time when the reflected TDR signal arrives at the spring probe mounted on the application load board 200. Detail 715 shows that the waveforms of multiple reflected TDR signals have a certain amount of overshoot. However, because the 3D visualization 700 is displayed as a 2D projection, the waveforms of the various reflected TDR signals overlap, making it difficult to determine which reflected TDR signals have overshoot and which do not.

[0048] Region 720 of the 3D visualization 700 corresponds to the time when the reflected TDR signal arrives at the test station, where the test socket 220, which is disconnected, can be mounted on the application load board 200. The waveforms shown in detail 725 indicate that all reflected TDR signals have the same propagation delay as the other reflected TDR signals. Therefore, the reflected TDR signals arrive at the corresponding spring probes of the application load board 200 simultaneously.

[0049] Figure 8 Viewed from an alternative view according to various embodiments Figure 73D visualization 800 of reflected TDR signals. Through the alternative view of 3D visualization 800, specific reflected TDR signals with certain features of interest can be more easily identified and isolated for further analysis. Region 810 of 3D visualization 800 corresponds to the time when the reflected TDR signal arrives at the spring probe mounted on the application load board 200. Detail 812 shows the waveforms of a first group of specific reflected TDR signals with a certain amount of overshoot. Detail 814 shows the waveforms of a second group of specific reflected TDR signals without overshoot. The alternative view of 3D visualization 800 enables rapid identification of reflected TDR signals with overshoot, such as the reflected TDR signal shown in detail 812. Furthermore, the alternative view of 3D visualization 800 enables rapid identification of reflected TDR signals without overshoot, such as the reflected TDR signal shown in detail 814. Additionally, the 3D visualization 800 can display... Figure 7 Other regions of interest not shown in the 3D visualization 700. For example, the reflected TDR signal corresponding to waveform 816 has a significantly longer rise time than other waveforms of other reflected TDR signals. An alternative view of the 3D visualization 800 can quickly identify such reflected TDR signals.

[0050] Region 820 of the 3D visualization 800 corresponds to the time when the reflected TDR signal arrives at the test station, where the test socket 220, which is disconnected, can be mounted on the application load board 200. The waveform at region 820 is uniform during this period, indicating that the 3D visualization 800 displays the waveform of the reflected TDR signal when the application load board 200 is disconnected.

[0051] Figure 9 This is a 3D visualization 900 of reflected TDR signals when the application load board 200 is in a connected state, according to various embodiments. As shown, the 3D visualization 900 displays the waveform of the reflected TDR signal as a 2D projection, where the vertical dimension represents the signal voltage and the horizontal dimension represents time. Region 910 of the 3D visualization 900 corresponds to the time when the reflected TDR signal arrives at the spring probe mounted on the application load board 200. Detail 915 shows that the waveforms of multiple reflected TDR signals have a certain amount of overshoot. However, because the 3D visualization 900 is displayed as a 2D projection, the waveforms of the various reflected TDR signals overlap, making it difficult to determine which reflected TDR signals have overshoot and which do not.

[0052] Region 920 of the 3D visualization 900 corresponds to the time it takes for the reflected TDR signal to reach the pin of the test socket 220 mounted on the application load board 200. The waveforms shown in detail 925 indicate that some reflected TDR signals have significantly longer propagation delays than others. Similarly, because the 3D visualization 900 is displayed as a 2D projection, the waveforms of the various reflected TDR signals overlap, making it difficult to determine which reflected TDR signals have shorter propagation delays and which have longer propagation delays.

[0053] Figure 10 Viewed from an alternative view according to various embodiments Figure 9 3D visualization 1000 of reflected TDR signals. Through the alternative view of 3D visualization 1000, specific reflected TDR signals with certain features of interest can be more easily identified and isolated for further analysis. Region 1010 of 3D visualization 1000 corresponds to the time when the reflected TDR signal arrives at the spring probe mounted on the application load board 200. Detail 1012 shows the waveforms of a first group of specific reflected TDR signals with a certain amount of overshoot. Detail 1014 shows the waveforms of a second group of specific reflected TDR signals without overshoot. The alternative view of 3D visualization 1000 enables rapid identification of reflected TDR signals with overshoot, such as the reflected TDR signal shown in detail 1012. Furthermore, the alternative view of 3D visualization 1000 enables rapid identification of reflected TDR signals without overshoot, such as the reflected TDR signal shown in detail 1014. Additionally, the 3D visualization 1000 can display... Figure 9 Other regions of interest not shown in the 3D visualization 900. For example, the reflected TDR signal corresponding to waveform 1016 has a significantly longer rise time than other waveforms of other reflected TDR signals. Waveform 1018 is absent, indicating a short circuit in the transmission line 330 corresponding to the corresponding reflected TDR signal. Alternative views of the 3D visualization 1000 can quickly identify such reflected TDR signals.

[0054] Region 1020 of the 3D visualization 1000 corresponds to the time it takes for the reflected TDR signal to reach the pin of the test socket 220 mounted on the application load board 200. The waveform at region 1020 is not uniform during this period, indicating that the 3D visualization 1000 shows the waveform of the reflected TDR signal when the application load board 200 is in a connected state. Detail 1030 shows that the waveform of the first set of specific reflected TDR signals has a significantly greater propagation delay compared to the second set of specific reflected TDR signals shown in detail 1032. Waveform 1034 rises at region 1010 but does not rise further at region 1020, indicating that the corresponding reflected TDR signal has a short circuit at or near the spring probe. Similarly, alternative views of the 3D visualization 1000 can quickly identify such reflected TDR signals.

[0055] Figure 11 This is a 3D visualization 1100 of reflected TDR signals according to various embodiments. As shown in the figure, the 3D visualization 1100 displays the waveform of the reflected TDR signal as a 2D projection, where the vertical dimension represents the signal voltage and the horizontal dimension represents time. The 3D visualization 1100 displays significantly more reflected TDR signals than... Figure 9 The 3D visualization is shown in 900. Furthermore, detail 1125 illustrates waveforms with variable rise times over extended time periods, making it difficult to determine which reflected TDR signals warrant further analysis.

[0056] Figure 12 This is an alternative view taken from when the application load board 200 is in an off state, according to various embodiments. Figure 11 3D visualization of reflected TDR signals 1200. (Compared to...) Figure 8 Similar to 3D visualization 800, region 1210 of 3D visualization 1200 corresponds to the time when the reflected TDR signal arrives at the spring probe mounted on the application load board 200. Region 1220 of 3D visualization 1200 corresponds to the time when the reflected TDR signal arrives at the test station, where the disconnected test socket 220 can be mounted on the application load board 200. The waveform at region 1220 is uniform during this period, indicating that 3D visualization 1200 shows the waveform of the reflected TDR signal when the application load board 200 is in the disconnected state. Although 3D visualization 1200 displays significantly more reflected TDR signals than Figure 8 The 3D visualization 800, but the alternative view of the 3D visualization 1200 can quickly identify reflected TDR signals with overshoot, slow rise time, greater than average propagation delay, less than average propagation delay, etc.

[0057] Figure 13 This is an alternative view taken from the application loadboard 200 when it is in a connected state, according to various embodiments. Figure 113D visualization of reflected TDR signals 1300. (Compared to...) Figure 10 Similar to 3D visualization 1000, region 1310 of 3D visualization 1300 corresponds to the time when the reflected TDR signal arrives at the spring probe mounted on the application load board 200. Region 1320 of 3D visualization 1300 corresponds to the time when the reflected TDR signal arrives at the pin of test socket 220 mounted on the application load board 200. The waveform at region 1320 is non-uniform during this period, indicating that 3D visualization 1300 shows the waveform of the reflected TDR signal when the application load board 200 is in the connected state. Although 3D visualization 1300 displays significantly more reflected TDR signals than Figure 10 The 3D visualization 1000 is an alternative view to the 3D visualization 1300, which can quickly identify reflected TDR signals with overshoot, slow rise time, greater than average propagation delay, less than average propagation delay, short circuit, etc.

[0058] In some embodiments, a subset of the waveforms of the reflected TDR signal can be selected for further analysis. As shown in the figure, such a subset of waveforms may include waveforms and / or waveform groups 1330.

[0059] Figure 14 According to various embodiments Figure 13 A 3D visualization 1400 of a subset of reflected TDR signals is provided. After selecting waveforms and / or waveform groups 1330 for the 3D visualization 1300, the time-domain reflectometer 340 can apply filters to display the selected waveforms and / or waveform groups 1330 and not display other waveforms and / or waveform groups not selected for the 3D visualization 1300. The 3D visualization 1400 displays the selected waveforms and / or waveform groups 1330 of these selected reflected TDR signals as a 2D projection, where the vertical dimension represents the signal voltage and the horizontal dimension represents time. Region 1410 of the 3D visualization 1400 corresponds to the time when the reflected TDR signals arrive at the spring probe mounted on the application load board 200. Detail 1415 shows that the waveforms of multiple reflected TDR signals have a certain amount of overshoot. However, because the 3D visualization 1400 is displayed as a 2D projection, the waveforms of various reflected TDR signals overlap, making it difficult to determine which reflected TDR signals have overshoot and which do not.

[0060] Region 1420 of the 3D visualization 1400 corresponds to the time it takes for the reflected TDR signal to reach the pin of the test socket 220 mounted on the application load board 200. The waveforms shown in detail 1425 indicate that some reflected TDR signals have significantly longer propagation delays than others. Similarly, because the 3D visualization 1400 is displayed as a 2D projection, the waveforms of the various reflected TDR signals overlap, making it difficult to determine which reflected TDR signals have shorter propagation delays and which have longer propagation delays.

[0061] Figure 15 Viewed from an alternative view according to various embodiments Figure 14 3D visualization of a subset of reflected TDR signals 1500. (As combined with...) Figure 8 , Figure 10 and Figures 12-13 The alternative view of 3D visualization 1500 makes it easier to identify and isolate specific reflected TDR signals with certain features of interest for further analysis.

[0062] Figure 16 It is according to various embodiments for utilization Figures 1-3 The flowchart of the method steps 1600 for generating 3D visualization of reflection time-domain reflection method signals using a test system. Although the method steps are combined Figures 1-15 This is a system description, but those skilled in the art will understand that any system configured to perform method steps in any order is within the scope of this disclosure.

[0063] As shown in the figure, method 1600 begins at step 1602, which includes a time-domain reflectometer (e.g., in the test system) Figure 3 The time-domain reflectometer (340) receives a TDR signal from a reflected time-domain reflectometry (TDR) signal receiver. A signal generator included in the test system generates a test signal and sends it to multiple signal drivers. The signal drivers send the test signal via corresponding transmission lines to corresponding spring probes mounted on the application load board and / or to corresponding pins of one or more test sockets. The test signal is then reflected back as a TDR signal. The reflected TDR signal propagates along the corresponding transmission lines until it reaches the corresponding signal receiver. The signal receiver receives the reflected TDR signal from the corresponding transmission line and sends it to the time-domain reflectometer.

[0064] At step 1604, for each reflected TDR signal, the time-domain reflectometer generates a corresponding TDR waveform. The time-domain reflectometer can use the waveform generated from the reflected TDR signal to perform and / or facilitate various measurements of the reflected TDR signal, including comparing the reflected TDR signal with the originally transmitted test signal. Each waveform shows the test signal as it propagates from the signal driver through the corresponding transmission line (including propagation between PCB layers, connectors, and vias of the application load board and / or test socket) and as it is reflected back to the signal receiver.

[0065] At step 1606, the time-domain reflectometer (TDRI) generates a 3D visualization of the TDR waveforms based on virtual 3D camera characteristics. The TDR may include a TDR viewer that generates a 3D visualization of multiple waveforms generated from reflected TDR signals received by multiple signal receivers. Virtual 3D camera characteristics may include 3D position, 3D viewing direction, zoom / magnification values, etc. These virtual 3D camera characteristics define the viewing position, viewing angle, size, and / or other parameters for viewing the 3D visualization. Using the TDR viewer, the TDR can display the 3D visualization on a display unit. The TDR displays each waveform along one dimension of the 3D visualization with an offset different from all other waveforms. As a result, the 3D visualization simultaneously displays various waveforms and visually indicates the associated performance of the corresponding reflected TDR signals.

[0066] At step 1608, the time domain reflectometer receives input for changing the view of the 3D visualization. This input allows the time domain reflectometer to rotate, resize, translate, and scale the 3D visualization in 3D space.

[0067] At step 1610, the time-domain reflectometer (TDRI) determines new virtual 3D camera characteristics based on inputs used to change the view. Based on the input received at step 1608, the TDR determines one or more changes to the current virtual 3D camera characteristics, such as changes to 3D position, 3D viewing direction, zoom / magnification values, etc. Method 1600 then returns to step 1606 to generate a 3D visualization of the TDR waveform based on the new virtual 3D camera characteristics.

[0068] In summary, the disclosed technology includes a TDR viewer for visualizing a large number of reflected TDR signals on a 3D display system. The TDR system captures waveforms of the reflected TDR signals associated with signal propagation and delay. The TDR viewer displays the signal waveforms as the signal propagates through transmission lines. These waveforms can show variations in the reflected TDR signals due to transmission between various printed circuit board layers, through component connectors and vias on the printed circuit board, and across interconnects and socket pins. 3D visualization of the reflected TDR signals can be rotated, zoomed in or out in 3D space, and filtered to display subsets of the signal.

[0069] Compared to existing technologies, at least one technical advantage of the disclosed technology is that it allows test engineers to visually observe a large number of waveforms simultaneously in 3D space. 3D visualization technology enables test engineers to more quickly identify TDR signals of interest, including signals with longer or shorter delay times relative to other TDR signals, signals exhibiting undesirable signal properties, and / or similar signals. More specifically, test engineers can visually determine whether waveforms deviate from nominal values ​​and whether manufacturing processes should be improved, whether printed circuit boards and / or interconnects should be repaired or replaced, whether the layout of transmission lines on the printed circuit board should be changed, whether the timing of one or more transmitters should be adjusted, and / or similar operations.

[0070] Furthermore, the TDR viewer allows test engineers to select individual transmission lines and / or groups of transmission lines separately, enabling them to easily compare the waveforms of certain transmission lines of interest. Test engineers can quickly identify whether abnormal waveforms indicate manufacturing problems, layout issues, PCB quality problems, and / or similar issues. As a result, compared to previous conventional methods, test engineers can identify and resolve transmission line problems faster and more effectively. This improves the efficiency of the engineering environment and the productivity of the manufacturing process. This increased efficiency can lead to reduced manufacturing test time, increased test equipment utilization, reduced test equipment power consumption, and therefore lower test costs. These advantages represent one or more technological improvements over existing methods.

[0071] 1. According to some embodiments, a method includes: receiving a first plurality of time-domain reflectometry (TDR) signals from a test system; generating a corresponding waveform included in a first plurality of waveforms for each TDR signal included in the first plurality of TDR signals; and generating a three-dimensional (3D) visualization of the first plurality of waveforms, wherein each waveform included in the first plurality of waveforms is offset differently from all other waveforms included in the first plurality of waveforms along one dimension of the 3D visualization.

[0072] 2. The method according to Clause 1 further includes: transmitting a test signal from the signal driver via a transmission line, wherein: a first TDR signal included in a first plurality of TDR signals includes a reflection of the test signal, and a first waveform included in a first plurality of waveforms corresponding to the first TDR signal is used to determine the time required for the first TDR signal to propagate from the signal driver via the transmission line and be reflected back to a signal receiver adjacent to the signal driver.

[0073] 3. The method according to Clause 1 or Clause 2 further includes: transmitting a test signal from a signal driver through an electrical trace on an application load board included in the test system, wherein: a first TDR signal included in a first plurality of TDR signals includes a reflection of the test signal, and a first waveform corresponding to the first TDR signal included in a first plurality of waveforms is used to determine a delay associated with the electrical trace.

[0074] 4. The method according to any one of Clauses 1-3, wherein the delay includes the propagation delay of the first TDR signal through electrical traces on the application load board.

[0075] 5. The method according to any one of clauses 1-4 further includes: sending a first test signal from a signal driver to a test fixture included in the test system, wherein: the first TDR signal included in a first plurality of TDR signals includes a reflection of the first test signal, and a first waveform included in a first plurality of waveforms corresponding to the first TDR signal is used to calibrate a first propagation delay associated with the test fixture.

[0076] 6. The method according to any one of Clauses 1-5, wherein: the test fixture includes an application load board and a test socket, a first test signal is sent from a signal driver to the application load board when the test socket is disconnected from the application load board, and a first waveform is used to measure a second propagation delay from the signal driver to the application load board.

[0077] 7. The method according to any one of Clauses 1-6, wherein the second propagation delay is used to determine the distance from the signal driver to the spring probe mounted on the application load board.

[0078] 8. The method according to any one of clauses 1-7 further includes: when the test socket is connected to the application load board, sending a second test signal from the signal driver to the test fixture, wherein: the second TDR signal included in the second plurality of TDR signals includes a reflection of the second test signal, and a second waveform included in the second plurality of waveforms corresponding to the second TDR signal is used to measure a third propagation delay from the signal driver to the test socket.

[0079] 9. The method according to any one of Clauses 1-8, wherein the third propagation delay is used to determine the distance from the signal driver to the test socket connected to the application load board.

[0080] 10. The method according to any one of clauses 1-9, wherein the first propagation delay is determined by subtracting the second propagation delay from the third propagation delay.

[0081] 11. The method according to any one of clauses 1-10, wherein: the first waveform included in the first plurality of waveforms corresponds to a first TDR signal included in the first plurality of TDR signals, and the first waveform is associated with at least one of signal propagation of the first TDR signal or delay of the first TDR signal.

[0082] 12. The method according to any one of clauses 1-11 further includes: transmitting a test signal from a signal driver through an electrical trace, wherein: a first TDR signal included in a first plurality of TDR signals includes a reflection of the test signal, and 3D visualization displays a first waveform included in a first plurality of waveforms corresponding to the first TDR signal included in the first plurality of TDR signals as the first TDR signal propagates through the electrical trace.

[0083] 13. The method according to any one of clauses 1-12, wherein: the electrical traces are on the application load board, and a first waveform is displayed in 3D visualization as the first TDR signal propagates through one or more layers of the application load board.

[0084] 14. The method according to any one of clauses 1-13, wherein: electrical traces are laid on the application load board, and a first waveform of the first TDR signal is displayed in 3D visualization as it propagates through one or more connectors of the application load board.

[0085] 15. The method according to any one of clauses 1-14, wherein: electrical traces are laid on the application load board, and 3D visualization displays a first waveform as the first TDR signal propagates through one or more vias of the application load board.

[0086] 16. The method according to any one of clauses 1-15 further includes: receiving a selection of a subset of waveforms included in the first plurality of waveforms; and modifying the three-dimensional (3D) visualization to display the subset of waveforms, and avoiding displaying waveforms included in the first plurality of waveforms that are not part of the subset of waveforms.

[0087] 17. According to some embodiments, a test system includes: an application load board configured to receive a test socket to which a reference device under test (DUT) can be mounted; and a time domain reflectometer (TDR) that performs the following operations: receiving a first plurality of time domain reflectometry (TDR) signals from the application load board; generating a corresponding waveform included in a first plurality of waveforms for each TDR signal included in the first plurality of TDR signals; and generating a three-dimensional (3D) visualization of the first plurality of waveforms, wherein each waveform included in the first plurality of waveforms is offset differently from all other waveforms included in the first plurality of waveforms along one dimension of the 3D visualization.

[0088] 18. The test system according to Clause 17 further includes: a signal driver that sends a first test signal to the application load board when the test socket is disconnected from the application load board, wherein the first waveform is used to measure a second propagation delay from the signal driver to the application load board.

[0089] 19. The test system according to Clause 17 or Clause 18 further includes: a test socket connected to an application load board, wherein: a signal driver sends a second test signal to the application load board when the test socket is connected to the application load board, the second TDR signal including a reflection of the second test signal in a second plurality of TDR signals, and a second waveform corresponding to the second TDR signal including a second plurality of waveforms for measuring a third propagation delay from the signal driver to the test socket.

[0090] 20. A test system according to any one of clauses 17-19, wherein the first propagation delay is determined by subtracting the second propagation delay from the third propagation delay.

[0091] Any element of any claim recited in any claim and / or any combination of any element described in this application, in any way, falls within the scope of this disclosure and protection.

[0092] The various modules of the disclosed system can access computer-readable media, and the term is known or understood to include removable media such as Security Digital (SD) cards, optical discs (CDs), digital versatile optical discs (DVDs), ROM disks, etc., as well as non-removable or internal media such as hard disk drives (HDDs), solid-state drives (SSDs), RAM, ROM, flash memory, etc.

[0093] While this disclosure has been shown and described with respect to one or more exemplary embodiments, equivalent changes and modifications will occur to those skilled in the art upon reading and understanding this specification and the accompanying drawings. In particular, with respect to the various functions performed by the foregoing components (assemblies, devices, etc.), the terminology used to describe these components (including references to “apparatus”) is intended to correspond (unless otherwise stated) to any component that performs the specified function of the described component (e.g., functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs that function in the exemplary embodiments shown in this disclosure. Furthermore, while specific features of this disclosure may have been disclosed only with respect to one of several embodiments, such features may be combined with one or more features of other embodiments as desired and advantageous for any given or particular application. Those skilled in the art will understand that the architecture described in the drawings does not limit the scope of the various embodiments of this disclosure.

[0094] Various embodiments have been described for illustrative purposes, but are not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

[0095] Aspects of this embodiment may be embodied as a system, method, or computer program product. Therefore, aspects of this disclosure may take the form of a completely hardware embodiment, a completely software embodiment (including firmware, resident software, microcode, etc.), or an embodiment combining software and hardware aspects, which are generally collectively referred to herein as a “module,” a “system,” or a “computer.” Furthermore, any hardware and / or software technology, process, function, component, engine, module, or system described in this disclosure may be implemented as a circuit or group of circuits. Additionally, aspects of this disclosure may take the form of a computer program product embodied in one or more computer-readable media, on which computer-readable program code is embodied.

[0096] Any combination of one or more computer-readable media may be used. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example, but not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatuses, or devices, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of computer-readable storage media will include the following: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable optical disc read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing. In the context of this document, a computer-readable storage medium can be any tangible medium that can contain or store programs for use by or associated with an instruction execution system, apparatus, or device.

[0097] The aspects of this disclosure have been described above with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing apparatus to produce a machine. When executed by a processor of a computer or other programmable data processing apparatus, the instructions are capable of implementing the functions / actions specified in one or more blocks of the flowchart illustrations and / or block diagrams. Such a processor can be, but is not limited to, a general-purpose processor, a special-purpose processor, an application-specific processor, or a field-programmable gate array, etc.

[0098] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code, including one or more executable instructions for implementing one or more specified logical functions. It should also be noted that in some alternative implementations, the functions indicated in the blocks may appear outside the order indicated in the figures. For example, two blocks shown consecutively may, in fact, be executed substantially simultaneously, or these blocks may sometimes be executed in reverse order, depending on the functions involved. It will also be noted that each block in a block diagram and / or flowchart, and combinations of blocks in block diagrams and / or flowcharts, may be implemented by a system based on dedicated hardware that performs the specified functions or actions, or by a combination of dedicated hardware and computer instructions.

[0099] While the foregoing pertains to embodiments of this disclosure, other and further embodiments of this disclosure may be designed without departing from the basic scope of this disclosure, the scope of which is defined by the appended claims.

Claims

1. A method comprising: Receive the first or more time-domain reflectometry (TDR) signals from the test system; Generate a corresponding waveform included in a first plurality of waveforms for each TDR signal included in the first plurality of TDR signals; as well as Generate a three-dimensional (3D) visualization of the first plurality of waveforms. Each waveform included in the first plurality of waveforms is offset differently from all other waveforms included in the first plurality of waveforms along one dimension of the 3D visualization.

2. The method according to claim 1, further comprising: The test signal is sent from the signal driver through the transmission line. in: The first TDR signal included in the first plurality of TDR signals includes a reflection of the test signal, and The first waveform, which corresponds to the first TDR signal and is included in the first plurality of waveforms, is used to determine the time required for the first TDR signal to propagate from the signal driver through the transmission line and be reflected back to the signal receiver adjacent to the signal driver.

3. The method according to claim 1, further comprising: Test signals are sent from the signal driver via electrical traces included on the application load board in the test system. in: The first TDR signal included in the first plurality of TDR signals includes a reflection of the test signal, and The first waveform, which corresponds to the first TDR signal and is included in the first plurality of waveforms, is used to determine the delay associated with the electrical trace.

4. The method according to claim 3, wherein, The delay includes the propagation delay of the first TDR signal as it travels through the electrical traces on the application load board.

5. The method according to claim 1, further comprising: The first test signal is sent from the signal driver to the test fixture included in the test system. in: The first TDR signal included in the first plurality of TDR signals includes the reflection of the first test signal, and The first waveform, which corresponds to the first TDR signal and is included in the first plurality of waveforms, is used to calibrate the first propagation delay associated with the test fixture.

6. The method according to claim 5, wherein: The test fixture includes an application load board and a test socket. The first test signal is sent from the signal driver to the application load board when the test socket is disconnected from the application load board, and The first waveform is used to measure the second propagation delay from the signal driver to the application load board.

7. The method according to claim 6, wherein, The second propagation delay is used to determine the distance from the signal driver to the spring probe mounted on the application load board.

8. The method according to claim 6, further comprising: When the test socket is connected to the application load board, a second test signal is sent from the signal driver to the test fixture. in: The second TDR signal included in the second plurality of TDR signals includes the reflection of the second test signal, and The second waveform, which corresponds to the second TDR signal and is included in the second plurality of waveforms, is used to measure the third propagation delay from the signal driver to the test socket.

9. The method according to claim 8, wherein, The third propagation delay is used to determine the distance from the signal driver to the test socket connected to the application load board.

10. The method according to claim 8, wherein, The first propagation delay is determined by subtracting the second propagation delay from the third propagation delay.

11. The method according to claim 1, wherein: The first waveform included in the first plurality of waveforms corresponds to the first TDR signal included in the first plurality of TDR signals, and The first waveform is associated with at least one of the signal propagation of the first TDR signal or the delay of the first TDR signal.

12. The method of claim 11, further comprising: Test signals are sent from the signal driver via electrical traces. in: The first TDR signal included in the first plurality of TDR signals includes a reflection of the test signal, and The 3D visualization displays a first waveform, which is included in the first plurality of waveforms, corresponding to the first TDR signal included in the first plurality of TDR signals, as the first TDR signal propagates through the electrical trace.

13. The method according to claim 12, wherein: The electrical traces are on the application load board, and The 3D visualization displays the first waveform as the first TDR signal propagates through one or more layers of the application load board.

14. The method according to claim 12, wherein: The electrical traces are on the application load board, and The 3D visualization displays the first waveform as the first TDR signal propagates through one or more connectors on the application load board.

15. The method according to claim 12, wherein: The electrical traces are on the application load board, and The 3D visualization displays the first waveform as the first TDR signal propagates through one or more vias of the application load board.

16. The method according to claim 1, further comprising: Receive a selection of a subset of waveforms included in the first plurality of waveforms; as well as Modify the three-dimensional (3D) visualization to display the waveform subset and avoid displaying waveforms that are not part of the waveform subset but are included in the first plurality of waveforms.

17. A testing system, comprising: An application load board is configured to receive a test socket, onto which a reference device under test (DUT) can be mounted; as well as A time-domain reflectometer, which performs the following operations: Receive a first plurality of time-domain reflectometry (TDR) signals from the application load board; Generate a corresponding waveform included in a first plurality of waveforms for each TDR signal included in the first plurality of TDR signals; as well as Generate a three-dimensional (3D) visualization of the first plurality of waveforms. Each waveform included in the first plurality of waveforms is offset differently from all other waveforms included in the first plurality of waveforms along one dimension of the 3D visualization.

18. The testing system according to claim 17, further comprising: A signal driver that sends a first test signal to the application load board when the test socket is disconnected from the application load board. The first waveform is used to measure the second propagation delay from the signal driver to the application load board.

19. The testing system according to claim 18, further comprising: The test socket is connected to the application load board. in: The signal driver sends a second test signal to the application load board when the test socket is connected to the application load board. The second TDR signal included in the second plurality of TDR signals includes the reflection of the second test signal, and The second waveform, which corresponds to the second TDR signal and is included in the second plurality of waveforms, is used to measure the third propagation delay from the signal driver to the test socket.

20. The testing system according to claim 19, wherein, The first propagation delay is determined by subtracting the second propagation delay from the third propagation delay.

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