Current and voltage measurement system and adjustment method

Abstract

This invention provides a current and voltage measurement system and its adjustment method. The system includes: a time-domain impedance detection circuit, a control system, and a hybrid digital-analog control loop. The time-domain impedance detection circuit and the hybrid digital-analog control loop are respectively connected to the device under test (DUT), and the time-domain impedance detection circuit is connected to the control system. The control system is used to determine the impedance of the DUT based on the zero-input response of the time-domain impedance detection circuit; and to determine the automatic adjustment parameters of the control loop of the current and voltage measurement system based on the impedance of the DUT, thereby completing the parameter adjustment of the hybrid digital-analog control loop. This invention can improve the efficiency of time-domain impedance detection while achieving automatic adjustment of the control loop parameters of the current and voltage measurement system, thus improving the reliability of subsequent measurements of the DUT.

Description

Technical Field

[0001] This invention relates to the field of device measurement technology, and in particular to a current and voltage measurement system and adjustment method. Background Technology

[0002] A current and voltage measurement system (i.e., a source measurement unit, SMU) is an important instrument used to test the current and voltage (IV) characteristics of various devices. The device under test (DUT) directly affects the transfer function used to regulate the output voltage or current in the control loop of the source measurement unit. Therefore, in order to obtain the best response, the control loop of the source measurement unit needs to adjust the parameter configuration according to the different devices under test.

[0003] Current source measurement units (SMUs) are primarily analog-controlled, utilizing analog circuits to implement loop control. While analog-controlled SMUs can configure control loop parameters by adding switchable reactive elements, the effectiveness, configurability, and flexibility of this method remain limited.

[0004] To avoid the control loop configuration problems of traditional analog-based source measurement units (SMUs), engineers have proposed constructing the SMU control loop with a digital controller as its core. While SMUs based on digital control loops allow for flexible configuration of transfer functions within the digital controller, they suffer from significant disadvantages in terms of precision control. They require quantization of the feedback signal via an analog-to-digital converter (ADC), and the digital controller's output needs to be converted into an analog signal via a digital-to-analog converter (DAC) to control the output stage. Therefore, the quantization delay and accuracy of the ADC and DAC directly affect the speed and accuracy of the control loop throughout the entire loop.

[0005] In addition, traditional current and voltage measurement systems usually require the operator to manually determine the type of the device under test and switch preset modes (such as "high capacitance mode") to adjust the parameter configuration of the control loop. This cannot achieve automatic, fast, and adaptive matching based on the impedance characteristics of the device under test, which can easily lead to low test efficiency and stability problems under complex load scenarios.

[0006] This section is intended to provide background or context for the embodiments of the invention set forth in the claims. The description herein is not an admission that it is prior art simply because it is included in this section. Summary of the Invention

[0007] To address at least one problem in the prior art, this invention proposes a current and voltage measurement system and adjustment method that can automatically adjust the control loop parameters of the current and voltage measurement system while improving the efficiency of time-domain impedance detection, thereby improving the reliability of subsequent measurements of the device under test.

[0008] To solve the above-mentioned technical problems, the present invention provides the following technical solution: In a first aspect, the present invention provides a current and voltage measurement system, comprising: a time-domain impedance detection circuit, a control system, and a hybrid digital-analog control loop; wherein... The time-domain impedance detection circuit and the mixed-signal control loop are respectively connected to the device under test, and the time-domain impedance detection circuit is connected to the control system. The control system is used to determine the impedance of the device under test based on the zero-input response of the time-domain impedance detection circuit; and to determine the automatic adjustment parameters of the control loop of the current and voltage measurement system based on the impedance of the device under test, thereby completing the parameter adjustment of the mixed digital-analog control loop.

[0009] In one embodiment, the time-domain impedance detection circuit includes: a detection capacitor, a first switch, a bias voltage source connected in series, a second switch, and a voltage buffer. The detection capacitor and one end of the first switch are connected together as a common terminal, the other end of the first switch is connected to one end of the device under test, and the other ends of the detection capacitor and the device under test are both grounded; the connection point between the second switch and the voltage buffer is connected to the common terminal.

[0010] In one embodiment, the time-domain impedance detection circuit further includes: a detection inductor and a third switch; One end of the detection inductor is connected to the common terminal, and the other end of the detection inductor is connected to one end of the third switch, the other end of the third switch being grounded.

[0011] In one embodiment, the mixed-signal control loop includes: an analog current-voltage controller, a digital current-voltage controller, an adder, a first digital-to-analog converter, a second digital-to-analog converter, a first analog-to-digital converter, a second analog-to-digital converter, a power amplifier, a first instrumentation amplifier, a second instrumentation amplifier, and a variable resistor; wherein, The first digital-to-analog converter, the output terminal of the analog current-voltage controller, the adder, the power amplifier, the variable resistor, and the negative input terminal of the first instrumentation amplifier are connected in sequence. The output terminal of the first instrumentation amplifier is connected to the input terminals of the analog current-voltage controller and the first analog-to-digital converter, respectively. The positive input terminal of the first instrumentation amplifier is connected to the connection point between the power amplifier and the variable resistor. The variable resistor is connected to one end of the device under test and the positive input terminal of the second instrumentation amplifier, respectively. The negative input terminal of the second instrumentation amplifier and the other end of the device under test are both grounded. The output terminal of the second instrumentation amplifier is connected to the input terminal of the analog current and voltage controller and the second analog-to-digital converter, respectively. The output terminal of the digital current-voltage controller, the second digital-to-analog converter, and the adder are connected in sequence, and the input terminal of the digital current-voltage controller is connected to the output terminals of the first analog-to-digital converter and the second analog-to-digital converter, respectively.

[0012] Secondly, the present invention provides an adjustment method, implemented using the aforementioned current and voltage measurement system, the method comprising: The impedance of the device under test is determined based on the zero-input response of the time-domain impedance detection circuit. Based on the impedance of the device under test, determine the automatic adjustment parameters of the control loop of the current and voltage measurement system; The parameters of the analog-digital hybrid control loop are automatically adjusted according to the control loop parameters to complete the parameter adjustment.

[0013] In one embodiment, determining the impedance of the device under test based on the zero-input response of the time-domain impedance detection circuit includes: The first switch is turned on and the second switch is closed, and the bias voltage source charges the detection capacitor to the set voltage. Control the first switch to close and the second switch to open, and obtain the capacitance of the detection capacitor and the voltage response output by the voltage buffer; Based on the capacitance of the detection capacitor and the voltage response output by the voltage buffer, a transfer function model is constructed. The impedance of the device under test is determined based on the transfer function model and the pre-acquired theoretical model.

[0014] In one embodiment, a transfer function model is constructed based on the capacitance of the detection capacitor and the voltage response output of the voltage buffer, including: The current response of the device under test is obtained based on the capacitance of the detection capacitor and the voltage response output of the voltage buffer. The transfer function model is constructed based on the voltage response and the current response of the device under test.

[0015] In one embodiment, determining the impedance of the device under test based on the transfer function model and the pre-acquired theoretical model includes: The transfer function model and the pre-acquired theoretical model are matched to obtain the equivalent series inductance, equivalent series resistance and equivalent series capacitance of the device under test; The impedance of the device under test is determined based on the equivalent series inductance, equivalent series resistance, and equivalent series capacitance.

[0016] In one embodiment, determining the impedance of the device under test based on the zero-input response of the time-domain impedance detection circuit includes: The first and third switches are opened, the second switch is closed, and the bias voltage source charges the detection capacitor to the set voltage. Control the first and third switches to close, and the second switch to open, to acquire fitting data. The fitting data includes: the capacitance of the detection capacitor, the inductance of the detection inductor, the set voltage, and the voltage response output by the voltage buffer. The preset output voltage equation is fitted based on the fitted data to obtain the equivalent series inductance, equivalent series resistance, and equivalent series capacitance of the device under test, thereby determining the impedance of the device under test.

[0017] In one embodiment, determining the automatic adjustment parameters of the control loop of the current and voltage measurement system based on the impedance of the device under test includes: The control loop automatic adjustment parameters corresponding to the impedance of the device under test are obtained from the preset impedance and parameter relationship table and used as the control loop automatic adjustment parameters of the current and voltage measurement system.

[0018] As can be seen from the above technical solution, the present invention provides a current and voltage measurement system and adjustment method. The method includes: a current and voltage measurement system comprising: a time-domain impedance detection circuit, a control system, and a hybrid digital-analog control loop; wherein the time-domain impedance detection circuit and the hybrid digital-analog control loop are respectively connected to the device under test (DUT), and the time-domain impedance detection circuit is connected to the control system; the control system is used to determine the impedance of the DUT based on the zero-input response of the time-domain impedance detection circuit; and to determine the automatic adjustment parameters of the control loop of the current and voltage measurement system based on the impedance of the DUT, thereby completing the parameter adjustment of the hybrid digital-analog control loop, which can improve the efficiency of time-domain impedance detection. Based on this, the control loop parameters of the current and voltage measurement system can be automatically adjusted, thereby improving the reliability of subsequent measurements of the device under test. Specifically, time-domain impedance detection can be implemented quickly, cost-effectively, and with a simple circuit to replace or supplement traditional high-cost, slow frequency-domain detection methods. When applied to the current and voltage measurement system, the impedance characteristics of the device under test are automatically determined before the source measurement unit enters the output mode, so that the control loop can automatically adjust the parameters and achieve automatic switching of the working mode. This can improve the accuracy of the control loop while avoiding the limitations of the effect, configurability, and flexibility of the control loop parameter configuration. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. In the drawings: Figure 1 This is a schematic diagram of the impedance detection circuit in the prior art; Figure 2 This is a structural block diagram of the current and voltage measurement system in the embodiments of this application; Figure 3 This is a schematic diagram of the current and voltage measurement system in the embodiments of this application; Figure 4 This is a schematic diagram of the time-domain impedance detection circuit for the charging state in an embodiment of this application; Figure 5 This is a schematic diagram of the time-domain impedance detection circuit for the discharge state in an embodiment of this application; Figure 6 This is a schematic diagram of the time-domain impedance detection circuit for charging state in another embodiment of this application; Figure 7 This is a schematic diagram of the time-domain impedance detection circuit for the discharge state in another embodiment of this application; Figure 8 This is a schematic diagram of the structure of the mixed-signal control loop in the embodiments of this application; Figure 9 This is a first flowchart illustrating the adjustment method in an embodiment of this application; Figure 10 This is a second flowchart illustrating the adjustment method in the embodiments of this application; Figure 11 This is a schematic diagram comparing various curves in the embodiments of this application; Figure 12 This is a schematic diagram of the third process of the adjustment method in the embodiments of this application; Figure 13 This is a schematic diagram of the fourth process of the adjustment method in the embodiments of this application. Detailed Implementation

[0020] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] Current source measurement unit (SMU) products are primarily based on analog control. The main problem with SMUs based on analog loop control is their inability to be optimized for all application scenarios. SMUs optimized for high-speed, high-bandwidth testing scenarios are unsuitable for high-precision, high-stability testing scenarios, and vice versa. While high-speed SMUs have relatively faster settling times, they generate significant ringing, posing a potential risk of burning out the device under test (DUT) and the SMU itself. High-stability SMUs, while avoiding this risk, have longer settling times. The fundamental problem lies in the fact that the DUT affects the transfer function of the control loop. Therefore, to obtain the optimal response, the control loop of the SMU needs to be configured differently depending on the DUT. Although analog-controlled SMUs can configure their control loop by adding switchable reactive components, the effectiveness, configurability, and flexibility of this method remain limited.

[0022] To avoid the loop configuration problems of traditional analog-controlled source measurement units (SMUs), engineers proposed a control loop for the SMU centered on a digital controller, achieving a settling time of <70 µs in constant voltage source mode and <50 µs in constant current source mode. This involves quantizing the output signal using an analog-to-digital converter (ADC), feeding it back to the digital controller, comparing it with a preset value, and adjusting the ADC output to achieve closed-loop control. The digital controller is implemented using a field-programmable gate array (FPGA), ensuring controller flexibility while reducing latency. While SMUs based on digital control loops can flexibly configure transfer functions within the digital controller, they have significant disadvantages in terms of precision control. They require quantization of the feedback signal via an ADC, and the digital controller output needs to be converted to an analog signal via an ADC to control the output stage. Therefore, the quantization delay and accuracy of the ADC and ADC directly affect the speed and accuracy of the control loop. Therefore, source measurement units based on digital control require the use of multiple high-precision and low-latency analog-to-digital converters and digital-to-analog converters, which increases system cost (in source measurement units based on analog control, the digital-to-analog converters are not in the control loop, so the speed requirement is not high and the cost is lower), and speed and accuracy are still mutually restrictive.

[0023] Traditional current and voltage measurement systems cannot adjust the control loop parameters based on the characteristics of the device under test (DUT) and do not incorporate impedance sensing technology. Furthermore, traditional impedance sensing technology has limitations and is not suitable for SMUs (System-Mounted Modules).

[0024] Specifically, traditional impedance sensing techniques are primarily based on frequency domain analysis. This involves applying an AC signal to the device under test (DUT) at each frequency point, measuring the complex ratio of the corresponding voltage and current, and then calculating the DUT's impedance. While frequency domain analysis can obtain very accurate impedance data under stable conditions, it requires complex and costly circuitry, necessitates sequential measurement of each frequency point, and involves a lengthy complete frequency sweep, making it difficult to meet the demands of rapid measurement and online monitoring.

[0025] To avoid the aforementioned problems of frequency domain detection methods, various time-domain impedance analysis techniques have been gradually developed in the industry. Time-domain measurement methods extract impedance information by applying a specific time-domain excitation signal to the device under test and analyzing the system response waveform. However, existing time-domain impedance measurement methods still have various limitations, making it difficult to simultaneously meet the requirements of measurement accuracy, cost, and speed.

[0026] like Figure 1 As shown, the prior art proposes a high-precision impedance detection circuit that can overcome the influence of distributed parameters and line resistance. This technology consists of an impedance sensor, an integrated operational amplifier, and a current-sensing resistor. Its key technical solutions are as follows: It adopts a four-electrode impedance measurement principle, with independent excitation and sensing electrodes set on each electrode plate of the sensor; a known excitation voltage is applied to the measured medium through the first operational amplifier, and its output terminal is connected to the excitation electrode of the first electrode plate of the sensor via the shielding layer of a shielded wire. The sensing electrode of the same electrode plate is fed back to the inverting input terminal of the first operational amplifier via the inner core of the shielded wire; the sensing electrode of the second electrode plate of the sensor is connected to the inverting input terminal of the third operational amplifier via the inner core of a three-coaxial cable, and the excitation electrode is connected to the current-sensing resistor via the inner shielding layer of the three-coaxial cable and then to the output terminal of the third operational amplifier; on the instrument side, the inner shielding layer of the three-coaxial cable is driven by the voltage follower of the second operational amplifier and then connected to its outer shielding layer; the voltage across the current-sensing resistor serves as the output signal, used to calculate the response current flowing through the measured medium. Furthermore, in the field of impedance discontinuity detection, traditional time-domain reflectometry (TDR) locates faults by injecting a single pulse into the cable and analyzing the reflected signal. However, it is susceptible to noise interference and struggles to detect minute impedance changes. To improve performance, sequence time-domain reflectometry (STDR) uses a maximum-length sequence (M-sequence) as the excitation signal. By calculating the cross-correlation function between the reflected signal and the transmitted sequence, it generates a response curve with time delay information. This curve can not only identify the location of impedance discontinuities but also distinguish between resistive, inductive, or capacitive impedance changes through peak amplitude and shape. STDR, with its good noise immunity, is suitable for impedance detection in simple node networks.

[0027] However, the aforementioned impedance detection circuit still has some drawbacks, including: complex circuit structure requiring multiple operational amplifiers, special three-coaxial cable, and multi-layer shielding, increasing system cost and size; special sensor design and complex manufacturing process, making mass production difficult; and the system requires complex calibration procedures to compensate for various error sources. Although the STDR is superior to TDR in noise immunity and impedance identification, its detection capability still has significant limitations. Reflected signals are susceptible to noise and multiple reflections, leading to measurement errors. In complex multi-node, long-distance cable networks, signal attenuation and branch reflections can cause weak or even lost impedance information at the far end, severely limiting the detection range and accuracy. Furthermore, STDR relies on ideal conditions for terminal impedance matching; actual load mismatch can introduce interference reflections, affecting the accurate judgment of impedance changes in other parts of the network. Finally, this scheme is computationally complex, requires high processing power, and is difficult to implement efficiently in real-time on low-cost or embedded platforms.

[0028] To address at least one of the problems existing in the prior art, this invention provides a current and voltage measurement system and adjustment method. It offers a novel current and voltage measurement system combining a source measurement unit (SMU) and impedance detection. A new impedance detection method is proposed, enabling fast, low-cost, and circuit-simple time-domain impedance detection to replace or supplement traditional high-cost, slow frequency-domain detection methods. The time-domain impedance detection results can be applied to the source measurement unit, automatically determining the impedance characteristics of the device under test before the source measurement unit enters output mode. This facilitates automatic parameter adjustment of the control loop, enabling automatic switching of operating modes and solving the problem that traditional impedance detection methods are unsuitable for SMUs. Furthermore, the SMU parameters can be designed as adjustable parameters, i.e., automatically adjusted parameters by the control loop, improving the speed and accuracy of the control loop.

[0029] The current and voltage measurement system provided in this invention includes a time-domain impedance detection circuit and a hybrid analog-digital control loop. The time-domain impedance detection circuit enables rapid impedance detection of the device under test (DUT) based on time-domain characteristics. The DUT can be connected to an LC resonant circuit (i.e., the time-domain impedance detection circuit) to measure the zero-input response of the circuit. The impedance characteristics of the DUT are calculated by analyzing the time-domain characteristics such as the oscillation frequency, amplitude, and attenuation of the zero-input response. The detection capacitor in the LC resonant circuit is pre-charged. The circuit only needs to provide an initial voltage and does not require a continuous and precise external excitation signal. The system can adjust the transfer function of the control loop of the source measurement unit by switching the resistance value of the compensation capacitor in the circuit. Pole can be introduced in the control loop to compensate for the pole introduced by the DUT. The adjustment method may include: first, performing a Laurent series expansion on the impedance of the DUT, then fitting the coefficients of each order Laurent series based on the zero-input response to obtain the impedance characteristics of the DUT, and finally completing the parameter adjustment of the hybrid analog-digital control loop.

[0030] The following examples illustrate this in detail.

[0031] like Figure 2 and Figure 3 As shown, the present invention provides a current and voltage measurement system, comprising: a time-domain impedance detection circuit 1, a control system 2, and a hybrid digital-analog control loop 3; wherein, the time-domain impedance detection circuit 1 and the hybrid digital-analog control loop 3 are respectively connected to the device under test 4, and the time-domain impedance detection circuit 1 is connected to the control system 2; the control system is used to determine the impedance of the device under test based on the zero-input response of the time-domain impedance detection circuit; and to determine the automatic adjustment parameters of the control loop of the current and voltage measurement system based on the impedance of the device under test, thereby completing the parameter adjustment of the hybrid digital-analog control loop.

[0032] Specifically, the control system 2 may be a microcontroller unit (MCU) with a user interface. The current and voltage measurement system may further include a power supply, which includes an AC-DC converter, a DC-DC converter, and a reference voltage V. ref And low dropout regulators (LDOs), etc. The control system can also be a server or processor, etc.

[0033] like Figure 4 and Figure 5 As shown, in order to achieve impedance detection over a wide frequency range, in one embodiment, the time-domain impedance detection circuit includes: a detection capacitor C. sen The first switch K1 and the bias voltage source V connected in series. init The system includes a second switch K2 and a voltage buffer; the detection capacitor and one end of the first switch are connected together as a common terminal P, the other end of the first switch is connected to one end of the device under test, and the other ends of the detection capacitor and the device under test are both grounded; the connection point between the second switch and the voltage buffer is connected to the common terminal.

[0034] Specifically, the control system can control a first switch to open and a second switch to close, allowing a bias voltage source to charge the detection capacitor to a set voltage. By controlling the first switch to close and the second switch to open, the capacitance of the detection capacitor and the voltage response output by the voltage buffer are acquired. The zero-input response of the time-domain impedance detection circuit may include the voltage response output by the voltage buffer. The control system constructs a transfer function model based on the capacitance of the detection capacitor and the voltage response output by the voltage buffer. Based on the transfer function model and a pre-acquired theoretical model, the control system determines the impedance of the device under test.

[0035] like Figure 6 and Figure 7 As shown, to improve the accuracy of impedance detection, in one embodiment, the time-domain impedance detection circuit further includes: a detection inductor L. sen The third switch K3; one end of the detection inductor is connected to the common terminal P, the other end of the detection inductor is connected to one end of the third switch, and the other end of the third switch is grounded.

[0036] Specifically, the detection capacitor and detection inductor can form a filter to select the frequency, concentrating the main energy at a specific frequency. If the detection frequency can be confirmed, the accuracy will be relatively high. The control system can control the first and third switches to open and the second switch to close, allowing the bias voltage source to charge the detection capacitor to a set voltage. The time-domain impedance detection circuit includes: a detection capacitor, a first switch, a bias voltage source, a second switch, a voltage buffer, a detection inductor, and a third switch connected in series. The control system controls the first and third switches to close and the second switch to open, acquiring fitting data. The fitting data includes: the capacitance of the detection capacitor, the inductance of the detection inductor, the set voltage, and the voltage response output by the voltage buffer. The control system fits the preset output voltage equation based on the fitting data to obtain the equivalent series inductance, equivalent series resistance, and equivalent series capacitance of the device under test, thereby determining the impedance of the device under test.

[0037] like Figure 8As shown, in one embodiment, the mixed-signal control loop 3 includes: an analog current-voltage controller 31, a digital current-voltage controller 32, an adder 33, a first digital-to-analog converter 34, a second digital-to-analog converter 35, a first analog-to-digital converter 36, a second analog-to-digital converter 37, a power amplifier 38, a first instrumentation amplifier 39, a second instrumentation amplifier 310, and a variable resistor 311; wherein, the output terminal of the first digital-to-analog converter, the analog current-voltage controller, the adder, the power amplifier, the variable resistor, and the negative input terminal of the first instrumentation amplifier are connected in sequence, and the output terminal of the first instrumentation amplifier is connected to the analog current-voltage controller and the first analog-to-digital converter respectively. The input terminals of the first instrumentation amplifier are connected, and the positive input terminal of the first instrumentation amplifier is connected to the connection point between the power amplifier and the variable resistor. The variable resistor is connected to one end of the device under test and the positive input terminal of the second instrumentation amplifier. The negative input terminal of the second instrumentation amplifier and the other end of the device under test are both grounded. The output terminal of the second instrumentation amplifier is connected to the input terminals of the analog current-voltage controller and the second analog-to-digital converter. The output terminal of the digital current-voltage controller, the second digital-to-analog converter, and the adder are connected in sequence. The input terminal of the digital current-voltage controller is connected to the output terminals of the first analog-to-digital converter and the second analog-to-digital converter.

[0038] In this embodiment, a high-power output can also be provided between the power amplifier and the variable resistor. A resistor-capacitor (RC) pole can be inserted between the gain amplifier and the power amplifier.

[0039] Specifically, after completing the parameter adjustment of the hybrid digital-analog control loop, the following measurement process can be initiated: The digital current and voltage controller 32 receives measurement commands (including target voltage value, target current value, and measurement mode) from the measurement control device for the device under test, generates a first digital signal corresponding to the measurement command, and sends it to the second digital-to-analog converter 35. The first digital signal focuses on achieving fast dynamic response and loop coarse adjustment. The second digital-to-analog converter 35 converts the first digital signal into a first analog signal. The measurement control device can be integrated with the control system on the same server.

[0040] The measurement command is converted by the first digital-to-analog converter 34 and sent to the analog current and voltage controller 31. The analog current and voltage controller 31 dynamically adjusts the output second analog signal through its high-gain feedback loop, so that the voltage across the device under test can be tracked and locked to the set voltage in real time and accurately.

[0041] The first and second analog signals are input to adder 33 to obtain the third analog signal.

[0042] The third analog signal is provided to the device under test via power amplifier 38 and variable resistor 311, so that the device under test generates and outputs a fourth analog signal under the drive of the third analog signal.

[0043] The third analog signal is provided to the first instrumentation amplifier 39 via the power amplifier 38 and the variable resistor 311. The first instrumentation amplifier 39 extracts the voltage across the variable resistor 311 (with the gain set to 1) as the first voltage signal.

[0044] The fourth analog signal output by the device under test is provided to the second instrumentation amplifier 310, and the second instrumentation amplifier 310 extracts the voltage across the two ends of the device under test as the second voltage signal.

[0045] The analog current and voltage controller 31 receives a first voltage signal and a second voltage signal.

[0046] The second analog-to-digital converter 37 converts the second voltage signal from the second instrumentation amplifier 310 into a second digital signal and feeds it back to the digital current and voltage controller 32.

[0047] The digital current and voltage controller 32 generates the measurement result of the device under test based on the measurement command, the first digital signal, and the second digital signal from the second analog-to-digital converter 37.

[0048] The digital current and voltage controller 32 receives measurement commands for the device under test from the measurement and control device and can generate a first digital signal corresponding to the measurement command based on the output strategy of the first digital signal. After receiving the feedback second digital signal, the digital current and voltage controller 32 can quickly adjust the output strategy of the first digital signal according to the deviation between the second digital signal and the measurement command through digital algorithms (such as proportional-integral-derivative (PID) and adaptive adjustment), responsible for the rapid establishment and stabilization of the system, focusing on speed optimization. The analog current and voltage controller 31 can rely on high-gain negative feedback to achieve high-precision, real-time analog compensation and fine-tuning of the feedback signal within the stable framework built by the digital loop, eliminating quantization errors and instantaneous interference, responsible for accurate control under steady state, focusing on accuracy optimization.

[0049] like Figure 8As shown, a flexibly configurable hybrid analog-digital control loop is employed, comprising two control loops: an analog control loop and a digital control loop. The analog loop uses loop feedback control to achieve high-precision IV output drive, leveraging the loop's high gain to ensure output voltage and current accuracy. The digital loop is implemented using an FPGA, allowing for flexible configuration of the loop transfer function and achieving fast response, while also allowing for the setting of a reasonable dead time within the digital controller.

[0050] As can be seen from the above description, the hybrid analog-digital control loop provided in this embodiment combines analog control loop and digital control loop, which can complement each other's advantages to achieve a control loop with high settling speed, high settling accuracy, and high stability suitable for a wide load range.

[0051] like Figure 9 As shown, the present invention provides an adjustment method, implemented using the aforementioned current and voltage measurement system, wherein the execution entity can be the control system, and the method includes: Step 100: Determine the impedance of the device under test based on the zero-input response of the time-domain impedance detection circuit.

[0052] Specifically, the time-domain detection method is used to calculate the circuit parameters by detecting the zero-input response of the circuit. Its principle is similar to the time-domain Q-value detection method in the Q-value detection method of inductor-capacitor (LC) resonant circuit.

[0053] Step 200: Determine the automatic adjustment parameters of the control loop of the current and voltage measurement system based on the impedance of the device under test.

[0054] Step 300: Automatically adjust the parameters of the control loop to complete the parameter adjustment of the digital-analog hybrid control loop.

[0055] Specifically, the source measurement unit may further include: a capacitor connected in parallel with the variable resistor; the automatic adjustment parameters of the control loop may include: the resistance value R of the variable resistor in the source measurement unit. sen The variable resistor's capacitance value, along with at least one of other insertable RC poles, can be used. The parameters in the mixed-signal control loop can be adjusted to be the same as the corresponding control loop's automatic adjustment parameters. For example, the variable resistor's resistance value in the mixed-signal control loop can be adjusted to be the same as the variable resistor's resistance value in the control loop's automatic adjustment parameters.

[0056] Specifically, the device under test (DUT) affects the transfer function of the control loop. Therefore, to obtain the optimal response, the control loop needs to be configured differently depending on the DUT. Using time-domain sensing, the impedance characteristics of the DUT can be automatically determined before the source measurement unit enters output mode, allowing the control loop to automatically adjust parameters and achieve automatic switching of operating modes. This addresses the problem that current source measurement units typically have limited output load ranges and slow settling times under high capacitive loads, where settling speed and accuracy are mutually constrained.

[0057] Specifically, since the device under test (DUT) is unknown, it can be first connected to the impedance detection circuit to obtain the equivalent series inductance, equivalent series resistance, and equivalent series capacitance corresponding to the maximum similarity, thus measuring the impedance value of the DUT. This achieves automatic determination of the impedance characteristics of the DUT before the measurement unit enters the output mode. Then, the DUT is connected to the measurement unit, and the FPGA or other controller selects the parameters to be used by the measurement unit based on the measured DUT impedance plus a preset impedance-parameter relationship table to stabilize the loop. This allows the loop to automatically adjust parameters and achieve automatic switching of the working mode.

[0058] like Figure 10 As shown, in one embodiment, step 100 includes: Step 101: Control the first switch to open and the second switch to close, and the bias voltage source will charge the detection capacitor to the set voltage.

[0059] Specifically, the time-domain impedance detection circuit includes: a detection capacitor, a first switch, a bias voltage source connected in series, a second switch, and a voltage buffer.

[0060] Step 102: Control the first switch to close and the second switch to open, and obtain the capacitance of the detection capacitor and the voltage response output by the voltage buffer.

[0061] Specifically, the zero-input response of the time-domain impedance detection circuit may include the voltage response output by the voltage buffer.

[0062] Step 103: Based on the capacitance of the detection capacitor and the voltage response output by the voltage buffer, a transfer function model is constructed.

[0063] Step 104: Determine the impedance of the device under test based on the transfer function model and the pre-acquired theoretical model.

[0064] In this embodiment, the time-domain impedance detection circuit may include: a detection capacitor, a first switch, a bias voltage source, a second switch, a voltage buffer, a detection inductor, and a third switch connected in series; one end of the detection capacitor, the detection inductor, and the first switch are connected together as a common terminal, the other end of the first switch is connected to one end of the device under test, the other end of the detection inductor is connected to one end of the third switch, and the other ends of the detection capacitor, the third switch, and the device under test are all grounded; the connection point between the second switch and the voltage buffer is connected to the common terminal.

[0065] Specifically, the time-domain impedance detection circuit is based on the zero-input response measurement principle. By analyzing the natural transient process of capacitor discharge, it can quickly obtain the broadband impedance characteristics of the load. The measurement process consists of two stages: the pre-charging stage, where the detection capacitor is charged to a set voltage. The set voltage can be the initial voltage provided by the resonant circuit; during the discharge phase, the switch is switched to make the detection capacitor and the device under test form a loop, generating a decaying voltage response.

[0066] Comparing the transfer function model with the theoretical model match, Using the switching resistor of the first switch K1, the equivalent series inductance L, equivalent series resistance R, and equivalent series capacitance C of the device under test can be directly extracted, and impedance detection can be completed by capturing a single transient response.

[0067] In one embodiment, step 103 includes: Step 1031: Obtain the current response of the device under test based on the capacitance of the detection capacitor and the voltage response output by the voltage buffer.

[0068] Specifically, the current response of the device under test The voltage response and the capacitance of the sensing capacitor can be used to determine the voltage response. The derivation leads to:

[0069] in, To detect the capacitance of the capacitor, This is the voltage response output by the voltage buffer.

[0070] Step 1032: Based on the voltage response and the current response of the device under test, construct the transfer function model. The voltage response curve and the current response curve can be as follows: Figure 11 As shown, Figure 11 The horizontal axis represents time in seconds (s), and the vertical axis represents voltage in volts (V).

[0071] Specifically, a system identification algorithm can be used to collect... and Fit to transfer function model V tgt (t) can be obtained from the following formula: V tgt (t) = V sen (t) · u(t-t0) in, V is the voltage response output of the voltage buffer. tgt (t) represents the actual voltage across the device under test, containing only V. sen The voltage response during the decay phase in (t), where u(t) represents the step function, u(t-t0) represents the unit step function with delay, and V sen Multiplying (t) by u(t-t0) means keeping only the part after t0.

[0072] In one embodiment, step 104 includes: Step 1041: Match the transfer function model with the pre-acquired theoretical model to obtain the equivalent series inductance, equivalent series resistance and equivalent series capacitance of the device under test.

[0073] Step 1042: Determine the impedance of the device under test based on the equivalent series inductance, equivalent series resistance, and equivalent series capacitance.

[0074] like Figure 12 As shown, in one embodiment, step 100 includes: Step 111: Control the first and third switches to open, and the second switch to close. The bias voltage source will charge the detection capacitor to the set voltage.

[0075] Specifically, the time-domain impedance detection circuit includes: a detection capacitor, a first switch, a bias voltage source connected in series, a second switch, a voltage buffer, a detection inductor, and a third switch.

[0076] Step 112: Control the first switch and the third switch to close, and the second switch to open, to obtain fitting data. The fitting data includes: the capacitance of the detection capacitor, the inductance of the detection inductor, the set voltage, and the voltage response output by the voltage buffer.

[0077] Step 113: Fit the preset output voltage equation according to the fitted data to obtain the equivalent series inductance, equivalent series resistance and equivalent series capacitance of the device under test, so as to determine the impedance of the device under test.

[0078] In this embodiment, the time-domain impedance detection circuit may include: a detection capacitor, a first switch, a bias voltage source connected in series, a second switch, and a voltage buffer; one end of the detection capacitor and one end of the first switch are connected together as a common terminal, the other end of the first switch is connected to one end of the device under test, and the other ends of the detection capacitor and the device under test are both grounded; the connection point between the second switch and the voltage buffer is connected to the common terminal.

[0079] Specifically, a preset output voltage equation can be fitted based on the fitted data. When the similarity between the solution output by the preset output voltage equation and the voltage response meets a preset condition, the equivalent series inductance, equivalent series resistance, and equivalent series capacitance in the preset output voltage equation are sequentially determined as the equivalent series inductance, equivalent series resistance, and equivalent series capacitance of the device under test. The preset condition can be that the similarity between the solution output by the preset output voltage equation and the voltage response is maximized.

[0080] Specifically, the detection capacitor in the detection circuit can first be charged using a bias voltage source. After charging is complete, the switch state is changed, and the circuit begins to oscillate. The oscillation voltage is output through a voltage buffer, thereby measuring the zero-input response of the time-domain impedance detection circuit. Based on the obtained zero-input response, the relationship between V and V can be obtained. sen and Z DUT The Laplace transform formula for the differential equation is shown below:

[0081] in, This represents the voltage response output of the voltage buffer, where 's' represents the Laplace operator. This indicates the inductance of the inductor being tested. This indicates the set voltage (i.e., the initial voltage provided by the resonant circuit). To detect the capacitance of a capacitor. For the impedance to be measured Z... DUT In other words, we can expand it into a bilateral power series (Laurent series) and take the first three terms, letting... And substitute it into the Laplace transform formula to find the solution, where L, R and C The equivalent series inductance, equivalent series resistance, and equivalent series capacitance are represented in sequence. The measured output voltage waveform is fitted with the solution of the differential equation to obtain the circuit parameters with the highest similarity.

[0082] Specifically, the preset output voltage equation can be:

[0083] like Figure 13 As shown, in one embodiment, step 200 includes: Step 201: Obtain the control loop automatic adjustment parameters corresponding to the impedance of the device under test from the preset impedance and parameter relationship table, and use them as the control loop automatic adjustment parameters of the current and voltage measurement system.

[0084] Specifically, the preset impedance and parameter relationship table may include the correspondence between multiple impedance ranges and automatic adjustment parameters of the control loop, which can be set according to the actual situation. This invention does not limit this.

[0085] As can be seen from the above description, the current and voltage measurement system and adjustment method provided in the embodiments of the present invention can achieve the following beneficial effects: Compared to impedance detection techniques based on frequency domain analysis, this invention does not require sequential scanning of each frequency point, resulting in faster measurement speed, simpler circuit structure, and significantly reduced costs.

[0086] Compared to existing time-domain measurement methods, this invention utilizes the natural response of resonant circuits, eliminating the need for precise external excitation signals, thus reducing the requirements for signal sources and simplifying the circuit structure, resulting in a significant cost advantage. A single zero-input response measurement can quickly acquire all data containing impedance information without requiring multiple measurements. The Laurent series expansion method allows L, R, and C to directly correspond to physical inductance, resistance, and capacitance, resulting in faster measurement speed and stronger interpretability.

[0087] The source measurement unit based on time-domain impedance sensing technology employs a flexibly configurable hybrid analog-digital control loop. This allows for automatic adjustment of the control loop transfer function based on the characteristics of the device under test (DUT). Furthermore, the analog current-voltage controller does not require fast response, allowing it to focus on accuracy optimization; conversely, the digital current-voltage controller does not handle accuracy control, enabling it to focus on speed optimization. This complementary approach achieves a high settling speed, high settling accuracy, and highly stable control loop suitable for a wide load range.

[0088] In the description of this specification, the references to terms such as "an embodiment," "a specific embodiment," "some embodiments," "for example," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0089] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A current and voltage measurement system, characterized in that, include: Time-domain impedance detection circuit, control system, and hybrid digital-analog control loop; among which, The time-domain impedance detection circuit and the mixed-signal control loop are respectively connected to the device under test, and the time-domain impedance detection circuit is connected to the control system. The control system is used to determine the impedance of the device under test based on the zero-input response of the time-domain impedance detection circuit. Based on the impedance of the device under test, the automatic adjustment parameters of the control loop of the current and voltage measurement system are determined, and the parameter adjustment of the mixed digital-analog control loop is completed.

2. The current and voltage measurement system according to claim 1, characterized in that, The time-domain impedance detection circuit includes: a detection capacitor, a first switch, a bias voltage source connected in series, a second switch, and a voltage buffer. The detection capacitor and one end of the first switch are connected together as a common terminal, the other end of the first switch is connected to one end of the device under test, and the other ends of the detection capacitor and the device under test are both grounded; the connection point between the second switch and the voltage buffer is connected to the common terminal.

3. The current and voltage measurement system according to claim 2, characterized in that, The time-domain impedance detection circuit further includes: a detection inductor and a third switch; One end of the detection inductor is connected to the common terminal, and the other end of the detection inductor is connected to one end of the third switch, the other end of the third switch being grounded.

4. The current and voltage measurement system according to claim 1, characterized in that, The mixed-signal control loop includes: an analog current-voltage controller, a digital current-voltage controller, an adder, a first digital-to-analog converter, a second digital-to-analog converter, a first analog-to-digital converter, a second analog-to-digital converter, a power amplifier, a first instrumentation amplifier, a second instrumentation amplifier, and a variable resistor; wherein, The first digital-to-analog converter, the output terminal of the analog current-voltage controller, the adder, the power amplifier, the variable resistor, and the negative input terminal of the first instrumentation amplifier are connected in sequence. The output terminal of the first instrumentation amplifier is connected to the input terminals of the analog current-voltage controller and the first analog-to-digital converter, respectively. The positive input terminal of the first instrumentation amplifier is connected to the connection point between the power amplifier and the variable resistor. The variable resistor is connected to one end of the device under test and the positive input terminal of the second instrumentation amplifier, respectively. The negative input terminal of the second instrumentation amplifier and the other end of the device under test are both grounded. The output terminal of the second instrumentation amplifier is connected to the input terminal of the analog current and voltage controller and the second analog-to-digital converter, respectively. The output terminal of the digital current-voltage controller, the second digital-to-analog converter, and the adder are connected in sequence, and the input terminal of the digital current-voltage controller is connected to the output terminals of the first analog-to-digital converter and the second analog-to-digital converter, respectively.

5. An adjustment method, characterized in that, The method is implemented using the current and voltage measurement system according to any one of claims 1 to 4, and includes: The impedance of the device under test is determined based on the zero-input response of the time-domain impedance detection circuit. Based on the impedance of the device under test, determine the automatic adjustment parameters of the control loop of the current and voltage measurement system; The parameters of the analog-digital hybrid control loop are automatically adjusted according to the control loop parameters to complete the parameter adjustment.

6. The adjustment method according to claim 5, characterized in that, The impedance of the device under test is determined based on the zero-input response of the time-domain impedance detection circuit, including: The first switch is turned on and the second switch is closed, and the bias voltage source charges the detection capacitor to the set voltage. Control the first switch to close and the second switch to open, and obtain the capacitance of the detection capacitor and the voltage response output by the voltage buffer; Based on the capacitance of the detection capacitor and the voltage response output by the voltage buffer, a transfer function model is constructed. The impedance of the device under test is determined based on the transfer function model and the pre-acquired theoretical model.

7. The adjustment method according to claim 6, characterized in that, Based on the capacitance of the detection capacitor and the voltage response output of the voltage buffer, a transfer function model is constructed, including: The current response of the device under test is obtained based on the capacitance of the detection capacitor and the voltage response output of the voltage buffer. The transfer function model is constructed based on the voltage response and the current response of the device under test.

8. The adjustment method according to claim 6, characterized in that, Based on the transfer function model and the pre-obtained theoretical model, the impedance of the device under test is determined, including: The transfer function model and the pre-acquired theoretical model are matched to obtain the equivalent series inductance, equivalent series resistance and equivalent series capacitance of the device under test; The impedance of the device under test is determined based on the equivalent series inductance, equivalent series resistance, and equivalent series capacitance.

9. The adjustment method according to claim 5, characterized in that, The impedance of the device under test is determined based on the zero-input response of the time-domain impedance detection circuit, including: The first and third switches are opened, the second switch is closed, and the bias voltage source charges the detection capacitor to the set voltage. Control the first and third switches to close, and the second switch to open, to acquire fitting data. The fitting data includes: the capacitance of the detection capacitor, the inductance of the detection inductor, the set voltage, and the voltage response output by the voltage buffer. The preset output voltage equation is fitted based on the fitted data to obtain the equivalent series inductance, equivalent series resistance, and equivalent series capacitance of the device under test, thereby determining the impedance of the device under test.

10. The adjustment method according to claim 5, characterized in that, Based on the impedance of the device under test, the automatic adjustment parameters of the control loop of the current and voltage measurement system are determined, including: The control loop automatic adjustment parameters corresponding to the impedance of the device under test are obtained from the preset impedance and parameter relationship table and used as the control loop automatic adjustment parameters of the current and voltage measurement system.

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