A manufacturing equipment control logic automatic generation method based on neural-symbol collaboration and intermediate representation verification

Abstract

This invention belongs to the interdisciplinary field of digital twins and artificial intelligence, specifically disclosing an automatic generation method for manufacturing equipment control logic based on neural-symbolic collaboration and intermediate representation verification. This method utilizes a neural-symbolic collaboration strategy, employing four-element semantic model constraints and thought chain reasoning to transform unstructured natural language process instructions into structured hierarchical state machine (HSM) intermediate representations. Through linear temporal logic (LTL) formal verification and graph theory connectivity analysis, static security verification of the control logic is performed, effectively improving the system's temporal determinism and deadlock resistance. Based on this, the system performs dynamic physical simulation in a digital twin environment, extracting spatial coordinate deviations when mechanical interference occurs, and inversely mapping these deviations into structured error correction prompts, which are then fed back to the large language model for logic reconstruction. This invention constructs a cross-modal "generation-verification-correction" closed-loop mechanism, achieving deep integration of model cognitive intent and underlying physical space constraints, ultimately deterministically compiling the verified intermediate representation into highly reliable industrial standard control code.

Description

Technical Field

[0001] This invention belongs to the field of digital twin technology, specifically relating to an automatic generation method for manufacturing equipment control logic based on neural-symbolic collaboration and intermediate representation verification. Background Technology

[0002] With the continuous advancement of "Industry 4.0," digital twin and virtual commissioning technologies have become effective means to shorten equipment development cycles and reduce on-site trial-and-error costs. However, the construction of existing virtual commissioning scenarios typically relies on manual configuration. Since traditional CAD models mostly focus on geometric topology and lack structured semantic descriptions of underlying motion logic and physical constraints, engineers not only spend considerable time establishing the mapping relationship between control variables and model-driven interfaces, but are also prone to configuration deviations. This, to some extent, affects the iterative efficiency of automated design solutions.

[0003] In recent years, generative large language models (LLMs) have been gradually applied to assist in the generation of industrial control logic. However, general-purpose large language models are essentially text generation engines based on probability distributions, lacking a rigorous understanding of the boundaries of industrial physical entities and temporal logic rules. This inherent characteristic leads to the possibility of undefined execution actions or violations of temporal mutual exclusion constraints in the control instructions they directly generate. Furthermore, since large models cannot directly perceive three-dimensional spatial constraints and mechanical interference conditions, their output unstructured logic instructions still face technical risks such as causing control flow deadlocks or equipment spatial interference when directly issued for execution.

[0004] The root cause of these limitations lies in the difficult-to-bridge semantic differences between the unstructured large language model text and the underlying physical control with strict mathematical definitions. Currently, conventional compilers mainly perform static checks on the syntax of the code, while virtual physics simulation engines are only responsible for receiving and executing deterministic driving instructions. Because there is a lack of a mathematically verifiable "intermediate representation" and a cross-modal feedback link between the cognitive reasoning layer and the underlying physical layer, it is difficult to automatically transform underlying temporal logic conflicts or physical space coordinate deviations into semantic feedback that the large model can parse. This makes it difficult for the system to achieve a self-correcting closed loop from underlying anomalies to upper-level logic reconstruction.

[0005] In summary, there is an urgent need in this field for a new technical solution to overcome the technical barriers between unstructured instructions and strict industrial control constraints; in particular, it is necessary to introduce formal verification and dynamic physical closed-loop mechanisms based on mathematical features, in order to achieve automated and compliant transformation from process intent to industrial control code that conforms to international standards, while ensuring the absolute determinism of control timing logic and dynamic physical security. Summary of the Invention

[0006] To address the problems of undefined instructions, lack of physical space constraint awareness, and difficulty in guaranteeing execution determinism when generating industrial control logic from large language models, this invention provides an automatic generation method for manufacturing equipment control logic based on neural-symbolic collaboration and intermediate representation verification.

[0007] The core concept of this invention lies in combining the intent understanding capability of a large language model with formal mathematical verification and deterministic verification by a physics engine, employing a hierarchical state machine as an intermediate representation for cross-modal transitions, and constructing a closed-loop mechanism of "generation-verification-correction". The method provided by this invention specifically includes the following steps: S0 Preparation stage, constructing a four-element semantic model containing geometry, physics, behavior, and constraints; S1 Intent parsing stage, using a neural-symbolic collaborative strategy to map natural language into a hierarchical state machine intermediate representation; S2 Static verification stage, performing security rules and deadlock scanning based on linear temporal logic and graph theory algorithms; S3 Dynamic simulation stage, performing physical interference detection in a digital twin environment, and achieving cross-modal closed-loop correction based on spatial coordinate deviations; S4 Compilation stage, deterministically converting the verified HSM into industry standard code.

[0008] Step S0: Scene construction and semantic instantiation based on the mechanism standard library

[0009] This step aims to construct a digital twin scenario with physical behavioral capabilities, providing a cognitive foundation for subsequent logic generation.

[0010] 1) Define the four-gram semantic model: Construct the four-gram semantic model: ,in: Represents 3D mesh and bounding box information; The representative represents the physical motion parameters; Represents the set of atomic action interfaces supported by the executor; Represents physical and logical constraints.

[0011] 2) Instantiated object mapping: The non-standard components in the design BOM table are matched with the standard library model through the edit distance algorithm, and the above-mentioned four-element semantic data is automatically injected to establish the mechanical transmission link.

[0012] 3) Constraint Space Extraction: Extract the device list and its set from the instantiated semantic model. The atomic actions serve as the source of the 'action space' and 'cognitive constraints' for the large language model in subsequent steps.

[0013] Step S1: Process Intent Parsing and Intermediate Representation Generation Based on Neural-Symbol Collaboration

[0014] This step aims to establish a mapping bridge between natural language process instructions and executable control logic. Addressing the risks of illusion and lack of physical common sense in directly generating code from a general-purpose large language model, this embodiment does not directly generate the final code. Instead, it utilizes a "neural-symbolic" collaborative strategy to generate a structured hierarchical state machine as an intermediate representation.

[0015] 1.1 Construction of Semantic Constraint Environment

[0016] The system loads the four-gram semantic model data constructed in step S0 as a prior constraint for generating the large language model. The four-gram semantic model is defined as follows: ,in: Represents 3D mesh and bounding box information; The representative represents the physical motion parameters; Represents the set of atomic action interfaces supported by the executor; Representing physical and logical constraints. The system automatically constructs system-level prompts containing "cognitive constraints," which include the following structured information:

[0017] 1. Device List: The names and IDs of all available components in the current scene (e.g., Cylinder_A, Motor_B);

[0018] 2. Action Interface: The set of action interfaces supported by each component. For example, for a cylinder object, inject {Extend(), Retract()}; for a motor object, inject {Jog(speed), MoveAbs(pos)}.

[0019] By imposing the above constraints, the large language model is forced to plan only within the given "action space," thus eliminating the phenomenon of calling non-existent functions from the source.

[0020] 1.2 Task Planning Based on Mind Chain

[0021] The system receives natural language process instructions input by the user. (For example: "After pressing the start button, cylinder A extends to its position, and then motor B rotates for 5 seconds"). The system calls the large language model interface and uses Chain of Reasoning (CoT) technology to guide the model in step-by-step reasoning. The reasoning process is explicitly decomposed into the following three logical levels:

[0022] Intent recognition: Identifies the triggering conditions in the command, such as "press the start button" and maps it to an input signal. .

[0023] Timing decomposition: Decompose the compound instruction into a sequence of atomic actions. The system requires the model to output: "Step 1: Trigger Cylinder_A.Extend; Step 2: Wait for Sensor_A_Extended == True; Step 3: Trigger Motor_B.Run(Time=5s)".

[0024] Parameter filling: Automatically fill in the input parameters of the action function based on the quantifiers in the command (such as "5 seconds" or "3000 revolutions").

[0025] 1.3 Mathematical Definition of Hierarchical State Machine

[0026] In order to transform the above unstructured reasoning results into computer-processable logical objects, this embodiment introduces a hierarchical state machine as an intermediate representation.

[0027] According to the present invention, HSM is defined as a quintuple. The specific definitions of each element are as follows:

[0028] (Input Alphabet): A set of input events, corresponding to the PLC's input signals (such as sensor signals, button signals) or internal timer events;

[0029] (States): A finite set of states, including atomic states and composite states. Composite states allow for nested sub-state machines to support modular encapsulation of complex processes;

[0030] (Initial State): The initial state. , indicating the starting point of logic control;

[0031] (Transition Function): The state transition function is defined as follows: This represents the logical rule by which the system transitions from the current state to the next state when a specific event is triggered.

[0032] (Final States): The set of final states. This indicates the end point of the process flow.

[0033] 1.4 Structured Generation of Intermediate Representations

[0034] The system analyzes the thought chain sequence generated in step 1.2 and maps it to the above quintuple structure:

[0035] State mapping: Each "atomic action step" is instantiated as a state node. For example, "cylinder extended" corresponds to the state State_Cyl_Extending.

[0036] Transition construction: The "wait conditions" between steps are instantiated as state transition functions. For example, "once in place" is transformed into a transition condition: IF Sensor_Pos_Ok THEN GOTO Next_State.

[0037] Formatting and parsing output: The system's built-in parser securely and deterministically serializes the unstructured text generated by the large language model into a machine-readable format. The specific process is as follows:

[0038] (1) Schema mandatory constraints: The system adopts JsonSchema or regular expression specifications to force the large language model to output results according to the preset five-tuple data structure (including States, Transitions, and Actions fields).

[0039] (2) Anti-hallucination interception: The parser extracts action instructions from the text and iterates through them to verify whether they belong to the semantic model. The set of action interfaces defined in If the large model outputs undefined actions (such as sets) If the large model only outputs Extend(), while the smaller model outputs Jump(), the parser will immediately intercept and report an error, prompting the large model to be regenerated. This mechanism physically blocks the "illusion" instruction at the parsing level.

[0040] (3) File generation: After interception and verification, the system generates a hierarchical state machine graph file in standard JSON or XML format in memory, which is used as input data for the subsequent step S2 static rule verification.

[0041] After setting scenario constraints, directly generating control code from a large language model still carries risks of uninterpretability and illusion. This step introduces a 'neural-symbolic collaboration' strategy, utilizing thought chain technology to transform natural language instructions into a hierarchical state machine (HSM) intermediate representation. This transformation improves the standardization and interpretability of the control logic, providing a structured graphical foundation for subsequent rule verification and physical simulation.

[0042] Step S2: Static security verification based on the time-series logic rule engine

[0043] After generating the HSM as an intermediate representation in step S1, although it possesses the topological structure of control logic, the logic generated by the large language model may contain timing errors or violate industrial safety regulations. This step aims to establish a static scanner based on a rule engine to perform mathematical-level safety verification of the HSM graph without running simulations.

[0044] 2.1 Construction of the Industrial Safety Rule Base

[0045] The system first pre-configures a general safety rule base for industrial control in the database. This rule base transforms unstructured safety specifications into computer-computable logical constraints, mainly including the following three categories of rules:

[0046] 1. Mutual Exclusion Constraint: Defines signal pairs that cannot be activated simultaneously in a physical manner. For example, the forward and reverse rotation of a motor cannot both be True, and the extension and retraction valves of a cylinder cannot be energized at the same time.

[0047] 2. Prerequisite Dependency Constraints: Define the necessary prerequisites for the execution of an action. For example, before executing an "axis movement" command, the "Servo Enable (Servo_On)" signal must be detected as True.

[0048] 3. State reachability constraint: Every process state must have at least one way to reach the initial state. The path to this state, and non-terminating states must have a transition condition for exit.

[0049] 2.2 Formal Verification Based on Linear Temporal Logic

[0050] This embodiment uses linear sequential logic to formally express the above rules, and uses this as the verification operator of the rule engine. The traversal mechanism of the rule engine is as follows: extract the state transition function from the HSM. All predecessors and successors are substituted into the LTL formula library for logical consistency comparison. The specific verification process is as follows:

[0051] Mutual exclusion signal verification: For mutual exclusion constraints, the system applies the global operator G from linear sequential logic. For example, for the forward and reverse rotation signals of a motor, the correct formal verification formula is defined as:

[0052] In other words, when the verification rule engine traverses all time steps (i.e., states) of the HSM, the logical AND operation between the forward and reverse signals in its output consequent must always result in a false value. If a certain state is detected during the scan... When both signals are activated simultaneously, the system immediately interrupts the scan and marks the state as a "risk node".

[0053] 2.3 Logical Deadlock and Unreachability Detection

[0054] In addition to signal-level conflicts, the system also utilizes graph theory algorithms to perform completeness analysis on the topology of the HSM to prevent the program from falling into an infinite loop (logical deadlock). Specifically, the system converts the hierarchical state machine into a directed graph matrix with a finite set of states. As the vertex, the transition function As directed edges, the following topological completeness analysis is performed:

[0055] 1. Unreachable state detection: The system starts from the initial state. Perform a connectivity traversal for the root node. In one specific implementation, this process can be implemented using a breadth-first search (BFS) algorithm. After the traversal, if a finite set of states has been extracted... Indexes of isolated nodes with an in-degree of zero or that have not been visited (e.g.) If the generated logic is found to be redundant or broken, the system will automatically prune it or issue an error message.

[0056] 2. Deadlock Trap Detection: Calculate the strongly connected components of the directed graph matrix and determine whether there exists a connected subgraph with zero out-degree and containing non-terminating states. In one specific embodiment, the system can scan the graph matrix for loops based on the Tarjan algorithm. If a connected subgraph with the above characteristics is found, the state node index in the subgraph is extracted, and it is identified as an unavoidable "deadlock trap." This means that once the program enters this state, it will never be able to exit.

[0057] 2.4 Physical-Logical Consistency Check

[0058] In conjunction with the mechanical transmission link information to be used in step S3, this step also performs a cross-level consistency pre-check. The system checks whether the "action command" called in the logic matches the "drive interface" in the physical model. For example, if the logic contains the command to "start the cooling water pump", the rule engine will look up the quadratic semantic model data (or physical map) instantiated in step S0. If the corresponding pump object does not exist in the physical model or the object does not define a fluid interface, the system will report a "void command" error, thus preventing control failures caused by the disconnect between logic and physical configuration at the source.

[0059] 2.5 Verification Result Feedback and Iteration

[0060] The system outputs a "Static Security Verification Report". If all rules pass: the system automatically marks the HSM as "Verified_Level_1" and uses this as input to proceed to step S3 for dynamic physical simulation.

[0061] If a verification fails: the system locates the violating status node. The information, including the IDs of the violated LTL formulas, is formatted into error correction prompts and fed back to the large language model for logical regeneration.

[0062] Even after generating intermediate representations of the HSM, the logic generated by the large model may still harbor hidden timing conflicts or deadlock risks. This step establishes a static scanner based on a rule engine, utilizing Linear Temporal Logic (LTL) and graph theory algorithms to perform pre-verification of the HSM graph. This mechanism helps to discover logic vulnerabilities before dynamic simulation, reducing subsequent trial-and-error costs and improving the reliability of industrial control logic.

[0063] Step S3: Dynamic physical simulation and closed-loop correction based on digital twin, as detailed below.

[0064] 3.1 Logic Injection and Driver Binding

[0065] The system initializes a virtual debugging environment (such as a Unity 3D scene) and loads the semantic equipment model containing geometric and physical attributes built in the previous steps.

[0066] The system establishes a "logical-physical" driving bridge, mapping the state nodes in the HSM to the trigger signals of the virtual driving script.

[0067] State mapping: When an HSM enters a certain state When (e.g., Cylinder_Extending), the system automatically calls the corresponding behavior function of that semantic object in the standard library. (e.g., Cylinder.Action_Extend()), which drives the virtual model to start moving according to a preset velocity curve or dynamic parameters.

[0068] Event Listening: The system listens for sensor feedback (such as the virtual photoelectric switch signal Sensor_On) in the virtual scene in real time and uses it as input events. Feedback is sent to the HSM, triggering the state transition function. This drives the logical flow forward.

[0069] 3.2 Real-time physical interferometry detection based on spatial boundary constraint matrix

[0070] During the simulation, the system operates at a fixed time step (e.g., The process involves performing physical detection to extract the 3D spatial geometric extrema of each moving part in the scene and constructing a spatial boundary constraint matrix. In a preferred embodiment, the construction and intersection determination of this spatial boundary constraint matrix can be achieved using the axis-aligned bounding box (AABB) algorithm.

[0071] For any two moving parts A and B in the scene, the system updates their spatial boundary constraint matrices in real time. and If the following conditions are met:

[0072] That is, the projection intervals of the moving part A and part B in the X, Y, and Z axes of the spatial coordinate system overlap, and parts A and B in the four-element semantic model If the relationship is not defined as "permitted contact" (e.g., the gripper is allowed to contact the workpiece, but the robotic arm is not allowed to contact the safety fence), the system determines that physical interference has occurred.

[0073] 3.3 Dynamic Verification of Motion Expectations and Deadlock Trap

[0074] In addition to collision detection, this step also verifies the "validity" of logic execution. The system monitors whether the HSM is within the preset maximum timeout period. The expected target state has been achieved.

[0075] Example: If the HSM issues a "cylinder extend" command, but... Afterwards, the "position sensor" in the virtual scene was still not triggered (possibly due to the cylinder stroke being set too short or being blocked by foreign objects), and the system determined that a "dynamic deadlock" or "execution not as expected" anomaly had occurred.

[0076] 3.4 Closed-loop feedback of generation-verification-correction

[0077] Once physical interference or execution anomaly is detected, the system immediately suspends the simulation and triggers an automatic backtracking and closed-loop correction mechanism:

[0078] (1) Interference depth calculation and feature extraction

[0079] Extract the axis-aligned bounding box coordinates of the first moving part that collides with the obstacle and its interference in three-dimensional space, denoted as follows: and ; Calculate the penetration depth vector along each axis at the instant of collision. The penetration depth along each axis is defined as follows:

[0080] in .

[0081] (2) Construction of cross-modal cue word mapping

[0082] Select the penetration depth vector The axis with the largest median value is taken as the principal interference axis. And calculate the corresponding safety compensation distance. ,in This is a preset safety margin.

[0083] Call the mapping function Reverse retrieval four-gram semantic model Get the corresponding component semantic name and Generate structured error correction prompts:

[0084]

[0085] The specific mapping template example is as follows: The system uses a preset structured template to generate prompts, clearly including the name of the physical entity causing the interference and the state node at the time of the fault. and principal interference axis Minimum position compensation required in direction The final output message for the large model is as follows: "During the execution state [Robotic Arm Lateral Movement], a physical collision was detected between [Robotic Arm] and [Safety Door]. Recommendation: The main interference axis is the Z-axis. The current operation violates spatial boundary constraints. Please insert an avoidance action before executing this action, adding at least a 45.5mm compensation distance in the Z-axis direction." .

[0086] (3) Closed-loop iterative reconstruction

[0087] The structured error correction prompts Inject the large language model context window from step S1 to drive the model to update the state transition function. Alternatively, an evasion waiting action can be inserted to generate a corrected hierarchical state machine and re-trigger the security check.

[0088] Static rule validation does not consider the spatial geometric properties of physical entities, and direct execution may cause mechanical interference. This step injects the HSM into a virtual debugging environment for dynamic simulation to detect potential spatial collision issues. Simultaneously, this step constructs a cross-modal closed-loop feedback mechanism, transforming the coordinate deviations of physical interference into structured error-correction prompts understandable by the large language model. This bridges the semantic gap between physical spatial properties and model cognition, enabling iterative correction of the control logic.

[0089] Step S4: Deterministic compilation from intermediate representation to industry standard code

[0090] Following the dynamic physical simulation verification in step S3, the HSM has been proven to possess logical completeness and physical security. This step aims to transform the intermediate representation (IR) into structured text source code conforming to the IEC 61131-3 international standard by building a dedicated compiler, so that engineers can directly import it into industrial controllers for deployment.

[0091] 4.1 Compiler Construction and Syntax Mapping Rules

[0092] The system incorporates a code generator based on a template engine. This generator defines a strict set of mapping rules from HSM graph elements to ST language syntax structures, ensuring mathematical determinism in the conversion process and eliminating the risk of randomness. The specific mapping rules are as follows:

[0093] 1. State Machine Architecture Mapping: The entire HSM is encapsulated as a FUNCTION_BLOCK (function block).

[0094] 2. State Node Mapping: In this invention, the HSM has a finite set of states. Mapped to CASE branch indices in the ST language, the state index variable is uniformly named "Step" throughout the entire code generation logic to ensure consistency of control logic at different stages. Each state node... Each CASE branch corresponds to an integer index.

[0095] 3. State transition mapping: State transition function The conditional statement is mapped to the IF...THEN statement inside the branch.

[0096] Code template example:

[0097] CASE Step OF

[0098] 10: (* State: Cylinder_Extending *)

[0099] IF Sensor_Extended = TRUE THEN

[0100] Step:= 20; (* Transition to Next State *)

[0101] END_IF;

[0102] END_CASE;

[0103] 1. Action output mapping: A set of attributes bound to a state node. Atomic actions in the code are mapped to assignment operations on output variables (Output_Tag := TRUE).

[0104] 4.2 Automatic generation of symbol tables

[0105] While generating the logic code, the compiler iterates through all input events referenced in the HSM. and atomic actions The system automatically generates the global variable declaration section based on the semantic model interface definition loaded in step S1.

[0106] Input variables: Declare the sensor signal as an I zone address (e.g., AT %I0.0 : BOOL).

[0107] Output variables: Declare the executor instruction as a Q-zone address (e.g., AT %Q0.0 : BOOL).

[0108] Intermediate variables: Declare the state machine step index (Step) and timer (TON) as internal static variables.

[0109] 4.3 Structured assembly and output of code

[0110] The compiler performs two rounds of scanning:

[0111] First round of scanning: Traverse the HSM graph, extract all used variable names and data types, and generate .db (data block) or variable declaration segment.

[0112] Second round of scanning: Following the "state machine initialization" Input refresh State transition logic The order of "output refresh" is used to assemble the main program logic.

[0113] Finally, the system exports the generated code as a standard text file (such as .st, .scl, or .xml format), which can be directly recognized and imported by mainstream PLC programming software (such as Siemens TIA Portal, Beckhoff TwinCAT, Codesys).

[0114] 4.4 Final Confirmation of Human-Machine Loop

[0115] Although the code has been automatically validated, the system provides a "code-logic comparison view" before exporting. The left side of the interface displays the graphical status nodes of the HSM (such as the "cylinder extended" icon). The right side of the interface highlights the corresponding ST code segment (such as Cylinder_Out := TRUE).

[0116] Engineers can perform a final quick review in this view. This step embodies the "human-machine collaboration" design philosophy, ensuring that the generated code is entirely under human supervision and complies with safe operating procedures in industrial settings.

[0117] The HSM, after dynamic simulation and correction, cannot be directly executed by industrial controllers. This step uses the system's built-in compiler and syntax mapping rules to translate the verified HSM diagram into structured text (ST) code conforming to the IEC 61131-3 standard. This process reduces the randomness of generative AI output at the end of the code, achieves a stable conversion from intermediate representation to industry standard code, and improves the deployment efficiency of control logic.

[0118] Beneficial effects

[0119] The beneficial effects of this invention are specifically reflected in:

[0120] (1) Construct a deterministic cross-modal closed loop. By creatively using a hierarchical state machine as an "intermediate representation" to break the black box limitation of the model, LTL temporal verification, graph theory connectivity analysis and spatial bounding box collision detection are seamlessly integrated into the "generation-verification-correction" mechanism, realizing the data flow from the underlying physical error to the upper cognitive reconstruction.

[0121] (2) Precise error correction based on underlying mathematical features. Unlike conventional general error reporting, this solution extracts the penetration depth vector of physical interference from the underlying technology. The safety compensation distance is calculated mathematically. This data is then reverse-mapped into structured prompts. Utilizing precise 3D coordinate deviations to guide large-scale model reconstruction significantly improves the accuracy and convergence efficiency of logic error correction.

[0122] (3) Provides theoretical-level high reliability assurance. A safety lower bound is established through a global scan of linear sequential logic, which theoretically intercepts 100% of logical illusions and deadlock traps, ensuring that the final compiled IEC 61131-3 standard code has stringent industrial-grade determinism and physical execution security. Attached Figure Description

[0123] Figure 1 This is an overall flowchart of the method of the present invention;

[0124] Figure 2 This is a diagram illustrating the system architecture and module interactions.

[0125] Figure 3 This is a schematic diagram illustrating the generation principle of the Hidden Meaning Subtraction Method (HSM).

[0126] Figure 4 This is a schematic diagram of the dual verification mechanism.

[0127] Figure 5 The diagram shows a specific implementation scenario and the code generation result. Detailed Implementation

[0128] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way.

[0129] Example:

[0130] This embodiment uses a typical "pneumatic handling robot workstation" as an application scenario, such as... Figure 5 As shown. This workstation consists of an X-axis horizontal cylinder, a Z-axis vertical cylinder, pneumatic grippers, and a conveyor belt. (Loading station) and conveyor belt (Discharge station) composition. This embodiment aims to achieve "the conveyor belt..." The workpiece is picked up and transported to the conveyor belt. The control logic is automatically generated and verified. The operating environment of this embodiment is based on a PC workstation, using Unity 3D as a virtual debugging and simulation platform. It calls a large language model through API interface to perform logical reasoning, and finally generates ST language code that conforms to the IEC 61131-3 standard.

[0131] 1. Preparation Phase S0: Scene Construction and Semantic Instantiation Based on Mechanism Standard Library

[0132] First, construct a digital twin scenario with physical behavioral capabilities, such as... Figure 2 The “Mechanism Standard Library” module is shown in the document.

[0133] (1) Semantic model definition: Define a four-element semantic model for cylinder and gripper in the standard library. Taking a Z-axis cylinder as an example: Associate it with its 3D mesh and spatial bounding box information; Includes physical parameters such as a stroke of 200mm; Define the action interface {Descend(), Lift()}; Define restrictions such as "cannot operate if gas source pressure is not detected".

[0134] (2) Instantiation and Constraint Extraction: The system uses the edit distance algorithm to match the BOM table and establish the mechanical transmission link. Then, it extracts the equipment list and its set from the model. The atomic actions serve as the "action space" for the large language model in subsequent steps.

[0135] 2. Step S1: Process Intent Parsing and Intermediate Representation Generation Based on Neural-Symbol Collaboration

[0136] This step aims to transform natural language into a structured hierarchical state machine (HSM). The generation principle is referenced [reference needed]. Figure 3 .

[0137] (1) Input and intent recognition: User input: "When the conveyor belt When there is goods, the robotic arm descends to grab the workpiece, lifts it, and moves it to the conveyor belt. Released from above.

[0138] (2) CoT reasoning: The system will combine the action set in the semantic model As cognitive constraints, prompt words are injected to guide the large model in step-by-step reasoning:

[0139] Step 1: Detect sensor signals ;

[0140] Step 2: Trigger Z_Axis.Descend;

[0141] Step 3: Trigger Griper.Close and wait for the capture signal to be received.

[0142] (3) HSM structure generation: The system maps the inference sequence into quintuples. .like Figure 3 As shown, each atomic action is instantiated as a state node. The waiting conditions between steps are transformed into transfer functions. The parser performs precise string matching, blocking any strings not defined in the parser. The illusion command in the game.

[0143] 3. Step S2: Static security verification based on the time-series logic rule engine

[0144] The generated HSM needs to undergo mathematical checks based on a rule engine. The verification mechanism principle is referenced [reference needed]. Figure 4 .

[0145] (1) Mutual Exclusion Constraint Verification: If the large model incorrectly activates the "cylinder extend" and "cylinder retract" signals in the same state, the rule engine applies a linear time-series logic operator. Perform a global scan. Once a conflict is detected, immediately mark it as a "risk node".

[0146] (2) Topological completeness analysis: The HSM is converted into a directed graph matrix, and graph theory algorithms are used to detect whether there is a connected subgraph with zero out-degree and a non-terminal state (i.e., a deadlock trap). If an unreachable state is detected, the system will locate the offending node. It is then formatted as an error correction prompt and fed back to step S1 for iterative regeneration.

[0147] 4. Step S3: Dynamic physical simulation and closed-loop correction based on digital twin

[0148] While the HSM logic passed static verification is electrically correct, it may violate physical space constraints. This step involves injecting the HSM into the Unity 3D environment for dynamic testing and verifying the cross-modal closed-loop obstacle avoidance mechanism.

[0149] (1) Scene preset and real-time physical interference detection

[0150] Assuming the logic initially generated by the large model in stage S1 omits the safety height constraint, the output would be: "Z-axis cylinder descends to grab -> X-axis cylinder directly moves towards the conveyor belt". "Move right". After the simulation starts, the system will... The spatial boundary constraint matrix between the robot and scene obstacles is updated in real time for the step size. When the "X-axis right shift" state is executed, the system detects the robot's bounding box. Safety fence between the two conveyor belts satisfy If there is overlap in the three-dimensional projection range, it is determined that physical interference has occurred.

[0151] (2) Transmodal deviation transformation

[0152] The system immediately suspends the simulation and triggers automatic backtracking. The system extracts the axis-aligned bounding box coordinates of both sides in 3D space at the instant of interference and calculates the penetration depth vector. Calculations revealed that because the robot arm's Z-axis was not fully lifted, the Z-axis direction was the principal interference axis. Its penetration depth .

[0153] (3) Generation of structured error correction prompts

[0154] The system calculates the safety compensation distance based on the maximum penetration depth. (in (For preset safety margin). Subsequently, the system calls the mapping function. The system automatically converts the aforementioned physical coordinate deviations into structured error correction prompts that the large language model can understand: "When executing the [X-axis right shift] state, a physical collision occurred between the [robotic arm] and the [safety fence]. The main interference axis is the Z-axis. Please insert an avoidance action before executing this action to ensure that the Z-axis direction increases by at least..." Position compensation amount ” .

[0155] (4) Closed-loop iterative reconstruction

[0156] The prompt word is injected into the large language model in step S1 as contextual feedback. After parsing the space compensation requirement, the large model automatically reconstructs the state transition function. Before the "X-axis right shift" state, a pre-wait state of "WAIT UNTILSensor_Z_Top == True" was forcibly inserted. After the updated HSM was re-released for simulation, the robot successfully crossed the fence and reached the conveyor belt. This completed the cross-modal closed-loop verification from "physical space deviation" to "semantic logic correction".

[0157] 5. Step S4: Deterministic compilation from intermediate representation to industry standard code

[0158] The HSM, which has been verified to be secure through multi-dimensional verification, is then converted by the compiler into code that conforms to the IEC 61131-3 standard.

[0159] (1) Syntax mapping: The compiler maps the HSM state set Mapped to CASE branch indexes in ST language, the transfer function will be... Mapped to an IF...THEN statement.

[0160] FUNCTION_BLOCK FB_PickAndPlace_Workstation

[0161] VAR_INPUT

[0162] I_Part_Present_U : BOOL; / / Conveyor belt U-position sensor

[0163] I_Z_Top_Pos : BOOL; / / Upper limit of Z-axis

[0164] I_Z_Bottom_Pos : BOOL; / / Lower limit of Z-axis

[0165] I_Gripper_Closed : BOOL; / / Gripper closure feedback

[0166] END_VAR

[0167] VAR_OUTPUT

[0168] Q_Z_Descend : BOOL; / / Z-axis descent solenoid valve

[0169] Q_X_Move_D : BOOL; / / X-axis movement direction to conveyor belt D solenoid valve

[0170] Q_Gripper_Close : BOOL; / / Gripper closing instruction

[0171] END_VAR

[0172] VAR

[0173] Step: INT := 0; / / State machine step index

[0174] T_Timer : TON; / / Dynamic deadlock monitoring timer

[0175] END_VAR

[0176] CASE Step OF

[0177] 0: (* Initial state: Waiting for conveyor belt U-shaped workpiece*)

[0178] IF I_Part_Present_U THEN

[0179] Step := 10;

[0180] END_IF;

[0181] 10: (* Action: Z-axis descent *)

[0182] Q_Z_Descend := TRUE;

[0183] IF I_Z_Bottom_Pos THEN

[0184] Step := 20;

[0185] END_IF;

[0186] 20: (*Action: Grip with claw*)

[0187] Q_Gripper_Close := TRUE;

[0188] IF I_Gripper_Closed THEN

[0189] Step := 30;

[0190] END_IF;

[0191] 30: (* Action: Z-axis lift (a safety compensation state added after S3 feedback correction) *)

[0192] Q_Z_Descend := FALSE;

[0193] IF I_Z_Top_Pos THEN

[0194] Step := 40;

[0195] END_IF;

[0196] 40: (* Action: Translate along the X-axis to conveyor belt D *)

[0197] Q_X_Move_D := TRUE;

[0198] (* State transition logic... *)

[0199] END_CASE;

[0200] (2) Code assembly: The semantic interface is automatically traversed to generate a symbol table, and the sensors are mapped to the I area and the actuators are mapped to the Q area. The final generated code snippets (such as the state machine flow in the loop body) and the HSM map are highlighted and displayed on the interface for engineers to make final confirmation of the human-machine loop.

[0201] This embodiment achieves the transformation from natural language to highly reliable control code through the closed-loop process of S1 to S4 described above, effectively bridging the semantic gap between the model's cognitive intent and the underlying physical constraints.

Claims

1. A method for automatically generating control logic for manufacturing equipment based on neural-symbolic collaboration and intermediate representation verification, characterized in that, The method includes the following steps: Step S0: Scene construction and semantic instantiation based on the mechanism standard library. Step S1: Process intent parsing and intermediate representation generation based on neural-symbolic collaboration. Step S2: Static security verification based on the time-series logic rule engine. Step S3: Dynamic physical simulation and closed-loop correction based on digital twin. Step S4: Deterministic compilation from intermediate representation to industry-standard code. A cross-modal generation and closed-loop correction mechanism is established between steps S1, S2 and S3. When the static security verification of step S2 or the dynamic physical simulation of step S3 fails, the system extracts the illegal instruction string or physical interference space coordinate deviation that caused the failure, converts it into structured natural language error correction prompts through a preset template mapping engine, and feeds it back to the large language model of step S1 for iterative regeneration of the state machine.

2. The method for automatically generating control logic of manufacturing equipment based on neural-symbolic collaboration and intermediate representation verification according to claim 1, characterized in that, Step S0 is as follows: 1) Define the four-gram semantic model: Construct the four-gram semantic model ,in: Represents 3D mesh and bounding box information; Represents physical motion parameters; Represents the set of atomic action interfaces supported by the executor; Represents physical and logical constraints. 2) Instantiated Object Mapping: The non-standard components in the design BOM table are matched with the standard library model using an edit distance algorithm, and the aforementioned four-element semantic data is automatically injected to establish the mechanical transmission link. 3) Constraint Space Extraction: Extract the device list and its action interface set from the instantiated semantic model. This serves as the source of the 'action space' and 'cognitive constraints' for the large language model in subsequent steps.

3. The method for automatically generating control logic of manufacturing equipment based on neural-symbolic collaboration and intermediate representation verification according to claim 1, characterized in that, Step S1: Process intent parsing and intermediate representation generation based on neural-symbolic collaboration, as detailed below. 1.1 Construction of semantically constrained environment, The system loads the four-gram semantic model data constructed in step S0 as a prior constraint for generating the large language model. The four-gram semantic model is defined as follows: ,in: : Represents 3D mesh and bounding box information; Represents physical motion parameters; Represents the set of atomic action interfaces supported by the executor; Representing physical and logical constraints, the system automatically constructs system-level prompts containing "cognitive constraints," which include the following structured information: Device list: The names and IDs of all available components in the current scene; Action Interface: The set of atomic action interfaces supported by each executor ; By imposing the above constraints, the large language model is forced to plan only within the given "action space," thus preventing the invocation of non-existent functions from the outset. 1.2 Task planning based on thought chain The system receives natural language process instructions input by the user. The system calls the large language model interface and uses the thought chain technology to guide the model to perform step-by-step reasoning. The reasoning process is explicitly decomposed into the following three logical levels: Intent recognition: Identifies the triggering conditions in the command; "Press the start button" is mapped to an input signal. , Timing decomposition: The compound instruction is broken down into a sequence of atomic actions. The system requires the model to output: "Step 1: Trigger Cylinder_A.Extend; Step 2: Wait for Sensor_A_Extended == True; Step 3: Trigger Motor_B.Run(Time=5s)". Parameter filling: Automatically fills in the input parameters of the action function based on the quantifiers in the command. 1.3 Mathematical definition of hierarchical state machine Define HSM as a quintuple The specific definitions of each element are as follows: : A set of input events, corresponding to the PLC's input signals or internal timer events; A finite set of states, including atomic states and composite states. Composite states allow for nested sub-state machines to support modular encapsulation of complex processes. Initial state , indicating the starting point of logic control; The state transition function is defined as follows: This represents the logical rule by which the system transitions from the current state to the next state when a specific event is triggered. : Set of terminating states This indicates the end point of the process flow. 1.4 Structured generation of intermediate representations, The system analyzes the thought chain sequence generated in step 1.2 and maps it to the above quintuple structure: State mapping: Each "atomic action step" is instantiated as a state node. , Transition construction: The "wait conditions" between steps are instantiated as state transition functions. , Formatting and parsing output: The system's built-in parser securely and deterministically serializes the unstructured text generated by the large language model into a machine-readable format. The specific process is as follows: (1) Schema enforcement constraints: The system adopts JSONSchema or regular expression specifications to force the large language model to output results according to the preset five-tuple data structure. (2) Anti-hallucination interception: The system extracts the action string from the output text of the large language model and calculates its correlation with the four-gram semantic model. Collection of legal atomic action interfaces It performs precise string matching; when a match fails, it extracts the illegal string that caused the failure and automatically encapsulates it into a specific error feedback template, which is then re-inputted into the large language model for interception and correction, blocking undefined commands. (3) File generation: After interception and verification, the system generates a hierarchical state machine graph file in standard JSON or XML format in memory, which is used as input data for the subsequent step S2 static rule verification.

4. The method for automatically generating control logic of manufacturing equipment based on neural-symbolic collaboration and intermediate representation verification according to claim 1, characterized in that, Step S2 is as follows: 2.1 Construction of the Industrial Safety Rule Base The system first pre-sets a general safety rule base for industrial control in the database. This rule base transforms unstructured safety specifications into computer-computable logical constraints, mainly including the following three types of rules: Mutual exclusion constraint: Defines a pair of signals that cannot be activated simultaneously in a physically defined manner. Pre-dependency constraints: Define the necessary preconditions for the execution of an action. State reachability constraint: All process states must have at least one path from the initial state. The path to this state must exist, and for non-terminating states, there must be a transition condition for exiting. 2.2 Formal verification based on linear temporal logic, Extracting state transition functions from a hierarchical state machine All triggering events and output actions are substituted into the linear sequential logic formula library for logical consistency comparison; for mutual exclusion constraints, global sequential operators are applied. When the verification rule engine traverses all time steps, it outputs the mutex signal logic and result in the consequent to check if they are always false. If they are not false, they are marked as risk nodes. 2.3 Logical deadlock and unreachability detection The hierarchical state machine is converted into a directed graph matrix, and topological completeness analysis is performed: Unreachable state detection: starting from the initial state Perform a connectivity traversal on the root node to extract a finite set of states. Isolated node indexes with an in-degree of zero or that have not been visited are identified as having redundancy or open circuits and are pruned or an error message is displayed. Deadlock trap detection: Calculate the strongly connected components of the directed graph matrix, determine whether there is a connected subgraph with zero out-degree and containing non-terminating states, and if so, extract the state node index in the subgraph and determine it as a deadlock trap that cannot be exited. 2.4 Physical-logical consistency check, In conjunction with the mechanical transmission link information to be used in step S3, a cross-level consistency pre-check is also performed. The system checks whether the "action instructions" called in the logic match the "drive interface" in the physical model. 2.5 Verification result feedback and iteration The system outputs a "Static Security Verification Report". If all rules are passed: the system automatically marks the HSM as "Verified_Level_1" and uses this as input to proceed to step S3 for dynamic physics simulation. If a verification fails: the system locates the violating status node. The information, including the IDs of the violated LTL formulas, is formatted into debug prompts and fed back to the large language model for logical regeneration.

5. The method for automatically generating control logic of manufacturing equipment based on neural-symbolic collaboration and intermediate representation verification according to claim 1, characterized in that, Step S3: Dynamic physical simulation and closed-loop correction based on digital twin, as detailed below. 3.1 Logic injection and driver binding, The system initializes the virtual debugging environment and loads the semantic equipment model containing geometric and physical attributes constructed in the previous steps. The system establishes a "logical-physical" driving bridge, mapping state nodes in the HSM to trigger signals for virtual driving scripts. State mapping: When an HSM enters a certain state At that time, the system automatically calls the corresponding behavior function of the semantic object in the standard library. The virtual model is driven to start moving according to a preset velocity curve or dynamic parameters. Event Listening: The system listens for sensor feedback in the virtual scene in real time and uses it as input events. Feedback is sent to the HSM, triggering the state transition function. This drives the logical flow forward. 3.2 Real-time physical interferometry detection based on spatial boundary constraint matrix During the simulation, the system performs physical detection at fixed time steps, extracts the three-dimensional spatial geometric extrema of each moving part in the scene, and constructs a spatial boundary constraint matrix; for any two moving parts A and B in the scene, the system updates their spatial boundary constraint matrices in real time. and If the following conditions are met: That is, the projection intervals of the moving parts A and B in the X, Y, and Z axes of the spatial coordinate system overlap, and parts A and B in the four-element semantic model If the relationship is not defined as 'permitted contact', the system determines that physical interference has occurred; 3.3 Dynamic verification of motion expectations and deadlock traps In addition to collision detection, the system also verifies the "validity" of logic execution by monitoring whether the HSM (Host Message Service) is within the preset maximum timeout period. The expected target state has been achieved. 3.4 Closed-loop feedback of generation-verification-correction. Once physical interference or execution anomaly is detected, an automatic backtracking and closed-loop correction mechanism is triggered: (1) Interference depth calculation and feature extraction: Extract the axis-aligned bounding box coordinates of the first moving part that collides with the interference obstacle in three-dimensional space, denoted as follows: and ; Calculate the penetration depth vector along each axis at the instant of collision. The penetration depth along each axis is defined as follows: ,in ; (2) Construction of cross-modal cue word mapping: Selecting the penetration depth vector The axis with the largest median value is taken as the principal interference axis. And calculate the corresponding safety compensation distance. ,in To set a preset safety margin, call the mapping function. Reverse retrieval four-gram semantic model Get the corresponding component semantic name and Generate structured error correction prompts: The prompt explicitly includes the name of the physical entity involved in the interference and the state node at the time of the fault. and principal interference axis Minimum position compensation required in direction ; (3) Closed-loop iterative reconstruction: The structured error correction prompts Inject the large language model context window from step S1 to drive the model to update the state transition function. Alternatively, an evasion waiting action can be inserted to generate a corrected hierarchical state machine and re-trigger the security check.

6. The method for automatically generating control logic of manufacturing equipment based on neural-symbolic collaboration and intermediate representation verification according to claim 1, characterized in that, Step S4: Deterministic compilation from intermediate representation to industry standard code, as detailed below. 4.1 Compiler construction and syntax mapping rules, the specific mapping rules are as follows: State machine architecture mapping: The entire HSM is encapsulated as a functional block. State Node Mapping: A Finite Set of States in an HSM Mapped to CASE branch indices in the ST language, the state index variable is uniformly named "Step" throughout the entire code generation logic to ensure consistency of control logic at different stages, with each state node... Corresponding to an integer index of a CASE branch, State transition mapping: state transition function This is mapped to an IF...THEN conditional statement within the branch. Action output mapping: bound to state nodes and belonging to a set Atomic actions in the process are mapped to assignment operations on output variables; 4.2 Automatic generation of symbol tables, While generating the logic code, the compiler iterates through all input events referenced in the HSM. and set The atomic actions invoked in the process. Based on the semantic model interface definition loaded in step S1, the system automatically generates the global variable declaration section. Input variables: Declare the sensor signal as an I-zone address. Output variable: Declare the executor instruction as a Q-region address. Intermediate variables: Declare the state machine step index (Step) and timer (TON) as internal static variables. 4.3 Structured assembly and output of code, The compiler performs two rounds of scanning: First round of scanning: Traverse the HSM graph, extract all used variable names and data types, and generate .db (data block) or variable declaration sections. Second round of scanning: Following "state machine initialization" Input refresh State transition logic Following the "output refresh" sequence, the main program logic is assembled. Finally, the system exports the generated code as a standard text file, which can be directly recognized and imported by mainstream PLC programming software. 4.4 Final Confirmation of Human-Machine Loop Before exporting, the system provides a "code-logic comparison view". The left side of the interface displays graphical status nodes, and the right side highlights the corresponding ST code segment. Engineers can perform a final quick review in this view.

7. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the automatic generation method for manufacturing equipment control logic based on neural-symbolic collaboration and intermediate representation verification as described in any one of claims 1 to 6.

8. A computer-readable storage medium storing computer instructions thereon, characterized in that, When the computer instruction is executed by the processor, it implements the automatic generation method for manufacturing equipment control logic based on neural-symbolic collaboration and intermediate representation verification as described in any one of claims 1-6.

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