A synchronous signal acquisition and processing system and method for an excitation power supply

Abstract

The present application relates to the field of electric signal acquisition processing and power electronic control technology, and discloses a kind of excitation power supply synchronous signal acquisition processing system and method.The system obtains excitation power supply input side alternating current synchronous reference signal and forms original synchronous sampling sequence by synchronous signal input unit, signal conditioning unit and sampling conversion unit;Candidate synchronous edge extraction unit identifies candidate synchronous edge, and local waveform feature extraction unit establishes front and rear time windows around candidate synchronous edge and extracts local waveform feature, and synchronous effectiveness determination unit determines effective synchronous edge accordingly, and pseudo-synchronous point processing unit eliminates invalid candidate synchronous edge or generates modified synchronous position, and synchronous reference generation unit generates synchronous reference signal based on effective synchronous edge or modified synchronous position and outputs.Thereby, pseudo-synchronous points induced by waveform distortion are avoided from directly entering subsequent control link, and the risk of trigger angle deviation, sampling window misplacement and control timing jump is reduced.

Description

Technical Field

[0001] This invention belongs to the field of electrical signal acquisition and processing and power electronic control technology, specifically relating to an excitation power supply synchronous signal acquisition and processing system and method. Background Technology

[0002] As a key power supply and control unit for synchronous generators and related power electronic equipment, the excitation power supply typically needs to determine the phase reference for subsequent trigger control timing, sampling window configuration, and control calculation timing based on the AC side voltage or a synchronization reference signal that has a phase correspondence with the AC side voltage. In static excitation systems, self-excited excitation systems, and separately excited excitation systems, a synchronization signal acquisition and processing stage is commonly included. The output synchronization reference signal is a crucial basis for subsequent thyristor trigger control, phase adjustment, voltage closed-loop sampling, and control calculation timing. With the increasingly widespread application of high-power power electronic equipment in the power grid, the operating environment of the AC voltage on the input side of the excitation power supply exhibits characteristics such as increased harmonic content, more transient distortion events, and intensified commutation interference from power electronic equipment on the same bus, placing higher demands on the stability and reliability of the synchronization signal acquisition and processing stage.

[0003] In existing technologies, synchronization signal acquisition and processing are typically achieved as follows: the AC voltage on the excitation power input side is converted into a low-voltage synchronization reference signal that the controller can acquire through an isolation transformer, isolation amplifier, or voltage divider resistor network; high-frequency noise and some waveform distortion components are suppressed through analog low-pass filters, digital filters, or band-pass filters; the filtered synchronization signal is edge-identified through a voltage comparator, zero-crossing detection circuit, or microcontroller digital input capture channel, and the comparator flip point or single-point zero-crossing point is directly used as the synchronization pulse output; to address the phase delay introduced by the filtering stage, a fixed phase compensation value is used to correct the timing of the output synchronization pulse; finally, the processed synchronization signal is directly used as a synchronization reference for the excitation controller or thyristor trigger control stage.

[0004] The aforementioned existing technology relies on a single-point criterion, such as the comparator flipping edge or the single-point zero-crossing point after filtering, to directly generate a synchronization reference. However, it lacks secondary verification of whether this single point truly represents the fundamental phase. When the AC voltage on the excitation power supply input side is locally distorted due to commutation of a high-power load on the same bus, commutation gaps in the rectifier, starting impact of the synchronous motor, or harmonic injection from the frequency converter on the same bus, the comparator will also flip at the glitch edge or instantaneous crossover point and be used as the synchronization reference output. This situation will further lead to the following technical consequences: The processing method of filtering and fixed phase compensation is based on the ideal fundamental period and does not perform neighborhood morphology verification on individual candidate edges. Therefore, it cannot identify pseudo-zero crossings induced by commutation gaps, glitch, or sudden changes in local slope. After the pseudo-zero crossing is output as a synchronization reference, the trigger control circuit generates a trigger pulse according to the synchronization reference that deviates from the true fundamental phase, resulting in trigger angle deviation, excitation voltage output fluctuation, and misalignment of the voltage closed-loop sampling window with the fundamental phase. Existing technologies usually adopt coarse-grained processing methods such as alarm, maintaining the previous synchronization pulse, or stopping triggering after determining that the synchronization signal is abnormal. They lack the processing logic to generate a corrected synchronization position based on historical effective edges or fundamental trends after the pseudo-synchronization point is eliminated. This causes the synchronization reference to be intermittent or jump within the short-term distortion range, which in turn leads to discontinuities in the subsequent trigger control timing, sampling window start point, or control calculation cycle. Summary of the Invention

[0005] The technical problem to be solved by this invention is: under the condition that there are harmonics, spikes, commutation gaps or local waveform distortions in the AC voltage on the excitation power supply input side, how to avoid the candidate zero crossing point induced by instantaneous crossover point, glitch edge or local slope change as the true fundamental frequency synchronization reference output, so as to reduce the impact of pseudo synchronization point on the subsequent excitation control timing and the synchronization reference on which the trigger execution is based.

[0006] To solve the above-mentioned technical problems, the present invention is achieved through the following technical solution: Firstly, a system for acquiring and processing synchronous signals of excitation power supply is proposed, including: Synchronization signal input unit, used to receive AC synchronization reference signal from the excitation power supply input side; The signal conditioning unit, connected to the synchronization signal input unit, is used to convert the AC synchronization reference signal into a synchronization signal suitable for sampling. The sampling conversion unit, connected to the signal conditioning unit, is used to sample the synchronization signal suitable for sampling to form the original synchronization sampling sequence; The candidate synchronization edge extraction unit, connected to the sampling conversion unit, is used to identify candidate synchronization edges from the original synchronization sampling sequence; The local waveform feature extraction unit is connected to the candidate synchronization edge extraction unit. It is used to establish a time window before and after the candidate synchronization edge with the time of the candidate synchronization edge as the center, and extract local waveform features within the time window before and after the candidate synchronization edge. The synchronization validity determination unit is connected to the local waveform feature extraction unit and is used to determine whether the candidate synchronization edge is a valid synchronization edge based on the local waveform features. The pseudo-synchronization point processing unit, connected to the synchronization validity determination unit, is used to output the candidate synchronization edge that is determined to be valid as a valid synchronization edge, and to remove the candidate synchronization edge that is determined to be invalid, or to generate a corrected synchronization position based on historical valid synchronization edges or fundamental frequency trends. A synchronization reference generation unit, connected to a pseudo-synchronization point processing unit, is used to generate a synchronization reference signal based on the effective synchronization edge or the corrected synchronization position. The excitation control interface unit is connected to the synchronization reference generation unit and is used to output the synchronization reference signal to the subsequent control links of the excitation power supply. The subsequent control links include at least one of the following: trigger control link, sampling window configuration link, and control calculation timing generation link.

[0007] Secondly, a method for acquiring and processing excitation power supply synchronization signals is proposed, including the following steps: S1, acquire the AC synchronization reference signal from the excitation power input side, and condition and sample the AC synchronization reference signal to form the original synchronization sampling sequence; S2, Identify candidate synchronization edges from the original synchronization sampling sequence; S3, establish a preceding and following time window centered on the time of the candidate synchronization edge, and extract local waveform features within the preceding and following time windows; S4, determine whether the candidate synchronization edge is a valid synchronization edge based on the local waveform characteristics; S5, remove candidate synchronization edges that are deemed invalid, or generate a corrected synchronization position based on historical valid synchronization edges or fundamental wave trends; S6 generates a synchronization reference signal based on the effective synchronization edge or the corrected synchronization position; S7 outputs the synchronization reference signal to the subsequent control stage of the excitation power supply; the subsequent control stage includes at least one of the following: trigger control stage, sampling window configuration stage, and control calculation timing generation stage.

[0008] Compared with existing technologies, this invention has the following advantages and beneficial effects: The AC synchronization reference signal from the excitation power input side is received by the synchronization signal input unit, and the signal conditioning unit converts this AC synchronization reference signal into a synchronization signal suitable for sampling. Then, the sampling conversion unit forms the original synchronization sampling sequence, enabling subsequent processing to obtain synchronization signal data with a sampling timing basis. Based on this, the candidate synchronization edge extraction unit does not directly use zero-crossing points, flip edges, or phase crossover points in the original synchronization sampling sequence as the final synchronization reference. Instead, it first identifies these as candidate synchronization edges, and the local waveform feature extraction unit establishes a time window centered on the time of the candidate synchronization edge. Within this time window, it extracts local waveform features that reflect the waveform morphology of the candidate synchronization edge's neighborhood. This allows the synchronization validity determination unit to judge whether the candidate synchronization edge is a valid synchronization edge based on the local waveform features, thereby avoiding the misinterpretation of instantaneous crossover points, glitch edges, or sudden changes in local slope as the true reference due to reliance solely on a single zero-crossing point or a single flip edge. The synchronization position is further defined as follows: the pseudo-synchronization point processing unit outputs the candidate synchronization edge that is determined to be valid as a valid synchronization edge, and removes the candidate synchronization edge that is determined to be invalid, or generates a corrected synchronization position based on the historical valid synchronization edge or the fundamental wave trend, so that the pseudo-synchronization point no longer directly enters the synchronization reference generation link. At the same time, under short-term distortion conditions, the continuity of synchronization reference generation can still be maintained by correcting the synchronization position. Subsequently, the synchronization reference generation unit generates a synchronization reference signal according to the valid synchronization edge or the corrected synchronization position, and outputs it to the trigger control link, the sampling window configuration link, or the control calculation timing generation link through the excitation control interface unit. This makes the synchronization reference based on the subsequent excitation control action closer to the true fundamental wave phase, reducing the risk of trigger angle deviation, sampling window misalignment, and control calculation timing jump caused by pseudo-synchronization points induced by commutation gaps, spikes, glitches, or local waveform distortion. This improves the reliability of the synchronization reference and the stability of the control timing in the excitation power supply synchronization signal acquisition and processing process under waveform distortion conditions. Attached Figure Description

[0009] The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and form part of this application, do not constitute a limitation thereof. In the drawings: Figure 1 This is a schematic diagram of the overall structure of the excitation power supply synchronization signal acquisition and processing system provided in Embodiment 1 of the present invention; Figure 2 This is a flowchart illustrating the excitation power supply synchronization signal acquisition and processing method provided in Embodiment 2 of the present invention; Figure 3 This is a schematic diagram of the establishment of time windows before and after candidate synchronization edges and the extraction of local waveform features provided in Embodiment 1 of the present invention; Figure 4A schematic diagram of the logic flow for determining synchronization validity provided in Embodiment 1 of the present invention; Figure 5 This is a timing diagram of pseudo-synchronization point elimination and synchronization reference correction under commutation gap condition provided in Embodiment 3 of the present invention; Figure 6 This is a schematic diagram of the electrical connection between the signal conditioning unit and the sampling conversion unit provided in Embodiment 1 of the present invention; Figure 7 This is a schematic diagram illustrating the data format of the synchronization reference signal and validity flag output by the synchronization reference generation unit provided in Embodiment 1 of the present invention. The figures include labels and corresponding component names: 1-Synchronization signal input unit; 11-A-phase synchronization input terminal; 12-B-phase synchronization input terminal; 13-C-phase synchronization input terminal; 2-Signal conditioning unit; 21-Electrical isolation subunit; 22-Amplitude conditioning subunit; 23-Limiting protection circuit; 24-Filtering circuit; 3-Sampling conversion unit; 4-Candidate synchronization edge extraction unit; 5-Local waveform feature extraction unit; 51-Forward time window; 52-Backward time window; 6-Synchronization validity determination unit; 7-Pseudo-synchronization point processing unit; 8-Synchronization reference generation unit; 9-Excitation control interface unit; 10-Operating status recording unit. Detailed Implementation

[0010] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. The illustrative embodiments and descriptions of this invention are for illustrative purposes only and are not intended to limit the invention. The embodiments described below are some, but not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0011] Example 1: In the existing technology, the acquisition and processing of excitation power supply synchronization signals relies on the single-point criterion of the comparator flip edge or the single-point zero-crossing point after filtering to directly generate the synchronization reference. However, there is a lack of secondary verification of whether the single point truly represents the fundamental phase. Therefore, under the conditions of harmonics, spikes, commutation gaps, or local waveform distortion in the AC voltage on the input side of the excitation power supply, the candidate zero-crossing point induced by the instantaneous crossover point, glitch edge, or local slope change is easily used as the true fundamental phase synchronization reference output. This leads to firing angle deviation, misalignment between the voltage closed-loop sampling window and the fundamental phase, and discontinuity or jumps in the synchronization reference within the short-time distortion interval.

[0012] To address the aforementioned issues, this embodiment provides a technical solution for acquiring and processing excitation power supply synchronization signals. The overall technical approach is as follows: Zero-crossing points, flip edges, or phase crossover points identified in the original synchronization sampling sequence are first marked as candidate synchronization edges. Then, a time window is established before and after the candidate synchronization edge time, and local waveform features are extracted within the time window. Synchronization validity is determined based on the local waveform features. Invalid candidate synchronization edges are eliminated, or a corrected synchronization position is generated based on historical valid synchronization edges or fundamental wave trends. Finally, a synchronization reference signal is generated based on the valid synchronization edge or corrected synchronization position, and an validity flag is added before outputting it to the subsequent control stages of the excitation power supply. Each processing stage forms a closed-loop data processing link in the order of "input-conditioning-sampling-candidate extraction-feature extraction-validity determination-pseudo-synchronization point processing-reference generation-reference output-status recording and feedback."

[0013] Based on the above overall technical approach, the following specifically provides an excitation power supply synchronization signal acquisition and processing system, including... Figure 1 The system includes a synchronization signal input unit 1, a signal conditioning unit 2, a sampling and conversion unit 3, a candidate synchronization edge extraction unit 4, a local waveform feature extraction unit 5, a synchronization validity determination unit 6, a pseudo-synchronization point processing unit 7, a synchronization reference generation unit 8, an excitation control interface unit 9, and an operation status recording unit 10. These units form a data processing link according to the aforementioned overall technical approach, and the operation status recording unit 10 saves and feeds back key data during the processing.

[0014] The following sections will explain the specific composition, connection relationships, collaborative relationships, and roles of each unit in the overall technical approach.

[0015] (a) Synchronization signal input unit 1 The synchronization signal input unit 1 is used to receive the AC synchronization reference signal from the excitation power supply input side. In this embodiment, the synchronization signal input unit 1 includes three synchronization input terminals corresponding to the three-phase AC voltage, namely the A-phase synchronization input terminal 11, the B-phase synchronization input terminal 12, and the C-phase synchronization input terminal 13. These three synchronization input terminals are electrically connected to the three-phase AC voltage sampling points on the excitation power supply input side.

[0016] The purpose of setting up the synchronization signal input unit 1 is to provide an input reference that corresponds to the phase of the AC voltage on the excitation power supply input side for the entire synchronization signal acquisition and processing system.

[0017] The working principle and operating logic of the synchronization signal input unit 1 are as follows: The synchronization signal input unit 1 introduces the phase information carried by the AC voltage on the excitation power supply input side into the processing link on the control side, which serves as the physical basis for subsequent candidate synchronization edge extraction. The synchronization reference signal output by the synchronization signal input unit 1 is transmitted to the signal conditioning unit 2, and after being processed by the signal conditioning unit 2 and the sampling conversion unit 3, the original synchronization sampling sequence is formed.

[0018] As one of the optional implementations of the synchronization signal input unit 1, the AC synchronization reference signal can be a phase voltage signal directly acquired from the three-phase AC voltage sampling point; as another optional implementation, the AC synchronization reference signal can be a phase reference signal derived from the line voltage; as yet another optional implementation, the AC synchronization reference signal can be a synchronization signal output from the secondary side of a dedicated synchronization transformer or voltage transformer. In a modified embodiment applicable to a single-phase excitation power supply, the synchronization signal input unit 1 includes only one AC synchronization input terminal, electrically connected to the AC voltage sampling point on the single-phase input side of the excitation power supply, while the composition and connection relationships of the remaining units remain unchanged.

[0019] With the above configuration, the synchronization signal input unit 1 can introduce the phase reference information carried by the AC voltage on the high-voltage side into the processing link on the control side, providing a stable input reference corresponding to the phase of the AC voltage on the excitation power input side for subsequent units, and forming an input-conditioning connection with the downstream signal conditioning unit 2.

[0020] (ii) Signal conditioning unit 2 like Figure 1 and Figure 6 As shown, the signal conditioning unit 2 is connected to the synchronization signal input unit 1 and is used to convert the AC synchronization reference signal into a synchronization signal suitable for sampling. In this embodiment, the signal conditioning unit 2 includes an electrical isolation subunit 21 and an amplitude conditioning subunit 22; the electrical isolation subunit 21 is used to form electrical isolation between the input side of the synchronization signal input unit 1 and the sampling conversion unit 3; the amplitude conditioning subunit 22 is connected to the electrical isolation subunit 21 and is used to perform voltage reduction, amplitude limiting and filtering processing on the electrically isolated synchronization signal, and output the processed synchronization signal to the sampling conversion unit 3.

[0021] The purpose of setting up the signal conditioning unit 2 is to convert the AC synchronization reference signal into a low-voltage, limited, low-noise synchronization signal that can be acquired by the sampling conversion unit 3 while preserving the phase information of the AC synchronization reference signal, and to form a reliable electrical isolation between the high-voltage side and the control side, so as to reduce the impact of input-side spikes and common-mode interference on the control-side processor.

[0022] In terms of specific implementation, the electrical isolation subunit 21 can be implemented using an isolation transformer, a linear optocoupler, or a Hall voltage sensor. The amplitude conditioning subunit 22 may include one or more of the following: a voltage divider resistor network, a limiting protection circuit 23, a surge suppression device, a differential amplifier circuit, and a filter circuit 24.

[0023] It should be noted that the voltage divider network can be implemented using a resistor voltage divider structure composed of multiple precision resistors connected in series according to a preset voltage division ratio. The preset voltage division ratio is determined based on the secondary side voltage of the electrical isolation subunit 21 and the allowable input voltage range of the sampling conversion unit 3. The limiting protection circuit 23 can be implemented using one or more of the following: transient voltage suppression diode, Zener diode clamping circuit, bidirectional Zener diode ground clamping circuit, or clamping circuit formed by an operational amplifier and a reference voltage. It is used to clamp transient voltages exceeding a preset limiting threshold to within the safe input range allowed by the sampling conversion unit 3. The surge suppression device can be implemented using one or more of the following: transient voltage suppression diode, varistor, or gas discharge tube. It is used to absorb surge energy induced by lightning strikes, switching operations, or transient events in the power grid. The differential amplifier circuit can be implemented using one of the following: an instrumentation amplifier, a three-op-amp differential amplifier structure composed of general-purpose operational amplifiers, a two-op-amp differential amplifier structure composed of general-purpose operational amplifiers, or an integrated differential receiver device. It is used to perform amplitude matching of the electrically isolated synchronization signal while suppressing common-mode interference. The filter circuit 24 can be implemented using one of the following methods: a passive RC low-pass filter circuit, a passive RC band-pass filter circuit, an active low-pass filter circuit composed of operational amplifiers, a Sallen-Key active filter circuit, or a Butterworth active filter circuit. The cutoff frequency of the filter circuit 24 should satisfy the requirement of preserving the local waveform morphology of the candidate synchronization edge neighborhood while avoiding introducing phase delays beyond the allowable range to the edge slope and symmetry characteristics. The specific device models, circuit topologies, and device parameters of the voltage divider resistor network, the limiting protection circuit 23, the surge suppression device, the differential amplifier circuit, and the filter circuit 24 can be determined by those skilled in the art based on the input voltage range, sampling frequency, anti-interference requirements, and secondary voltage of the electrical isolation subunit 21, referring to conventional electrical signal conditioning design methods in the field.

[0024] In one embodiment, the amplitude conditioning subunit 22 attenuates the voltage on the secondary side of the isolation transformer to a voltage range suitable for sampling (exemplarily, the voltage range is 0V to +3.3V or -10V to +10V) through a voltage divider resistor network, and limits instantaneous spikes exceeding the voltage range through a limiting protection circuit 23, and then suppresses high-frequency noise and some waveform distortion components through a filter circuit 24 (which may be a low-pass filter circuit or a band-pass filter circuit).

[0025] The signal conditioning unit 2 takes the AC synchronization reference signal output from the synchronization signal input unit 1 as its input, processes the AC synchronization reference signal, and outputs a synchronization signal suitable for sampling. The signal conditioning unit 2 and the downstream sampling conversion unit 3 form an analog signal transmission relationship. In abnormal operating conditions, such as when a transient voltage spike occurs on the power supply side, the limiting protection circuit 23 can clamp the transient voltage exceeding the limiting threshold to a safe range, thereby protecting the downstream sampling conversion unit 3 from damage caused by the transient voltage spike.

[0026] By setting up signal conditioning unit 2, this system completes signal conversion and electrical isolation from the power supply side to the control side while maintaining phase information, provides a synchronization signal suitable for direct sampling for sampling conversion unit 3, and forms necessary hardware-level protection for downstream processors.

[0027] (III) Sampling Conversion Unit 3 The sampling conversion unit 3 is connected to the signal conditioning unit 2 and is used to sample the synchronization signal that is suitable for sampling to form the original synchronization sampling sequence.

[0028] The purpose of setting up sampling conversion unit 3 is to convert the conditioned analog synchronization signal into a digital sampling sequence with sampling time information. This digital sampling sequence serves as the data basis for subsequent candidate synchronization edge extraction and local waveform feature extraction.

[0029] In terms of specific implementation, the sampling conversion unit 3 can be implemented using one of the following: an analog-to-digital converter (ADC), a microcontroller-built-in ADC, a timer input capture channel, an internal sampling interface of a field-programmable logic device (FPGA), or a dedicated edge capture device. In one embodiment, the sampling conversion unit 3 uses an ADC with multi-channel synchronous sampling capability to continuously sample the three conditioned synchronization signals A, B, and C. The sampling frequency of the ADC needs to satisfy the requirement of having enough sampling points within one fundamental frequency period (typically 20ms or 16.67ms corresponding to 50Hz or 60Hz) to retain the local waveform morphology of the candidate synchronization edge neighborhood. The specific number of sampling points can be determined based on the fundamental frequency and the expected shortest duration of the distortion event. In another embodiment, while using an ADC for continuous sampling, the sampling conversion unit 3 is also equipped with a digital input capture interface. This digital input capture interface is used to record the comparator flip-edge timestamps associated with each synchronization signal, so that the candidate synchronization edge extraction unit 4 can include the comparator flip points within the candidate synchronization edge identification range.

[0030] It should be further noted that: as an exemplary implementation for determining the sampling frequency, the sampling frequency of the sampling conversion unit 3 is... The number of sampling points within the fundamental frequency period can be determined by combining the following two constraints: Constraint 1 is the number of sampling points within the fundamental frequency period – based on the fundamental frequency. Corresponding fundamental period Based on this, and according to the number of sampling points required within each fundamental frequency period Determine the first constraint sampling frequency ;in, The fundamental frequency of the AC voltage on the input side of the excitation power supply (exemplarily, or ), For the fundamental frequency period, This refers to the number of sampling points required within each fundamental frequency period, determined based on the application scenario's requirements for trigger timing accuracy. The first constraint sampling frequency is obtained from constraint one; constraint two is the distortion event resolution constraint—based on the shortest expected duration of distortion events in the application scenario. Based on this, and according to the minimum number of sampling points required for neighborhood morphology recognition within the distortion event interval. Determine the second constraint sampling frequency ;in, It is the shortest of the commutation gap duration, glitch duration, and instantaneous spike duration. This is the minimum number of sampling points determined based on the accuracy required for neighborhood morphology recognition within the distortion event interval. The sampling frequency for the second constraint is obtained from constraint condition two. The sampling frequency for the first constraint... With the second constraint sampling frequency The larger of the two values ​​is used as the final sampling frequency for sampling conversion unit 3. ,Right now For example: for the fundamental frequency Application scenarios, fundamental frequency period The number of sampling points required within each fundamental frequency period For example, when the value is 400, the first constraint sampling frequency When the shortest duration of the expected distortion event is... For example, take as (The duration of commutation during the high-power load commutation process on the same busbar is approximately...) (corresponding to the commutation gap condition), and the number of sampling points required within the distortion event interval. For example, when the value is 5, the second constraint sampling frequency The sampling frequency adopted by sampling conversion unit 3 is the larger of the two. Take as For the fundamental frequency Application scenarios, fundamental frequency period Approximately Those skilled in the art can determine the sampling frequency using the same steps described above. It should be understood that the number of sampling points required within each fundamental frequency period mentioned above... Number of sampling points required within the distortion event interval The shortest duration of aberration events and the final sampling frequency The specific values ​​are all exemplary parameters. Those skilled in the art can adjust them according to the application scenario's requirements for trigger timing accuracy, the hardware performance of the sampling conversion unit 3, the processor's real-time processing capability, and the specific distortion conditions.

[0031] The input to the sampling conversion unit 3 is the synchronization signal suitable for sampling output by the signal conditioning unit 2. The processing object is the sampling process of this analog synchronization signal, and the output object is the original synchronization sampling sequence with sampling time information. This original synchronization sampling sequence consists of sampled values ​​and corresponding sampling time information, and is transmitted to the candidate synchronization edge extraction unit 4.

[0032] It should be noted that in abnormal operating conditions, such as when the sampling conversion unit 3 experiences a short-term communication interruption or the sampled data becomes invalid, the watchdog mechanism or data integrity verification mechanism can serve as an auxiliary protection measure for the sampling conversion unit 3.

[0033] Through the sampling conversion unit 3, this system completes the conversion from analog synchronization signal to original synchronization sampling sequence, providing the downstream candidate synchronization edge extraction unit 4 with digital sampling data with sampling time information as the basis.

[0034] (iv) Candidate Synchronization Edge Extraction Unit 4 The candidate synchronization edge extraction unit 4 is connected to the sampling conversion unit 3 and is used to identify candidate synchronization edges (A1, A2) from the original synchronization sampling sequence.

[0035] The purpose of setting up the candidate synchronization edge extraction unit 4 is to uniformly identify and mark the zero-crossing points, flip edges, or phase crossover points that may correspond to the synchronization positions in the original synchronization sampling sequence as candidate synchronization edges. These candidate synchronization edges serve as the objects to be judged when the subsequent local waveform feature extraction unit 5 performs local waveform feature extraction and the synchronization validity determination unit 6 performs synchronization validity determination.

[0036] The working principle and operating logic of the candidate synchronization edge extraction unit 4 are as follows: The candidate synchronization edge extraction unit 4 first outputs the single-point detection results identified in the original synchronization sampling sequence as candidate synchronization edges. Then, the downstream local waveform feature extraction unit 5 and synchronization validity determination unit 6 verify whether the candidate synchronization edge truly represents the fundamental synchronization position based on the local waveform features of the candidate synchronization edge neighborhood. This role setting differs from the existing technology's processing method of directly using the comparator flip point or the single-point zero-crossing point after filtering as the synchronization pulse output, avoiding the direct use of pseudo-zero crossing points or instantaneous crossover points induced by waveform distortion as the synchronization reference output.

[0037] In terms of specific implementation, the input object of the candidate synchronization edge extraction unit 4 is the original synchronization sampling sequence output by the sampling conversion unit 3, the processing object is the relationship between adjacent sampling values ​​in the original synchronization sampling sequence, and the output object is candidate synchronization edge data with candidate synchronization edge times and corresponding sampling segments. The specific implementation of identifying candidate synchronization edges can adopt any one or more of the following combinations: (1) detecting sign changes, that is, identifying the position where the signs of two adjacent sampling values ​​change in the original synchronization sampling sequence; (2) monitoring level over-limit, that is, identifying the event position where the original synchronization sampling sequence crosses the judgment band near the preset zero level; (3) capturing comparator flip edge, that is, determining the candidate synchronization edge position according to the comparator flip edge timestamp recorded by the digital input capture interface configured in the sampling conversion unit 3; (4) identifying phase crossover, that is, identifying the phase crossover position based on the comparison between the known fundamental phase estimate and the original synchronization sampling sequence. Edge detection algorithms (including the above detection of sign changes, detection of level over-limit, capture of comparator flip edge, and identification of phase crossover) can all be used as one of the specific implementation methods of the candidate synchronization edge extraction unit 4.

[0038] When performing candidate synchronization edge identification, the candidate synchronization edge extraction unit 4 needs to output each identified candidate synchronization edge along with its corresponding sampling segment to the local waveform feature extraction unit 5 so that subsequent units can establish a local analysis window around the candidate synchronization edge. In abnormal operating conditions, such as when no candidate synchronization edge is identified within a certain cycle, the candidate synchronization edge extraction unit 4 can output a no-candidate event to the running status recording unit 10, and the subsequent pseudo-synchronization point processing unit 7 will process it as an abnormal state.

[0039] By setting up candidate synchronization edge extraction unit 4, this system explicitly adds a candidate marking step between the original synchronization sampling sequence and the synchronization benchmark generation, giving the entire processing link a hierarchical structure of "to be judged - verification - confirmation", providing an explicit object to be judged for subsequent synchronization validity determination.

[0040] (V) Local Waveform Feature Extraction Unit 5 like Figure 1 and Figure 3 As shown, the local waveform feature extraction unit 5 is connected to the candidate synchronization edge extraction unit 4, and is used to establish a forward time window 51 and a backward time window 52 centered on the time of the candidate synchronization edge, and extract local waveform features within the forward time window 51 and the backward time window 52.

[0041] The purpose of setting up the local waveform feature extraction unit 5 is to supplement the neighborhood morphological information of the single-point detection result, so that the subsequent synchronization validity determination no longer depends on the single-point criterion, and improves the ability to identify false zero crossings under local distortion conditions.

[0042] The working principle and operating logic of the local waveform feature extraction unit 5 are as follows: the waveform shape, slope, and symmetry of the true fundamental synchronous edge in the neighborhood have a verifiable continuous relationship, and the neighborhood shape cannot be captured based on single-point information alone. In addition, based on common knowledge in this field, the width of the preceding and following time windows needs to be balanced between preserving neighborhood shape information and avoiding crossing multiple phase intervals.

[0043] In a specific implementation, the local waveform feature extraction unit 5 takes the candidate synchronization edge moment as the center, selects a first time width forward to form a forward time window 51, and selects a second time width backward to form a backward time window 52. Both the first and second time widths are greater than the expected duration of a single distortion event and less than half a fundamental frequency period. In a preferred embodiment, the first and second time widths are symmetrically set. In another embodiment, the first and second time widths can be adjusted to different values ​​according to the main distortion mode of the application scenario.

[0044] It should be further explained that: the expected duration of a single distortion event refers to the shortest time elapsed from the onset of a single waveform distortion event (including at least one of commutation gaps, glitches, transient spikes, and local slope abrupt changes) in the application scenario, until it returns to the normal fundamental waveform. This is hereinafter referred to as... Set the expected duration of a single distortion event. This is designed to ensure that the first and second time widths are sufficient to fully cover a single distortion event, enabling the local waveform feature extraction unit 5 to extract local waveform features that fully reflect the distortion pattern within the preceding and following time windows. The expected duration of the single distortion event is... The duration can be determined using any one or more of the following methods: The first method is a statistical determination based on field waveform recording data—in the application site of the excitation power supply or similar application scenarios, the input AC voltage waveform under multiple representative operating conditions is collected using a waveform recording device. Commutation gaps, glitches, instantaneous spikes, and local slope abrupt events are identified. The duration of each distortion event from the initial deviation from the fundamental waveform to the recovery to the fundamental waveform is measured. The shortest value among the durations of multiple distortion events is taken as the expected duration of a single distortion event. The second method is a theoretical estimation method based on the operating parameters of equipment on the same bus. This involves estimating the duration of the commutation gap based on the commutation parameters (including commutation inductance, commutation current, and AC system short-circuit impedance) of the thyristor rectifier or other power electronic equipment connected to the same bus as the excitation power supply, and using this commutation gap duration as the expected duration of a single distortion event. The reference value is as follows. For example, during the commutation process of a high-power load on the same bus, the duration is approximately... Application scenarios for commutation gaps, and the expected duration of a single distortion event. It can be determined according to the first or second method mentioned above. Accordingly, both the first time width and the second time width should be greater than [the specified value]. And less than half a fundamental frequency period (fundamental frequency is Half a fundamental period is The fundamental frequency is Half a fundamental frequency period is approximately It should be understood that the expected duration of a single distortion event is... The specific values ​​of the first time width and the second time width are exemplary parameters. Those skilled in the art can adjust them according to the main distortion mode of the application scenario, the operating parameters of the excitation power supply and the bus equipment, and the requirements for identification reliability.

[0045] It should also be noted that, regarding the statement that "the first time width and the second time width can be adjusted to different values ​​according to the main distortion mode of the application scenario," the "application scenario" refers to the specific engineering environment in which the excitation power supply synchronous signal acquisition and processing system described in this embodiment is applied. This includes the voltage level of the AC system connected to the excitation power supply, the type and operating conditions of the power electronic equipment connected to the bus of the excitation power supply, the operating mode of the substation or power plant where the excitation power supply is located, and the specific excitation system type used by the excitation power supply (including one of the static excitation system, self-excited excitation system, and separately excited excitation system). Furthermore, the "main distortion mode" refers to the waveform distortion type mainly presented by the AC voltage on the input side of the excitation power supply under the application scenario, including at least one of the following: commutation gap distortion mode induced by commutation of high-power loads on the same bus, harmonic superposition distortion mode injected by frequency converters or thyristor rectifiers on the same bus, spike distortion mode induced by instantaneous spike interference, and mixed distortion mode of multiple superimposed distortions. As an implementation method for adjusting the first and second time widths according to the main distortion mode of the application scenario, the relative values ​​of the first and second time widths can be determined according to the following principles: In the forward time window 51 and the backward time window 52, ​​the width of the time window facing the side where the distortion event occurs is increased, and the width of the time window facing away from the side where the distortion event occurs is decreased, so that the local waveform feature extraction unit 5 has a sufficient number of sampling points on the side where the distortion event occurs for extracting local waveform features. Those skilled in the art can determine the side where the distortion event occurs relative to the candidate synchronization edge based on the field waveform recording data of the excitation power supply or the operating parameters of the same bus equipment. Furthermore, regarding the commutation gap distortion mode, since the commutation gap of a high-power load on the same bus usually appears near the natural commutation point of the AC voltage on the excitation power input side, and the commutation gap has an asymmetrical distribution before and after the natural commutation point (i.e., the duration of the starting side and the recovery side of the commutation gap are not equal), in one embodiment, the first time width is greater than the second time width, thereby retaining a sufficient number of sampling points in the forward time window 51 before the candidate synchronization edge to identify the starting side morphology of the commutation gap; those skilled in the art can determine the specific difference between the first time width and the second time width based on the duration of the starting side of the commutation gap in the field waveform recording data. Regarding the harmonic superposition distortion mode, since the influence of high-frequency harmonics superimposed on the fundamental AC voltage on the excitation power input side usually presents an approximately symmetrical distribution on the waveforms before and after the candidate synchronization edge, in one embodiment, the first time width and the second time width are the same value (i.e., symmetrically set in the preferred embodiment), so that the local waveform feature extraction unit 5 has a symmetrical basis for comparing the local waveform features extracted by the local waveform feature extraction unit 5 before and after the candidate synchronization edge.For peak distortion mode and mixed distortion mode, those skilled in the art can refer to the value selection principles of the above-mentioned commutation gap distortion mode and harmonic superposition distortion mode, and verify the rationality of the first time width and second time width values ​​through on-site debugging and playback of recorded data. It should be understood that the specific values ​​of the first time width and second time width are exemplary parameters, and those skilled in the art can adjust them according to the main distortion mode of the application scenario, the operating parameters of the excitation power supply and the bus equipment, and the on-site debugging results.

[0046] Within the forward time window 51 and the backward time window 52, ​​the local waveform feature extraction unit 5 extracts at least one of the following local waveform features: 1. The time interval between the current candidate synchronization edge and the previous valid synchronization edge. As a time consistency criterion, this time interval is close to half a cycle or a whole cycle of the fundamental frequency under normal operating conditions, and the corresponding allowable deviation range is determined by the application scenario's requirements for trigger timing accuracy.

[0047] Specifically, as one implementation method for time interval extraction, the local waveform feature extraction unit 5 can extract the time interval according to the following steps: First, the local waveform feature extraction unit 5 reads the time of the last time interval determined to be a valid synchronization edge from the running status recording unit 10. ,time When the synchronization validity determination unit 6 determines the corresponding candidate synchronization edge as a valid synchronization edge in the previous processing cycle, the timestamp saved by the running status recording unit 10 is used. The time base of the timestamp is the same as that of the sampling conversion unit 3. In the second step, the local waveform feature extraction unit 5 determines the moment of the current candidate synchronization edge between the forward time window 51 and the backward time window 52. The timing of the current candidate synchronization edge Determined by any of the following methods: The first method is to directly use the sampling time of the sampling point corresponding to the candidate synchronization edge output by candidate synchronization edge extraction unit 4 as... The second method involves linearly interpolating two adjacent sampled values ​​with opposite signs within the neighborhood of the candidate synchronization edge, and using the time corresponding to the position where the interpolation result crosses a preset zero level as the reference. To improve the timing resolution of candidate synchronization edges; the third method is to use the comparator flip edge timestamp recorded by the digital input capture interface configured in sampling conversion unit 3, which is associated with the candidate synchronization edge, as... The third step involves the local waveform feature extraction unit 5 extracting functions at time intervals. The time interval between the current candidate synchronization edge and the previous one determined to be a valid synchronization edge is calculated. ,in The result of extracting time interval features; at time... The status record unit 10 has not yet been established (i.e., the excitation power supply synchronization signal acquisition and processing system is in the initial startup stage) or at what time When the validity period of the historical data stored in the running status recording unit 10 has expired, the local waveform feature extraction unit 5 can output an invalid time interval feature flag, and the synchronization validity determination unit 6 will continue execution according to the initial boundary processing method provided in the subsequent embodiment 7. It should be understood that the time interval extraction function and the above , The acquisition methods are all exemplary implementations. Those skilled in the art can make adjustments based on the clock synchronization method of the sampling conversion unit 3, the storage structure of the running status recording unit 10, and the requirements for time interval resolution.

[0048] Furthermore, the permissible deviation range of the time interval can be determined by the application scenario's requirements for trigger timing accuracy as follows: First, based on the application scenario's requirements for the trigger timing accuracy of the subsequent trigger control stage of the excitation power supply, determine the maximum permissible deviation of the trigger timing. Maximum allowable deviation of trigger timing This refers to the maximum permissible time deviation between the position of the trigger pulse generated by the subsequent trigger control circuit and the ideal fundamental frequency synchronization position of the AC voltage on the input side of the excitation power supply. Those skilled in the art can determine the maximum permissible trigger timing deviation based on the application scenario of the excitation power supply and the tolerance for trigger angle deviation and output voltage fluctuation. Secondly, the proportion of timing error transmitted in subsequent trigger control stages based on the determination of the time interval. This will trigger the maximum permissible timing deviation. Converted to allowable deviation of time interval ,Right now Among them, the proportion of timing errors This reflects the proportion of timing deviation in the time interval determination stage in the subsequent trigger control stage, and is a constant greater than 0 and not greater than 1. Those skilled in the art can determine the timing error proportion based on the timing error budget occupied by other timing stages in the excitation power supply synchronization signal acquisition and processing system (including the sampling timing accuracy of the sampling conversion unit 3, the synchronization reference generation timing accuracy of the synchronization reference generation unit 8, and the output timing accuracy of the excitation control interface unit 9). For example, for a fundamental frequency of... Application scenarios where the fundamental half-cycle is The maximum permissible deviation of the trigger timing required by the application scenario for the trigger timing accuracy of subsequent trigger control links. For example, take as And the timing error ratio For example, when the value is set to 0.5 (i.e., 50% of the timing error budget is allocated to the time interval determination stage), the allowable deviation of the time interval is... Accordingly, the allowable deviation range of the time interval can be determined according to... (Right now Determine (corresponding to the fundamental half-cycle criterion) or according to (Right now The corresponding fundamental frequency integer period criterion is determined. It should be understood that the maximum permissible deviation of the trigger timing is... The timing error ratio And the final allowable deviation of the time interval. The specific values ​​are all exemplary parameters. Those skilled in the art can adjust them according to the specific requirements of the trigger timing accuracy, the actual timing error budget of other timing links in the excitation power supply synchronous signal acquisition and processing system, and the specific value of the fundamental frequency, based on the application scenario.

[0049] 2. Slope of the sampled values ​​in the neighborhood of the candidate synchronization edge. As a criterion for waveform continuity, this slope of the sampled values ​​is used to reflect the rate of change of the original synchronization sampling sequence near the candidate synchronization edge position. The slope near the zero crossing of the normal fundamental wave has a theoretical reference value.

[0050] Specifically, as one implementation method for extracting the slope of the sampled values, the local waveform feature extraction unit 5 can extract the slope of the sampled values ​​in any one or more combinations of the following methods: The first extraction method is the adjacent sampling point difference method—the local waveform feature extraction unit 5 extracts the slope of the sampled values ​​according to the adjacent sampling point difference function within the forward time window 51 and the backward time window 52. Calculate the slope value between two adjacent sampling points ,in and These are the sampled values ​​of two adjacent sampling points in the original synchronous sampling sequence. The sampling period of sampling conversion unit 3; the slope values ​​of all adjacent sampling points within the preceding and following time windows. The average or weighted average of the sampled values ​​in the neighborhood of the candidate synchronization edge is used as the slope extraction result. The second extraction method is the cross-candidate synchronization edge differential method—the local waveform feature extraction unit 5 takes the candidate synchronization edge time as the center and takes the sampled value at the end of the forward time window 51. Sampled values ​​at the beginning of the backward time window 52 According to the cross-candidate synchronization edge difference function Calculate the slope extraction results of the sampled values ​​in the neighborhood of the candidate synchronization edge. ,in for The corresponding sampling time, for The corresponding sampling time. The third extraction method is the least squares fitting method—the local waveform feature extraction unit 5 extracts all sampling points within the preceding and following time windows. As the fitting dataset, a straight line passing through the neighborhood of the candidate synchronization edge is obtained by fitting using the least squares fitting method. , make the straight line Slope extraction results of sampled values ​​in the neighborhood of candidate synchronization edges .

[0051] Furthermore, the AC voltage on the input side of the excitation power supply can be considered as a near-ideal sinusoidal waveform under normal operating conditions without waveform distortion, and can be expressed as follows: ,in The fundamental peak voltage, The fundamental frequency, As the initial phase; reversing the above equation with respect to time Differentiate and take the position of the fundamental frequency at its zero crossing (i.e. Item is 0, Item for By taking the derivative of the position (of the fundamental wave), a theoretical slope reference value near the zero crossing of the fundamental wave can be obtained. The theoretical slope reference value That is, the synchronization validity determination unit 6 judges the sampling value slope extraction result. Whether it falls within the allowable slope range is a benchmark.

[0052] For example: For the fundamental frequency , fundamental peak voltage For example, take as Application scenarios, theoretical slope reference value near the zero crossing of the fundamental wave Synchronization validity determination unit 6 can determine the theoretical slope reference value. Based on the preset slope allowable deviation ratio Determine the allowable slope range (for example, preset the allowable slope deviation ratio). If we take a constant that is greater than 0 and not greater than 1, the corresponding allowable range of slope is... When the slope of the sampled value is extracted... When the absolute value falls within the allowable slope range, the synchronization effectiveness determination unit 6 can determine that the slope characteristic meets the allowable conditions; otherwise, it is determined that it does not meet the conditions. (Fundamental peak voltage) Preset slope allowable deviation ratio The specific values ​​for the final allowable slope range are exemplary parameters. Those skilled in the art can determine the appropriate values ​​based on the actual amplitude of the AC voltage on the excitation power supply input side and the fundamental frequency. The actual values ​​and application scenarios are adjusted to meet the sensitivity requirements for slope feature determination.

[0053] 3. Amplitude continuity of sampled values ​​before and after the candidate synchronization edge. As a criterion for amplitude continuity, this amplitude continuity uses the amplitude difference between multiple adjacent sampled values ​​before and after the candidate synchronization edge as an indicator to identify amplitude jumps induced by glitches, spikes, or commutation gaps.

[0054] Specifically, under normal operating conditions without waveform distortion, the AC voltage on the excitation power supply input side should approximate an ideal sinusoidal waveform. The change in sampled values ​​between adjacent sampling points before and after the candidate synchronization edge of the original synchronization sampling sequence should conform to the trend of an approximately linear change of the sinusoidal waveform near the zero-crossing position. That is, the difference in sampled values ​​between adjacent sampling points should fall within the theoretical slope reference value near the zero-crossing of the fundamental wave, determined by the sampling period and the fundamental wave. Within a jointly determined continuous variation range; when a sudden jump in amplitude occurs in the neighborhood of the candidate synchronization edge due to glitches, spikes, or commutation gaps, the difference in sampling values ​​between adjacent sampling points will significantly exceed the continuous variation range. The local waveform feature extraction unit 5 uses the difference in sampling values ​​between multiple adjacent sampling points as an amplitude continuity index, that is, whether the difference falls within the continuous variation range to reflect the degree of continuous variation of the sampling values ​​in the neighborhood of the candidate synchronization edge.

[0055] As one implementation method for extracting amplitude continuity, the local waveform feature extraction unit 5 can extract the amplitude continuity in any one or more combinations of the following methods: The first extraction method is the maximum adjacent difference method—the local waveform feature extraction unit 5 extracts the amplitude continuity according to the difference function of adjacent sampling points within the forward time window 51 and the backward time window 52. Calculate the difference in sampled values ​​between two adjacent sampling points ,in and These represent the sampled values ​​of two adjacent sampling points in the original synchronous sampling sequence; the differences between the sampled values ​​of all adjacent sampling points within the preceding and following time windows are also considered. The maximum value among the absolute values ​​is taken as the result of amplitude continuity extraction, that is... The second extraction method is the difference sequence variance method—the local waveform feature extraction unit 5 extracts features based on the difference function of adjacent sampling points. Obtain the difference sequence within the preceding and following time windows. and according to the variance function of the difference sequence Calculate the difference sequence The variance is used as the result of amplitude continuity extraction, where This represents the variance calculation function, which belongs to the conventional numerical calculation methods in this field. The third extraction method is the cross-candidate synchronization edge amplitude difference method—the local waveform feature extraction unit 5 takes the sampled value at the end of the forward time window 51. Sampled values ​​at the beginning of the backward time window 52 According to the amplitude drop function across candidate synchronization edges The difference between the amplitude drop across candidate synchronization edges and the theoretical continuous variation is calculated as the amplitude continuity extraction result, whereby... and They are respectively and The corresponding sampling time, It is used to reflect the degree of deviation of the amplitude difference across candidate synchronization edges from the theoretical continuous change.

[0056] For example, for the fundamental frequency , fundamental peak voltage For example, take as The sampling frequency of sampling conversion unit 3 is exemplarily set to . Application scenarios, theoretical slope reference value near the zero crossing of the fundamental wave Sampling period Under normal operating conditions, the theoretical variation in the sampled value between two adjacent sampling points near the zero-crossing of the fundamental frequency is approximately... Those skilled in the art can add a preset amplitude continuity tolerance ratio to the theoretical sample value change. Determine the allowable threshold for amplitude continuity (for example, preset the allowable deviation ratio for amplitude continuity). The constant value is taken as greater than 1, and the corresponding allowable threshold for amplitude continuity is... When the amplitude continuity extraction result If the amplitude continuity threshold is not exceeded, the synchronization validity determination unit 6 can determine that the amplitude continuity characteristic meets the allowable condition; otherwise, it is determined that it does not meet the condition. (Fundamental peak voltage) Sampling frequency, preset amplitude continuity allowable deviation ratio The specific values ​​of the final amplitude continuity allowable threshold are all exemplary parameters. Those skilled in the art can adjust them according to the actual amplitude of the AC voltage on the excitation power supply input side, the actual sampling frequency of the sampling conversion unit 3, and the sensitivity requirements for amplitude continuity determination in the application scenario.

[0057] 4. Symmetry of waveforms before and after the candidate synchronization edge. As a local morphological criterion, this symmetry is indicated by the degree of symmetry of the waveforms within the window before and after the candidate synchronization edge relative to the position of the candidate edge. The waveforms near the zero crossing of the normal fundamental wave usually have good symmetry in a small neighborhood.

[0058] Specifically, the AC voltage on the input side of the excitation power supply approximates an ideal sinusoidal waveform under normal operating conditions without waveform distortion. Within a small neighborhood near the zero-crossing position of the fundamental wave, the sinusoidal waveform exhibits odd symmetry relative to the zero-crossing position; that is, the sampled values ​​at equal time intervals before and after the zero-crossing position are approximately equal in magnitude but opposite in sign. When local distortion induced by commutation gaps, glitches, or sudden changes in local slope occurs in the neighborhood of the candidate synchronization edge, the symmetry is disrupted, and the sampled value sequence within the forward time window 51 and the sampled value sequence within the backward time window 52 will deviate significantly in mirror image relationship. The degree of deviation of the waveform sequences within the forward and backward time windows in mirror image relationship by the local waveform feature extraction unit 5 reflects the degree of symmetry of the waveforms before and after the candidate synchronization edge.

[0059] As one implementation method for extracting symmetry, the local waveform feature extraction unit 5 can extract the symmetry in any one or more combinations of the following ways: The first extraction method is a mirror summation difference method—the local waveform feature extraction unit 5 selects multiple sample values ​​in the forward time window 51 in order from closest to furthest from the candidate synchronization edge time, denoted as... ( ,in (The number of sampling points participating in the symmetry calculation); within the backward time window of 52, the same number of sampled values ​​are selected in order from closest to furthest from the candidate synchronization edge time, denoted as... ; Difference function by mirror image The average of the absolute values ​​of the sums of the sampled values ​​at corresponding positions within the preceding and following time windows is used as the symmetry extraction result. When the waveform exhibits ideal odd symmetry characteristics within the preceding and following time windows, and They are approximately equal in size but opposite in sign, and their sum is approximately zero. The value is close to zero; when the symmetry property is broken, The values ​​deviate significantly from zero. The second extraction method is the mirror correlation coefficient method—the local waveform feature extraction unit 5 extracts the sampled value sequence within the forward time window 51. ( The sequence is obtained by reversing the sign. , convert the sequence The sequence of sampled values ​​at corresponding positions within the backward time window of 52 ( According to the correlation coefficient function Calculate the correlation coefficient between the two as the result of symmetry extraction. , This represents the correlation coefficient calculation function, which belongs to the conventional numerical calculation method in this field; when the waveform exhibits ideal odd symmetry characteristics within the preceding and following time windows, The value is close to 1; when the symmetry property is broken, The value deviates significantly from 1. The third extraction method is the mirror maximum deviation method—the local waveform feature extraction unit 5 selects the sampling value sequence in the same way within the forward time window 51 and the backward time window 52. and According to the maximum deviation function of the mirror image The maximum absolute value of the sum of sampled values ​​at corresponding positions within the preceding and following time windows is used as the symmetry extraction result. When the waveform exhibits ideal odd symmetry characteristics within the preceding and following time windows, The value is close to zero; when the symmetry property is broken, The value deviates significantly from zero.

[0060] For example, regarding the first and third extraction methods, those skilled in the art can superimpose a preset symmetry allowable on the basis of the theoretical odd symmetry characteristics near the zero crossing of the fundamental wave. To determine the permissible range of symmetry (for example, by presetting a permissible symmetry threshold). (Take a constant greater than zero) when the symmetry extraction result Not exceeding the preset symmetry allowable threshold At that time, the synchronization validity determination unit 6 can determine that the symmetry feature meets the allowable conditions; otherwise, it is determined that it does not meet the conditions. For the second extraction method, those skilled in the art can set a preset lower limit for the symmetry correlation coefficient. (For example, a lower limit for the symmetry correlation coefficient is preset) (Take a constant greater than 0 and not greater than 1), when the symmetry extraction result Not lower than the preset lower limit of the symmetry correlation coefficient At that time, the synchronization validity determination unit 6 can determine that the symmetry feature meets the allowable conditions; otherwise, it is determined that it does not meet the conditions. The number of sampling point logs participating in the symmetry calculation. Preset symmetry allowable threshold and the lower limit of the preset symmetry correlation coefficient The specific values ​​are all exemplary parameters, and those skilled in the art can adjust them according to the width of the preceding and following time windows, the sampling frequency of the sampling conversion unit 3, and the requirements of the application scenario for the sensitivity of symmetry determination.

[0061] 5. The deviation between the candidate synchronization edge position and the fundamental wave trend prediction position calculated based on historical valid synchronization edges. As a fundamental wave trend criterion, the fundamental wave trend prediction position is obtained by extrapolation from multiple historical valid synchronization edges stored in the operation status recording unit 10.

[0062] Specifically, during the operation of the excitation power supply synchronization signal acquisition and processing system, the operation status recording unit 10 saves multiple historical moments that were determined by the synchronization validity determination unit 6 to be valid synchronization edges in chronological order, and records them as follows: (in The number of historical valid synchronization edges used in the extrapolation calculation of the fundamental wave trend prediction location is listed in chronological order. (This refers to the most recent time that was determined to be a valid synchronization edge). The local waveform feature extraction unit 5 extrapolates the times of multiple historical valid synchronization edges to obtain the predicted time when a valid synchronization edge should occur in the current period. Then, the time of the current candidate synchronization edge actually identified by the candidate synchronization edge extraction unit 4 is... With the predicted time The difference between them is used as the result of fundamental trend deviation extraction.

[0063] As one implementation method for extrapolating the fundamental wave trend prediction position, the local waveform feature extraction unit 5 can obtain the fundamental wave trend prediction position in any one or more combinations of the following methods: The first extrapolation method is a half-cycle recursive extrapolation method—the local waveform feature extraction unit 5 extracts the fundamental wave trend prediction position from multiple historical valid synchronization edges stored in the running status recording unit 10. (in The number of intervals used in the average period estimation. ), according to the average half-cycle estimation function Calculate the average half-cycle estimate Then extrapolate the function using a half-cycle recursive approach. Calculate the fundamental trend prediction location The second extrapolation method is the least squares linear extrapolation method—the local waveform feature extraction unit 5 extracts the sequence numbers of multiple historical valid synchronization edges. As the independent variable, the corresponding time... As dependent variables, they constitute the fitted dataset. The straight line representing the change of time with the index is obtained by fitting using the least squares fitting method. (in Reflecting the average half-cycle estimate, (Reflecting the intercept of the fitted line), the line is placed in the sequence number. The value at the location As the location for predicting fundamental wave trends The least squares fitting method is a conventional numerical fitting method in this field. The third extrapolation method is the moving average period extrapolation method—the local waveform feature extraction unit 5 extracts the difference function of adjacent effective synchronization edges in multiple historical effective synchronization edges. Calculate the half-cycle estimate between two adjacent valid synchronization edges. Then estimate the period function using the moving average. Calculate the moving average result of multiple half-cycle estimates Extrapolation function based on moving average period Calculate the fundamental trend prediction location .

[0064] Furthermore, extract the function based on the fundamental trend deviation. Calculate the timing of the current candidate synchronization edge Predicted position of fundamental trend The difference between them is used as the result of fundamental trend deviation extraction. When the fundamental trend deviation extraction result is positive, it indicates that the time of the current candidate synchronization edge is later than the predicted position of the fundamental trend. When the value is negative, it indicates that the current candidate synchronization edge is earlier than the predicted position of the fundamental trend, and the absolute value reflects the degree of deviation of the current candidate synchronization edge from the historical fundamental trend. Those skilled in the art can superimpose a preset allowable deviation threshold for the fundamental trend onto the fundamental trend. To determine the allowable range of the fundamental trend (for example, a preset allowable deviation threshold for the fundamental trend). (Take a constant greater than zero) when the fundamental trend deviation extraction result The absolute value does not exceed the preset fundamental trend allowable deviation threshold. When the synchronization validity determination unit 6 determines that the fundamental wave trend deviation characteristics meet the allowable conditions, it determines that they do not meet the conditions. The number of historical valid synchronization edges involved in the extrapolation calculation of the fundamental wave trend prediction position. Number of intervals involved in the average period estimation and preset fundamental trend allowable deviation threshold The specific values ​​are all exemplary parameters. Those skilled in the art can adjust them according to the amount of historical data that the operation status recording unit 10 can store, the stability of the fundamental frequency in the excitation power supply application scenario, and the requirements of the application scenario for the sensitivity of the fundamental frequency trend deviation judgment.

[0065] When the number of historical valid synchronization edges stored in the operation status recording unit 10 is insufficient to support the least squares linear extrapolation method or the moving average periodic extrapolation method, the local waveform feature extraction unit 5 may preferentially use the half-period recursive extrapolation method to obtain the fundamental trend prediction position. When the number of historical valid synchronization edges stored in the running status recording unit 10 is sufficient, the local waveform feature extraction unit 5 can preferentially use the least squares linear extrapolation method or the moving average periodic extrapolation method to obtain the fundamental trend prediction position. To reduce the impact of single-cycle estimation error on the predicted location of the fundamental wave trend. The impact.

[0066] The input to the local waveform feature extraction unit 5 is the candidate synchronization edge time and its corresponding sampling segment output by the candidate synchronization edge extraction unit 4. The processing object is the set of sampled values ​​within the forward time window 51 and the backward time window 52. The output object is local waveform feature data composed of at least one of the aforementioned local waveform features. This local waveform feature data is transmitted to the synchronization validity determination unit 6.

[0067] In abnormal operating conditions, such as when there is insufficient sampling data in the forward time window 51 and the backward time window 52, ​​the local waveform feature extraction unit 5 can output a feature incomplete flag, and the synchronization validity determination unit 6 can determine the candidate synchronization edge corresponding to the feature incomplete flag as an invalid candidate synchronization edge based on the feature incomplete flag.

[0068] By setting up a local waveform feature extraction unit 5, this system supplements the neighborhood morphological information between the candidate synchronization edge and the synchronization validity determination, thus enabling the synchronization validity determination to have a basis for multi-dimensional independent criteria.

[0069] (vi) Synchronization Validity Determination Unit 6 like Figure 1 and Figure 4 As shown, the synchronization validity determination unit 6 is connected to the local waveform feature extraction unit 5, and is used to determine whether the candidate synchronization edge is a valid synchronization edge based on the local waveform features.

[0070] The purpose of setting up the synchronization validity determination unit 6 is to comprehensively judge the candidate synchronization edge based on the multi-dimensional local waveform characteristics, distinguish the real fundamental wave synchronization position from the false edge induced by distortion, and output three types of judgment results: valid, pending correction, or invalid.

[0071] The working principle and operating logic of the synchronization validity determination unit 6 are as follows: a single threshold determination is prone to misjudgment under boundary conditions, while a multi-condition joint or reliable score can comprehensively evaluate the reliability of candidate synchronization edges across multiple feature dimensions. Based on common knowledge in this field, different weights can be assigned to each local waveform feature to reflect the differences in sensitivity to different distortion modes.

[0072] In terms of specific implementation, the synchronization validity determination unit 6 adopts a multi-condition joint determination method or a reliable scoring determination method to determine whether the candidate synchronization edge is a valid synchronization edge.

[0073] In the first embodiment, the synchronization validity determination unit 6 adopts a multi-condition joint determination method: when the local waveform characteristics of the candidate synchronization edge simultaneously meet multiple preset characteristic conditions, it is determined to be a valid synchronization edge; otherwise, it is determined to be an invalid candidate synchronization edge. For example, the multiple characteristic conditions can be an AND logic combination of "the time interval characteristic falls within the allowable deviation range, the slope characteristic falls within the allowable slope range, and the amplitude continuity characteristic does not exceed the allowable amplitude continuity threshold".

[0074] It should be further explained that the multi-condition joint judgment method uses the local waveform features extracted by the local waveform feature extraction unit 5 as the judgment basis. Each feature condition corresponds to a local waveform feature, and whether the extraction result of the local waveform feature falls within the corresponding allowable range or the corresponding allowable threshold is used as the basis for judging whether the feature condition is satisfied. The allowable range or allowable threshold is obtained by superimposing the theoretical reference value of the AC voltage on the excitation power supply input side under normal operating conditions with the allowable deviation range or allowable deviation threshold determined by the application scenario's requirements for the sensitivity of the feature judgment. The synchronization validity judgment unit 6 combines multiple feature conditions with AND logic as the judgment basis for valid synchronization edges, so that candidate synchronization edges are judged as valid synchronization edges only when the allowable conditions are met simultaneously on multiple independent criterion dimensions, thereby realizing cross-validation on multiple independent criterion dimensions.

[0075] As one implementation method for presetting multiple feature conditions, the synchronization validity determination unit 6 can preset the multiple feature conditions according to the following steps: First, select feature dimensions. The synchronization validity determination unit 6 selects at least two of the five local waveform features (i.e., time interval feature, slope feature, amplitude continuity feature, symmetry feature, and fundamental trend deviation feature) from the local waveform feature extraction unit 5 as feature dimensions to participate in the multi-condition joint determination; the selection process can be determined according to the main distortion mode of the application scenario. For example, for the commutation gap distortion mode, the time interval feature, slope feature, and symmetry feature are selected first; for the harmonic superposition distortion mode, the slope feature and amplitude continuity feature are selected first; for the mixed distortion mode, all five features mentioned above can be selected simultaneously as feature dimensions to participate in the determination, so as to enhance the ability to identify complex distortion conditions. Second, preset a single feature condition. For each selected local waveform feature, the synchronization validity determination unit 6 presets a single feature condition according to the allowable range or allowable threshold determination method of the corresponding feature of the local waveform feature extraction unit 5. The single feature condition includes: the time interval feature falls within the allowable deviation of the time interval. The slope characteristic falls within the defined allowable deviation range; the slope characteristic falls within the allowable deviation ratio of the slope. Within the defined allowable slope range; the amplitude continuity characteristic does not exceed the proportion of the allowable amplitude continuity deviation. The amplitude continuity threshold is determined; the symmetry characteristic does not exceed the preset symmetry allowable threshold. The defined allowable range of symmetry, or the symmetry characteristics not lower than the lower limit of the preset symmetry correlation coefficient. The lower limit of the symmetry correlation coefficient is determined; the fundamental trend deviation characteristic does not exceed the preset allowable deviation threshold of the fundamental trend. The determined fundamental trend allowable range. The third step involves the AND logic combination of multiple characteristic conditions. The synchronization validity determination unit 6 combines all the preset single characteristic conditions from the second step using AND logic to obtain multiple characteristic conditions. The synchronization validity determination unit 6 determines a candidate synchronization edge as a valid synchronization edge only when all single characteristic conditions are simultaneously met; otherwise, it determines it as an invalid candidate synchronization edge. The fourth step involves on-site debugging and optimization of the characteristic conditions. After the multiple characteristic conditions preset in the first to third steps are put into actual operation, the synchronization validity determination unit 6 can adjust the allowable range or allowable threshold of each single characteristic condition based on the candidate synchronization edges, local waveform features, and validity determination results saved by the operation status recording unit 10. This achieves a balance between the reliability requirements for valid synchronization edge recognition and the sensitivity requirements for pseudo-synchronization point recognition in the application scenario.

[0076] It should be understood that the specific composition of multiple feature conditions (i.e., the selected feature dimensions and their number) and the specific values ​​of the allowable range or allowable threshold in each single feature condition are all exemplary parameters. Those skilled in the art can adjust them according to the main distortion mode of the application scenario, the operating parameters of the excitation power supply and the bus equipment, the historical waveform data saved by the operating status recording unit 10, and the on-site debugging results.

[0077] In the second implementation, the synchronization validity determination unit 6 employs a reliable scoring method: multiple features in the local waveform are weighted and summed to obtain an evaluation value. When the evaluation value is not lower than a preset valid threshold, it is determined to be a valid synchronization edge; when the evaluation value is lower than a preset invalid threshold, it is determined to be an invalid candidate synchronization edge; when the evaluation value is lower than the valid threshold but not lower than the invalid threshold, a correction pending result is output. This result is then handed over to the pseudo-synchronization point processing unit 7 for correction processing. The invalid threshold is lower than the valid threshold.

[0078] Furthermore, the evaluation function in a reliable scoring method can be expressed as: Where S is the credible rating value; to These are feature evaluation terms obtained by normalization based on at least one of the following: time interval features, slope features, amplitude continuity features, symmetry features, and fundamental wave trend deviation features; to The sum of the weight coefficients can be set to 1 or other constants that facilitate threshold comparison, corresponding to the weight coefficients of each feature evaluation item respectively. The number of features involved in a reliable score.

[0079] It should be noted that the weighting coefficients are... to The weighting coefficients are used to reflect the importance of each feature scoring item in the credible score. The principle is to give a relatively large weight to feature scoring items with strong distinguishing ability in the main distortion mode of the application scenario, and a relatively small weight to feature scoring items with weak distinguishing ability in the main distortion mode. This makes the credible score S have a strong ability to identify pseudo-synchronization points in the main distortion mode.

[0080] As one implementation method for assigning weighting coefficients, the synchronization validity determination unit 6 may assign the weighting coefficients according to the following steps: to The first step is to evaluate the feature discrimination capability. Based on the historical waveform data saved by the operation status recording unit 10, the synchronization validity determination unit 6 statistically analyzes the value distribution of effective synchronization edge samples and pseudo-synchronization point samples on each feature scoring item. The feature scoring item with the smallest overlap in value distribution between effective synchronization edge samples and pseudo-synchronization point samples on each feature scoring item is identified as the feature scoring item with the strongest discrimination capability in this application scenario. The second step is to assign initial weight coefficients. The synchronization validity determination unit 6 assigns initial weight coefficients according to the order of discrimination capability of each feature scoring item, so that the weight coefficients corresponding to feature scoring items with strong discrimination capability are relatively large, and the weight coefficients corresponding to feature scoring items with weak discrimination capability are relatively small; this can be done according to the weight coefficient normalization constraint. The initial weight coefficients are normalized. The third step is on-site debugging and optimization of the weight coefficients. After the initial weight coefficients assigned in the first two steps are put into actual operation, the synchronization validity determination unit 6 can adjust the weight coefficients based on the candidate synchronization edges, local waveform characteristics, and validity determination results saved by the operation status recording unit 10, so that the reliable score S has a stable ability to identify pseudo-synchronization points in the application scenario. Conventional grid search methods, offline tuning methods based on on-site waveform data, or online recursive tuning methods based on operation data can all be used as specific implementation methods for on-site debugging and optimization of the weight coefficients.

[0081] It should also be noted that, under the reliable scoring method, the reliable score S reflects the degree of reliability of the candidate synchronization edge across multiple independent criteria dimensions. A higher reliable score S indicates that the candidate synchronization edge is more likely to be a true fundamental frequency synchronization location, while a lower reliable score S indicates that the candidate synchronization edge is more likely to be a false synchronization point. If only a single judgment threshold is set, the fluctuation of the reliable score S in the boundary region near the single judgment threshold will cause the synchronization validity judgment result to frequently switch between valid and invalid, affecting the stability of the synchronization reference signal generation in the application scenario. Setting the invalid threshold below the valid threshold aims to create a correction-pending interval between the invalid and valid thresholds. Candidate synchronization edges whose credible scores S fall within this correction-pending interval are neither directly judged as valid synchronization edges nor as invalid candidate synchronization edges. Instead, a correction-pending result is output and handed over to the pseudo-synchronization point processing unit 7 to generate a correction synchronization position B2 according to the correction synchronization position generation method provided by the subsequent pseudo-synchronization point processing unit 7. This provides a transitional processing path for candidate synchronization edges within the boundary region of the credible score S, avoiding frequent switching between valid and invalid synchronization validity judgment results caused by value fluctuations within the boundary region of the credible score S.

[0082] It should also be noted that, as one implementation method for determining the valid and invalid thresholds, the synchronization validity determination unit 6 can determine the valid threshold in the following manner. With invalid threshold Based on the historical waveform data stored in the operation status recording unit 10, the distribution of reliable scores S corresponding to valid synchronization edge samples and the distribution of reliable scores S corresponding to pseudo-synchronization point samples are statistically analyzed; the lower bound of the distribution of reliable scores S corresponding to valid synchronization edge samples is used as the effective threshold. The upper bound of the distribution of the credible score S corresponding to the pseudo-synchronization point sample is used as the invalid threshold. Additionally, the effective threshold With invalid threshold The spacing between them reflects the width of the interval to be corrected. Those skilled in the art can adjust it according to the trade-off between the requirements for the reliability of effective synchronization edge recognition and the requirements for the sensitivity of pseudo-synchronization point recognition in the application scenario. When the application scenario has high requirements for the stability of the generation of synchronization reference signal, the width of the interval to be corrected can be increased. When the application scenario has high requirements for the sensitivity of pseudo-synchronization point recognition, the width of the interval to be corrected can be decreased.

[0083] It should be understood that the weighting coefficient to Specific values, effective threshold and invalid threshold The specific values ​​and the width of the undetermined interval are exemplary parameters. Those skilled in the art can adjust them according to the main distortion mode of the application scenario, the operating parameters of the excitation power supply and the bus equipment, the historical waveform data saved in the operating status recording unit 10, and the on-site debugging results.

[0084] The input to the synchronization validity determination unit 6 is the local waveform feature data output by the local waveform feature extraction unit 5. The processing involves joint judgment or weighted evaluation of multi-dimensional features. The output is one of the following: a valid synchronization edge flag, an invalid candidate synchronization edge flag, or a correction pending flag. The determination result is then passed to the pseudo-synchronization point processing unit 7.

[0085] In abnormal operating conditions, such as when local waveform feature data is incomplete or the evaluation process is abnormal, the synchronization validity determination unit 6 can default the corresponding candidate synchronization edge as an invalid candidate synchronization edge, and the pseudo synchronization point processing unit 7 can continue to execute according to the abnormal handling method.

[0086] By setting up a synchronization validity determination unit 6, this system introduces a comprehensive judgment based on multi-dimensional local waveform characteristics between the candidate synchronization edge and the final output synchronization reference signal, enabling the entire processing link to maintain the stability of the judgment logic under different distortion conditions.

[0087] (vii) Pseudo-synchronization point processing unit 7 The pseudo-synchronization point processing unit 7 is connected to the synchronization validity determination unit 6. It is used to output the candidate synchronization edge that is determined to be valid as the valid synchronization edge B1, and to remove the candidate synchronization edge that is determined to be invalid, or to generate the corrected synchronization position B2 based on the historical valid synchronization edge or the fundamental frequency trend.

[0088] The purpose of setting up the pseudo-synchronization point processing unit 7 is to uniformly output the valid synchronization edge between the synchronization validity determination result and the synchronization reference generation, or to eliminate or correct the pseudo-synchronization point, so that the valid synchronization edge and the corrected synchronization position become the unified upstream source of the synchronization reference generation unit 8.

[0089] The working principle and operating logic of the pseudo-synchronization point processing unit 7 are as follows: If pseudo-synchronization points are only eliminated without correction, the synchronization reference will be discontinuous within the short-term distortion interval. By generating a corrected synchronization position B2 based on historical valid synchronization edges or fundamental frequency trends, the continuity of the synchronization reference can be maintained under short-term distortion. At the same time, the candidate synchronization edges that are determined to be valid are uniformly output as valid synchronization edges at the pseudo-synchronization point processing unit 7, so that the valid synchronization edge B1 and the corrected synchronization position B2 are transmitted from the same upstream unit to the synchronization reference generation unit 8, thus closing the entire data link at the system level.

[0090] In terms of specific implementation, the pseudo-synchronization point processing unit 7 processes the judgment result output by the synchronization validity determination unit 6, and the processing logic includes the following branches: 1. Branch 1: When the determination result is a valid synchronization edge flag, the pseudo synchronization point processing unit 7 directly outputs the candidate synchronization edge as a valid synchronization edge B1 to the synchronization reference generation unit 8. 2. Branch 2: When the determination result is an invalid candidate synchronization edge flag, the pseudo synchronization point processing unit 7 performs at least one of the following processing methods on the candidate synchronization edge.

[0091] (1) Processing method one: Remove the candidate synchronization edge, that is, do not output the corresponding position to the synchronization reference generation unit 8.

[0092] (2) Processing method 2: Replace the candidate synchronization edge with the predicted synchronization position calculated based on the adjacent effective synchronization edge. That is, based on the time of the previous effective synchronization edge and the estimated value of the fundamental period, calculate the synchronization position that should appear in the current period and use it as the corrected synchronization position B2.

[0093] Specifically, the fundamental period estimate refers to the estimated value obtained by statistically analyzing the time intervals between multiple historical valid synchronization edges stored in the operating status recording unit 10, which reflects the actual value of the fundamental period of the AC voltage on the excitation power supply input side in the current cycle. It is denoted as... Set the fundamental period estimate. The purpose is to ensure that, under conditions where the fundamental frequency of the AC voltage on the excitation power supply input side deviates from the rated fundamental frequency for a short period (such as grid frequency fluctuations), the calculation of the corrected synchronization position B2 is based on the actual fundamental period of the current cycle, rather than simply relying on the theoretical fundamental period corresponding to the rated fundamental frequency. The synchronization position that should have appeared in the current cycle refers to the position that should have appeared as a valid synchronization edge in the current cycle, calculated based on the time of the last valid synchronization edge and the estimated fundamental period, assuming the candidate synchronization edge is determined to be invalid.

[0094] As an estimate for determining the fundamental frequency period In one implementation, the pseudo-synchronization point processing unit 7 can determine the fundamental period estimate in any one or more combinations of the following methods. The first method is the nearest neighbor interval determination method—the pseudo-synchronization point processing unit 7 reads the times of the two nearest neighbor valid synchronization edges from the multiple historical valid synchronization edges stored in the running status recording unit 10. and According to the nearest neighbor interval function Calculate the fundamental period estimate Multiple historical valid synchronization edges are arranged in chronological order. The fundamental period estimate is the time when the most recent valid synchronization edge was determined. The first method corresponds to the full cycle of the AC voltage on the excitation power supply input side. The second method is the moving average period determination method—the pseudo-synchronization point processing unit 7 calculates the half-cycle estimate using the moving average period estimation function in the moving average period extrapolation method described in the local waveform feature extraction unit 5. , and according to Obtain the fundamental period estimate Those skilled in the art can adjust the number of intervals participating in the moving average based on the number of historical valid synchronization edges that the operating status recording unit 10 can store. The third determination method is a fallback method based on the rated fundamental frequency—when the number of historical valid synchronization edges stored in the operating status recording unit 10 is insufficient to support the nearest adjacent interval determination method or the moving average period determination method (i.e., the excitation power supply synchronization signal acquisition and processing system is in the initial startup phase), the pseudo-synchronization point processing unit 7 can determine the interval based on the rated fundamental frequency. The reciprocal determines the estimate of the fundamental period. ,Right now The rated fundamental frequency According to the rated fundamental frequency of the excitation power supply application scenario (for example, or ) value.

[0095] Furthermore, the function is calculated based on the corrected synchronization position. Calculate the synchronization position that should have occurred within the current period. As the corrected synchronization position B2, the corrected synchronization position calculation function is based on the fact that the fundamental zero-crossing position occurs twice within one full cycle of the AC voltage on the excitation power supply input side (and the interval between the two adjacent zero-crossing positions is half a fundamental cycle), and the time of the last time determined as a valid synchronization edge is used. Superimposed half-fundamental period estimate This determines the position where a valid synchronization edge should occur within the current cycle. When the synchronization reference signal C1 is generated recursively on an integer cycle basis (i.e., the synchronization reference signal is generated once per integer cycle of the fundamental frequency), the synchronization position estimation function is adjusted accordingly. Those skilled in the art can select the specific form of the corrected synchronization position calculation function according to the actual generation method of the synchronization reference signal C1.

[0096] It should be understood that the fundamental frequency period estimate The determination method, the number of historical valid synchronization edges involved in the calculation, and the specific form of the corrected synchronization position estimation function are all exemplary implementation methods. Those skilled in the art can adjust them according to the amount of historical data that the running status recording unit 10 can store, the stability of the fundamental frequency in the excitation power supply application scenario, and the generation method of the synchronization reference signal C1.

[0097] (3) Processing method three: Correct the position of the candidate synchronization edge according to the fitting result of the fundamental trend. That is, based on several historical valid synchronization edges saved by the running status recording unit 10, the fundamental trend of the current period is obtained by linear extrapolation, least squares fitting or moving average, and the position of the candidate synchronization edge is corrected as the corrected synchronization position B2.

[0098] It should be further explained that: the fundamental trend refers to the expected change pattern of the effective synchronization edge position of the excitation power supply input AC voltage near the current cycle, reflected by the relationship between the times of multiple historical effective synchronization edges stored in the operating status recording unit 10 and their sequence number or time. The output form of the fundamental trend can be expressed as a fitting function between the effective synchronization edge time and the sequence number, the average half-cycle estimate, or the predicted time of the current cycle obtained by extrapolation based on multiple recent effective synchronization edges. The pseudo-synchronization point processing unit 7 obtains the fundamental trend prediction time of the effective synchronization edge in the current cycle based on the fundamental trend, and uses the fundamental trend prediction time as the corrected synchronization position B2.

[0099] Furthermore, as an implementation method for obtaining the fundamental frequency trend and correcting the candidate synchronization edge position, the pseudo-synchronization point processing unit 7 can obtain the fundamental frequency trend and the corrected synchronization position B2 in any one or more combinations of the following methods: The first implementation method is a linear extrapolation method—the pseudo-synchronization point processing unit 7 reads the times of the two most recent valid synchronization edges from the running status recording unit 10. and The half-period estimation function is estimated by linear extrapolation. Calculate half-cycle estimate As a reflection of the fundamental trend; then corrected by linear extrapolation function. Calculate the fundamental trend prediction time of the effective synchronization edge within the current period. and will time As a correction synchronization position B2. The second implementation method is the least squares fitting method—the pseudo synchronization point processing unit 7 reads the most recent synchronization point from the running status recording unit 10. The moment when it is determined to be a valid synchronization edge. ( ,in To determine the number of historical effective synchronization edges participating in least squares fitting (arranged chronologically), the time intervals will be... As the dependent variable, the corresponding serial number As independent variables, they constitute the fitted dataset. The straight line representing the change of time with the index is obtained by fitting using the least squares fitting method. ,in Reflecting the average half-cycle estimate, The intercept of the fitted straight line reflects the fundamental trend; then, the least squares fitting correction function is applied. Calculate the fundamental trend prediction time of the effective synchronization edge within the current period. and will time As a correction synchronization position B2; the least squares fitting method is a conventional numerical fitting method in this field. The third implementation method is the moving average method—the pseudo-synchronization point processing unit 7 reads the most recent synchronization point from the running status recording unit 10. The moment when it is determined to be a valid synchronization edge. ( ,in The number of historical valid synchronization edges participating in the moving average (arranged in chronological order), and the difference function of adjacent valid synchronization edge times. ( Calculate the half-cycle estimate between two adjacent valid synchronization edges. Then estimate the period function according to the moving average. Calculate the moving average result of multiple half-cycle estimates As a reflection of the fundamental trend; then corrected by the moving average function. Calculate the fundamental trend prediction time of the effective synchronization edge within the current period. and will time This serves as the corrected synchronization position B2.

[0100] It should be understood that in the first to third embodiments described above, the fundamental trend is reflected in the form of (i.e., the linear extrapolated half-cycle estimate). Least squares fitted line Or moving average period estimate The calculation function for correcting the candidate synchronization edge position is an exemplary implementation. When the number of historical valid synchronization edges stored in the operation status recording unit 10 is insufficient to support the least squares fitting method or the moving average method, the pseudo synchronization point processing unit 7 can preferentially use the linear extrapolation method to obtain the corrected synchronization position B2. When the number of historical valid synchronization edges stored in the operation status recording unit 10 is sufficient, the pseudo synchronization point processing unit 7 can preferentially use the least squares fitting method or the moving average method to obtain the corrected synchronization position B2, so as to reduce the impact of the single-cycle estimation error on the corrected synchronization position B2. When the generation method of the synchronization reference signal C1 is recursively based on the whole cycle (i.e., the synchronization reference signal is generated once in each fundamental cycle), the half-cycle estimate used in the calculation function for correcting the candidate synchronization edge position should be adjusted to the whole-cycle estimate accordingly. Those skilled in the art can select the specific form of the calculation function for correcting the candidate synchronization edge position according to the actual generation method of the synchronization reference signal C1.

[0101] In addition, the number of historical effective synchronization edges involved in least squares fitting Number of historical effective synchronous edges participating in the moving average The specific forms of the above-mentioned calculation functions are all exemplary parameters. Those skilled in the art can adjust them according to the amount of historical data that the operation status recording unit 10 can store, the stability of the fundamental frequency in the excitation power supply application scenario, and the generation method of the synchronization reference signal C1.

[0102] 3. Branch 3: When the determination result is a correction pending flag, the pseudo synchronization point processing unit 7 generates the correction synchronization position B2 according to one of the correction synchronization position generation methods in the above branch 2, and outputs it to the synchronization reference generation unit 8. 4. Branch Four: When the number of consecutive invalid candidate synchronization edges reaches the preset anomaly count threshold, the pseudo-synchronization point processing unit 7 outputs a synchronization anomaly status, and the synchronization reference generation unit 8 enters the anomaly processing branch. The preset anomaly count threshold can be selected between three and more cycles, and the specific value is determined based on the trade-off between the timeliness of the anomaly response and the false alarm rate.

[0103] Specifically, the preset anomaly count threshold is denoted as... Preset anomaly count threshold The setting principle is as follows: When a short-term, single, or few distortion events occur in the AC voltage on the excitation power input side, the pseudo-synchronization point processing unit 7 generates a corrected synchronization position B2 according to the predicted synchronization position generation method or the fundamental trend fitting correction method described in the pseudo-synchronization point processing unit 7, so as to maintain the continuity of the synchronization reference signal C1 and not output the synchronization abnormal state; when a continuous distortion event occurs in the AC voltage on the excitation power input side or a continuous abnormality occurs in the synchronization signal acquisition and processing link, the pseudo-synchronization point processing unit 7 counts the abnormalities according to the preset abnormality count. Triggering a synchronization anomaly state is to avoid using a corrected synchronization position that deviates from the true fundamental phase as the basis for generating the synchronization reference signal C1 for an extended period of time.

[0104] As a preset abnormal count threshold In one specific implementation method, the pseudo-synchronization point processing unit 7 can determine the preset anomaly counting threshold based on the following two constraints. Constraint 1 is the timeliness constraint for abnormal response—the time elapsed from the first appearance of an invalid candidate synchronization edge to the output of an abnormal synchronization state by the pseudo-synchronization point processing unit 7 is denoted as the response time. Response time The response time should not exceed the maximum allowable response time for synchronization anomalies in the application scenario. That is, it should satisfy Based on the fundamental frequency period estimate (Based on the fundamental period estimation value described in pseudo-synchronization point processing unit 7) (Determination method) and response time Correspondence between the number of consecutive invalid candidate synchronization edges (Based on the fundamental half-cycle recursive method) or (Based on the fundamental frequency integer period recursion method), the first constraint counting threshold determined by constraint one can be derived. (Based on the fundamental half-cycle recursive method) or (Based on the fundamental frequency whole-cycle recursive method); Maximum permissible response time The maximum allowable delay time for the subsequent control links of the excitation power supply to enter the protection process is determined based on the application scenario. Constraint two is a false alarm rate constraint—the pseudo-synchronization point processing unit 7 does not output a synchronization anomaly state when a single or a few distortion events occur on the AC voltage input side of the excitation power supply, i.e., a preset anomaly count threshold is applied. It should be greater than the maximum number of consecutive invalid candidate synchronization edges expected in the application scenario. Those skilled in the art can, based on the historical waveform data stored in the operation status recording unit 10, statistically analyze the distribution of the number of consecutive invalid candidate synchronization edges caused by a single distortion event in the application scenario, and take the values ​​near the upper bound of the distribution as the expected maximum number of consecutive invalid candidate synchronization edges. The second constraint counting threshold obtained from constraint two Value greater than .

[0105] Furthermore, the first constraint counting threshold is... With the second constraint counting threshold The larger of the two values ​​is used as the preset anomaly counting threshold. The initial value, i.e. Then, round up to satisfy the integer constraint. For example, for the fundamental frequency... Fundamental period estimate (i.e., the fundamental half-cycle is approximately) Application scenarios where the maximum allowed response time is... For example, take as At that time, the first constraint counting threshold is obtained by recursion using the fundamental half-cycle method. The maximum number of consecutive invalid candidate synchronization edges expected to occur due to a single distortion event in the application scenario. When the value is 2, the second constraint counting threshold For example, it is taken as 3 (i.e., greater than 3). The larger of the two values ​​is taken and rounded up to set a preset anomaly count threshold. For example, it is taken as 5.

[0106] It should be understood that the maximum permissible response time The maximum number of consecutive invalid candidate synchronization edges expected. And the final preset anomaly count threshold The specific values ​​are all exemplary parameters. Those skilled in the art can determine the appropriate values ​​based on the specific requirements for the timeliness of anomaly response, the specific requirements for the false alarm rate, and the fundamental period estimation value for the application scenario. The actual value and the generation method of the synchronization reference signal C1 are adjusted.

[0107] The input objects of the pseudo-synchronization point processing unit 7 are the judgment result output by the synchronization validity determination unit 6 and the historical valid synchronization edge and historical period relationship data fed back by the operation status recording unit 10. The output objects are the valid synchronization edge B1, the corrected synchronization position B2, or the synchronization abnormal state. The output objects are passed to the synchronization reference generation unit 8.

[0108] In abnormal operating conditions, such as when the running status recording unit 10 has not saved enough historical valid synchronization edges (e.g., at the initial stage of system startup), the pseudo synchronization point processing unit 7 can preferentially use the adjacent cycle prediction substitution method described in processing method two of the above branch two to generate the corrected synchronization position; when there are enough historical valid synchronization edges, the fundamental wave trend fitting method described in processing method three of the above branch two can be used to generate the corrected synchronization position.

[0109] By setting up a pseudo-synchronization point processing unit 7, this system avoids pseudo-synchronization points from directly entering subsequent control links, and maintains the continuity of the synchronization reference under short-term distortion conditions.

[0110] (viii) Synchronization reference generation unit 8 like Figure 1 and Figure 7 As shown, the synchronization reference generation unit 8 is connected to the pseudo-synchronization point processing unit 7, and is used to generate a synchronization reference signal C1 based on the valid synchronization edge B1 or the corrected synchronization position B2. In this embodiment, the synchronization reference generation unit 8 adds a validity flag C2 when generating the synchronization reference signal C1. The validity flag C2 includes at least three states: valid, corrected valid, and abnormal.

[0111] The purpose of setting up the synchronization reference generation unit 8 is to generate a synchronization reference signal that can be directly used by subsequent control links based on the effective synchronization edge or corrected synchronization position output by the pseudo-synchronization point processing unit 7, and to enable subsequent control links to distinguish the source of the synchronization reference through the validity flag.

[0112] The working principle and operation logic of the synchronization reference generation unit 8 are as follows: the subsequent trigger control, sampling window configuration or control calculation timing generation links need to be able to distinguish the source of the synchronization reference (generated directly from the effective synchronization edge or generated from the corrected synchronization position) so as to decide whether to take the corresponding amplitude limiting processing, maintenance processing or protection processing; the additional validity flag provides the decision basis for the subsequent control links.

[0113] In its specific implementation, the synchronization reference generation unit 8 generates a synchronization reference signal C1 based on the timing information of the effective synchronization edge B1 or the corrected synchronization position B2. The generated synchronization reference signal C1 can be expressed as one or more of the following forms: synchronization pulse, phase angle reference value, sampling window start point, trigger control timing reference value, or timestamp.

[0114] Specifically, the synchronization reference generation unit 8 uses the time information of the effective synchronization edge B1 or the corrected synchronization position B2 output by the pseudo-synchronization point processing unit 7 as the generation basis, and adopts the corresponding generation method according to the different manifestations of the synchronization reference signal C1. The generation method of the synchronization reference signal C1 can be implemented by any one or more combinations of the following methods: The first generation method is a synchronization pulse generation method—the synchronization reference generation unit 8 triggers the pulse generation logic at the effective synchronization edge B1 or the corrected synchronization position B2, and outputs a digital pulse signal as a synchronization pulse with a preset pulse width Δp; those skilled in the art can determine the preset pulse width Δp (exemplarily, the preset pulse width Δp is in the range of microseconds to hundreds of microseconds) according to the input level requirements of the subsequent control link connected to the excitation control interface unit 9, and keep the level transition edge of the synchronization pulse in time alignment with the effective synchronization edge B1 or the corrected synchronization position B2; the pulse generation logic can be implemented using one of the following conventional timer output comparison channels, internal pulse generation circuits of programmable logic devices, or monostable trigger circuits.

[0115] The second generation method is the phase angle reference value generation method: the synchronization reference generation unit 8 uses the time of the effective synchronization edge B1 or the corrected synchronization position B2 as the zero-point reference time of the fundamental phase angle, and generates the phase angle reference value according to the phase angle reference value generation function. (in radians) or (In angle system) Calculate the reference value of the fundamental phase angle of the AC voltage on the input side of the excitation power supply at the current time t. As a phase angle reference value, where The fundamental frequency of the AC voltage on the input side of the excitation power supply. The effective synchronization edge B1 or the corrected synchronization position B2; fundamental frequency. The rated fundamental frequency or the estimated fundamental period value fed back by the operating status recording unit 10 can be used. The reciprocal of the phase angle; the synchronous reference generation unit 8 can update the phase angle reference value according to a preset refresh cycle. .

[0116] The third generation method is the sampling window start point generation method—synchronization reference generation unit 8 generates the function based on the sampling window start point. Calculate the start time of the sampling window in the subsequent control loop of the excitation power supply. As the starting point of the sampling window, To effectively synchronize edge B1 or correct the synchronization position B2, This is a preset offset of the sampling window start point relative to the effective synchronization edge B1 or the corrected synchronization position B2. Those skilled in the art can determine this preset offset based on the expected phase relationship between the voltage closed-loop sampling window and the fundamental phase in subsequent control loops. and will Output as the starting point of the sampling window.

[0117] The fourth generation method is the trigger control timing reference value generation method—synchronization reference generation unit 8 generates the function based on the trigger control timing reference value. (Control angle in radians) )or (Control angle by angle) Calculate the timing reference values ​​for the triggering actions in the subsequent triggering control loop of the excitation power supply. As a reference value for trigger control timing, To effectively synchronize edge B1 or correct the synchronization position B2, The trigger control angle is determined by the excitation control law for subsequent trigger control stages. The fundamental frequency of the AC voltage on the input side of the excitation power supply; trigger control angle. Provided by the subsequent trigger control stage, the synchronization reference generation unit 8 is based on the trigger control angle. With the Generate trigger control timing reference values This is the specific manifestation of the synchronization reference signal C1.

[0118] The fifth generation method is the timestamp generation method—the synchronization reference generation unit 8 directly uses the time of the effective synchronization edge B1 or the corrected synchronization position B2 as the timestamp. The output is sent to the excitation control interface unit 9, from which subsequent control components calculate the phase angle reference value, sampling window start point, or trigger control timing reference value according to conventional methods in the field; timestamp It uses the same time base as sampling conversion unit 3 and outputs data in a preset timestamp data format (exemplarily, a microsecond or nanosecond timestamp represented by a 32-bit or 64-bit unsigned integer).

[0119] It should be understood that the specific generation method of the synchronization reference signal C1 can be implemented by selecting one or more combinations of the first to fifth generation methods mentioned above, according to the input requirements of the subsequent control links of the excitation power supply for the synchronization reference signal C1; preset pulse width Preset offset The specific values ​​of the preset timestamp data format are all exemplary parameters, and those skilled in the art can adjust them according to the specific interface requirements of subsequent control links.

[0120] Furthermore, the synchronization reference generation unit 8 adds a validity flag C2 according to the following rules: Rule (1): The synchronization reference signal C1 generated based on the valid synchronization edge B1 is appended with a flag indicating the valid state; Rule (2): The synchronization reference signal C1 generated based on the corrected synchronization position B2 is appended with a flag indicating that the correction is valid; Rule (3): When the number of consecutive invalid candidate synchronization edges reaches the preset abnormal count threshold, or when a synchronization reference signal cannot be generated based on a valid synchronization edge or a corrected synchronization position, the synchronization reference generation unit 8 adds an abnormal status flag.

[0121] The input to the synchronization reference generation unit 8 is the valid synchronization edge B1, the corrected synchronization position B2, or the synchronization anomaly state output by the pseudo-synchronization point processing unit 7. The output is the synchronization reference signal C1 with an attached validity flag C2. For example... Figure 7 As shown, the synchronization reference signal C1 and the validity flag C2 are transmitted to the excitation control interface unit 9 in the form of a data stream.

[0122] By setting up the synchronization reference generation unit 8, this system completes the generation from the effective synchronization position to the synchronization reference signal, and enables the entire data link to have a state recognition capability at the output stage through the validity flag.

[0123] (ix) Excitation control interface unit 9 The excitation control interface unit 9 is connected to the synchronization reference generation unit 8 and is used to output the synchronization reference signal C1 to the subsequent control stage of the excitation power supply. The subsequent control stage includes at least one of the following: a trigger control stage, a sampling window configuration stage, and a control calculation timing generation stage.

[0124] The purpose of setting up the excitation control interface unit 9 is to serve as the interface conversion and differentiated output between the synchronization reference generation unit 8 and the subsequent control link of the excitation power supply, so that the subsequent control link can take corresponding actions on the synchronization reference signal C1 according to the status of the validity flag C2.

[0125] In terms of specific implementation, the excitation control interface unit 9 can be implemented using a digital I / O interface, a timer trigger interface, or a communication bus interface. Conventional interfaces in the art, such as CAN bus, RS485 bus, SPI bus, EtherCAT bus, or industrial Ethernet interface, can all be used as specific implementations of the communication bus interface. The excitation control interface unit 9 performs the following operations based on the validity flag C2: Operation (1): When the validity flag C2 is valid, the synchronization reference signal C1 is output to the subsequent control link, and the subsequent control link directly generates a trigger pulse, configures the sampling window or starts the control calculation based on this; Operation (2): When the validity flag C2 is corrected and valid, the synchronization reference signal C1, together with the flag of the corrected and valid status, is output to the subsequent control loop, so that the subsequent control loop processes according to the corrected synchronization reference, and can be combined with the limiting or soft start strategy to reduce the potential deviation caused by the correction process. Operation (3): When the validity flag C2 is abnormal, output the abnormal status to the subsequent control loop and instruct the subsequent control loop to perform at least one of the following operations: limit, maintain the trigger parameters of the previous cycle, or prohibit triggering.

[0126] The input objects of the excitation control interface unit 9 are the synchronization reference signal C1 and the validity flag C2 output by the synchronization reference generation unit 8, and the output objects are the interface signals for subsequent control links.

[0127] By setting up the excitation control interface unit 9, this system enables the entire excitation control link to have a differentiated response capability that matches the synchronous reference state under waveform distortion conditions, thereby improving the operational reliability of subsequent control links.

[0128] (x) Operation status recording unit 10 The running status recording unit 10 is connected to the candidate synchronization edge extraction unit 4, the synchronization validity determination unit 6, the pseudo synchronization point processing unit 7, and the synchronization reference generation unit 8 respectively, and is used to save the candidate synchronization edge time, local waveform characteristics, validity determination results, pseudo synchronization point processing methods, and synchronization reference output results.

[0129] The purpose of setting up the operation status recording unit 10 is to provide traceable historical information for determining the effectiveness of synchronization and handling pseudo-synchronization points, and to provide a data foundation for operation diagnosis and abnormal operating condition tracing.

[0130] In terms of specific implementation, the operation status recording unit 10 can be implemented using one of the following: non-volatile memory, circular buffer, event recording buffer, or internal storage area of ​​the controller. While saving historical information, the operation status recording unit 10 feeds back historical valid synchronization edge and continuous anomaly count information to the synchronization validity determination unit 6, and feeds back historical periodic relationship and fundamental trend data to the pseudo-synchronization point processing unit 7, thereby forming a closed-loop feedback mechanism.

[0131] When the number of consecutive invalid candidate synchronization edges reaches a preset anomaly count threshold, the pseudo-synchronization point processing unit 7 outputs a synchronization anomaly status based on the continuous anomaly count information fed back by the operation status recording unit 10. This mechanism enables the entire processing link to promptly enter the anomaly processing branch when consecutive distortion events occur, avoiding the prolonged use of a corrected synchronization position that deviates from the true fundamental phase.

[0132] By setting up the operation status recording unit 10, this system enables the determination of synchronization validity to rely on historical information, forming a processing link with closed-loop adaptive capability, and providing a traceable data foundation for operation diagnosis and abnormal working condition tracing.

[0133] In summary, the excitation power supply synchronization signal acquisition and processing system provided in this embodiment, by performing candidate edge extraction, local waveform feature verification, validity determination, and synchronization reference generation on the synchronization signal, avoids using candidate zero-crossing points induced by instantaneous crossover points, glitch edges, or local slope abrupt changes as the true fundamental frequency synchronization reference output under the condition that there are harmonics, spikes, commutation gaps, or local waveform distortions in the AC voltage on the input side of the excitation power supply.

[0134] Example 2: As Figure 2 As shown, this embodiment provides a method for acquiring and processing excitation power supply synchronization signals based on the above-described system, including steps 1 to 7. The execution subjects of this method are the corresponding units in the excitation power supply synchronization signal acquisition and processing system described in Embodiment 1.

[0135] Step 1: Collect and condition the sample.

[0136] The AC synchronization reference signal from the excitation power input side is acquired, and the AC synchronization reference signal is conditioned and sampled to form the original synchronization sampling sequence.

[0137] The main components executing this step are the synchronization signal input unit 1, the signal conditioning unit 2, and the sampling conversion unit 3.

[0138] The purpose of step 1 is to provide the original synchronous sampling sequence with sampling time information for subsequent extraction of candidate synchronization edges and extraction of local waveform features.

[0139] Step 1 introduces the phase information carried by the AC voltage on the excitation power supply input side to the control side and converts it into processable digital sampled data. Specifically, the synchronization signal input unit 1 acquires the three-phase AC synchronization reference signals (A, B, and C) from the excitation power supply input side; the signal conditioning unit 2 performs isolation, voltage reduction, amplitude limiting, and filtering on the three synchronization signals respectively; and the sampling conversion unit 3 samples the conditioned three synchronization signals at a preset sampling frequency to form three original synchronization sampling sequences with sampling time information. The preset sampling frequency should satisfy the requirement of having enough sampling points within one fundamental frequency period to retain the local waveform morphology of the candidate synchronization edge neighborhood. The specific frequency can be determined based on the fundamental frequency and the expected shortest duration of the distortion event.

[0140] Step 1 takes AC voltage from the excitation power supply input side as input and outputs the original synchronization sampling sequence as output. The subsequent trigger action is to pass the original synchronization sampling sequence to Step 2. In abnormal operating conditions, such as when a phase synchronization reference signal is missing or the signal conditioning unit 2 outputs abnormally, this can be identified and marked using conventional signal validity verification mechanisms, and the pseudo-synchronization point processing logic in subsequent Step 5 will handle the corresponding processing. Step 1 provides the basic data source for subsequent steps and forms a data flow connection with Step 2.

[0141] Step 2: Identify candidate synchronization edges Identify candidate synchronization edges from the original synchronization sampling sequence.

[0142] The main body executing this step is the candidate synchronization edge extraction unit 4, which is executed after the original synchronization sampling sequence is output in step 1.

[0143] Step 2 aims to uniformly mark all possible zero-crossing points, flip edges, or phase crossover points corresponding to synchronization positions in the original synchronization sampling sequence as candidate synchronization edges, which will be used as the objects to be judged in subsequent steps 3 and 4. Specifically, the candidate synchronization edge extraction unit 4 identifies sign change points, level limit crossing points (i.e., events where the sampled value crosses the judgment band near the preset zero level) or flip points of the corresponding channel comparator output for each original synchronization sampling sequence, marking the identification results as candidate synchronization edges (A1, A2), along with the corresponding sampling segment. The judgment condition is: when the signs of two adjacent sampled values ​​change, or the sampled value crosses the judgment band near the preset zero level, or the corresponding channel comparator output flips, that position is identified as a candidate synchronization edge.

[0144] Step 2 takes the original synchronization sampling sequence output from Step 1 as input and processes the relationship between adjacent sample values ​​or the corresponding channel comparator output within this sequence. The output consists of candidate synchronization edge moments and their corresponding sampling segments. The subsequent trigger action is to pass the candidate synchronization edge along with its corresponding sampling segment to Step 3. In abnormal operating conditions, such as when no candidate synchronization edge is detected within a certain period, a "no candidate" event is recorded and handled by the exception handling logic in Step 5. Step 2 establishes a data flow connection with Step 1 and an object transfer relationship with Step 3.

[0145] Step 3: Extract local waveform features.

[0146] A forward time window 51 and a backward time window 52 are established with the time of the candidate synchronization edge as the center, and local waveform features are extracted within the forward time window 51 and the backward time window 52.

[0147] The main body responsible for this step is the local waveform feature extraction unit 5.

[0148] The purpose of step 3 is to supplement the neighborhood morphological information of the single-point detection result, so that the subsequent synchronization validity determination can be performed based on multi-dimensional independent criteria.

[0149] Since the waveform shape, slope and symmetry of the real fundamental synchronization edge in the neighborhood have a verifiable continuous relationship, the neighborhood shape cannot be captured based on single-point information. Therefore, the specific implementation of step 3 is as follows: the local waveform feature extraction unit 5 takes each candidate synchronization edge time as the center, selects a first time width forward to form a forward time window 51, selects a second time width backward to form a backward time window 52, ​​and extracts at least one of the following local waveform features in the forward and backward time windows: (1) the time interval between the current candidate synchronization edge and the previous one that was determined to be a valid synchronization edge; (2) the slope of the sampling value in the neighborhood of the candidate synchronization edge; (3) the amplitude continuity of the sampling value before and after the candidate synchronization edge; (4) the symmetry of the waveform before and after the candidate synchronization edge; (5) the deviation between the position of the candidate synchronization edge and the predicted position of the fundamental trend based on the historical valid synchronization edge.

[0150] The principles for determining the first and second time widths are: they should be greater than the expected duration of a single distortion event and less than half a fundamental frequency period; the specific values ​​are determined by the main distortion mode of the application scenario. The specific calculation methods for each local waveform feature are as follows: the time interval is calculated by the difference between the current candidate synchronization edge time and the previous valid synchronization edge time stored in the running status recording unit 10; the slope of the sampling value is obtained by the difference between adjacent sampling values ​​within the preceding and following time windows; the amplitude continuity is obtained by the difference in the maximum amplitude between several adjacent sampling values; the symmetry is measured by the difference between the sampling value sequence within the forward time window 51 and the sampling value sequence within the backward time window 52; the fundamental frequency trend deviation is obtained by the difference between the current candidate synchronization edge position and the fundamental frequency trend prediction position extrapolated from the historical valid synchronization edge.

[0151] Step 3 takes the candidate synchronization edge moments and their corresponding sampling segments output from Step 2 as input, processes the sets of sampled values ​​within the forward time window 51 and the backward time window 52, ​​and outputs local waveform feature data. The subsequent trigger action is to pass the local waveform feature data to Step 4. In abnormal operating conditions, such as insufficient sampled data within the forward and backward time windows, Step 3 can output an incomplete feature flag, which Step 4 will treat as an invalid candidate synchronization edge. Step 3 establishes an object transfer relationship with Step 2 and a criterion transfer relationship with Step 4.

[0152] Step 4: Determine if it is a valid synchronization edge.

[0153] Determine whether a candidate synchronization edge is a valid synchronization edge based on local waveform characteristics.

[0154] The entity responsible for executing this step is the synchronization validity determination unit 6.

[0155] The purpose of step 4 is to make a comprehensive judgment on the candidate synchronization edge based on the multidimensional local waveform characteristics, and to distinguish between the true fundamental synchronization position and the false edge induced by distortion.

[0156] Based on the joint evaluation of multiple conditions or a reliable scoring method, the credibility of the candidate synchronization edge can be comprehensively evaluated on multiple feature dimensions, avoiding misjudgment under boundary conditions by a single threshold. Therefore, the specific implementation of step 4 is as follows: The synchronization validity determination unit 6 uses a joint evaluation of multiple conditions or a reliable scoring method to determine whether the candidate synchronization edge is a valid synchronization edge. The judgment conditions are as follows: (1) Under the joint evaluation of multiple conditions, when the local waveform features of the candidate synchronization edge simultaneously meet multiple preset feature conditions, it is determined to be a valid synchronization edge; otherwise, it is determined to be an invalid candidate synchronization edge. The multiple feature conditions include, for example, the time interval feature falls within the allowable deviation range, the slope feature falls within the allowable slope range, and the amplitude continuity feature does not exceed the allowable threshold of amplitude continuity; (2) Under the reliable scoring method, multiple features in the local waveform feature are assigned weights and weighted summation is performed to obtain the score value. The preset valid threshold is higher than the preset invalid threshold; when the score value S is not lower than the valid threshold, it is determined as a valid synchronization edge; when the score value S is lower than the invalid threshold, it is determined as an invalid candidate synchronization edge; when the score value S is lower than the valid threshold but not lower than the invalid threshold, the correction pending result is output.

[0157] The output of step 4 is one of the following: valid synchronization edge flag, invalid candidate synchronization edge flag, or correction pending flag. The subsequent triggering action is as follows: when the output is a valid synchronization edge flag, the candidate synchronization edge is passed to step 6 as a valid synchronization edge B1; when the output is an invalid candidate synchronization edge flag or a correction pending flag, the candidate synchronization edge is passed to step 5.

[0158] In abnormal operating conditions, such as incomplete local waveform feature data or abnormal scoring process, step 4 can default the corresponding candidate synchronization edge as an invalid candidate synchronization edge and hand it over to step 5 for continued execution. A criterion transit relationship is formed between step 4 and step 3, and a result branch relationship is formed between step 4 and steps 5 and 6.

[0159] Step 5: Pseudo-synchronization point processing.

[0160] Candidate synchronization edges that are deemed invalid are removed, or a corrected synchronization position B2 is generated based on historical valid synchronization edges or fundamental frequency trends.

[0161] The entity responsible for executing this step is the pseudo-synchronization point processing unit 7.

[0162] The purpose of step 5 is to maintain the continuity of the synchronization reference by correcting the synchronization position while eliminating pseudo-synchronization points, so as to avoid the synchronization reference from being interrupted or jumping in the short-term distortion interval. The specific implementation method is as follows: the pseudo-synchronization point processing unit 7 performs at least one of the following processes on the candidate synchronization edge that is determined to be invalid: (1) eliminate the candidate synchronization edge, that is, do not output the corresponding position to step 6; (2) replace the candidate synchronization edge with the predicted synchronization position calculated based on the adjacent valid synchronization edge, that is, calculate the predicted synchronization position as the corrected synchronization position B2 based on the time of the last valid synchronization edge and the fundamental period estimate; (3) correct the position of the candidate synchronization edge according to the fundamental trend fitting result, that is, based on several historical valid synchronization edges saved by the running status recording unit 10, obtain the fundamental trend of the current period through linear extrapolation, least squares fitting or moving average, and correct the candidate synchronization edge position as the corrected synchronization position B2 accordingly.

[0163] Furthermore, when the number of consecutive invalid candidate synchronization edges reaches a preset anomaly count threshold, step 5 further outputs a synchronization anomaly status. The preset anomaly count threshold can be determined based on a trade-off between the timeliness of the anomaly response and the false alarm rate, and can be selected, for example, between 3 and several cycles.

[0164] The input objects for step 5 are the judgment result output from step 4 and the historical valid synchronization edge and historical period relationship data fed back by the running status recording unit 10. The output objects are the valid synchronization edge B1, the corrected synchronization position B2, or the synchronization abnormal state. The subsequent triggering action is to pass the above output objects to step 6.

[0165] In abnormal operating conditions, such as when the operating status recording unit 10 has not yet saved enough historical valid synchronization edges, step 5 can preferentially use the adjacent cycle prediction substitution method to generate the corrected synchronization position; when there are enough historical valid synchronization edges, the fundamental trend fitting method can be used to generate the corrected synchronization position. Step 5 and step 4 form a result branch connection, and step 6 forms an object transfer relationship.

[0166] Step 6: Generate a synchronization reference signal.

[0167] A synchronization reference signal C1 is generated based on the valid synchronization edge B1 or the corrected synchronization position B2. In this embodiment, step 6 further includes: attaching a validity flag C2 while generating the synchronization reference signal C1. The validity flag C2 includes at least three states: valid, corrected valid, and abnormal.

[0168] The entity responsible for executing this step is the synchronous reference generation unit 8.

[0169] The technical objective of step 6 is to generate a synchronization reference signal that can be directly used by subsequent control links based on the valid synchronization edge or corrected synchronization position output in step 5, and to enable subsequent control links to distinguish the source of the synchronization reference through a validity flag. The specific implementation is as follows: The synchronization reference generation unit 8 generates a synchronization reference signal C1 based on the time information of the valid synchronization edge B1 or the corrected synchronization position B2. The synchronization reference signal C1 can be represented as one or more of the following: a synchronization pulse, a phase angle reference value, a sampling window start point, a trigger control timing reference value, or a timestamp. The synchronization reference generation unit 8 adds a validity flag C2 according to the following rules: a valid status flag is added to the synchronization reference signal generated based on the valid synchronization edge B1; a corrected valid status flag is added to the synchronization reference signal generated based on the corrected synchronization position B2; when the number of consecutive invalid candidate synchronization edges reaches a preset abnormal count threshold, or when a synchronization reference signal cannot be generated based on the valid synchronization edge or the corrected synchronization position, an abnormal status flag is added.

[0170] The input objects for step 6 are the valid synchronization edge B1, the corrected synchronization position B2, or the synchronization anomaly state output from step 5, and the output object is the synchronization reference signal C1 with the validity flag C2. The subsequent triggering action is to pass the synchronization reference signal C1 and the validity flag C2 together to step 7. An object transfer relationship is formed between step 6 and step 5, and a data flow connection relationship is formed between step 6 and step 7.

[0171] Step 7: Output to subsequent control circuits.

[0172] The synchronization reference signal C1 is output to the subsequent control stage of the excitation power supply. The subsequent control stage includes at least one of the following: trigger control stage, sampling window configuration stage, and control calculation timing generation stage.

[0173] In this embodiment, step 7 further includes: outputting the synchronization reference signal C1 and the validity flag C2 together to the subsequent control link, so that the subsequent control link can differentiate the use of the synchronization reference signal C1 according to the status of the validity flag C2.

[0174] The main body responsible for executing this step is the excitation control interface unit 9.

[0175] Step 7 aims to provide the synchronization reference signal and validity flag together to the subsequent control stage, enabling the stage to take appropriate differentiated actions based on the status of the validity flag. Specifically, the excitation control interface unit 9 outputs the synchronization reference signal C1 and the validity flag C2 to the subsequent control stage via a digital I / O interface, timer trigger interface, or communication bus interface (such as a CAN bus interface, RS485 bus interface, SPI bus interface, EtherCAT bus interface, or industrial Ethernet interface). The differentiated actions taken by the subsequent control stage include: when the validity flag C2 is valid or corrected to valid, the subsequent control stage executes corresponding trigger control, sampling window configuration, or control calculation timing generation based on the synchronization reference signal C1; when the validity flag C2 is abnormal, the subsequent control stage performs at least one of the following actions: amplitude limiting, maintaining the trigger parameters of the previous cycle, or prohibiting triggering.

[0176] Step 7 takes the synchronization reference signal C1 and validity flag C2 output from step 6 as inputs and outputs interface signals for subsequent control loops. In abnormal operating conditions, such as when communication with subsequent control loops is interrupted, the conventional watchdog mechanism can serve as an auxiliary protection measure. Step 7 is the output loop, forming a data flow connection with step 6 and establishing a connection with subsequent control loops through differentiated adoption relationships.

[0177] Example 3: The system described in Example 1 and the method described in Example 2 are applied to a three-phase static excitation power supply that uses the AC side synchronization signal as the timing reference for the triggering of the thyristor. This example illustrates the processing procedure under the commutation gap condition.

[0178] like Figure 5 As shown, assume that the AC voltage of phase A on the input side of the excitation power supply experiences a duration of approximately [duration missing] during the commutation process of a high-power load on the same bus. The commutation gap. The specific handling process is as follows: Step 1: The synchronization signal input unit 1 receives the phase A AC synchronization reference signal through the phase A synchronization input terminal 11. The signal conditioning unit 2 performs isolation, voltage reduction, amplitude limiting and filtering on the phase A AC synchronization reference signal. The sampling conversion unit 3 forms the phase A original synchronization sampling sequence based on the processed phase A synchronization signal.

[0179] Step 2: The candidate synchronization edge extraction unit 4 identifies two candidate synchronization edges within the current sampling period. The additional flip edge generated by the commutation gap edge is marked as candidate synchronization edge A2, and the flip edge generated near the zero crossing of the true fundamental wave is marked as candidate synchronization edge A1.

[0180] Step 3: The local waveform feature extraction unit 5 establishes a forward time window 51 and a backward time window 52 centered on the candidate synchronization edge A1 and the candidate synchronization edge A2, respectively, and extracts local waveform features such as time interval, edge slope and amplitude continuity in the corresponding forward time window 51 and backward time window 52.

[0181] Step 4: Synchronization validity determination unit 6 determines the synchronization validity of candidate synchronization edge A2. Since the time interval between candidate synchronization edge A2 and the previous valid synchronization edge deviates significantly from half a fundamental period, and there are amplitude jumps and slope anomalies in the neighborhood of candidate synchronization edge A2, candidate synchronization edge A2 is determined to be an invalid candidate synchronization edge. Synchronization validity determination unit 6 then determines the synchronization validity of candidate synchronization edge A1. Since candidate synchronization edge A1 satisfies the conditions of period consistency, continuous slope change, and amplitude continuity, candidate synchronization edge A1 is determined to be a valid synchronization edge.

[0182] Step 5: The pseudo-synchronization point processing unit 7 performs elimination processing on the candidate synchronization edge A2 and outputs the candidate synchronization edge A1 as the valid synchronization edge B1.

[0183] Step 6: The synchronization reference generation unit 8 generates a synchronization reference signal C1 based on the valid synchronization edge B1, and adds a validity flag C2 indicating the valid state to the synchronization reference signal C1.

[0184] Step 7: The excitation control interface unit 9 outputs the synchronization reference signal C1 and the validity flag C2 to the thyristor trigger control circuit, so that the thyristor trigger control circuit generates a trigger pulse according to the synchronization reference signal C1 and the validity flag C2.

[0185] Through the above processing, the triggering action in the current sampling period is no longer affected by the candidate synchronization edge A2 generated by the commutation gap edge and judged as invalid, thereby reducing the risk of trigger angle deviation and sampling window misalignment.

[0186] Example 4: This example provides a preferred implementation of a synchronization validity determination method based on multi-feature weighted scoring. The synchronization validity determination unit 6 is implemented using a reliable scoring method. The synchronization validity determination unit 6 assigns weights to the time interval feature, edge slope feature, amplitude continuity feature, local waveform symmetry feature, and fundamental wave trend deviation feature, and obtains a reliable score value S for the candidate synchronization edge through weighted summation. When the score value S is not lower than a preset effective threshold, the candidate synchronization edge is determined to be a valid synchronization edge; when the score value S falls into the correction pending interval between the preset effective threshold and the preset invalid threshold, it is determined to be pending correction, and the pseudo-synchronization point processing unit 7 generates a corrected synchronization position B2 based on the historical periodic relationship or the fundamental wave trend fitting result; when the score value S is lower than the preset invalid threshold, it is directly determined to be an invalid candidate synchronization edge and is eliminated.

[0187] The weight configuration can be adjusted according to the main distortion modes of the excitation power supply application scenario. In scenarios where commutation of high-power loads on the same bus is the main distortion source, the weights corresponding to time interval characteristics and local waveform symmetry characteristics can be relatively increased; in scenarios where high-frequency harmonic superposition is the main distortion source, the weights corresponding to edge slope characteristics and amplitude continuity characteristics can be relatively increased. Conventional weight tuning methods in this field (such as offline tuning based on measured waveform data and online recursive tuning based on operational data) can all be used as specific implementation methods for weight configuration.

[0188] Through this preferred embodiment, the synchronization validity determination logic can remain stable under various distortion conditions and has the ability to adapt to different application scenarios.

[0189] Example 5: This example provides a modified implementation of a single-phase excitation power supply, applied to the acquisition and processing of synchronization signals for a single-phase excitation power supply. In this modified implementation, the synchronization signal input unit 1 includes only one AC synchronization input terminal, electrically connected to the AC voltage sampling point on the single-phase input side of the excitation power supply; the composition, connection relationship, and processing flow of the remaining units (signal conditioning unit 2, sampling conversion unit 3, candidate synchronization edge extraction unit 4, local waveform feature extraction unit 5, synchronization validity determination unit 6, pseudo-synchronization point processing unit 7, synchronization reference generation unit 8, excitation control interface unit 9, and operating status recording unit 10) are consistent with those of Example 1.

[0190] Since the three-way mutual verification mechanism is no longer available in a single-phase scenario, the local waveform feature extraction unit 5 in this modified embodiment can appropriately increase the weight of the fundamental wave trend deviation feature during feature extraction, and enhance the ability to identify pseudo-synchronization points under single-phase input by using the trend fitting results of multiple historical effective cycles saved by the running status recording unit 10. The remaining processing logic is consistent with that in Embodiment 1.

[0191] Example 6: This example provides a modified implementation of a hardware pipeline based on a field-programmable logic device (FPGA). The candidate synchronization edge extraction unit 4, the local waveform feature extraction unit 5, the synchronization validity determination unit 6, the pseudo-synchronization point processing unit 7, and the synchronization reference generation unit 8 are implemented by the hardware pipeline module within the FPGA. Specifically, the candidate synchronization edge extraction unit 4 is implemented using digital comparison and edge detection logic; the local waveform feature extraction unit 5 is implemented using a sliding window register and digital arithmetic logic; the synchronization validity determination unit 6 is implemented using threshold comparison and logic operation circuitry; the pseudo-synchronization point processing unit 7 is implemented using a lookup table or state machine; and the synchronization reference generation unit 8 is implemented using a timer and pulse generation circuitry.

[0192] The execution results of each processing logic in this modified embodiment are consistent with those in Embodiment 1. The difference lies in improving the real-time performance of the synchronization reference generation through a hardware pipeline approach, which is suitable for application scenarios with high requirements for the real-time performance of the synchronization reference generation.

[0193] Example 7: This example provides various implementation methods for handling boundary conditions and abnormal operating conditions. The corresponding implementation methods are as follows.

[0194] Initial start-up boundary: When the system is just started and the running status recording unit 10 has not yet saved the historical valid synchronization edges, in the first few fundamental frequency cycles, all candidate synchronization edges that meet the basic conditions (i.e., the time interval and slope characteristics are within the allowable range) can be judged as valid synchronization edges to establish an initial historical benchmark; after the running status recording unit 10 has saved enough historical valid synchronization edges, the complete multi-condition joint judgment or reliable scoring judgment logic is then enabled.

[0195] Frequency offset boundary: When the input AC voltage frequency deviates from the rated fundamental frequency for a short period of time (such as power grid frequency fluctuations) but is still within the allowable range, the allowable deviation range of the time interval characteristic is dynamically adjusted according to the current estimated period. The current estimated period can be obtained by the average time interval between the most recent multiple effective synchronization edges stored in the operation status recording unit 10, so as to avoid misjudgment caused by period changes.

[0196] Multiple distortion superposition boundary: When spikes, commutation gaps and harmonics coexist, the synchronization validity determination unit 6 can prioritize the use of a reliable scoring method rather than a multi-condition joint determination method, so as to avoid misjudgment directly caused by the failure of any single feature condition.

[0197] Continuous invalid boundary: When the number of consecutive invalid candidate synchronization edges reaches a preset abnormality count threshold, the pseudo-synchronization point processing unit 7 outputs a synchronization abnormality state, the synchronization reference generation unit 8 adds a corresponding validity flag C2 for the abnormality state, and the excitation control interface unit 9 instructs the subsequent control loop to perform at least one of the following: amplitude limiting, maintaining the trigger parameters of the previous cycle, or prohibiting triggering. This mechanism avoids the continuous use of a corrected synchronization position that deviates from the true fundamental phase as the synchronization reference under long-term distortion conditions.

[0198] Signal loss boundary: When the input AC voltage is completely lost or the amplitude is insufficient to support sampling conversion, this situation is not the main processing object of the candidate synchronization edge verification and correction synchronization position generation mechanism in this embodiment, and can be handled by other independent power protection and fault identification mechanisms of the system; the synchronization reference generation mechanism described in this invention does not replace other independent power protection and fault identification mechanisms, and the synchronization abnormal state output is only used as one of the decision bases for subsequent excitation control.

[0199] Example 8: Based on the system provided in Example 1 and the method provided in Example 2, this example provides a computer device that executes the method described in Example 2 or any other method that may involve the method described in Example 2. The device includes a memory, a processor, and a transceiver connected in sequence. The memory stores a computer program, the transceiver sends and receives messages, and the processor reads the computer program and executes the method described in Example 2 or any other method that may involve the method described in Example 2. Specifically, the memory may include, but is not limited to, random-access memory (RAM), read-only memory (ROM), flash memory, first-in-first-out (FIFO) memory, and / or last-in-first-out (FILO) memory, etc.; the processor may include, but is not limited to, a microprocessor of the STM32F105 series. Furthermore, the computer device may also include, but is not limited to, a power module, a display screen, and other necessary components.

[0200] The working process, working details and technical effects of the aforementioned computer device provided in this embodiment can be found in the method described in Embodiment 2 or any method that may involve the method described in Embodiment 1, and will not be repeated here.

[0201] Example 9: This example provides a computer-readable storage medium that stores instructions that include the method described in Example 2 or any other method that may involve the method described in Example 2. Specifically, the computer-readable storage medium stores instructions that, when executed on a computer, perform the method described in Example 2 or any other method that may involve the method described in Example 2. The computer-readable storage medium refers to a data storage medium, which may include, but is not limited to, floppy disks, optical disks, hard disks, flash memory, USB flash drives, and / or Memory Sticks. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.

[0202] The working process, working details and technical effects of the aforementioned computer-readable storage medium provided in this embodiment can be found in the method described in Embodiment 2 or any method that may be related to Embodiment 2, and will not be repeated here.

[0203] Example 10: This example provides a computer program product containing instructions that, when executed on a computer, cause the computer to perform the method described in Example 2 or any method that may involve the method described in Example 2. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device.

[0204] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A system for acquiring and processing synchronous signals of an excitation power supply, characterized in that, include: Synchronization signal input unit, used to receive AC synchronization reference signal from the excitation power supply input side; The signal conditioning unit, connected to the synchronization signal input unit, is used to convert the AC synchronization reference signal into a synchronization signal suitable for sampling. The sampling conversion unit, connected to the signal conditioning unit, is used to sample the synchronization signal suitable for sampling to form the original synchronization sampling sequence; The candidate synchronization edge extraction unit, connected to the sampling conversion unit, is used to identify candidate synchronization edges from the original synchronization sampling sequence; The local waveform feature extraction unit is connected to the candidate synchronization edge extraction unit. It is used to establish a time window before and after the candidate synchronization edge with the time of the candidate synchronization edge as the center, and extract local waveform features within the time window before and after the candidate synchronization edge. The synchronization validity determination unit is connected to the local waveform feature extraction unit and is used to determine whether the candidate synchronization edge is a valid synchronization edge based on the local waveform features. The pseudo-synchronization point processing unit, connected to the synchronization validity determination unit, is used to output the candidate synchronization edge that is determined to be valid as a valid synchronization edge, and to remove the candidate synchronization edge that is determined to be invalid, or to generate a corrected synchronization position based on historical valid synchronization edges or fundamental frequency trends. A synchronization reference generation unit, connected to a pseudo-synchronization point processing unit, is used to generate a synchronization reference signal based on the effective synchronization edge or the corrected synchronization position. The excitation control interface unit is connected to the synchronization reference generation unit and is used to output the synchronization reference signal to the subsequent control links of the excitation power supply. The subsequent control links include at least one of the following: trigger control link, sampling window configuration link, and control calculation timing generation link.

2. The excitation power supply synchronization signal acquisition and processing system according to claim 1, characterized in that, Local waveform features include the following features At least one of the following: the time interval between the current candidate synchronization edge and the previous one determined to be a valid synchronization edge, the slope of the sampled values ​​in the neighborhood of the candidate synchronization edge, the amplitude continuity of the sampled values ​​before and after the candidate synchronization edge, the symmetry of the waveforms before and after the candidate synchronization edge, and the deviation between the position of the candidate synchronization edge and the predicted position of the fundamental trend calculated based on historical valid synchronization edges.

3. The excitation power supply synchronization signal acquisition and processing system according to claim 1 or 2, characterized in that, The synchronization validity determination unit determines whether a candidate synchronization edge is a valid synchronization edge using a multi-condition joint determination method or a reliable scoring determination method. Specifically, under the multi-condition joint determination method, a candidate synchronization edge is determined to be a valid synchronization edge when its local waveform features simultaneously satisfy multiple preset feature conditions. Under the reliable scoring determination method, multiple features in the local waveform features are assigned weights and summed to obtain a score value. A valid threshold and an invalid threshold are preset, with the invalid threshold being lower than the valid threshold. When the score value is not lower than the valid threshold, it is determined to be a valid synchronization edge. When the score value is lower than the invalid threshold, it is determined to be an invalid candidate synchronization edge. When the score value is lower than the valid threshold but not lower than the invalid threshold, a correction pending result is output and passed to the pseudo-synchronization point processing unit for correction processing.

4. The excitation power supply synchronization signal acquisition and processing system according to claim 1, characterized in that, The pseudo-synchronization point processing unit processes candidate synchronization edges that are determined to be invalid by performing at least one of the following processes: removing the candidate synchronization edge; replacing the candidate synchronization edge with a predicted synchronization position calculated based on adjacent valid synchronization edges; And the position of the candidate synchronization edge is corrected based on the fundamental wave trend fitting results.

5. The excitation power supply synchronization signal acquisition and processing system according to claim 1, characterized in that, The synchronization reference generation unit is also used to attach a validity flag when generating the synchronization reference signal; Validity indicators should include at least the following three states: valid, corrected valid, and abnormal; Additional validity flags include: a flag indicating the validity status of the synchronization reference signal generated based on the valid synchronization edge; a flag indicating the corrected validity status of the synchronization reference signal generated based on the corrected synchronization position; and a flag indicating the abnormal status of the synchronization reference generation unit when the number of consecutive invalid candidate synchronization edges reaches a preset abnormality count threshold, or when the synchronization reference signal cannot be generated based on the valid synchronization edge or the corrected synchronization position.

6. The excitation power supply synchronization signal acquisition and processing system according to claim 5, characterized in that, The excitation control interface unit is also used to perform the following operations based on the validity flag: when the validity flag is valid, the synchronization reference signal is output to the subsequent control circuit; When the validity flag indicates that the correction is valid, the synchronization reference signal, along with the flag indicating the valid correction status, will be output to the subsequent control circuit. When the validity flag is abnormal, the abnormal status is output to the subsequent control loop, and the subsequent control loop is instructed to perform at least one of the following: limit the amplitude, maintain the trigger parameters of the previous cycle, or prohibit the triggering process.

7. The excitation power supply synchronization signal acquisition and processing system according to claim 1, characterized in that, The signal conditioning unit includes an electrical isolation subunit and an amplitude conditioning subunit. The electrical isolation subunit is used to form electrical isolation between the input side of the synchronization signal input unit and the sampling conversion unit. The amplitude conditioning subunit is connected to the electrical isolation subunit and is used to step down, limit, and filter the electrically isolated synchronization signal before outputting it to the sampling conversion unit.

8. The excitation power supply synchronization signal acquisition and processing system according to claim 1, characterized in that, The synchronization signal input unit includes three synchronization input terminals corresponding to the three-phase AC voltage; the three synchronization input terminals are electrically connected to the three-phase AC voltage sampling points on the excitation power supply input side; the signal conditioning unit, sampling conversion unit, candidate synchronization edge extraction unit, local waveform feature extraction unit, and synchronization validity determination unit process the synchronization signals from the three synchronization input terminals respectively.

9. The excitation power supply synchronization signal acquisition and processing system according to claim 1, characterized in that, The excitation power supply synchronization signal acquisition and processing system also includes an operation status recording unit; the operation status recording unit is connected to the candidate synchronization edge extraction unit, the synchronization validity determination unit, the pseudo synchronization point processing unit and the synchronization reference generation unit respectively, and is used to save the candidate synchronization edge time, the local waveform characteristics, the validity determination result, the pseudo synchronization point processing method and the synchronization reference output result; the pseudo synchronization point processing unit is used to output the synchronization abnormality status when the number of consecutive invalid candidate synchronization edges reaches the preset abnormal count threshold.

10. A method for acquiring and processing excitation power supply synchronization signals, characterized in that, Includes the following steps: S1, acquire the AC synchronization reference signal from the excitation power input side, and condition and sample the AC synchronization reference signal to form the original synchronization sampling sequence; S2, Identify candidate synchronization edges from the original synchronization sampling sequence; S3, establish a preceding and following time window centered on the time of the candidate synchronization edge, and extract local waveform features within the preceding and following time windows; S4, determine whether the candidate synchronization edge is a valid synchronization edge based on the local waveform characteristics; S5, remove candidate synchronization edges that are deemed invalid, or generate a corrected synchronization position based on historical valid synchronization edges or fundamental wave trends; S6 generates a synchronization reference signal based on the effective synchronization edge or the corrected synchronization position; S7 outputs the synchronization reference signal to the subsequent control stage of the excitation power supply; the subsequent control stage includes at least one of the following: trigger control stage, sampling window configuration stage, and control calculation timing generation stage.

11. The method for acquiring and processing excitation power supply synchronization signals according to claim 10, characterized in that, In S3, the local waveform features include the following features: At least one of the following: the time interval between the current candidate synchronization edge and the previous one determined to be a valid synchronization edge, the slope of the sampled values ​​in the neighborhood of the candidate synchronization edge, the amplitude continuity of the sampled values ​​before and after the candidate synchronization edge, the symmetry of the waveforms before and after the candidate synchronization edge, and the deviation between the position of the candidate synchronization edge and the predicted position of the fundamental trend based on the historical valid synchronization edges. S4 specifically involves determining whether the candidate synchronization edge is a valid synchronization edge based on local waveform characteristics using a multi-condition joint determination method or a reliable scoring determination method.

12. The method for acquiring and processing excitation power supply synchronization signals according to claim 10 or 11, characterized in that, S5 includes: for candidate synchronization edges that are determined to be invalid, performing at least one of the following operations: removing invalid candidate synchronization edges, replacing invalid candidate synchronization edges with predicted synchronization positions calculated based on adjacent valid synchronization edges, and correcting the positions of invalid candidate synchronization edges according to the fundamental trend fitting results, and outputting a synchronization anomaly status when the number of consecutive invalid candidate synchronization edges reaches a preset anomaly count threshold.

13. The method for acquiring and processing excitation power supply synchronization signals according to claim 10, characterized in that, S6 also includes: attaching a validity flag while generating the synchronization reference signal; the validity flag includes at least the following three states: valid, corrected valid, and abnormal; S7 also includes: outputting the synchronization reference signal and validity flag together to the subsequent control link, so that the subsequent control link can differentiate the use of the synchronization reference signal according to the status of the validity flag.

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