Automatic optimization method and system for communication semantics carrying template computing core
By using the compiler instruction parsing and kernel identification module, an intermediate representation is generated and a safe rewriteability check is performed. This solves the problem of mixed boundary condition handling and ghost area data exchange in the Stencil computing kernel, achieves high-performance code generation and scheduling optimization, reduces the risk of out-of-bounds memory access, and improves the reproducibility of optimization results.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NANJING UNIV
- Filing Date
- 2026-03-05
- Publication Date
- 2026-07-03
AI Technical Summary
In existing technologies, the boundary condition processing, ghost area data exchange, and framework control logic of the Stencil computing core are mixed together, making it difficult to stably extract the internal computing domain. Furthermore, boundary branch rewriting is prone to causing out-of-bounds memory access and semantic inconsistencies, making it difficult to achieve high-performance code generation and scheduling optimization.
Through the compiler instruction parsing and kernel identification module, the Stencil compute kernel area and ghost area data exchange area are identified, and label matching and structural constraint verification are performed to generate intermediate representations. The system performs safe rewriteability checks and boundary control flow processing to generate deterministic scheduling policies, automatically generate high-performance backend code, and roll back when it is not feasible.
It enables the automatic extraction of Stencil computation kernels without changing the original computation code framework, ensuring boundary safety, reducing the risk of out-of-bounds memory access, improving the reproducibility and reliability of optimization results, supporting partial replacement and overlapping execution, and reducing the cost of manual rewriting.
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Figure CN122331900A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to an automatic optimization method and system for template computation kernels carrying communication semantics based on compiler instructions, belonging to the field of compiler and program optimization technology. Background Technology
[0002] Numerical solutions to partial differential equations are widely used in scientific computing and engineering simulation, including fluid mechanics, heat conduction, electromagnetic fields, structural mechanics, and geophysics. These numerical solution programs extensively employ structured grids or regular discretization, repeatedly executing local neighborhood operator calculations, i.e., stencil calculations, during time-progression or iterative solutions. This involves reading data from several locations within a fixed neighborhood of a grid point and writing back the output of the current point, thereby expressing the discretized differential operators, local updates, or core calculations such as matrix-vector multiplication.
[0003] Although relevant solution frameworks and libraries offer comprehensive capabilities in numerical methods, solver combination, and parallel communication, stencil computation is often a key performance bottleneck in engineering practice. Stencil computation is characterized by a regular iteration space, neighborhood access, and high bandwidth pressure. Furthermore, it is frequently intertwined with boundary condition handling, boundary exchange zone data synchronization, and framework control logic within the same codebase. This coupling makes it difficult to reliably identify and isolate the "optimizable internal computational region," thus limiting reliable high-performance code generation and scheduling optimization for it.
[0004] Optimizations for Stencil computation typically rely on manual rewriting and parallelization, such as performance improvements through multi-threaded parallelism, vectorization, and block decomposition; or on automatic optimization by a general compiler and static analysis to transform loops. However, such methods often require developers to have strong performance engineering experience, and the cost of adapting to boundary branches, complex control flows, and framework coupling in real-world engineering code is high. On the other hand, attempting to eliminate boundary branches through predicate-based methods (e.g., converting if-else statements into conditional selections) may introduce the risk of out-of-bounds memory access when there are neighbor accesses, making it difficult to guarantee execution safety in engineering scenarios.
[0005] Furthermore, in distributed parallel programs, Stencil computations often overlap with ghost data exchange, but achieving provable domain partitioning and overlapping scheduling requires explicit separation of the internal computation domain from the boundary stripe region, ensuring that the access range after separation is semantically provably safe. Existing methods often lack an automated process that prioritizes correctness and allows for rollback: when safety cannot be proven, aggressive rewriting may still be necessary, or optimization may have to be completely abandoned, leading to difficulties in engineering implementation. Therefore, there is an urgent need for a Stencil computation kernel optimization method that can provide key information through compiler directives, perform provable boundary-safe partitioning at the intermediate representation layer, automatically generate high-performance backend code when conditions are met, and automatically rollback to preserve the original logic when conditions are not met. Summary of the Invention
[0006] Objective: To address the problems in existing technologies where the Stencil computation kernel, boundary condition handling, ghost region data exchange intervals, and framework control logic are intertwined, making it difficult to stably extract optimizable internal computation domains and causing out-of-bounds memory access and semantic inconsistencies due to aggressive rewriting of boundary branches, this invention provides an automatic Stencil computation kernel optimization method and system based on compiler instructions, prioritizing correctness and allowing for rollback. This method achieves automatic kernel extraction, boundary safety, deterministic strategy derivation, Halide pre-compiled code generation, and source-level safe replacement with minimal modifications to the original computation code and framework control logic, thereby reducing manual rewriting costs and improving the reproducibility of optimization results.
[0007] Technical solution: An automatic optimization system for template computation kernels carrying communication semantics based on compiler directives, comprising the following modules: 1) Compiler directive parsing and kernel identification module: The kernel region and ghost region data exchange region are calculated by using the compilation instruction annotation Stencil. Tag pairing, region binding and structural constraint verification are performed. When the structure is consistent, an association tag is established.
[0008] For the target source code where the Stencil computing kernel interval and the ghost region data exchange interval are pre-annotated by the developer through the compilation instructions, the source code syntax scan and compilation instructions parsing are performed first to extract the start and end positions, binding labels, structural constraint parameters and other structured metadata of the two types of intervals. After the parsing is completed, label pairing, interval binding and structural constraint verification are performed on the Stencil computing kernel interval and the ghost region data exchange interval. When the verification is passed and the interval structure is consistent, an association mark is established and sent to the subsequent module for processing.
[0009] 2) Intermediate representation generation and semantic information extraction module: The kernel region is reduced to an intermediate representation (IR), and the semantic information of the Stencil operator is extracted. The semantic information includes at least the output computation domain boundary and the neighborhood radius.
[0010] 3) Safe rewriteability check and boundary control flow processing module: A safe internal computation domain is constructed based on the output computation domain boundary and the neighborhood radius, and a set of boundary regions is generated. The kernel is subjected to a correctness priority check of "process if it can be determined, otherwise skip". If the check passes, boundary control flow stripping and condition lifting are performed to explicitly separate boundary / corner computation from internal domain computation. If the decidability condition is not met, the rewriting is skipped and the original code range is preserved.
[0011] 4) Scheduling calculation, code generation and replacement module: When the provability condition is met, the discrete optimization strategy problem with resource constraints is solved, and the result is attached to the intermediate representation as a deterministic schedule. Based on the intermediate representation with scheduling information, the Halide generator source file and glue code are generated. After subsequent compilation, a pre-compiled kernel is produced, and the kernel intervals of the original program that meet the conditions are replaced with calls to the glue code. If any step fails or the condition is not met, the replacement process of the current kernel is terminated and a rollback operation is performed.
[0012] The implementation of the compiler directive parsing and kernel identification module mentioned in section 1) specifically includes: 11) Calculate the kernel region using paired start / end compiler directives marked with Stencil, and mark the ghost region data exchange region and its association with the kernel region; 12) Perform consistency checks on association markers, nested interval relationships, input / output port declarations, and kernel / halo structure constraints within overlapping intervals; if the check fails, record the reason for the rollback and retain the original code interval.
[0013] The implementation of the intermediate representation generation and semantic information extraction module (2) specifically includes: 21) Reduce the kernel interval to an intermediate representation (IR), and explicitly record the output computation domain boundary and neighborhood radius in the intermediate representation; 22) Construct a safe internal computation domain based on the boundary of the output computation domain and the radius of the neighborhood: Using the output computation domain as a reference, shrink inward in each coordinate direction to the same width as the radius of the neighborhood to obtain the safe internal computation domain; Subtract the safe internal computation domain from the output computation domain to obtain the set of boundary regions, which are used to cover the edge part of the output domain.
[0014] The implementation of the safe rewriteability check and boundary control flow processing module (3) specifically includes: First, a safe rewriteability check is performed on the current kernel segment to be processed. The safe rewriteability check includes at least the following: 311) Boundary predicates belong to the predefined parsable form and can be reduced to a combination of equations and / or inequalities consisting of a circular index and constant boundaries; 312) The memory access index satisfies the form of "iteration variable and constant offset"; 313) The fragment to be rewritten does not contain opaque calls, additional side effects, or complex control flow; 314) It can verify the safety of out-of-bounds access to the neighborhood based on the boundary of the output computation domain and the neighborhood radius; Based on the results of the above safe rewriteability check, boundary control flow processing is performed, which specifically includes: 321) When the current kernel segment to be processed satisfies the safe rewriteability check, identify the boundary predicate of the kernel to be processed and normalize the kernel to be processed into an inner loop segment without boundary predicates and several boundary / corner residual segments. 322) If the current kernel segment to be processed does not meet the safe rewriteability check, skip the splitting and rewriting and preserve the original structure.
[0015] The scheduling calculation in the scheduling calculation, code generation and replacement module mentioned in section 4) includes at least the following: 411) Based on the output computation domain boundary, neighborhood radius, data type byte count, and hardware-related environment variables, deterministic enumeration and resource constraint screening are performed on a fixed candidate set to determine the block parameters, and further determine the vectorization, expansion, parallelization, and rearrangement scheduling parameters to generate scheduling information and attach it to the intermediate representation. 412) Establish a deterministic cost model based on the output domain volume, boundary region volume, number of data bytes exchanged in the ghost area, and hardware-related environmental variables to obtain estimates of internal computation time, boundary computation time, communication time, and splitting overhead; calculate the total time estimates for non-overlapping and overlapping strategies based on the estimates and select the execution strategy accordingly. 413) Output a strategy report file to record the cost model input parameters, estimation results, selected parameters and reasons for selection.
[0016] The code generation in the scheduling calculation, code generation and replacement module mentioned in section 4) includes at least the following: 421) Based on the intermediate representation, the Halide generator source files are generated and subsequently compiled to generate a pre-compiled kernel, corresponding static library, and header files; 422) Generate glue code to construct the buffer description information required for Halide to run, and initialize it in a templated manner, updating the data pointer and necessary range parameters only when called; internal fields and boundary regions call the same pre-compiled kernel through different output range parameters.
[0017] The code replacement in the scheduling calculation, code generation and replacement module mentioned in section 4) includes at least the following: 431) When the overlap strategy is selected and the structural constraints are met, the kernel region is replaced with a fixed execution sequence: ghost region exchange start, internal calculation, ghost region exchange end, boundary region calculation; 433) When the overlap strategy is not selected, no overlap rewriting is performed; instead, kernel computation is replaced by a single Halide call or an equivalent call at the original kernel interval location. 434) Supports partial replacement: the boundary region uses a conservative path or the original logic for computation, while the secure internal computation domain uses the Halide kernel for computation.
[0018] The rollback operation includes at least the following: 51) When any stage of intermediate representation construction, semantic extraction, safe rewriteability check, policy derivation or code generation fails to meet the processing conditions or an error occurs, perform at least one of the following rollback actions: a) skip the replacement and rewriting of the corresponding kernel section and retain the original code; b) terminate the processing and output the error reason. 52) Output a structured log or policy report file for reproduction and diagnosis, wherein the structured log or policy report file records at least the policy parameters, selection results and rollback reasons.
[0019] The automatic optimization method based on compiler directives for template (Stencil) computational kernels carrying communication semantics completes the process of automatic Stencil kernel extraction, boundary safety, and code generation and replacement as follows: Step 1: Parse the compilation instructions in the source code, identify the Stencil computation kernel interval, ghost region data exchange interval and overlapping interval, establish association markers and perform consistency verification; Step 2: Reduce the Stencil computation kernel interval to an intermediate representation (IR), extract the boundary and neighborhood radius of the output computation domain, construct a safe internal computation domain, and generate a set of boundary regions; Step 3: Perform boundary control flow processing on the control flow containing boundary checks, and perform a safe rewriteability check according to the correctness priority principle; if the conditions are not met, backtrack and retain the original code range; Step 4: Select overlapping or non-overlapping execution strategies based on the deterministic cost model, and output a strategy report file; Step 5 generates Halide pre-compiled code, glue code, and build files, and performs safe replacement or partial replacement of the original source code to obtain a compileable and runnable output project.
[0020] The above method is used to implement the above system, which can be deployed in a distributed computing cluster. The cluster includes several computer devices, each of which includes memory, a general-purpose computing processor (CPU), and an optional dedicated accelerator processor (GPU), and stores computer programs that can run on the processor. In the cluster, computer devices communicate with each other via a network in one-to-one, one-to-many, and many-to-many ways. The ghost zone data exchange interval is used to complete boundary data transmission and synchronization during distributed operation. The system achieves overlapping execution of communication and computation when provable conditions are met, while maintaining semantic compatibility of communication calls.
[0021] Compared with the prior art, the present invention has the following characteristics: 1) Correctness first: The rewriteability check is used as a prerequisite. If the condition is not met, the original code range is automatically rolled back to reduce the risk of out-of-bounds memory access and semantic inconsistency. 2) Low intrusion and easy integration: Only a few compilation instructions need to be added to the Stencil computation hotspot area to trigger the automatic process, without the need for large-scale reconstruction of the original solver framework; 3) The project is feasible to implement: the compiler explicitly provides information on the data exchange area between the kernel area and the ghost area through compiler directives, reducing the reliance on heavy static analysis; 4) Reproducible optimization: Strategy derivation is performed using a deterministic time model, and a strategy report is output, making optimization decisions and generated results traceable and reproducible; 5) Automatic code generation: Automatically generates a Halide generator, pre-compiles the kernel, glue code, and source-level replacement results, reducing the cost of manual rewriting; 6) Supports partial replacement and overlapping execution: While adopting a conservative path in the boundary region, the safe internal computing domain is handed over to the high-performance backend for execution, and data exchange and computation overlap are achieved when conditions are met. Attached Figure Description
[0022] Figure 1 This is a schematic diagram of the method principle of an embodiment of the present invention; Figure 2 This is a schematic diagram of the principle of boundary security. Detailed Implementation
[0023] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. After reading the present invention, any modifications of the present invention in various equivalent forms by those skilled in the art will fall within the scope defined by the appended claims.
[0024] An automatic optimization system for template (Stencil) computation kernels carrying communication semantics based on compiler directives includes a compiler directive parsing and kernel identification module, an intermediate representation generation and semantic information extraction module, a safe rewriteability checking and boundary control flow processing module, and a scheduling computation, code generation and replacement module.
[0025] The compiler directive parsing and kernel identification module parses the compiler directives in the source code to identify the Stencil computation kernel regions that need to be automatically extracted and optimized, and to identify the associated ghost region data exchange regions and overlapping regions. In the source code, Stencil computation kernel regions are marked with kernel begin / end compiler directives, ghost region data exchange regions with halo begin / end directives, and overlapping regions with overlapbegin / end directives. Communication regions are bound to kernel regions through tags and kernel(...) and halo(...) clauses in overlap, thus providing a basis for subsequent overlapping execution and safe replacement. The compiler performs consistency checks on the compiler directives, including at least: whether start and end markers appear in pairs, whether associated markers match, whether the nesting relationship of regions satisfies constraints, whether input / output port declarations are complete, and whether kernel / halo within overlapping regions can be uniquely located and in a valid order. When consistency checks fail, the corresponding region is skipped and rewritten, the original code region is preserved, and the reason for the rollback is recorded, thus ensuring the semantic correctness of the program.
[0026] In the intermediate representation generation and semantic information extraction module, intermediate representation construction and semantic domain partitioning are performed on the Stencil computation kernel. The aim is to stably obtain a safe and extractable internal computation region and a conservatively processed boundary region without relying on the specific writing style of the source code. First, the identified Stencil computation kernel interval is reduced to an intermediate representation, and the semantic information of the Stencil computation kernel is read. The semantic information includes at least the output computation domain boundary and the neighborhood radius. Second, based on the output computation domain, a safe internal computation domain is constructed by shrinking inward by the same width as the neighborhood radius in each coordinate direction. The boundary region set is obtained by subtracting the safe internal computation domain from the output computation domain and decomposed into several non-overlapping strips or surface regions. If the safe internal computation domain derived from the output domain and the neighborhood radius is empty, overlapping rearrangement is not performed, and the non-overlapping strategy path is entered.
[0027] In the safe rewriteability check and boundary control flow processing module, the boundary control flow is processed and a safe rewriteability check is performed to ensure "if it can be proven, then do it; otherwise, skip it." To avoid the potential out-of-bounds risks brought about by direct predicate transformation, boundary control flow stripping and condition lifting are performed on control flows containing boundary judgments, explicitly separating boundary / corner residual computation from internal domain computation. The safe rewriteability check includes at least the following: the boundary predicate can be reduced to an equation or inequality combination composed of a loop index and a constant boundary; the memory access index satisfies the form of "iteration variable and constant offset"; the offset magnitude is consistent with the neighborhood radius; the segment to be rewritten does not contain opaque calls, additional side effects, or undecidable complex control flows; and it can be proven that the internal domain neighborhood access does not go out of bounds. If at least one of the aforementioned safe rewriteability checks is not met, the rewrite is skipped and the original code segment is preserved.
[0028] In the scheduling computation, code generation, and replacement modules, the overlap strategy is derived and selected. The aim is to determine, at compile time, in a deterministic manner whether ghost zone data exchange should overlap with internal computation, and how to generate a fixed execution sequence. The derivation is based on a deterministic cost model, with inputs including: output domain lower bound and size, neighborhood radius, element byte count, device peak computing power, memory bandwidth, network bandwidth, network latency, minimum problem size threshold, call overhead, and boundary splitting overhead. These hardware and cost parameters can preferably be configured via environment variables, such as NEPTUNECC_PEAK_FLOP, NEPTUNECC_BW_MEM, NEPTUNECC_BW_NET, NEPTUNECC_NET_LAT, NEPTUNECC_MIN_POINTS, NEPTUNECC_CALL_OVERHEAD_NS, and NEPTUNECC_BOUNDARY_OVERHEAD_PER_ELEM. During strategy derivation, the preferred approach is to first check the modelability prerequisites: single-core single apply, static shape availability, and valid bounds. If these prerequisites are not met, the path is directly determined to be non-overlapping. For modelable cases, the following estimation methods are preferred: calculate the output domain volume and boundary volume, estimate the number of bytes exchanged in the ghost region; estimate the floating-point computation and memory access per point using the number of Stencil neighborhood points, and obtain the internal computation time and boundary computation time respectively; obtain the communication time based on the network model; and obtain the additional overhead based on the number of calls and the boundary scale. Further, the total non-overlapping time and total overlapping time are calculated separately, and the benefits are calculated. If the benefit is positive and the scale meets the threshold, the overlapping strategy is selected; otherwise, the non-overlapping strategy is selected. Preferably, the forced strategy specification is supported through the environment variable NEPTUNECC_FORCE_STRATEGY. When the forced strategy is effective, the specified result is executed. The strategy results are written to a strategy report file to record the input parameters, estimation results, selection reasons, and whether it is a forced strategy.
[0029] This process generates pre-compiled Halide artifacts and performs safe replacements on the original program. First, Halide generator code is generated based on intermediate representations and scheduling information. Subsequent compilation produces a pre-compiled kernel, static libraries, and header files. Second, glue code is generated to construct the buffer descriptions required for Halide execution and updates data pointers and range parameters during calls. Internal domains and boundary regions call the same pre-compiled kernel entry point through different range parameters. Based on the strategy results in the previous section, when the overlap strategy is selected and structural constraints are met, a fixed sequence is executed: "Ghost region data exchange start statement → Internal domain call → Ghost region data exchange end statement → Boundary region call". When the non-overlap strategy is selected, the original order is maintained, and a single Halide call or equivalent call is executed within the original kernel region. If there are recognizable residual boundary copies or corner remnants, partial replacement can be performed; if the partial replacement conditions are not met, the original logic is rolled back. It should be noted that user communication statements within the halo region retain the original program semantics; this method does not rewrite the communication function implementation.
[0030] The system outputs reproducible materials and performs rollback management to support engineering debugging and result reproduction. The output is structured material, including at least: a manifest file (range and label information), a strategy file (strategy model inputs and decision results), glue and rewrite result files; when the debug switch is enabled, extended debug files (such as schedule-related files) can also be output, recording details of domain partitioning, scheduling, and rewrite decisions. When a rollback occurs, the system outputs the rollback stage and the reason for the rollback.
[0031] The specific implementation process of the method is as follows: 1) Parse compiler directives and establish interval associations: 101) Identify the kernel begin / end of the Stencil computation kernel interval and record the port attributes and interval range; 102) Identify the halo begin / end of the data exchange interval in the ghost area and record the associated markers and communication semantics; 103) Identify overlap regions and read kernel / halo binding relationships; 104) Perform a consistency check. If the check fails, mark it as rolled back and retain the original code range.
[0032] 2) Intermediate representation construction and semantic domain partitioning: 201) Reduce the Stencil computation kernel interval to an intermediate representation; 202) Read the output calculation domain boundary and neighborhood radius; 203) Calculate the set of internal computational domains and boundary regions within the security area, and decompose the set of boundary regions into several non-overlapping strips or surface regions; 204) If the internal computation domain of the security is empty, it is marked as a non-overlapping policy path.
[0033] 3) Rewriteability check and control flow processing: 301) Identify boundary predicates and perform boundary control flow stripping and condition lift-out; 302) Check the form of boundary predicates, memory access indexes, consistency between offset and radius, side effects, and complex control flow constraints; 303) If the condition is not met, skip the rewrite and retain the original code range.
[0034] 4) Strategy Derivation and Result Output: 401) Computational Strategy Model Fundamentals: The core fundamental quantities required for deriving the computational scheduling strategy include the output domain size (outExtent), neighborhood radius (radius), number of element bytes (elemBytes), output domain volume (outVolume), boundary volume (boundaryVolume), and number of ghost zone swap bytes (haloBytes). The parameters involved in this step are defined as follows: The computational domain dimension is denoted as rank, with values of 1, 2, and 3, corresponding to one-dimensional (1D), two-dimensional (2D), and three-dimensional (3D) Stencil operations that iterate through the output points using one, two, and three nested loops, respectively; the d-th dimension output domain size is denoted as e_d, which is the component of outExtent in the d-th dimension; the d-th dimension neighborhood radius is denoted as r_d, which is the component of radius in the d-th dimension; one-dimensional (1D) operations use only e0 and r0, two-dimensional (2D) operations use e0, e1, and r0, r1, and three-dimensional (3D) operations use e0, e1, e2, and r0, r1, r2; the currently preferred model uses a Manhattan distance of 1. The Stencil neighborhood has a number of neighborhood points S = 1 + 2 × rank, a floating-point computation per point flopps_per_point = S - 1, and a memory access per point bytes_per_point = elemBytes × (S + 1). When the radius is missing, a default value can be used and this fact can be recorded. Preferably, the default value is set to a neighborhood radius of 1 in each dimension, which is suitable for most conventional Stencil computation scenarios. Preferably, the boundaryVolume is estimated as follows in 1D / 2D / 3D: 1D is min(e0, 2 × r0); 2D is 2 × r0 × e1 + 2 × r1 × max(0, e0 - 2 × r0); 3D is 2 × r2 × e0 × e1 + 2 × r1 × max(0, e0 - 2 × r0) × e2 + 2 × r0 × max(0, e1-2×r1)×max(0,e2-2×r2); haloBytes is preferably obtained by accumulating the data volume of each dimension's two-sided boundary surface and multiplying it by the number of element bytes and the number of ghosted input fields. Preferably, when calculating haloBytes, only the dimensions with neighborhood data communication needs are counted, and the dimensions without access needs are eliminated to reduce estimation redundancy.
[0035] 402) Estimate internal computation time and boundary computation time based on the computational load and memory access load per point, and calculate communication time and overhead time; preferably, the following relationship is adopted: internal computation time is max(internal computation load / peak computing power, internal memory access load / memory bandwidth), and boundary computation time is similar; communication time is network latency + haloBytes / network bandwidth; overhead time is composed of call overhead and boundary splitting overhead. 403) Calculate the total non-overlapping time and the total overlapping time separately. The preferred method is: Total non-overlapping time = Communication time + Internal computation time + Boundary computation time; Total overlapping time = max(Communication time, Internal computation time) + Boundary computation time + Additional overhead time; Benefit = Total non-overlapping time - Total overlapping time. 404) Select a strategy based on decision rules: when the security internal domain is not empty, its size is not less than the threshold, and the benefit is greater than zero, select an overlapping strategy; otherwise, select a non-overlapping strategy; when the environment variable specifies a mandatory strategy, automatically select the strategy according to the mandatory strategy coverage. 405) Output the strategy file and record the domain partitioning results, model input parameters, time estimates, final strategy, reasons for selection, and forced flags.
[0036] 5) Generation and Rewriting: 501) Generate Halide pre-compiled artifacts and wrapper interfaces; 502) Generate glue code and build files, and generate a fixed rewrite sequence; 503) If the rewrite conditions are not met, skip the replacement and retain the original code range.
[0037] Since this invention pertains to a compile-time extraction and generation method for Stencil computation code, the specific implementation method is described below with C / C++ pseudocode examples. The example code demonstrates a two-dimensional five-point Stencil computation kernel, with ghost regions existing before and after the kernel for data exchange, and overlapping rearrangement is allowed.
[0038] Input example code (pseudocode): Line 1, #pragma neptune overlap begin tag(o0) halo(h0) kernel(k0)policy(auto) Line 2, #pragma neptune halo begin tag(h0) dm(da) field(x) kind(global_to_local_begin) Line 3, halo_begin_call(); Line 4, #pragma neptune kernel begin tag(k0) in(x:ghosted) out(y:owned) Line 5, { Line 6, for (i = 1; i < N-1; ++i) Line 7, for (j = 1; j < N-1; ++j) Line 8, y[i][j] = x[i][j] + x[i-1][j] + x[i+1][j] + x[i][j-1] +x[i][j+1]; Line 9,} Line 10, #pragma neptune kernel end tag(k0) Line 11, #pragma neptune halo end tag(h0) kind(global_to_local_end) Line 12, halo_end_call(); Line 13, #pragma neptune overlap end tag(o0) For the example code, the compiler first parses the compiler directives from lines 1 to 13, identifies the ghost region data exchange area and the Stencil computation kernel area, and establishes a correlation. Then, it reduces the kernel area enclosed by lines 4 to 10 to an IR (Indirect Resource Area), extracts the neighborhood radius from the Stencil access pattern, and constructs a set of safe internal computation domains and boundary regions based on the output computation domain boundaries. After passing a safe rewriteability check and policy derivation, a fixed execution sequence is generated and a safe replacement is performed. An example of the rewritten execution sequence is as follows: Output (indication of the rewritten execution sequence): Line 1, halo_begin_call(); Line 2, k0_interior(...); Line 3, halo_end_call(); Line 4, k0_face_top(...); Line 5, k0_face_bottom(...); Line 6, k0_face_left(...); Line 7, k0_face_right(...); Among them, k0_interior and k0_face_* are glue layer wrapper interfaces, which reuse the same Halide pre-compiled kernel at the underlying level, only the calling range parameters are different.
[0039] The preferred implementation constraints (not mandatory limitations) are as follows: 1) Kernel ports are preferably static shape arrays; 2) The front-end input preferably satisfies a parsable restricted subset of C and a normalized for loop; 3) Overlapping rewriting is preferably performed when overlap-kernel-halo can be uniquely located and the policy allows it; 4) Automatic rollback occurs when the above constraints are not met, without affecting the semantic correctness of the original program.
[0040] Obviously, those skilled in the art will understand that the steps of the methods in the above embodiments can be implemented using general-purpose computing devices, and can be centralized on a single computing device or distributed across a network of multiple computing devices; they can also be implemented by computer-executable program code and stored in a storage medium for execution by the computing device. The order of steps can be adjusted equivalently without changing the technical essence of the present invention. The embodiments of the present invention are not limited to any specific hardware and software combination.
Claims
1. A system for automatic optimization of template computing kernels targeting communication semantics carrying based on compilation directives, characterized in that, Includes the following modules: 1) Compiler directive parsing and kernel identification module: The kernel region and ghost region data exchange region are calculated by the compilation instruction annotation Stencil, and label pairing, region binding and structural constraint verification are performed. When the structure is consistent, an association mark is established and the process is entered into the subsequent module. 2) Intermediate representation generation and semantic information extraction module: The kernel region is reduced to an intermediate representation, and the semantic information of the Stencil operator is extracted. The semantic information includes at least the boundary of the output computation domain and the radius of the neighborhood. 3) Safe rewriteability check and boundary control flow processing module: A safe internal computation domain is constructed based on the output computation domain boundary and the neighborhood radius, and a set of boundary regions is generated. The kernel is subjected to a correctness priority check of "process if it can be decided, otherwise skip". If the check passes, boundary control flow stripping and condition hoisting are performed to explicitly separate boundary / corner computation from internal domain computation. If the decisionability condition is not met, the rewriting is skipped and the original code range is preserved. 4) Scheduling calculation, code generation and replacement module: Solve the discrete optimization strategy problem with resource constraints and attach the result as a deterministic schedule to the intermediate representation; generate Halide generator source files and glue code based on the intermediate representation with scheduling information, and then compile them to produce a pre-compiled kernel, and replace the kernel intervals of the original program that meet the conditions with calls to the glue code; if any step fails or the conditions are not met, the replacement process of the current kernel is terminated and a rollback operation is performed.
2. The system for automatic optimization of template computation kernels targeting communication semantics carrying based on compilation directives according to claim 1, characterized in that, The implementation of the compiler directive parsing and kernel identification module mentioned in section 1) specifically includes: 11) Calculate the kernel region using paired start / end compiler directives marked with Stencil, and mark the ghost region data exchange region and its association with the kernel region; 12) Perform consistency checks on association markers, nested interval relationships, input / output port declarations, and kernel / halo structure constraints within overlapping intervals; if the check fails, record the reason for the rollback and retain the original code interval.
3. The system for automatic optimization of template computation kernels targeting communication semantics carrying based on compilation directives according to claim 1, characterized in that, The implementation of the intermediate representation generation and semantic information extraction module (2) specifically includes: 21) Reduce the kernel interval to an intermediate representation, and explicitly record the output computation domain boundary and neighborhood radius in the intermediate representation; 22) Construct a safe internal computation domain based on the boundary of the output computation domain and the radius of the neighborhood: Using the output computation domain as a reference, shrink inward in each coordinate direction to the same width as the radius of the neighborhood to obtain the safe internal computation domain; Subtract the safe internal computation domain from the output computation domain to obtain the set of boundary regions, which are used to cover the edge part of the output domain.
4. The system for automatic optimization of template computation kernels oriented towards communication semantics carrying according to claim 1, wherein, The implementation of the safe rewriteability check and boundary control flow processing module (3) specifically includes: When the structurally decidable condition is met, the boundary predicates are identified and normalized into internal loop segments without boundary predicates and several boundary / corner residual segments. If the structural determination condition is not met, skip the splitting and rewriting and retain the original structure.
5. The automatic optimization system for template computation kernels carrying communication semantics based on compiler instructions according to claim 1, characterized in that, The third) rewriteability check includes at least: 321) Boundary predicates belong to the predefined parsable form and can be reduced to a combination of equations and / or inequalities consisting of a circular index and constant boundaries; 322) The memory access index satisfies the form of "iteration variable and constant offset"; 323) The fragment to be rewritten does not contain opaque calls, additional side effects, or complex control flow; 324) It can verify the safety of out-of-bounds access to the neighborhood based on the boundary of the output computation domain and the neighborhood radius; If at least one of the aforementioned safe rewrite checks is not met, the current kernel replacement and rewrite is skipped while the original code segment is preserved, and the reason for skipping is recorded.
6. The system for automatic optimization of template computation kernels oriented towards communication semantics carrying according to claim 1, wherein, The scheduling calculation in the scheduling calculation, code generation and replacement module mentioned in section 4) includes at least the following: 411) Based on the output computation domain boundary, neighborhood radius, data type byte count, and hardware-related environment variables, deterministic enumeration and resource constraint screening are performed on a fixed candidate set to determine the block parameters, and further determine the vectorization, expansion, parallelization, and rearrangement scheduling parameters to generate scheduling information and attach it to the intermediate representation. 412) Establish a deterministic cost model based on the output domain volume, boundary region volume, number of data bytes exchanged in the ghost area, and hardware-related environmental variables to obtain estimates of internal computation time, boundary computation time, communication time, and splitting overhead; calculate the total time estimates for non-overlapping and overlapping strategies based on the estimates and select the execution strategy accordingly. 413) Output a strategy report file to record the cost model input parameters, estimation results, selected parameters and reasons for selection.
7. The system for automatic optimization of template computation kernels oriented towards communication semantics carrying according to claim 1, wherein, The code generation in the scheduling calculation, code generation and replacement module mentioned in section 4) includes at least the following: 421) Based on the intermediate representation, the Halide generator source files are generated and subsequently compiled to generate a pre-compiled kernel, corresponding static library, and header files; 422) Generate glue code to construct the buffer description information required for Halide to run, and initialize it in a templated manner, updating the data pointer and necessary range parameters only when called; internal fields and boundary regions call the same pre-compiled kernel through different output range parameters.
8. The system for automatic optimization of template computation kernels oriented towards communication semantics carrying according to claim 1, wherein, The code replacement in the scheduling calculation, code generation and replacement module mentioned in section 4) includes at least the following: 431) When the overlap strategy is selected and the structural constraints are met, the kernel region is replaced with a fixed execution sequence: ghost region exchange start, internal calculation, ghost region exchange end, boundary region calculation; 433) When the overlap strategy is not selected, no overlap rewriting is performed; instead, kernel computation is replaced by a single Halide call or an equivalent call at the original kernel interval location. 434) Supports partial replacement: the boundary region uses a conservative path or the original logic for computation, while the secure internal computation domain uses the Halide kernel for computation.
9. The system for automatic optimization of template computing kernels oriented towards communication semantics carrying according to claim 1, wherein, The system is configured to perform a rollback operation, which includes at least: 51) When any stage of intermediate representation construction, semantic extraction, safe rewriteability check, policy derivation or code generation fails to meet the processing conditions or an error occurs, perform at least one of the following rollback actions: a) skip the replacement and rewriting of the corresponding kernel section and retain the original code; b) terminate the processing and output the error reason. 52) Output a structured log or policy report file for reproduction and diagnosis, wherein the structured log or policy report file records at least the policy parameters, selection results and rollback reasons.
10. An automatic optimization method for template computation kernels carrying communication semantics based on compiler directives, which completes the automatic extraction, boundary safety, and code generation and replacement of Stencil computation kernels as follows: Step 1: Parse the compilation instructions in the source code, identify the Stencil computation kernel interval, ghost region data exchange interval and overlapping interval, establish association markers and perform consistency verification; Step 2: Reduce the Stencil computation kernel interval to an intermediate representation, extract the boundary and neighborhood radius of the output computation domain, construct a safe internal computation domain and generate a set of boundary regions; Step 3: Perform boundary control flow processing on the control flow containing boundary checks, and perform a safe rewriteability check according to the correctness priority principle; if the conditions are not met, backtrack and retain the original code range; Step 4: Select overlapping or non-overlapping execution strategies based on the deterministic cost model, and output a strategy report file; Step 5 generates Halide pre-compiled code, glue code, and build files, and performs safe replacement or partial replacement of the original source code to obtain a compileable and runnable output project.