A high performance package-on-board structure and method

Abstract

This invention provides a high-performance board-level packaging structure and method, which can achieve large-size, high-reliability cavities while simultaneously offering low cost, high yield, and high process adaptability. It includes: a filter wafer with filter chip units on its front side, each filter chip unit including a chip pad and a sensitive area, and a dam structure surrounding the sensitive area of ​​each filter chip unit; a chip with several pads on its front side; several glass cover plates; a molding compound; and several exposed metal terminals; the back sides of the filter wafer and the chip are encapsulated together by the molding compound, with the dam structure of the filter wafer flush with the front side of the chip, and the front side of the chip flush with the top surface of the molding compound; several corresponding glass cover plates conformally covering the surface of the dam structure of the sensitive area of ​​each filter chip unit; and the chip pads of the filter wafer and the chip respectively having exposed metal terminals.

Description

Technical Field

[0001] This invention relates to the technical field of high-performance board-level packaging, specifically to a high-performance board-level packaging structure, and also to a high-performance board-level packaging method. Background Technology

[0002] In RF front-end modules, the performance of filters (such as BAW and SAW filters) is crucial. To ensure that their high-frequency performance is not affected, a sealed cavity must be formed above the sensitive vibration area of ​​the filter chip to prevent the damping effect and stress influence of subsequent packaging materials (such as molding compounds), thereby maintaining the filter's high Q value and frequency stability.

[0003] Currently, one of the mainstream methods for cavity formation is the "dam-cap" method. This method first uses dry film material to form a dam structure around each filter chip unit on the filter wafer; then, a thicker layer of dry film is directly covered over the entire dam array as a "cap", thereby forming the desired cavity inside the dam.

[0004] However, this traditional method has the following obvious drawbacks: 1. Conflict between cavity size and reliability: When a large cavity height is required to meet the requirements of high-performance filters, the thick dry film covering may sag or collapse in the middle area due to insufficient rigidity. This not only leads to uneven cavity height and poor flatness, but also makes the cap prone to cracking or deformation during subsequent high-temperature and high-pressure processes such as molding, resulting in cavity failure and low product reliability and yield.

[0005] 2. High requirements for materials and equipment: To avoid the above-mentioned collapse problem, it may be necessary to use expensive high-performance, high-rigidity dry film, and precision film application equipment with extremely high coplanarity is required to ensure uniform film coverage, which significantly increases the process cost.

[0006] 3. Limited Packaging Efficiency and Applicability: Existing methods face increased difficulty in yield control and lower packaging efficiency when processing large-size wafers or panels. Furthermore, their structural limitations make them unsuitable for widespread application in advanced packaging fields with higher requirements for cavity size and reliability, such as wafer-level fan-out packaging and complex system-in-package (SIIP).

[0007] Therefore, there is an urgent need in the field for a high-performance board-level packaging structure that can realize large-size, high-reliability cavities, while also being low-cost, high-yield, and highly process-adaptable. Summary of the Invention

[0008] To address the aforementioned issues, this invention provides a high-performance board-level packaging structure that enables large-size, high-reliability cavities while simultaneously offering low cost, high yield, and high process adaptability.

[0009] A high-performance board-level packaging structure, characterized in that it comprises: A filter wafer has filter chip units on its front side, each filter chip unit including a chip pad and a sensitive area, and a dike structure surrounding the sensitive area of ​​each filter chip unit; The chip has several pads on its front side; Several glass cover plates; Plastic encapsulation; And several exposed metal terminals; The back side of the filter wafer and the chip are packaged together by a plastic encapsulation, and the dam structure of the filter wafer is flush with the front side of the chip. The front side of the chip is arranged flush with the upper surface of the plastic encapsulation. Several corresponding glass cover plates are fitted onto the surface of the dam structure of the sensitive area of ​​each filter chip unit. The chip pad of the filter wafer and the chip pad are respectively provided with exposed metal terminals.

[0010] Its further features are: A first passivation layer is provided on the overall surface area formed by the combination of the front side of the chip, the front side of the filter wafer covered with a glass cover plate, and the upper surface of the outer periphery of the plastic package. The first passivation layer is provided with exposed first metal RDL lines at the chip pad position of the filter wafer and the chip pad position respectively. A second passivation layer is provided on the upper surface of the first metal RDL lines exposed on the first passivation layer. The second passivation layer is provided with exposed second metal RDL lines at the positions corresponding to the first metal RDL lines respectively. The exposed end of the second metal RDL lines is provided with the metal terminal. Several of the glass cover plates are obtained by cutting large glass according to the shape of the dike structure of the sensitive area of ​​each group of filter chip units, so that each group of sensitive areas on the filter wafer has its own glass cover plate. A composite-shaped glass cover is designed and manufactured for the dam structure formed by adjacent sensitive areas of the filter wafer, thereby reducing the number of times the glass cover of each packaging structure is applied to a certain extent. The glass cover plate includes a glass substrate and a transparent adhesive film, and the glass cover plate is attached to the upper surface of the cofferdam structure through the transparent adhesive film; The transparent adhesive film is specifically a transparent DAF film. The DAF film is an adhesive layer with double-sided adhesion. When not being covered and bonded, the bottom of the DAF film has a substrate cutting film for support. After cutting, the glass substrate of a single glass cover plate is firmly bonded to the DAF film. The adhesion between the DAF film and the substrate cutting film is low and easy to separate. When the glass cover plate needs to be covered with the cofferdam structure, the substrate cutting film is peeled off, and the DAF film is bonded to the cofferdam structure under heating.

[0011] A high-performance board-level packaging method is characterized by: enclosing the sensitive areas of each group of filter chip units on the filter wafer with a dike structure; cutting glass cover plates of corresponding shapes according to the enclosing shape of the dike structure for each sensitive area; then mounting the glass cover plates on top of the dike structure of the filter chip unit; and finally completing the filter packaging through packaging processes such as molding, redistribution, balling, and wafer dicing.

[0012] Its further characteristic lies in the following specific steps: S1 provides a filter wafer with multiple filter chip units on its front side; S2 forms a dam structure on the front side of the filter wafer, the dam structure surrounding the sensitive area of ​​each filter chip unit; S3 provides a glass substrate, and a transparent adhesive film is attached to one surface of the glass substrate; S4 cuts the glass substrate covered with adhesive film according to the area size of the dam structure corresponding to the sensitive area of ​​the filter chip unit to form multiple individual glass cover plates. S5 attaches a single glass cover plate to the top of the cofferdam structure corresponding to the sensitive area, so that the cofferdam structure, the filter wafer surface and the glass cover plate together form a sealed cavity, sealing the sensitive area of ​​the filter inside. S6 then undergoes subsequent molding, rewiring, ball-mounting, wafer dicing, and packaging processes to complete the filter packaging.

[0013] Its further characteristic is: Step S1 also requires the preparation of a temporary bonding support plate; The front side of the filter wafer and the front side of the chip are laid flat and aligned by a temporary bonding carrier plate, and the back side of the filter wafer and the chip are encapsulated into one piece by a plastic package. Then the temporary bonding carrier plate is debonded, and then the capping operation of the glass cover plate and the cofferdam structure at the corresponding positions of the sensitive area is carried out. Step S6 specifically includes the following steps: S601 generates a first passivation layer, which forms openings at the pad positions of the chip and the chip pads of the filter wafer for subsequent electrical connections; S602 forms a first metal RDL circuit on the surface of the first passivation layer through PVD, photolithography, electroplating and etching steps to perform signal interconnection; According to the wiring requirements for signal interconnection between chips, S603 applies a second passivation layer. The second passivation layer forms an opening at the position corresponding to the first metal RDL line for subsequent electrical connection. S604 forms a second metal RDL circuit on the surface of the second passivation layer through PVD, photolithography, electroplating, and etching. The outermost side of the second RDL circuit forms a metal terminal for soldering to the PCB board.

[0014] By adopting this invention, a synergistic effect is generated through the replacement of the cover material and the innovation of the process sequence: 1. Replacement of cover material: The traditional, integrally covered thick dry film is replaced by a single cut glass cover (with pre-applied adhesive film) as the top cover of the cavity. This is a fundamental shift from "flexible / soft cap" to "rigid / hard cap". 2. Innovative process sequence: The process route of "first applying and cutting the whole film, then attaching each piece precisely" is adopted. That is, first apply the film to the glass substrate, then cut it into individual pieces, and then attach the individual glass cover plates to the cofferdam structure. This sequence ensures that each glass cover plate is an independent rigid body and solves the problem of flatness of the whole film coverage. 3. Synergistic effect: The combination of the above two points produces a synergistic effect of "1+1>2". The high rigidity of glass solves the problem of collapse of large cavities; the flexibility of single-chip mounting solves the yield problem of large-size substrate processing; and finally achieves the technical effect of high reliability, low cost and wide applicability.

[0015] Its beneficial effects are as follows: 1. Achieved large-size, high-reliability cavities: Glass is used instead of traditional thick dry film as the cavity cover. Glass has much higher rigidity and mechanical strength than polymers, effectively resisting external stress and its own weight. Even in large-area cavities, it will not collapse or deform, ensuring the uniformity and stability of the cavity height, thereby greatly improving the reliability of the packaging and the product yield. 2. Reduced stringent requirements on materials and equipment: Due to the extremely high flatness and rigidity of the glass cover plate itself, the present invention does not require the use of expensive high-performance dry film as the cap material. At the same time, the coplanarity requirements of the mounting equipment are also significantly reduced, because the glass cover plate is a rigid material pre-cut into individual pieces, which is easy to pick up and place accurately, thus effectively reducing the overall process cost. 3. Expands the application scope of the process: It has high flexibility and is not only suitable for traditional wafer-level chip-scale packaging, but can also be easily extended to wafer-level fan-out packaging, board-level fan-out packaging and complex system-level packaging, providing a highly reliable cavity solution for advanced packaging technology. 4. Improved packaging efficiency and yield: By first applying and cutting the film to the glass substrate, and then mounting individual chips, the yield risk of covering the entire large-size wafer with easily deformable film material is avoided, resulting in a wider process window and higher packaging efficiency. Attached Figure Description

[0016] Figure 1 This is a cross-sectional schematic diagram of the packaging structure of the present invention (i.e., a schematic diagram of step S604 of the packaging method of the present invention). Figure 2 The filter wafer mentioned in the packaging method of the present invention; Figure 3 The temporary bonding carrier plate mentioned in the packaging method of the present invention; Figure 4 This is a schematic diagram of step S201 of the packaging method of the present invention; Figure 5 This is a schematic diagram of step one of step S202 in the packaging method of the present invention; Figure 6 This is a schematic diagram of step two of step S202 in the packaging method of the present invention; Figure 7 This is a schematic diagram of step three of step S202 in the packaging method of the present invention; Figure 8 This is a schematic diagram of step S5 of the packaging method of the present invention; Figure 9 This is a schematic diagram of step S601 of the packaging method of the present invention; Figure 10 This is a schematic diagram of step S602 of the packaging method of the present invention; Figure 11 This is a schematic diagram of step S603 of the packaging method of the present invention; The names corresponding to the serial numbers in the diagram are as follows: Chip 10, pad 11, filter wafer 20, chip pad 21, sensitive area 22, dike structure 201, molding compound 30, first passivation layer 40, first metal RDL circuit 50, second passivation layer 60, second metal RDL circuit 70, metal terminal 80, glass cover plate 90, glass substrate 91, transparent adhesive film 92, temporary bonding carrier plate 100, carrier plate 101, temporary bonding material 102. Detailed Implementation

[0017] A high-performance board-level packaging structure, see Figure 1 It includes: a chip 10, a filter wafer 20, a molding compound 30, several glass cover plates 90, and several exposed metal terminals 80; The front side of the filter wafer 20 has filter chip units, each filter chip unit including a chip pad 21 and a sensitive area 22, and a dike structure 201 surrounds the sensitive area 22 of each filter chip unit. The front of chip 10 has several pads 11; The back sides of the filter wafer 20 and the chip 10 are packaged together by the molding compound 30. The dam structure 201 of the filter wafer 20 is flush with the front side of the chip 10. The front side of the chip 10 is flush with the upper surface of the molding compound 30. Several corresponding glass cover plates 90 are fitted onto the surface of the dam structure 201 of the sensitive area 22 of each filter chip unit. The chip pad 21 of the filter wafer 20 and the pad 11 of the chip 10 are respectively provided with exposed metal terminals 80.

[0018] In a specific implementation, a first passivation layer 40 is provided on the overall surface area formed by the combination of the front side of the chip 10, the front side of the filter wafer 20 covered with a glass cover plate 90, and the upper surface of the outer periphery of the plastic encapsulation body 30. The first passivation layer 40 is provided with exposed first metal RDL lines 50 at the positions of the chip pad 21 of the filter wafer 20 and the pad 11 of the chip 10, respectively. A second passivation layer 60 is provided on the upper surface of the first metal RDL lines 50 exposed on the first passivation layer 40. The second passivation layer 60 is provided with exposed second metal RDL lines 70 at the positions of the first metal RDL lines 50, respectively. The exposed ends of the second metal RDL lines 70 are provided with metal terminals 80.

[0019] In practice, several glass cover plates 90 are obtained by cutting large glass according to the shape of the dam structure 201 of the sensitive area 22 of each group of filter chip units, so that each group of sensitive areas 22 on the filter wafer 20 has its own glass cover plate 90.

[0020] In specific implementation, a composite glass cover plate 90 is formed by combining the dam structures formed by adjacent sensitive regions 22 of the filter wafer 20. That is, the surface area of ​​the dam structure of adjacent sensitive regions 22 is adapted to a corresponding glass cover plate 90, thereby reducing the number of times the glass cover plate 90 of each packaging structure is applied to a certain extent. The glass cover plate 90 includes a glass substrate 91 and a transparent adhesive film 92. The glass cover plate 90 is attached to the upper surface of the cofferdam structure 201 by the transparent adhesive film 92.

[0021] In specific implementation, the transparent adhesive film 92 is a transparent DAF film. The DAF film is an adhesive layer with double-sided adhesion. When the cover is not being bonded, there is a substrate cutting film at the bottom of the DAF film for support. After cutting, the glass substrate of a single glass cover is firmly bonded to the DAF film. The adhesion between the DAF film and the substrate cutting film is low and easy to separate. When the glass cover needs to be covered with the cofferdam structure, the substrate cutting film is peeled off, and the DAF film is bonded to the cofferdam structure under heating.

[0022] In specific implementation, the dam structure 201 on the filter wafer 20 can be achieved in several ways, including: 1. Using photolithographic passivation adhesive or dry film, it is applied to the wafer by coating or laminating, and the dam structure is formed by exposure and development, and then cured by baking; 2. Using non-photolithographic passivation adhesive or dry film, it is applied to the wafer by coating or laminating, and the excess area is removed by laser drilling, leaving the dam area.

[0023] A high-performance board-level packaging method, see Figures 1-11 Each sensitive area 22 of the filter chip unit in the filter wafer 20 is surrounded by a dam structure 201. A glass cover plate 90 of the corresponding shape is cut according to the enclosing shape of the dam structure 90 of each sensitive area 22. The glass cover plate 90 is then installed on the dam structure 90 of the filter chip unit. Then, the filter is packaged by molding, redistribution, balling, and wafer cutting processes.

[0024] The specific steps are as follows: S1 provides a filter wafer 20, which has multiple filter chip units on its front side; And prepare a temporary bonding support plate 100, which includes a support plate 101 and a temporary bonding material 102; S2; S201 forms a dam structure 201 on the front side of the filter wafer 20, and the dam structure 201 surrounds the sensitive area 22 of each filter chip unit. S202, the front sides of the filter wafer 20 and the chip 10 are laid flat and flush with each other using the temporary bonding carrier 100, and the back sides of the filter wafer 20 and the chip 10 are packaged into one piece using the molding compound 30, and then the temporary bonding carrier 100 is debonded; S3 provides a glass substrate 91, and a transparent adhesive film 92 is attached to one surface of the glass substrate 91; S4 cuts the glass substrate 91 covered with transparent adhesive film 92 according to the area size of the dam structure 201 corresponding to the sensitive area 22 of the filter chip unit, forming multiple individual glass cover plates 90. S5 attaches a single glass cover plate 90 above the cofferdam structure 201 corresponding to the sensitive area, so that the cofferdam structure 201, the surface of the filter wafer 20 and the glass cover plate 90 together form a sealed cavity, sealing the sensitive area 22 of the filter inside. S6 then undergoes subsequent molding, redistribution, ball placement, wafer dicing and packaging processes to complete the filter packaging. S601 generates a first passivation layer 40, which forms openings at pad 11 of chip 10 and chip pad 21 of filter wafer 20 for subsequent electrical connection. S602 forms a first metal RDL line 50 on the surface of the first passivation layer 40 through PVD, photolithography, electroplating and etching steps to perform signal interconnection; S601 generates a first passivation layer, which forms openings at the pad positions of the chip and the chip pads of the filter wafer for subsequent electrical connections; S602 forms a first metal RDL circuit on the surface of the first passivation layer through PVD, photolithography, electroplating and etching steps to perform signal interconnection; S603 applies a second passivation layer 60 according to the wiring requirements for signal interconnection between chips. The second passivation layer 60 forms an opening at the position corresponding to the first metal RDL line 50 for subsequent electrical connection. S604 forms a second metal RDL line 70 on the surface of the second passivation layer 60 through PVD, photolithography, electroplating and etching. The outermost side of the second metal RDL line 70 forms a metal terminal 80 for soldering to the PCB board.

[0025] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0026] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A high-performance board-level packaging structure, characterized in that, It includes: A filter wafer has filter chip units on its front side, each filter chip unit including a chip pad and a sensitive area, and a dike structure surrounding the sensitive area of ​​each filter chip unit; The chip has several pads on its front side; Several glass cover plates; Plastic sealant; And several exposed metal terminals; The back side of the filter wafer and the chip are packaged together by a plastic encapsulation, and the dam structure of the filter wafer is flush with the front side of the chip. The front side of the chip is arranged flush with the upper surface of the plastic encapsulation. Several corresponding glass cover plates are fitted onto the surface of the dam structure of the sensitive area of ​​each filter chip unit. The chip pad of the filter wafer and the chip pad are respectively provided with exposed metal terminals.

2. The high-performance board-level packaging structure according to claim 1, characterized in that: A first passivation layer is provided on the overall surface area formed by the front side of the chip, the front side of the filter wafer covered with a glass cover, and the upper surface of the outer periphery of the molding compound. The first passivation layer is provided with exposed first metal RDL lines at the chip pad position of the filter wafer and the chip pad position, respectively. A second passivation layer is provided on the upper surface of the first metal RDL lines exposed on the first passivation layer. The second passivation layer is provided with exposed second metal RDL lines at the positions of the first metal RDL lines, respectively. The exposed ends of the second metal RDL lines are provided with metal terminals.

3. The high-performance board-level packaging structure according to claim 2, characterized in that: Several of the glass cover plates are obtained by cutting large glass according to the shape of the dike structure of the sensitive area of ​​each group of filter chip units, so that each group of sensitive areas on the filter wafer has its own glass cover plate.

4. The high-performance board-level packaging structure according to claim 3, characterized in that: A composite-shaped glass cover plate is designed and fabricated for the dike structure formed by adjacent sensitive areas of the filter wafer.

5. The high-performance board-level packaging structure according to claim 1, characterized in that: The glass cover plate includes a glass substrate and a transparent adhesive film, and the glass cover plate is attached to the upper surface of the cofferdam structure through the transparent adhesive film.

6. The high-performance board-level packaging structure according to claim 5, characterized in that: The transparent adhesive film is specifically a transparent DAF film.

7. A high-performance board-level packaging method for fabricating a high-performance board-level packaging structure as described in any one of claims 1-6, characterized in that: Each sensitive area of ​​the filter chip unit on the filter wafer is enclosed by a dike structure. A glass cover plate of a corresponding shape is cut according to the enclosing shape of the dike structure for each sensitive area. The glass cover plate is then installed on the dike structure of the filter chip unit. Finally, the filter is packaged through molding, redistribution, balling, and wafer cutting processes.

8. A high-performance board-level packaging method according to claim 7, characterized in that, The specific steps are as follows: S1 provides a filter wafer with multiple filter chip units on its front side; S2 forms a dam structure on the front side of the filter wafer, the dam structure surrounding the sensitive area of ​​each filter chip unit; S3 provides a glass substrate, and a transparent adhesive film is attached to one surface of the glass substrate; S4 cuts the glass substrate covered with adhesive film according to the area size of the dam structure corresponding to the sensitive area of ​​the filter chip unit to form multiple individual glass cover plates. S5 attaches a single glass cover plate to the top of the cofferdam structure corresponding to the sensitive area, so that the cofferdam structure, the filter wafer surface and the glass cover plate together form a sealed cavity, sealing the sensitive area of ​​the filter inside. S6 then undergoes subsequent molding, rewiring, ball-mounting, wafer dicing, and packaging processes to complete the filter packaging.

9. A high-performance board-level packaging method according to claim 8, characterized in that: Step S1 also requires the preparation of a temporary bonding support plate; The front sides of the filter wafer and the chip are laid flat and aligned using a temporary bonding carrier plate. The back sides of the filter wafer and the chip are then encapsulated together using a plastic encapsulation device. After the temporary bonding carrier plate is debonded, the capping operation of the glass cover plate and the corresponding dike structure at the sensitive area is carried out.

10. A high-performance board-level packaging method according to claim 8, characterized in that, Step S6 specifically includes the following steps: S601 generates a first passivation layer, which forms openings at the pad positions of the chip and the chip pads of the filter wafer for subsequent electrical connections; S602 forms a first metal RDL circuit on the surface of the first passivation layer through PVD, photolithography, electroplating and etching steps to perform signal interconnection; According to the wiring requirements for signal interconnection between chips, S603 applies a second passivation layer. The second passivation layer forms an opening at the position corresponding to the first metal RDL line for subsequent electrical connection. S604 forms a second metal RDL circuit on the surface of the second passivation layer through PVD, photolithography, electroplating, and etching. The outermost side of the second RDL circuit forms a metal terminal for soldering to the PCB board.

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