A WIFI baseband IP encryption module authentication system and method

Abstract

This invention discloses an authentication system and method for an encryption module within a Wi-Fi baseband IP, belonging to the field of wireless communication technology. The authentication system includes: a wireless baseband IP, comprising a media access control module and a physical layer module; a system static random access memory (SRAM); and a transmission timing conversion module, whose input is connected to the transmission interface of the media access control module and whose output is connected to the SRAM. This module converts the transmission interface timing output by the media access control module into write operation timing for the SRAM under encryption test authentication mode. This invention achieves complete functional authentication of the encryption module within the wireless baseband IP without modifying its internal structure, by adding only a few external interface conversion modules and storage access paths. It has the advantages of simple structure, high reusability, and suitability for third-party authentication.

Description

Technical Field

[0001] This invention belongs to the field of wireless communication technology, specifically relating to an authentication system and method for an encryption module in a WIFI baseband IP. Background Technology

[0002] In wireless communication systems, data is typically encrypted before transmission to ensure security. Relevant standard protocols also have corresponding specifications. Therefore, wireless baseband IP generally integrates data encryption and decryption modules. Before mass production of the chip, all encryption modules within the chip need to undergo functional certification.

[0003] However, the encryption modules in existing wireless baseband IPs lack independent test interface channels, making it impossible to effectively test and certify them. Summary of the Invention

[0004] The purpose of this invention is to provide an authentication system and method for encryption modules in WIFI baseband IP. Without modifying the internal structure of the encryption module, it can test and authenticate the encryption and decryption modules in wireless baseband IP by adding only a few peripheral interface conversion modules and storage access paths, thus solving the problems mentioned in the background art.

[0005] To achieve the above objectives, according to one aspect of the present invention, a WIFI baseband IP encryption module authentication system is provided, the system comprising: Wireless baseband IP, which includes a media access control module and a physical layer module; System static random access memory; A transmission timing conversion module, whose input is connected to the transmission interface of the media access control module and whose output is connected to the system static random access memory, is used to convert the transmission interface timing output by the media access control module into the write operation timing of the system static random access memory in the encryption test and authentication mode. The receiving sequence generation module has its input end connected to the system static random access memory and its output end connected to the receiving interface of the media access control module. It is used to read preset data from the system static random access memory in the decryption test authentication mode and send it to the media access control module according to the timing of the receiving interface of the media access control module. The multiplexing circuit includes a first selector and a second selector; the first selector is used, under the control of the central processing unit, to select the transmission interface of the media access control module to be connected to the physical layer module or the transmission timing conversion module; and the second selector is used, under the control of the central processing unit, to select the reception interface of the media access control module to be connected to the physical layer module or the reception sequence generation module.

[0006] Preferably, the central processing unit accesses the system static random access memory and the local cache of the media access control module via the system bus.

[0007] Preferably, the transmitting timing conversion module generates an interrupt signal to notify the central processing unit after completing data writing; the receiving sequence generation module generates an interrupt signal to notify the central processing unit after completing data transmission.

[0008] According to another method of the present invention, the present invention provides an encryption module testing and authentication method, the method comprising an encryption testing and authentication step and a decryption testing and authentication step; The encryption testing and authentication steps include: Write the test vectors to the local cache of the media access control module; Control the multiplexing circuit to switch the transmission interface of the media access control module to the transmission timing conversion module; Configure the register to enable the media access control module to package, encrypt, add check bits to the test vector, and output it to the media access control module's sending interface; The transmission timing conversion module converts the transmission interface timing into a write operation to the system static random access memory, and writes the encrypted data into the system static random access memory. The central processing unit reads data from the system's static random access memory via the system bus and compares it with the expected result to complete the encryption authentication. The decryption test and authentication steps include: The data to be decrypted, along with its header and checksum, are pre-stored in the system's static random access memory. Configure the media access control module to enter receive mode, and switch the receive interface of the media access control module to the output of the receive sequence generation module through the multiplexing circuit; The receive sequence generation module reads data from the system static random access memory and sends it to the receive interface of the media access control module according to the receive interface timing. The media access control module analyzes, decrypts, and verifies data packets, and stores the decrypted data in a local cache; The central processing unit reads the data from the local cache and compares it with the expected result to complete the decryption and authentication.

[0009] Preferably, the test vector is placed in the user data portion of the transmitted data.

[0010] Preferably, the central processing unit accesses the system static random access memory and the local cache of the media access control module through the system bus, and controls the path switching of the multiplexer.

[0011] Compared with the prior art, the beneficial effects of the present invention are: This invention achieves full functional authentication of the encryption module within the wireless baseband IP without modifying its internal structure. It only requires adding a small number of external interface conversion modules and storage access paths, and has the advantages of simple structure, strong reusability, and suitability for mass production testing. Attached Figure Description

[0012] Figure 1 This is a schematic diagram of the structure of an existing wireless baseband IP.

[0013] Figure 2 This is a schematic diagram of the structure of the wireless baseband IP encryption module testing and authentication system provided in an embodiment of the present invention.

[0014] Figure 3 This is a top-level schematic diagram of the hardware circuit of the transmitting timing conversion module and the receiving sequence generation module in an embodiment of the present invention. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0016] a. such as Figure 1 As shown, a typical wireless baseband IP consists of a MAC module and a PHY module. The MAC module primarily handles the packaging and depackaging of baseband data. During transmission, it mainly adds packet headers, encrypts user data, and adds checksums. During reception, it mainly removes packet headers, filters packets not intended for itself, decrypts user data, and performs verification. The PHY module, during transmission, modulates the data received from the MAC according to the protocol and register configurations. It then sends the modulated data to the RF circuit module. During reception, the PHY module receives signals from the RF circuit, demodulates them to obtain baseband data, and sends it to the MAC module. The MAC and PHY modules directly interface to exchange data. However, the CPU cannot access this data during this process, making it impossible to assess the completeness of its internal encryption / decryption module functionality.

[0017] Therefore, the present invention designs as follows Figure 2The system architecture includes a transmit sequence to SRAM module and a receive sequence generate module, along with their connections to the system SRAM. These modules are described using Verilog HDL. The corresponding hardware circuitry is generated using synthesis tools. The top-level schematic and interfaces of the synthesized hardware circuitry are shown below. Figure 3 As shown.

[0018] b. When performing encryption testing and authentication on the encryption / decryption module in the wireless baseband IP, the test vector can be placed in the user data portion of the data to be transmitted and written to the MAC's local cache. Configure relevant registers to allow the MAC module to package, encrypt, add checksum bits, and send the test vector to the interface between the MAC and PHY. During normal use of the wireless baseband IP, this data is sent to the PHY module. However, during testing and authentication, the timing of this interface is also sent to a timing module that converts transmission timing to SRAM read / write. This writes the data to the system SRAM. After the data transmission to SRAM write operation is complete, an interrupt is generated to notify the CPU. The CPU switches to the MUX and reads the data from the system SRAM via the system bus. The data is then analyzed and compared with the expected results. Authentication is performed based on the comparison results.

[0019] c. When performing decryption testing and authentication on the encryption / decryption module in the wireless baseband IP, the data to be decrypted must first be placed at a specific address in the system SRAM. Then, the corresponding data packet header and checksum bits are also written to the same specific address in the system SRAM. After completion, the MUX is switched, and the MAC is configured for reception. When the MAC sends a receive request signal, the Receive SequenceGenerate module reads the previously written data from the specific address in the system SRAM and sends it to the MAC module according to the specified timing. The MAC module receives the data packet, analyzes it, decrypts the data segments, and verifies the checksum segments. After the process is complete, the decrypted data is placed in the MAC's local buffer, and an interrupt is generated to notify the CPU. The CPU can then read the decrypted data from the MAC's local buffer via the system bus and analyze and compare it. Based on the comparison results, the authentication result is confirmed.

[0020] In this invention, the English terms and their corresponding Chinese explanations are as follows: MAC media access control module; PHY physical layer module; System SRAM (Static Random Access Memory); Transmit sequence to SRAM timing conversion module; Receive Sequence generate module; MUX multiplexer; CPU (Central Processing Unit); local buffer; System bus; RF circuit radio frequency module.

[0021] This invention achieves full functional authentication of the encryption module within the wireless baseband IP without modifying its internal structure. It only requires adding a small number of external interface conversion modules and storage access paths, and has the advantages of simple structure, strong reusability, and suitability for mass production testing.

[0022] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0023] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A WiFi baseband IP encryption module authentication system, characterized in that, The system includes: Wireless baseband IP, which includes a media access control module and a physical layer module; System static random access memory; A transmission timing conversion module, whose input is connected to the transmission interface of the media access control module and whose output is connected to the system static random access memory, is used to convert the transmission interface timing output by the media access control module into the write operation timing of the system static random access memory in the encryption test and authentication mode. The receiving sequence generation module has its input end connected to the system static random access memory and its output end connected to the receiving interface of the media access control module. It is used to read preset data from the system static random access memory in the decryption test authentication mode and send it to the media access control module according to the timing of the receiving interface of the media access control module. The multiplexing circuit includes a first selector and a second selector; the first selector is used, under the control of the central processing unit, to select the transmission interface of the media access control module to be connected to the physical layer module or the transmission timing conversion module; and the second selector is used, under the control of the central processing unit, to select the reception interface of the media access control module to be connected to the physical layer module or the reception sequence generation module.

2. The WIFI baseband IP encryption module authentication system according to claim 1, characterized in that, The central processing unit accesses the system static random access memory and the local cache of the media access control module via the system bus.

3. The WIFI baseband IP encryption module authentication system according to claim 1, characterized in that, After the transmission timing conversion module completes the data writing, it generates an interrupt signal to notify the central processing unit; after the reception sequence generation module completes the data transmission, it generates an interrupt signal to notify the central processing unit.

4. A method for testing and authenticating an encryption module based on the system of claim 1, characterized in that, The method includes encryption test authentication steps and decryption test authentication steps; The encryption test and authentication steps include: Write the test vectors to the local cache of the media access control module; Control the multiplexing circuit to switch the transmission interface of the media access control module to the transmission timing conversion module; Configure the register to enable the media access control module to package, encrypt, add check bits to the test vector, and output it to the media access control module's sending interface; The transmission timing conversion module converts the transmission interface timing into a write operation to the system static random access memory, and writes the encrypted data into the system static random access memory. The central processing unit reads data from the system's static random access memory via the system bus and compares it with the expected result to complete the encryption authentication. The decryption test and authentication steps include: The data to be decrypted, along with its header and checksum, are pre-stored in the system's static random access memory. Configure the media access control module to enter receive mode, and switch the receive interface of the media access control module to the output of the receive sequence generation module through the multiplexing circuit; The receive sequence generation module reads data from the system static random access memory and sends it to the receive interface of the media access control module according to the receive interface timing. The media access control module analyzes, decrypts, and verifies data packets, and stores the decrypted data in a local cache; The central processing unit reads the data from the local cache and compares it with the expected result to complete the decryption and authentication.

5. The method according to claim 4, characterized in that, The test vector is placed in the user data section of the transmitted data.

6. The method according to claim 4, characterized in that, The central processing unit accesses the system static random access memory and the local cache of the media access control module through the system bus, and controls the path switching of the multiplexer.

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