A heat dissipation system and method for industrial network security encryption devices

Abstract

This invention belongs to the field of equipment heat dissipation technology, specifically relating to a heat dissipation system and method for industrial network security encryption equipment. It includes a heat dissipation duct and TEC cooling components and heat dissipation components deployed within the duct. This invention employs a synergistic design of TEC semiconductor active cooling technology and heat dissipation components. The cooling surface of the TEC cooling pad is in close contact with the GPU / CPU, directly and efficiently absorbing the large amount of heat generated by high-load computing. Combined with the increased heat dissipation area of ​​the serrated heat sink and the forced convection cooling of the fan unit, a complete heat dissipation chain of "active cooling - high-efficiency heat conduction - intelligent exhaust" is formed. Compared to traditional passive cooling or single-fan cooling, the heat dissipation capacity is significantly improved, fully meeting the heat dissipation requirements of high-performance GPUs / CPUs in modern industrial network security encryption equipment. This effectively prevents equipment downtime or operational failures due to high temperatures, ensuring the continuity and stability of encryption algorithm processing and real-time data stream transmission.

Description

Technical Field

[0001] This invention belongs to the field of equipment heat dissipation technology, specifically relating to a heat dissipation system and method for an industrial network security encryption device. Background Technology

[0002] With the rapid development of the Industrial Internet and cybersecurity technologies, industrial network security encryption devices are being used more and more widely in critical infrastructure sectors. These devices typically need to process a large number of encryption algorithms and real-time data streams, constantly increasing the performance requirements for computing units such as GPUs / CPUs. Under high-load computing conditions, GPUs / CPUs generate a lot of heat. If heat cannot be dissipated in time, the device temperature will become too high, affecting system stability and lifespan.

[0003] Currently, industrial network security encryption devices generally adopt traditional heat dissipation solutions, mainly including the following forms: First, relying on internal fans for air convection heat dissipation. This method easily introduces pollutants such as dust and moisture from the external environment into the device, which can cause dust accumulation on circuit boards over long-term operation, affecting the heat dissipation effect of components and even causing short circuit failures. Second, using simple heat sinks for passive heat dissipation. This solution is significantly less efficient under high load conditions and cannot meet the heat dissipation performance requirements of modern encryption devices. Third, some devices attempt to use liquid cooling systems, but these have problems such as complex structure, difficult maintenance, and high cost.

[0004] Existing heat dissipation technologies have several prominent drawbacks: First, it is difficult to balance heat dissipation and dust protection. While internal fan cooling is cheaper, its protection level is insufficient and it cannot adapt to harsh environments such as dusty, humid, and salt-sprayed industrial sites. Second, with the continuous improvement of GPU computing power, traditional heat dissipation solutions are clearly insufficient under high loads, easily leading to equipment overheating and shutdown. Third, the heat dissipation system is noisy during operation and requires frequent cleaning and maintenance, increasing operating costs. Finally, existing equipment has poor environmental adaptability; its heat dissipation efficiency will further decrease in high-temperature environments, affecting equipment reliability. Summary of the Invention

[0005] To address the aforementioned shortcomings of existing technologies, this invention provides a heat dissipation system and method for industrial network security encryption devices.

[0006] In a first aspect, the present invention provides a heat dissipation system for an industrial network security encryption device, including a heat dissipation duct and a TEC cooling component and a heat dissipation component deployed within the heat dissipation duct; The TEC cooling component is used to collect temperature signals from the GPU / CPU inside industrial network security encryption devices in real time, and adaptively drive the TEC cooling chip inside the TEC cooling component to cool based on the collected temperature information. The heat dissipation assembly, including heat sinks and a fan unit, is used to dissipate the heat generated by the hot surface of the TEC cooling pad to the outside of the industrial network security encryption device; The heat dissipation duct physically isolates the heat dissipation components from the PCB board, power module, and CPU / GPU module inside the industrial network security encryption device, forming a heat dissipation duct. The heat dissipation duct is located on the top of the industrial network security encryption device, the air inlet of the heat dissipation duct is located on the side wall of the industrial network security encryption device, and the air outlet of the heat dissipation duct is located on the opposite side of the air inlet of the heat dissipation duct. The heat dissipation duct has a corresponding mounting port for the TEC cooling component. A sealing component is provided between the TEC cooling component and the mounting port on the heat dissipation duct. The cooling surface of the TEC cooling chip is in close contact with the GPU or CPU, and the hot surface of the TEC cooling chip is thermally connected to the heat sink. The heat sink is located in the heat dissipation duct above the TEC cooling chip, and the fan unit is configured at the air inlet, air outlet and middle position of the heat dissipation duct.

[0007] Further improvements to this technical solution include a heat dissipation duct comprising a base plate, a first full-height baffle, a second full-height baffle, a third full-height baffle, a fourth baffle, a fifth full-height baffle, a sixth full-height baffle, and a seventh full-height baffle. The base plate is horizontally positioned between the upper part of the CPU / GPU module and the top shell of the industrial network security encryption device. The base plate physically isolates the heat dissipation components from the PCB board, power module, and CPU / GPU module inside the industrial network security encryption device. The base plate has mounting ports for the TEC cooling components, and a sealing component is provided between the TEC cooling components and the mounting ports on the base plate. All baffles are perpendicular to the base plate, and all baffles except the fourth baffle are perpendicular to the base plate. The tops of all baffles except the fourth baffle are connected to the top shell of the industrial network security encryption device. The first full-height baffle is located on one side of the air inlet of the heat dissipation duct and is perpendicular to the side wall of the industrial network security encryption device where the air inlet is located. The second full-height baffle is parallel to the side wall of the industrial network security encryption device where the air inlet is located, and the first full-height baffle, the second full-height baffle, and the side wall of the industrial network security encryption device form a first heat dissipation duct. The third full-height baffle is located on the side of the first full-height baffle away from the air inlet and is parallel to the first full-height baffle. One end of the third full-height baffle is sealed to the second full-height baffle. The fourth baffle is located on the end of the third full-height baffle away from the second full-height baffle and is perpendicular to the side wall of the industrial network security encryption device where the air inlet is located. The first full-height baffle, the third full-height baffle, the fourth baffle, and the side wall of the industrial network security encryption device form a second heat dissipation duct that connects to the first heat dissipation duct. A third heat dissipation duct that connects to the second heat dissipation duct is reserved between the fourth baffle and the top shell of the industrial network security encryption device. The fifth full-height baffle is perpendicular to the side wall of the industrial network security encryption device. A sixth full-height baffle is set between the second full-height baffle and the side wall of the industrial network security encryption device where the air outlet is located, forming a closed area. The sixth full-height baffle is set on the side of the fifth full-height baffle away from the closed area and is set parallel to the fifth full-height baffle. The sixth full-height baffle is sealed to the side wall of the industrial network security encryption device where the air outlet is located, and the air outlet is located on the side wall of the industrial network security encryption device between the fifth and sixth full-height baffles. The seventh full-height baffle is sealed to the end of the sixth full-height baffle away from the side wall of the industrial network security encryption device where the air outlet is located, and the other end of the seventh full-height baffle is sealed to the side wall perpendicular to the side wall of the industrial network security encryption device where the air outlet is located. The third and seventh full-height baffles and the side wall of the industrial network security encryption device form a fourth heat dissipation duct that connects to the third heat dissipation duct. The second, fifth, and seventh full-height baffles and the side wall of the industrial network security encryption device form a fifth heat dissipation duct that connects to the fourth heat dissipation duct. A further improvement to this technical solution is that the fan unit includes a first fan, a second fan, and a third fan. The first fan is installed at the air inlet, and the air outlet of the first fan faces the first heat dissipation duct. The second fan is installed in the fourth heat dissipation duct, and the air outlet of the first fan faces the fifth heat dissipation duct. The third fan is installed at the air outlet, and the air outlet of the third fan faces the external environment.

[0008] Further improvements to this technical solution include the following: the TEC cooling components include: Temperature sensor, used to collect the ambient temperature of the area where the GPU or CPU is located in real time; The TEC cooling drive circuit is used to adaptively drive the TEC cooling element inside the TEC cooling component to perform cooling based on the collected temperature information. The CPU main control board is electrically connected to the temperature sensor and the TEC cooling drive circuit.

[0009] Further improvements to this technical solution include a temperature sensor equipped with a data acquisition circuit, which includes a magnetic bead FB1, capacitors C1 and C2, resistors R1 and R2, an amplifier U1, and a resistor R3. The first terminal of the ferrite bead FB1 and the first terminal of the capacitor C1 are both connected to a 5V power supply. The second terminal of the capacitor C1 and the first terminal of the resistor R1 are both grounded. The second terminal of the ferrite bead FB1 is connected to the first terminal of the capacitor C2 and the first terminal of the resistor R2. The second terminal of the capacitor C2 and the second terminal of the resistor R1 are both signal grounded. The second terminal of the resistor R2 is connected to the non-inverting input terminal of the temperature sensor and the amplifier U1. The inverting input terminal of the amplifier U1 is connected to the analog input conversion pin of the CPU main control board through the resistor R3. The output terminal of the amplifier U1 is connected to the analog conversion pin of the CPU main control board.

[0010] Further improvements to this technical solution include a TEC cooling drive circuit comprising a MOSFET driver U2, a MOSFET driver U3, a resistor R4, a resistor R5, a capacitor C3, a diode D1, a MOSFET Q1, a resistor R6, a resistor R7, a capacitor C4, a diode D2, a MOSFET Q2, a resistor R8, a resistor R9, a capacitor C5, a diode D3, a MOSFET Q3, a resistor R10, a resistor R11, a capacitor C6, a diode D4, and a MOSFET Q4; The input pin of MOSFET driver U2 is connected to the output pin of the CPU main control board. The first end of resistor R4 and the negative terminal of diode D1 are connected to the first output pin of MOSFET driver U2. The second end of resistor R4 is connected to the first end of resistor R5, the first end of capacitor C3, the positive terminal of diode D1, and the gate of MOSFET Q1. The drain of MOSFET Q1 is connected to the 5V power supply. The source of MOSFET Q1, the second end of capacitor C3, the second end of resistor R5, and the drain of MOSFET Q2 are all connected to the first end of the TEC cooler. The first end of resistor R6 and the negative terminal of diode D2 are connected to the second output pin of MOSFET driver U2. The second end of resistor R6 is connected to the first end of resistor R7, the first end of capacitor C4, the positive terminal of diode D2, and the gate of MOSFET Q2. The source of MOSFET Q2, the second end of capacitor C4, and the second end of resistor R7 are all grounded. The input pin of MOSFET driver U3 is connected to the output pin of the CPU main control board. The first end of resistor R8 and the negative terminal of diode D3 are connected to the first output pin of MOSFET driver U3. The second end of resistor R8 is connected to the first end of resistor R9, the first end of capacitor C5, the positive terminal of diode D3, and the gate of MOSFET Q3. The drain of MOSFET Q3 is connected to the 5V power supply. The source of MOSFET Q3, the second end of capacitor C5, the second end of resistor R9, and the drain of MOSFET Q4 are all connected to the second end of the TEC cooler. The first end of resistor R10 and the negative terminal of diode D4 are connected to the second output pin of MOSFET driver U3. The second end of resistor R10 is connected to the first end of resistor R11, the first end of capacitor C6, the positive terminal of diode D4, and the gate of MOSFET Q4. The source of MOSFET Q4, the second end of capacitor C6, and the second end of resistor R11 are all grounded.

[0011] Further improvements to this technical solution include a fan unit configured with a fan control circuit connected to the CPU main control board. The fan control circuit includes an optocoupler U4, resistors R12, R13, and R14, a MOSFET Q5, and a fan terminal FAN1. In optocoupler U4, the positive terminal of the light-emitting end is connected to a 3.3V power supply through resistor R12, the negative terminal of the light-emitting end of optocoupler U4 is connected to the output terminal of the CPU main control board, the collector of the light-receiving end of optocoupler U4 is connected to the first terminal of resistor R13 and the first terminal of resistor R14, the second terminal of resistor R13 is connected to a 5V power supply, the second terminal of resistor R14 is connected to the gate of MOSFET Q5, the source of MOSFET Q5 is grounded, the drain of MOSFET Q5 is connected to the first pin of fan terminal FAN1, and the second pin of fan terminal FAN1 is connected to a 5V power supply.

[0012] Secondly, the present invention provides a heat dissipation method for an industrial network security encryption device, applicable to the heat dissipation system of the industrial network security encryption device described in any of the above claims, the method comprising: S1. The temperature sensor collects the GPU or CPU's own temperature and ambient temperature signals; the CPU main control board controls the TEC cooling chip to start cooling based on the ambient temperature signal, so that the cooling surface absorbs the heat generated by the GPU or CPU. S2. Based on the temperature changes of the TEC cooling chip, dynamically adjust the start / stop and speed of the fan unit to maintain stable internal temperature of the industrial network security encryption device.

[0013] Further improvements to this technical solution include step S1, which includes: S11. Collect the cold end temperature of the TEC cooling chip using a temperature sensor. TEC cooling chip hot end temperature GPU / CPU surface temperature and ambient temperature And collect the operating current of the TEC cooling chip. Operating voltage of TEC cooling chip and fan current ; S12. Intelligent control based on dynamic thermal equilibrium modeling: Define the thermal balance equation for the TEC system: ; in, This refers to the actual heat dissipation capacity of the TEC system. This refers to the heat dissipation power of the GPU. This is for system heat loss; For TEC cooling power; Introducing the TEC efficiency curve function: ; Among them, by fitting the efficiency curve in real time, the TEC operating point is dynamically adjusted to the preset optimal efficiency range.

[0014] Further improvements to this technical solution include step S2, which specifically includes a temperature-entropy coordinated regulation strategy: Define the system temperature entropy index : ; in, These are the weighting coefficients, corresponding to the heat dissipation temperature difference entropy, fan power consumption entropy, and temperature deviation entropy, respectively. The preset maximum fan current; Indicates the preset target temperature for the GPU or CPU; The control objective is to minimize the system temperature entropy index. The fan speed and TEC current are adjusted using a PID algorithm.

[0015] The beneficial effects of this invention are as follows: This invention employs a synergistic design of TEC semiconductor active cooling technology and heat dissipation components. The cooling surface of the TEC cooling pad is in close contact with the GPU / CPU, directly and efficiently absorbing the large amount of heat generated by high-load computing. Combined with the increased heat dissipation area of ​​the serrated heat sink and the forced convection cooling of the fan unit, a complete heat dissipation chain of "active cooling - high-efficiency heat conduction tape - intelligent exhaust" is formed. Compared to traditional passive cooling or single-fan cooling, the heat dissipation capacity is significantly improved, fully meeting the heat dissipation requirements of high-performance GPUs / CPUs in modern industrial network security encryption equipment. This effectively prevents equipment from crashing or malfunctioning due to high temperatures, ensuring the continuity and stability of encryption algorithm processing and real-time data stream transmission.

[0016] The enclosed cooling duct structure physically isolates the heat dissipation channel from the internal PCB boards, power modules, and CPU / GPU modules. Combined with a dust filter at the duct inlet, this structurally prevents external dust, moisture, salt spray, and other contaminants from entering the core circuit area, overcoming the drawback of traditional internal fan cooling which easily introduces contaminants. This design enables the equipment to adapt to harsh industrial environments with high dust, high humidity, and high salt spray, significantly reducing the risk of dust accumulation and corrosion on the circuit boards, and improving the equipment's protection level and operational reliability in complex environments.

[0017] On the one hand, the fan unit, through a temperature-entropy coordinated regulation strategy and adaptive control of the CPU main control board, dynamically adjusts its start / stop and speed based on the heatsink temperature, avoiding the high noise generated by the continuous high-speed operation of traditional fans and achieving low-noise operation. On the other hand, the TEC cooling components, based on dynamic thermal balance modeling and efficiency curve fitting, adaptively adjust cooling power, which, combined with the intelligent speed control of the fans, significantly reduces system energy consumption. Simultaneously, the enclosed heat dissipation airflow reduces dust accumulation on core components, eliminating the need for frequent disassembly and cleaning. Furthermore, the modular layout of the equipment, combined with the easily replaceable dust filter, further reduces maintenance frequency and costs, improving the ease of operation and maintenance.

[0018] This invention achieves accurate acquisition of multi-dimensional data, including GPU / CPU temperature, TEC cold / hot end temperature, and ambient temperature, through an optimized temperature acquisition circuit design combined with magnetic bead filtering and amplifier signal amplification processing. This provides reliable data support for subsequent control strategies. The TEC cooling drive circuit employs a dual MOSFET driver and MOSFET combination design, along with diode and capacitor protection and filtering structures, ensuring stable driving and adaptive power adjustment of the TEC cooling chip. The fan control circuit utilizes optocoupler isolation design to effectively avoid control signal interference and improve circuit reliability. Furthermore, the introduction of dynamic thermal balance modeling and temperature-entropy coordinated regulation strategies replaces traditional fuzzy control logic. By using quantitative mathematical models and PID algorithms to optimize fan speed and TEC current, a multi-objective balance of heat dissipation efficiency, noise control, and temperature accuracy is achieved, further ensuring long-term stable operation of the equipment.

[0019] The ferrite bead FB1 and capacitor filter network in the temperature acquisition circuit effectively suppress power supply noise and electromagnetic interference, while the signal amplification function of amplifier U1 improves temperature detection accuracy. The diode reverse protection and capacitor decoupling design in the TEC cooling drive circuit prevent damage from overvoltage and overcurrent, ensuring stable operation of the TEC cooling chip. The optocoupler isolation design in the fan control circuit isolates high-voltage and low-voltage circuits, reducing the risk of circuit interference. This optimized circuit design, combined with the physical protection of a closed heat dissipation duct, reduces the wear and tear and failure probability of core components. Combined with efficient heat dissipation for temperature protection of critical components such as the GPU / CPU, this significantly extends the overall lifespan of the industrial network security encryption equipment.

[0020] This invention employs a multi-channel series design (a connected structure from the first to the fifth channel) to form a directional airflow path. Combined with a two-stage pressurized fan (i.e., the second fan), heat is efficiently dissipated along the preset channels. The arc-shaped baffle reduces turbulence and maintains airflow stability, thereby improving the heat dissipation efficiency of the TEC cooling components and preventing GPU / CPU from throttling due to overheating. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a top view of a system according to an embodiment of the present invention.

[0023] Figure 2 This is a schematic diagram of the TEC cooling drive circuit.

[0024] Figure 3 This is a schematic flowchart illustrating a method according to an embodiment of the present invention.

[0025] 111 is the base plate, 112 is the first full-height baffle, 113 is the second full-height baffle, 114 is the third full-height baffle, 115 is the fourth baffle, 116 is the fifth full-height baffle, 117 is the sixth full-height baffle, 118 is the seventh full-height baffle, 119 is the dust collection trough, 121 is the heat sink, 1221 is the first fan, 1222 is the second fan, 1223 is the third fan; 210 is the industrial network security encryption device, 211 is the air inlet, and 212 is the air outlet. Detailed Implementation

[0026] To make the objectives, features, and advantages of this invention more apparent and understandable, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings of the specific embodiments. Obviously, the embodiments described below are only some embodiments of this invention, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0028] like Figure 1 As shown, this invention provides a heat dissipation system for an industrial network security encryption device, including a heat dissipation duct and a TEC cooling component and a heat dissipation component deployed within the heat dissipation duct. The TEC cooling component is used to collect the temperature signal of the GPU / CPU inside the industrial network security encryption device 210 in real time, and adaptively drive the TEC cooling chip inside the TEC cooling component to perform cooling based on the collected temperature information. The heat dissipation component includes a heat sink 121 and a fan unit, used to conduct the heat generated by the hot surface of the TEC cooling chip to the outside of the industrial network security encryption device 210. The heat dissipation duct physically isolates the heat dissipation component from the PCB board, power module, and CPU / GPU module inside the industrial network security encryption device 210. A heat dissipation airflow is formed. The heat dissipation airflow is set on the top of the industrial network security encryption device 210. The air inlet 211 of the heat dissipation airflow is set on the side wall of the industrial network security encryption device 210, and the air outlet 212 of the heat dissipation airflow is set on the opposite side of the air inlet 211. The heat dissipation airflow has a corresponding mounting port for the TEC cooling component. A sealing component is set between the TEC cooling component and the mounting port on the heat dissipation airflow. The cooling surface of the TEC cooling chip is in close contact with the GPU or CPU, and the hot surface of the TEC cooling chip is thermally connected to the heat sink 121. The heat sink 121 is located in the heat dissipation airflow above the TEC cooling chip. The fan unit is configured at the air inlet 211, the air outlet 212 and the middle position of the heat dissipation airflow.

[0029] Specifically, the heat dissipation duct includes a base plate 111, a first full-height baffle 112, a second full-height baffle 113, a third full-height baffle 114, a fourth baffle 115, a fifth full-height baffle 116, a sixth full-height baffle 117, and a seventh full-height baffle 118.

[0030] The base plate 111 is horizontally positioned between the upper part of the CPU / GPU module and the top shell of the industrial network security encryption device 210. The base plate 111 physically isolates the heat dissipation components from the PCB board, power module, and CPU / GPU module inside the industrial network security encryption device 210. The base plate 111 has a mounting port for the TEC cooling component, and a sealing component is provided between the TEC cooling component and the mounting port on the base plate 111. All baffles are set perpendicular to the base plate 111, and all baffles except the fourth baffle 115 are perpendicular to the base plate 111. The top of all baffles except the fourth baffle 115 is connected to the top shell of the industrial network security encryption device 210.

[0031] The first full-height baffle 112 is disposed on one side of the air inlet 211 of the heat dissipation duct and is perpendicular to the side wall of the industrial network security encryption device where the air inlet 211 is located. The second full-height baffle 113 is disposed parallel to the side wall of the industrial network security encryption device where the air inlet 211 is located, and the first full-height baffle 112, the second full-height baffle 113 and the side wall of the industrial network security encryption device form a first heat dissipation duct. The third full-height baffle 114 is disposed on the side of the first full-height baffle 112 away from the air inlet 211 and is parallel to the first full-height baffle 112. One end is sealed to the second full-height baffle 113. The fourth baffle 115 is located at the end of the third full-height baffle 114 away from the second full-height baffle 113 and is perpendicular to the side wall of the industrial network security encryption device where the air inlet 211 is located. The first full-height baffle 112, the third full-height baffle 114, the fourth baffle 115 and the side wall of the industrial network security encryption device form a second heat dissipation air duct that connects to the first heat dissipation air duct. A third heat dissipation air duct that connects to the second heat dissipation channel is reserved between the fourth baffle 115 and the top shell of the industrial network security encryption device 210; the fifth full-height baffle 115 is sealed to the second full-height baffle 113. A baffle 116 is vertically disposed between the second full-height baffle 113 and the side wall of the industrial network security encryption device where the air outlet 212 is located, forming a closed area; a sixth full-height baffle 117 is disposed on the side of the fifth full-height baffle 116 away from the closed area and is disposed parallel to the fifth full-height baffle 116, and the sixth full-height baffle 117 is sealed to the side wall of the industrial network security encryption device where the air outlet 212 is located, and the air outlet 212 is located on the side wall of the industrial network security encryption device between the fifth full-height baffle 116 and the sixth full-height baffle 117; a seventh full-height baffle 118 is disposed between the sixth full-height baffle 113 and the sixth full-height baffle 114. One end of baffle 117 away from the side wall of the industrial network security encryption device where the air outlet 212 is located is sealed and connected. The other end of the seventh full-height baffle 118 is sealed and connected to the side wall perpendicular to the side wall of the industrial network security encryption device where the air outlet 212 is located. A fourth heat dissipation duct connecting the third heat dissipation duct is formed between the third full-height baffle 114, the seventh full-height baffle 118 and the side wall of the industrial network security encryption device. A fifth heat dissipation duct connecting the second full-height baffle 113, the fifth full-height baffle 116, the seventh baffle and the side wall of the industrial network security encryption device is formed. Among them, the seventh full-height baffle 118 is an arc-shaped baffle, and the opening direction of the arc-shaped baffle faces the fourth heat dissipation duct. The fourth baffle 115 is a non-full-height baffle.

[0032] The air duct adopts a multi-segment baffle design (including five heat dissipation air ducts formed by the first to seventh full-height baffles 118), forming a multi-stage turning dust removal mechanism. When air flows through the first heat dissipation air duct (air inlet area 211), dust particles collide with the baffle wall and settle due to inertia. Subsequent air ducts (second to fifth heat dissipation air ducts) further separate particles by changing the airflow direction multiple times using the Stokes number principle: when the particle inertia-airflow viscosity ratio Stk>1: the particle inertia is much greater than the airflow viscosity, 100% of the particles collide with the wall and are almost completely intercepted; when 0.1<particle inertia-airflow viscosity ratio Stk<1: some particles follow the airflow to change direction, and some collide with the wall, with a dust removal efficiency of 10%~80%; when the particle inertia-airflow viscosity ratio Stk<0.1: the particles completely follow the airflow to change direction, and the dust removal efficiency is less than 10%, as shown in Table 1. Among them, the particle inertia-airflow viscosity ratio, i.e., the Stokes number (Stk), is a key dimensionless number that measures the magnitude of particle inertia in the airflow.

[0033] Table 1: Estimated values ​​of particle diameter and single-impact separation rate

[0034] However, the overall dust removal efficiency across multiple bends is not linearly additive, but decreases progressively. Its overall relationship can be approximated as an exponential decay, according to... ; Calculate the separation rate of three right-angle collisions Where n is the number of turns and k is the attenuation constant; particles with a diameter >10um account for 87.5%; particles with a diameter of 5-10um account for 49%. Therefore, three collisions best balance the intake pressure and the fractionation rate. Thus, the following chassis airflow design is proposed. The rougher the baffle material, the better, and adding a dust collection slot 119 below the baffle effectively reduces dust inflow. The optimal intake airflow velocity is 1.5-2m / s. A secondary pressurization fan is added, ensuring that the airflow velocity above the motherboard is greater than the velocity in the third-stage dust removal zone, but less than the intake airflow velocity, reducing the gravity-driven dust removal process occurring above the motherboard. The multi-stage airflow design balances dust removal rate and energy consumption without significantly increasing air resistance. This structure reduces fan load, extends fan lifespan, and reduces thermal interference to core components through physical isolation.

[0035] The seventh full-height baffle 118 adopts an arc-shaped structure with its opening facing the fourth heat dissipation air duct. This optimizes the streamlined path of airflow when turning, reduces airflow resistance, and enhances the dust removal effect due to centrifugal force and gravity. Combined with the rough surface of the baffle material and the dust collection groove 119 below (installed on the base plate 111), it can effectively capture and collect settled particles, preventing them from entering the core area of ​​the equipment.

[0036] The fan unit includes a first fan 1221, a second fan 1222, and a third fan 1223. The first fan 1221 is installed in the air inlet 211, and the air outlet of the first fan 1221 faces the first heat dissipation duct. The second fan 1222 is located in the fourth heat dissipation duct, and the air outlet of the first fan 1221 faces the fifth heat dissipation duct. The third fan 1223 is installed in the air outlet 212, and the air outlet of the third fan 1223 faces the external environment.

[0037] The multi-channel series design (the interconnected structure of the first to fifth air channels) forms a directional airflow path, which, together with the two-stage pressurized fan (i.e., the second fan 1222), allows heat to be efficiently dissipated along the preset channels. The arc-shaped baffle reduces turbulence and maintains airflow stability, thereby improving the heat dissipation efficiency of the TEC cooling components and preventing the GPU / CPU from throttling due to overheating.

[0038] The enclosed heat dissipation duct structure completely blocks external dust, moisture and other pollutants from entering the industrial network security encryption device 210, adapting to dusty and humid industrial environments and avoiding the risk of short circuits or corrosion caused by dust accumulation on the circuit boards.

[0039] TEC cooling components include: Temperature sensor (U5) is used to collect the ambient temperature of the area where the GPU or CPU is located in real time; The TEC cooling drive circuit is used to adaptively drive the TEC cooling element inside the TEC cooling component to perform cooling based on the collected temperature information. The CPU main control board is electrically connected to the temperature sensor and the TEC cooling drive circuit.

[0040] The cooling system of this industrial network security encryption device is integrated within the device housing, employing a modular design to ensure stable installation and easy maintenance of all components. The housing is made of high-strength aluminum alloy, providing both heat dissipation assistance and structural protection.

[0041] The TEC cooling assembly is mounted above the GPU / CPU module. Its core component, the TEC cooling chip, is tightly attached to the GPU / CPU's heat dissipation surface using high thermal conductivity thermal grease, with a gap controlled between 0.1-0.3mm to ensure efficient heat transfer. The CPU main control board is fixed to a mounting bracket inside the device housing and is electrically connected to the temperature sensor and TEC cooling drive circuit via ribbon cables. The ribbon cables are shielded to reduce electromagnetic interference.

[0042] The serrated heat sink 121 in the heat dissipation assembly is fixed to the hot side of the TEC cooling plate by bolts, and a coating with a thermal conductivity ≥4.0 W / (m²) is applied between the heat sink 121 and the TEC cooling plate. The thermal grease (K) ensures continuous heat conduction. The fan unit is installed on the side of the heat sink 121 away from the TEC cooling plate and is fixed to the equipment housing by a bracket. The fan unit is positioned at the air inlet 211, air outlet 212 and middle position of the heat dissipation air duct to form a directional heat dissipation airflow, carrying the heat source out of the industrial network security encryption device 210.

[0043] The temperature sensor selected is the DS18B20 digital temperature sensor, which features a wide temperature measurement range (-55℃ to +125℃) and high accuracy (error ≤ ±0.5℃ within the range of -10℃ to +85℃), making it suitable for complex temperature changes in industrial environments.

[0044] The temperature sensor is mounted on the PCB board in the GPU / CPU area using a snap-on mounting bracket. The sensor probe is 5-8mm vertically from the GPU / CPU heatsink surface, avoiding measurement errors caused by direct contact with heat-generating components while accurately acquiring the ambient temperature of the core heat-generating area. The sensor's signal pins are connected to the corresponding interface of the acquisition circuit via shielded cables. The power and ground lines are connected to the device's 5V power supply and signal ground, respectively, ensuring stable power supply.

[0045] The heat sink 121 is made of 6063 aluminum alloy and is formed into a serrated structure through extrusion molding. The heat sink 121 is 50mm high, with 20-30 serrations, each serration being 1.5mm thick and the spacing between adjacent serrations being 3mm, effectively increasing the heat dissipation area to 0.5-0.8m². One side of the heat sink 121 has a mounting surface that matches the TEC cooling plate, with a surface roughness ≤Ra0.8μm to ensure a tight fit with the TEC cooling plate.

[0046] The fan unit consists of three DC brushless fans (specifically, fan 1221, fan 1222, and fan 1223). Each fan measures 80mm × 80mm × 25mm, has a rated voltage of 5V, a rated speed of 2000-3000rpm, and a maximum airflow of ≥50CFM. The fan control pins are connected to the output of the fan control circuit, and the fan speed is adjusted via a PWM signal output from the CPU main control board, achieving stepless speed regulation.

[0047] The cross-sectional dimensions of the heat dissipation duct are 100mm × 80mm, and the duct length is designed to be 150-200mm according to the equipment housing structure, ensuring that the airflow velocity within the duct is ≥2m / s to meet the requirements of efficient heat dissipation. The baffle is 5mm thick and is sealed with sealing strips between itself and the equipment housing, heat sink 121, and fan unit to prevent airflow leakage that could lead to a decrease in heat dissipation efficiency.

[0048] In addition, a dust filter is installed at the air inlet 211 of the independent heat dissipation duct. The dust filter has a detachable and washable design and is connected to the equipment housing by clips, making it easy to clean or replace regularly. The filter's mounting frame is made of ABS material and matches the size of the air duct inlet to ensure no gaps after installation, preventing unfiltered air from entering the air duct and intercepting particulate dust particles. like Figure 2 As shown, the TEC cooling drive circuit includes MOSFET driver U2, MOSFET driver U3, resistors R4 and R5, capacitor C3, diode D1, MOSFET Q1, resistors R6 and R7, capacitor C4, diode D2, MOSFET Q2, resistors R8 and R9, capacitor C5, diode D3, MOSFET Q3, resistors R10 and R11, capacitor C6, diode D4, and MOSFET Q4; the input pin of MOSFET driver U2 is connected to the output pin of the CPU main control board, and the first and second terminals of resistor R4 are connected to the second terminal of the CPU main control board. The negative terminal of transistor D1 is connected to the first output pin of MOSFET driver U2. The second terminal of resistor R4 is connected to the first terminal of resistor R5, the first terminal of capacitor C3, the positive terminal of diode D1, and the gate of MOSFET Q1. The drain of MOSFET Q1 is connected to a 5V power supply. The source of MOSFET Q1, the second terminal of capacitor C3, the second terminal of resistor R5, and the drain of MOSFET Q2 are all connected to the first terminal of the TEC cooler. The first terminal of resistor R6 and the negative terminal of diode D2 are connected to the second output pin of MOSFET driver U2. The second terminal of resistor R6 is connected to the first terminal of resistor R7, the first terminal of capacitor C4, the positive terminal of diode D2, and the gate of MOSFET Q2. The source of MOSFET Q2, the second terminal of capacitor C4, and the second terminal of resistor R7 are all grounded. The input pin of MOSFET driver U3 is connected to the output pin of the CPU main control board. The first terminal of resistor R8 and the negative terminal of diode D3 are connected to the first output pin of MOSFET driver U3. The second terminal of resistor R8 is connected to the first terminal of resistor R9, the first terminal of capacitor C5, the positive terminal of diode D3, and the gate of MOSFET Q3. The drain of MOSFET Q3 is connected to a 5V power supply. The source of MOSFET Q3, the second terminal of capacitor C5, the second terminal of resistor R9, and the drain of MOSFET Q4 are all connected to the second terminal of the TEC cooling chip. The first terminal of resistor R10 and the negative terminal of diode D4 are connected to the second output pin of MOSFET driver U3. The second terminal of resistor R10 is connected to the first terminal of resistor R11, the first terminal of capacitor C6, the positive terminal of diode D4, and the gate of MOSFET Q4. The source of MOSFET Q4, the second terminal of capacitor C6, and the second terminal of resistor R11 are all grounded.

[0049] The TEC cooling drive circuit adopts a dual MOSFET driver combined with a full-bridge drive architecture of MOSFETs. The specific component selection and connection method are as follows: The MOSFET driver uses the IR2104 chip, which has high voltage and high current drive capability and can effectively control the MOSFET's turn-on and turn-off. MOSFETs Q1-Q4 are IRF540N models, with a drain-source voltage ≥100V and continuous drain current ≥28A, meeting the power drive requirements of the TEC cooling chip. Diodes D1-D4 are Schottky diodes SS34, which have the characteristics of short reverse recovery time and small forward voltage drop, used to protect the MOSFETs from reverse voltage surges. Resistors R4, R6, R8, and R10 are current-limiting resistors, resistors R5, R7, R9, and R11 are pull-down resistors, and capacitors C3-C6 are ceramic capacitors, which together constitute the drive and protection circuit for the MOSFET gate.

[0050] Circuit operation: The PWM control signal output by the CPU main control board is input to the input pins of MOSFET drivers U2 and U3. The drivers output corresponding drive signals according to the control signals, controlling the gate potentials of MOSFETs Q1-Q4 through resistors R4, R6, R8, and R10 respectively. When it is necessary to increase the TEC cooling power, the CPU main control board increases the duty cycle of the PWM signal, extending the conduction time of MOSFETs Q1 and Q3, and adjusting the turn-off time of Q2 and Q4 accordingly, thereby increasing the operating current of the TEC cooling chip; conversely, it decreases the duty cycle, reducing the cooling power and achieving adaptive temperature regulation.

[0051] The CPU main control board uses the STM32F407ZGT6 microcontroller, which has rich GPIO interfaces, ADC acquisition channels and PWM output functions, and can meet the needs of multi-module collaborative control.

[0052] The CPU main control board connects to the output of the temperature sensor's acquisition circuit via an ADC acquisition channel to receive temperature acquisition signals in real time. It outputs PWM control signals to the MOSFET driver of the TEC cooling drive circuit via a GPIO interface to regulate cooling power. Simultaneously, it establishes a connection with the fan control circuit through another set of GPIO interfaces to control the fan unit's start, stop, and speed. The main control board's built-in Flash memory stores configuration information such as temperature thresholds and PID control parameters, facilitating equipment debugging and parameter optimization.

[0053] The circuit employs a full-bridge topology with MOSFETs Q1-Q4. With independent control of MOSFET drivers U2 and U3, the direction of current flowing through the TEC (Cooler Device) can be flexibly adjusted. When Q1 and Q4 are on, current flows from the first terminal of the TEC to the second, and the cooling surface absorbs heat from the GPU / CPU (cooling mode). When Q3 and Q2 are on, the current reverses, and the TEC switches to heating mode. This prevents operational failures of core components due to excessively low temperatures in low-temperature industrial environments (e.g., below -10℃). This design overcomes the limitations of traditional unidirectional heat dissipation, adapting to the dual requirements of "high-temperature heat dissipation and low-temperature anti-condensation" in industrial settings, ensuring stable operation of the equipment within a wide temperature range of -20℃ to 60℃.

[0054] The CPU main control board controls the output duty cycle of the MOSFET driver by outputting a PWM signal, thereby adjusting the MOSFET's on-time. When the GPU experiences a high load and a sudden temperature rise, the PWM duty cycle is increased, raising the TEC operating current (up to 5A) and enhancing cooling power. When the load decreases, the duty cycle is decreased, reducing the current to save energy. The TEC operating point can be dynamically adjusted to the optimal efficiency range (efficiency ηtec increased by 15%~20%), avoiding the problem of "high current, low efficiency" in traditional linear drives.

[0055] In the circuit, diodes D1-D4 are Schottky diodes (e.g., SS34), which have short reverse recovery time (≤10ns) and small forward voltage drop (≤0.5V), effectively absorbing the reverse spike voltage generated when the MOSFET is turned off, preventing the TEC from being damaged by voltage breakdown. At the same time, resistors R4, R6, R8, and R10 (current limiting resistors) and capacitors C3-C6 (decoupling capacitors) form a gate protection network, which slows down the rate of change of the MOSFET gate voltage, avoids the surge current (usually 3 to 5 times the rated current) during TEC startup, and extends the TEC's lifespan by more than 30%.

[0056] The MOSFETs Q1-Q4 are selected as high-voltage models (e.g., IRF540N, drain-source voltage ≥100V), capable of withstanding instantaneous overvoltage caused by industrial power grid fluctuations. Combined with the CPU main control board's current sampling function (monitoring Itec via a series sampling resistor), when the current exceeds the Itec rated value, the PWM duty cycle is immediately reduced to achieve overcurrent protection. This design solves the pain points of traditional drive circuits being "unprotected and easily burned out," reducing the probability of equipment downtime due to circuit failure to below 0.1%.

[0057] Capacitors C3-C6 are connected in parallel between the gate and source of the MOSFET to filter out high-frequency noise (above 1MHz) in the driver output signal and prevent electromagnetic interference (EMI) generated by the high-frequency switching of the MOSFET from being conducted to the CPU / GPU module through the power link. The core requirement of the industrial network security encryption device 210 is "distortionless encryption algorithm operation" (e.g., AES-256, SM4 and other algorithms require timing accuracy at the nanosecond level). This design controls electromagnetic interference to below 30dBμV / m, complies with industrial EMC standards (EN 61000-6-2), and ensures the correctness and real-time performance of encryption operations.

[0058] The MOSFET drivers U2 and U3 (e.g., IR2104) have "signal amplification + high and low voltage isolation" functions, which can amplify the weak 3.3V signal output by the CPU main control board into a 12V drive signal, effectively overcoming the limitation of the MOSFET gate threshold voltage (2~4V) and ensuring the fast response of the MOSFET on / off (switching time ≤1μs). At the same time, the high voltage side (connected to 5V power supply) and the low voltage side (connected to CPU main control board) of the driver are electrically isolated, avoiding strong electrical noise from the TEC drive circuit from interfering with the analog acquisition channel of the main control board (e.g., temperature sensor signal), so that the temperature acquisition error is controlled within ±0.3℃, providing accurate data support for the "temperature-entropy coordinated control algorithm".

[0059] Furthermore, the temperature sensor is equipped with a data acquisition circuit, which includes a ferrite bead FB1, capacitors C1 and C2, resistors R1 and R2, amplifier U1, and resistor R3. The first terminal of ferrite bead FB1 and the first terminal of capacitor C1 are both connected to a 5V power supply. The second terminal of capacitor C1 and the first terminal of resistor R1 are both grounded. The second terminal of ferrite bead FB1 is connected to the first terminal of capacitor C2 and the first terminal of resistor R2. The second terminal of capacitor C2 and the second terminal of resistor R1 are both signal grounded. The second terminal of resistor R2 is connected to the non-inverting input terminal of the temperature sensor and amplifier U1. The inverting input terminal of amplifier U1 is connected to the analog input conversion pin of the CPU main control board through resistor R3. The output terminal of amplifier U1 is connected to the analog conversion pin of the CPU main control board.

[0060] The FB1 ferrite bead is a 0603 packaged ferrite bead, model BLM18PG102SN1, with a rated current of 500mA. It is mainly used to suppress high-frequency noise and electromagnetic interference on power lines.

[0061] Capacitors C1 and C2 are both X7R ceramic capacitors with 0603 packages. C1 is used to filter out low-frequency ripple in the 5V power supply, while C2 is used to suppress high-frequency noise. Together, they form a two-stage power supply filter network.

[0062] Resistors R1, R2, and R3 are 0603 packaged metal film resistors. R1 serves as a pull-down resistor for signal ground, stabilizing the reference potential; R2 limits the output current of the temperature sensor to prevent signal overload; R3, together with amplifier U1, forms a signal feedback loop to adjust the amplification factor.

[0063] Amplifier U1 uses the low-power operational amplifier LM324, with an operating voltage range of 3-32V, an input offset voltage of ≤2mV, and a bandwidth of 1MHz. It meets the low-noise amplification requirements of temperature signals and is compatible with the 5V power supply environment of the equipment.

[0064] The temperature sensor selected is the DS18B20 digital temperature sensor, with a temperature measurement range of -55℃ to +125℃ and a measurement accuracy of ≤±0.5℃ in the range of -10℃ to +85℃. It outputs the temperature signal through a single bus and is compatible with the signal input terminal of the acquisition circuit.

[0065] Power supply filtering: When the 5V power supply passes through the ferrite bead FB1, the high-frequency noise is absorbed and attenuated by the ferrite bead, and then the low-frequency ripple is filtered out by C1 and the residual high-frequency noise is suppressed by C2, so as to output a stable and clean power supply to power the temperature sensor and amplifier U1.

[0066] Signal Acquisition and Amplification: The temperature sensor collects the ambient temperature of the area where the GPU / CPU is located in real time, converts the temperature signal into a 0-5V analog voltage signal, and transmits it to the non-inverting input of amplifier U1 via resistor R2. Since U1 forms a voltage follower structure through resistor R3, its output voltage is consistent with the voltage at the non-inverting input, and its output impedance is extremely low, which can effectively drive the ADC acquisition channel of the CPU main control board and avoid signal attenuation and distortion during transmission.

[0067] Signal transmission: The temperature analog signal output by amplifier U1 is transmitted to the analog conversion pin of the CPU main control board through a dedicated signal line. The CPU main control board converts the analog signal into a digital signal through the built-in ADC module, providing accurate data support for the subsequent control of the TEC cooling components and fan unit.

[0068] The ferrite bead FB1, along with capacitors C1 and C2, forms a π-type filter network, achieving full-band noise interception. The ferrite bead FB1 exhibits high impedance characteristics against high-frequency power supply noise from 30MHz to 1GHz, converting noise energy into heat through resistive loss and blocking high-frequency interference from reaching the temperature sensor. Capacitor C1 (low-frequency filter capacitor) filters out low-frequency ripple in the 5V power supply, while capacitor C2 (high-frequency filter capacitor) further filters out residual high-frequency noise. Together, they achieve full-coverage filtering across the DC to GHz frequency band, ensuring a clean power supply for the sensor.

[0069] Amplifier U1 employs a non-inverting input architecture with extremely high input impedance (typically ≥1MΩ), minimizing the load impact of the acquisition circuit on the temperature sensor's output signal. This avoids signal attenuation caused by high sensor output impedance (e.g., some digital temperature sensors have an output impedance exceeding 10kΩ), ensuring the original temperature signal is transmitted intact to the amplification stage.

[0070] The inverting input of amplifier U1 forms a closed-loop feedback with the analog input pin of the CPU main control board through resistor R3. Combined with the signal voltage division and impedance matching effect of resistor R2, the weak voltage signal (typically in the mV range) output by the temperature sensor can be accurately amplified to the voltage range adapted to the CPU ADC module. Simultaneously, the voltage divider network formed by resistors R2 and R3 can compensate for the nonlinear error of the sensor, keeping the temperature acquisition error within ±0.3℃, providing accurate data support for the "TEC thermal balance model" and the "temperature-entropy coordinated control algorithm".

[0071] In addition, the fan unit is equipped with a fan control circuit connected to the CPU main control board (this fan control circuit can drive three fans simultaneously, or each fan can be configured with a fan control circuit). The fan control circuit includes an optocoupler U4, resistors R12, R13, and R14, a MOSFET Q5, and a fan terminal FAN1. The positive terminal of the light-emitting end of the optocoupler U4 is connected to a 3.3V power supply through resistor R12, the negative terminal of the light-emitting end of the optocoupler U4 is connected to the output terminal of the CPU main control board, the collector of the light-receiving end of the optocoupler U4 is connected to the first end of resistor R13 and the first end of resistor R14, the second end of resistor R13 is connected to a 5V power supply, the second end of resistor R14 is connected to the gate of MOSFET Q5, the source of MOSFET Q5 is grounded, the drain of MOSFET Q5 is connected to the first pin of the fan terminal FAN1, and the second pin of the fan terminal FAN1 is connected to a 5V power supply.

[0072] The optocoupler U4 uses the TLP521-1 type optocoupler, with an isolation voltage ≥2500Vrms, which can effectively achieve strong and weak current isolation and avoid mutual interference between the weak current signals of the CPU main control board and the strong current signals of the fan drive; the transmission rate is ≥100kHz, which meets the high-speed transmission requirements of PWM control signals; the forward voltage of the light-emitting terminal is 1.2-1.4V, the rated forward current is 20mA, and it is suitable for 3.3V power supply scenarios.

[0073] Resistors R12, R13, and R14 are all 0603 packaged metal film resistors to ensure resistance stability. R12 serves as a current-limiting resistor for the optocoupler's light-emitting terminal, limiting the forward current to the 10-15mA range to prevent the LED from burning out due to overcurrent. R13 acts as a pull-up resistor for the gate of MOSFET Q5, ensuring that the gate of Q5 remains high when there is no control signal, achieving reliable cutoff. R14 is used to slow down the rate of change of the MOSFET's gate voltage, suppressing spike noise generated during switching.

[0074] The MOSFET Q5 is an N-channel enhancement-type MOSFET IRF3205, with a drain-source voltage ≥55V, continuous drain current ≥110A, and on-resistance ≤8mΩ. It can withstand the instantaneous large current during fan startup (typically 2-3 times the rated current) and is suitable for the load requirements of a 5V power supply driving a fan. The gate threshold voltage is 2-4V, which matches the control signal voltage range after optocoupler isolation, ensuring drive reliability.

[0075] The fan terminal FAN1 uses a 2-pin pluggable terminal with a pitch of 2.54mm (model PH2.54-2P) and a rated current of 5A, which meets the total current requirements of multiple fans connected in series or parallel. The terminal adopts a snap-fit ​​design, which is convenient to plug and unplug and has a tight contact, making it easy for fans to be maintained and replaced later.

[0076] The fan unit consists of four 8025-sized (80mm×80mm×25mm) DC brushless fans connected in parallel to the FAN1 terminal. Each fan has a rated voltage of 5V, a rated current of 0.3A, an airflow of ≥55CFM, and a total operating current of ≤1.2A, which is lower than the upper limit of the continuous drain current of the MOSFET Q5, ensuring drive safety.

[0077] When the device is running, the CPU main control board generates a corresponding PWM control signal based on the temperature data of the heat sink 121 collected by the temperature sensor: When the temperature of heat sink 121 is ≥60℃ (default threshold, which can be adjusted through software configuration), the CPU outputs a low-level PWM signal, the light-emitting end of optocoupler U4 is turned on and emits light, and the light-receiving end is saturated and turned on accordingly. When the temperature of heat sink 121 is ≤50℃, the CPU outputs a high-level signal, the light-emitting end of the optocoupler is cut off, and the light-receiving end is disconnected. The isolation function of the optocoupler completely isolates the low-voltage control circuit of the CPU main control board from the high-voltage drive circuit of the fan, preventing high-voltage noise from interfering with the main control board and ensuring the stability of the control signal.

[0078] Fan start-up: When the light-receiving end of optocoupler U4 is turned on, the current provided by the 5V power supply through resistor R13 is applied to the gate of MOSFET Q5 after being current-limited by R14, causing the gate potential to rise above the turn-on threshold, and Q5 saturates and turns on; the fan unit obtains 5V power supply through the FAN1 terminal and starts running.

[0079] Stepless speed control: The CPU main control board controls the fan speed by adjusting the duty cycle of the PWM signal. When the duty cycle is 50%, the on-time and off-time of MOSFET Q5 are equal, the average voltage obtained by the fan is about 2.5V, and the speed is about 1200rpm. When the duty cycle is 100%, Q5 is continuously conducting, the fan receives full voltage 5V, and the speed reaches the rated value of 2500rpm; The duty cycle can be continuously adjusted within the range of 20%-100%, corresponding to a fan speed of 800rpm-2500rpm, achieving a dynamic balance between heat dissipation requirements and noise and energy consumption.

[0080] Fan stops: When the light-receiving end of optocoupler U4 is disconnected, the pull-up effect of resistor R13 disappears, the gate of MOSFET Q5 discharges to a low level through R14, Q5 is reliably turned off, and the fan unit stops running.

[0081] Optical isolators U4 (e.g., TLP521-1) completely electricalally isolate the 3.3V low-voltage control circuit of the CPU main control board from the 5V high-voltage drive circuit of the fan through "electric-optical-electric" signal conversion, with an isolation voltage ≥2500Vrms. This effectively blocks the spike voltage and high-frequency noise generated during fan motor startup / speed adjustment from crosstalking to the CPU / GPU module through the power supply or signal link. The core requirement of the industrial network security encryption device 210 is "lossless encryption algorithm operation" (e.g., AES-256 and SM4 algorithms require timing accuracy at the nanosecond level). This design controls electromagnetic interference below 30dBμV / m, complying with industrial EMC standards (EN 61000-6-2), ensuring the correctness and real-time performance of encryption operations, and avoiding problems such as encryption key errors and data packet loss caused by interference.

[0082] The unidirectional signal transmission characteristic of the optocoupler can prevent overcurrent and overvoltage faults in the fan drive circuit from being reverse-propagated to the CPU main control board. For example, when a short circuit in the fan causes a sudden increase in current, the light receiving end of the optocoupler will quickly cut off, cutting off the impact of the fault on the main control board. This reduces the probability of the CPU being damaged due to external circuit faults to less than 0.1%, significantly improving the overall reliability of the device.

[0083] The MOSFET Q5 (e.g., IRF3205) uses PWM (Pulse Width Modulation) driving. The CPU main control board controls the MOSFET's conduction time by adjusting the duty cycle of the output PWM signal. When the GPU is under high load (e.g., parallel processing of encryption tasks) and the heatsink 121 temperature reaches ≥60℃, the duty cycle is increased to 80%-100%, providing the fan with full 5V power and a speed of 2500rpm for efficient cooling. When the load decreases and the temperature is ≤50℃, the duty cycle is decreased to 20%-30%, reducing the fan speed to 800-1200rpm. Combined with the "temperature-entropy coordinated control algorithm," fan energy consumption can be reduced by 40%-50%. Compared to traditional "start-stop" fan control, this saves electricity and meets the "low-carbon operation" requirements of industrial equipment.

[0084] Resistor R12 is a current-limiting resistor for the optocoupler's light-emitting terminal, strictly controlling the forward current within the 10-15mA range to prevent the LED from burning out due to overcurrent. Resistors R13 (pull-up resistor) and R14 (current-limiting resistor) work together to stabilize the MOSFET gate voltage within the 2-4V turn-on threshold range, preventing excessively high gate voltage from causing MOSFET breakdown, or excessively low voltage from causing insufficient conduction and increased heat generation. This design can extend the fan's lifespan to over 50,000 hours (approximately 5 years), more than 3 times longer than traditional relay-driven methods.

[0085] like Figure 3 As shown, the present invention provides a heat dissipation method for industrial network security encryption devices, applicable to the heat dissipation system of any of the above-mentioned industrial network security encryption devices, the method comprising: S1. The temperature sensor collects the GPU or CPU's own temperature and ambient temperature signals; the CPU main control board controls the TEC cooling chip to start cooling based on the ambient temperature signal, so that the cooling surface absorbs the heat generated by the GPU or CPU. S2. Based on the temperature changes of the TEC cooling chip, dynamically adjust the start / stop and speed of the fan unit to maintain the internal temperature stability of the industrial network security encryption device 210.

[0086] Specifically, step S1 includes: S11. Collect the cold end temperature of the TEC cooling chip using a temperature sensor. TEC cooling chip hot end temperature GPU / CPU surface temperature and ambient temperature And collect the operating current of the TEC cooling chip. Operating voltage of TEC cooling chip and fan current ; S12. Intelligent control based on dynamic thermal equilibrium modeling: Define the thermal balance equation for the TEC system: ; in, This refers to the actual heat dissipation capacity of the TEC system. This refers to the heat dissipation power of the GPU. This is for system heat loss; For TEC cooling power; Introducing the TEC efficiency curve function: ; Among them, by fitting the efficiency curve in real time, the TEC operating point is dynamically adjusted to the preset optimal efficiency range.

[0087] Four DS18B20 digital temperature sensors were selected and fixed at designated monitoring points inside the device. Two sensors were attached to the cold end (near the GPU / CPU side) and hot end (connected to heatsink 121 side) of the TEC cooler using thermally conductive adhesive, ensuring that the sensor probes were in close contact with the TEC surface with a gap not exceeding 0.2mm. One sensor was mounted on the PCB board of the GPU / CPU core computing area using a snap-on mounting bracket, with the probe 6mm vertically away from the chip's heatsink surface. The last sensor was fixed inside the device housing outside the independent air duct for collecting ambient temperature data.

[0088] In the TEC cooling drive circuit, a 0.1Ω / 2W precision sampling resistor is connected in series with the TEC cooling chip power supply circuit to collect the TEC operating current. A differential voltage acquisition module is connected in parallel across the TEC cooler. The module has an input impedance ≥1MΩ and a sampling accuracy ≤±0.01V. This module is used to acquire the TEC operating voltage. In the main power supply circuit of the fan unit in the fan control circuit, a 0.05Ω / 5W sampling resistor is connected in series to collect the total operating current of the fan in conjunction with a current acquisition chip (model INA180). The signal output by the acquisition chip is transmitted to the ADC interface of the CPU main control board through a shielded cable.

[0089] TEC cooling power Operating current of TEC cooling chip and temperature difference Related: ; R is the Seebeck coefficient of the TEC cooler, R is the internal resistance of the TEC, and K is the thermal conductivity of the TEC; all are known and fixed parameters.

[0090] It can capture real-time changes in heat generation caused by GPU / CPU load fluctuations (such as sudden changes in computing power during parallel processing of encryption algorithms), avoiding the problems of insufficient or excessive cooling caused by traditional "fixed-power cooling". It accurately calculates actual heat dissipation capacity through thermal balance modeling. When the GPU generates a lot of heat under high load, it can quickly identify... Growth trend, increase TEC cooling capacity in advance to ensure and Dynamic matching effectively prevents core components from overheating, crashing, or failing in encrypted operations due to heat accumulation.

[0091] The TEC efficiency curve function uses "effective heat dissipation capacity / input power" as the core indicator. By fitting the curve in real time, the TEC operating current can be dynamically adjusted. The temperature difference ΔT ensures that the TEC always operates at its optimal efficiency point. Compared to traditional fuzzy control, this reduces unnecessary energy consumption and achieves a balance between heat dissipation requirements and energy consumption. This is based on a clearly defined heat balance equation. and The quantification relationship between ΔT and ΔT avoids the Joule heating surge caused by blindly increasing the TEC current. When the GPU load decreases, the cooling power is automatically reduced through equation calculation, which ensures heat dissipation while reducing the power loss of the TEC drive circuit, adapting to the low-carbon operation requirements of industrial equipment.

[0092] Incorporating system heat loss into the heat balance equation ,and Parameters such as R and K are known fixed values, which can compensate in advance for heat dissipation deviations caused by factors such as changes in industrial ambient temperature (e.g., high-temperature workshops, low-temperature outdoor environments) and heat leakage from air ducts. Even in wide temperature range industrial scenarios of -20℃ to 60℃, heat dissipation can still be ensured through equation correction. Stable performance, preventing heat dissipation failure caused by environmental interference. During long-term operation of industrial equipment, the performance parameters of the TEC cooler may experience slight drift; this can be dynamically corrected through real-time fitting of the efficiency curve. and The matching relationship offsets the efficiency decline caused by parameter drift, ensuring long-term stable TEC cooling performance and extending the effective service life of the equipment.

[0093] Finally, step S2 specifically includes a temperature-entropy coordinated regulation strategy: Define the system temperature entropy index : ; in, These are the weighting coefficients, corresponding to the heat dissipation temperature difference entropy, fan power consumption entropy, and temperature deviation entropy, respectively. The preset maximum fan current; Indicates the preset target temperature for the GPU or CPU; The control objective is to minimize the system temperature entropy index. The fan speed and TEC current are adjusted using a PID algorithm.

[0094] By reasonably configuring the weighting coefficients (e.g., increasing k1 under high load and increasing k2 under low load), the drawbacks of traditional single control that "only pursues heat dissipation and ignores noise" or "only reduces noise and sacrifices heat dissipation" can be avoided, and a dynamic balance between the two can be achieved under different operating conditions.

[0095] When the GPU experiences a sudden surge in thermal load due to parallel processing of encryption tasks, the temperature entropy metric S will rise synchronously as Th increases. The PID algorithm quickly outputs the adjustment value by calculating the rate of change of S in real time. Control commands: On the one hand, increase the TEC cooling power to enhance heat absorption capacity, and on the other hand, increase the fan speed to accelerate heat dissipation. Compared with the traditional "step-type temperature control", the response speed is significantly improved, effectively preventing the equipment from shutting down due to instantaneous high temperature.

[0096] When ambient temperature Ta changes (e.g., diurnal temperature range in industrial workshops, seasonal changes) or GPU load fluctuates (e.g., increase or decrease in encryption task volume), the temperature entropy metric can be used to... and These changes are captured in real time without the need for manual parameter adjustments. The PID algorithm automatically corrects the control amplitude through the coordinated calculation of proportional, integral, and derivative components, ensuring that the cooling system always adapts to the current operating conditions and maintains the minimum value of S.

[0097] Although the present invention has been described in detail with reference to the accompanying drawings and preferred embodiments, the present invention is not limited thereto. Various equivalent modifications or substitutions can be made to the embodiments of the present invention by those skilled in the art without departing from the spirit and essence of the invention, and such modifications or substitutions should all be within the scope of the present invention. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should also be covered within the protection scope of the present invention.

Claims

1. A heat dissipation system for an industrial network security encryption device, characterized in that, This includes the heat dissipation duct and the TEC cooling components and heat dissipation components deployed within the heat dissipation duct; The TEC cooling component is used to collect the temperature signal of the GPU / CPU inside the industrial network security encryption device (210) in real time, and adaptively drive the TEC cooling chip inside the TEC cooling component to cool based on the collected temperature information; The heat dissipation assembly, including a heat sink (121) and a fan unit, is used to dissipate the heat generated by the hot surface of the TEC cooling chip to the outside of the industrial network security encryption device (210); The heat dissipation duct physically isolates the heat dissipation components from the PCB board, power module, and CPU / GPU module inside the industrial network security encryption device (210) to form a heat dissipation duct. The heat dissipation duct is located on the top of the industrial network security encryption device (210), the air inlet (211) of the heat dissipation duct is located on the side wall of the industrial network security encryption device (210), and the air outlet (212) of the heat dissipation duct is located on the opposite side of the air inlet (211) of the heat dissipation duct. The heat dissipation duct has an installation port corresponding to the TEC cooling component. A sealing component is provided between the TEC cooling component and the installation port on the heat dissipation duct. The cooling surface of the TEC cooling chip is in close contact with the GPU or CPU. The hot surface of the TEC cooling chip is thermally connected to the heat sink (121). The heat sink (121) is located in the heat dissipation duct above the TEC cooling chip. The fan unit is configured at the air inlet (211), air outlet (212) and middle position of the heat dissipation duct.

2. The heat dissipation system of the industrial network security encryption device according to claim 1, characterized in that, The heat dissipation duct includes a base plate (111), a first full-height baffle (112), a second full-height baffle (113), a third full-height baffle (114), a fourth baffle, a fifth full-height baffle (116), a sixth full-height baffle (117), and a seventh full-height baffle (118). The base plate (111) is horizontally positioned between the upper part of the CPU / GPU module and the top shell of the industrial network security encryption device (210). The base plate (111) physically isolates the heat dissipation components from the PCB board, power module, and CPU / GPU module inside the industrial network security encryption device (210). The base plate (111) is provided with a mounting port corresponding to the TEC cooling component. A sealing component is provided between the TEC cooling component and the mounting port on the base plate (111). All baffles are set perpendicular to the base plate (111), and all baffles except the fourth baffle are perpendicular to the base plate (111). The top of all baffles except the fourth baffle is connected to the top shell of the industrial network security encryption device (210). The first full-height baffle (112) is located on one side of the air inlet (211) of the heat dissipation duct and is perpendicular to the side wall of the industrial network security encryption device where the air inlet (211) is located. The second full-height baffle (113) is parallel to the side wall of the industrial network security encryption device where the air inlet (211) is located, and the first full-height baffle (112), the second full-height baffle (113) and the side wall of the industrial network security encryption device form a first heat dissipation duct. The third full-height baffle (114) is located on the side of the first full-height baffle (112) away from the air inlet (211) and is parallel to the first full-height baffle (112). One end of the plate (114) is sealed to the second full-height baffle (113). The fourth baffle is set at the end of the third full-height baffle (114) away from the second full-height baffle (113) and is perpendicular to the side wall of the industrial network security encryption device where the air inlet (211) is located. The first full-height baffle (112), the third full-height baffle (114), the fourth baffle and the side wall of the industrial network security encryption device form a second heat dissipation air duct that connects to the first heat dissipation air duct. A third heat dissipation air duct that connects to the second heat dissipation channel is reserved between the fourth baffle and the top shell of the industrial network security encryption device (210); the fifth full-height baffle (116) A sixth full-height baffle (117) is vertically positioned between the second full-height baffle (113) and the side wall of the industrial network security encryption device where the air outlet (212) is located, forming a closed area; the sixth full-height baffle (117) is positioned on the side away from the closed area of ​​the fifth full-height baffle (116) and is parallel to the fifth full-height baffle (116), and is sealed to the side wall of the industrial network security encryption device where the air outlet (212) is located, with the air outlet (212) located on the side wall of the industrial network security encryption device between the fifth full-height baffle (116) and the sixth full-height baffle (117); the seventh full-height baffle (118) is vertically positioned between the sixth full-height baffle (113) and the side wall of the industrial network security encryption device where the air outlet (212) is located. The high baffle (117) is sealed at one end away from the side wall of the industrial network security encryption device where the air outlet (212) is located, and the other end of the seventh full-height baffle (118) is sealed at the side wall perpendicular to the side wall of the industrial network security encryption device where the air outlet (212) is located; the third full-height baffle (114), the seventh full-height baffle (118) and the side wall of the industrial network security encryption device form a fourth heat dissipation air duct that connects to the third heat dissipation air duct; the second full-height baffle (113), the fifth full-height baffle (116), the seventh baffle and the side wall of the industrial network security encryption device form a fifth heat dissipation air duct that connects to the fourth heat dissipation air duct.

3. The heat dissipation system of the industrial network security encryption device according to claim 2, characterized in that, The fan unit includes a first fan (1221), a second fan (1222) and a third fan (1223). The first fan (1221) is installed in the air inlet (211) and the air outlet of the first fan (1221) faces the first heat dissipation duct. The second fan (1222) is located in the fourth heat dissipation duct and the air outlet of the first fan (1221) faces the fifth heat dissipation duct. The third fan (1223) is installed in the air outlet (212) and the air outlet of the third fan (1223) faces the external environment.

4. The heat dissipation system of the industrial network security encryption device according to claim 1, characterized in that, TEC cooling components include: Temperature sensor, used to collect the ambient temperature of the area where the GPU or CPU is located in real time; The TEC cooling drive circuit is used to adaptively drive the TEC cooling element inside the TEC cooling component to perform cooling based on the collected temperature information. The CPU main control board is electrically connected to the temperature sensor and the TEC cooling drive circuit.

5. The heat dissipation system of the industrial network security encryption device according to claim 4, characterized in that, The temperature sensor is equipped with a data acquisition circuit, which includes a magnetic bead FB1, a capacitor C1, a capacitor C2, a resistor R1, a resistor R2, an amplifier U1, and a resistor R3. The first terminal of the ferrite bead FB1 and the first terminal of the capacitor C1 are both connected to a 5V power supply. The second terminal of the capacitor C1 and the first terminal of the resistor R1 are both grounded. The second terminal of the ferrite bead FB1 is connected to the first terminal of the capacitor C2 and the first terminal of the resistor R2. The second terminal of the capacitor C2 and the second terminal of the resistor R1 are both signal grounded. The second terminal of the resistor R2 is connected to the non-inverting input terminal of the temperature sensor and the amplifier U1. The inverting input terminal of the amplifier U1 is connected to the analog input conversion pin of the CPU main control board through the resistor R3. The output terminal of the amplifier U1 is connected to the analog conversion pin of the CPU main control board.

6. The heat dissipation system of the industrial network security encryption device according to claim 4, characterized in that, The TEC cooling drive circuit includes MOSFET driver U2, MOSFET driver U3, resistor R4, resistor R5, capacitor C3, diode D1, MOSFET Q1, resistor R6, resistor R7, capacitor C4, diode D2, MOSFET Q2, resistor R8, resistor R9, capacitor C5, diode D3, MOSFET Q3, resistor R10, resistor R11, capacitor C6, diode D4, and MOSFET Q4; The input pin of MOSFET driver U2 is connected to the output pin of the CPU main control board. The first end of resistor R4 and the negative terminal of diode D1 are connected to the first output pin of MOSFET driver U2. The second end of resistor R4 is connected to the first end of resistor R5, the first end of capacitor C3, the positive terminal of diode D1, and the gate of MOSFET Q1. The drain of MOSFET Q1 is connected to the 5V power supply. The source of MOSFET Q1, the second end of capacitor C3, the second end of resistor R5, and the drain of MOSFET Q2 are all connected to the first end of the TEC cooler. The first end of resistor R6 and the negative terminal of diode D2 are connected to the second output pin of MOSFET driver U2. The second end of resistor R6 is connected to the first end of resistor R7, the first end of capacitor C4, the positive terminal of diode D2, and the gate of MOSFET Q2. The source of MOSFET Q2, the second end of capacitor C4, and the second end of resistor R7 are all grounded. The input pin of MOSFET driver U3 is connected to the output pin of the CPU main control board. The first end of resistor R8 and the negative terminal of diode D3 are connected to the first output pin of MOSFET driver U3. The second end of resistor R8 is connected to the first end of resistor R9, the first end of capacitor C5, the positive terminal of diode D3, and the gate of MOSFET Q3. The drain of MOSFET Q3 is connected to the 5V power supply. The source of MOSFET Q3, the second end of capacitor C5, the second end of resistor R9, and the drain of MOSFET Q4 are all connected to the second end of the TEC cooler. The first end of resistor R10 and the negative terminal of diode D4 are connected to the second output pin of MOSFET driver U3. The second end of resistor R10 is connected to the first end of resistor R11, the first end of capacitor C6, the positive terminal of diode D4, and the gate of MOSFET Q4. The source of MOSFET Q4, the second end of capacitor C6, and the second end of resistor R11 are all grounded.

7. The heat dissipation system of the industrial network security encryption device according to claim 4, characterized in that, The fan unit is equipped with a fan control circuit connected to the CPU main control board. The fan control circuit includes an optocoupler U4, resistors R12, R13, and R14, a MOSFET Q5, and a fan terminal FAN1. In optocoupler U4, the positive terminal of the light-emitting end is connected to a 3.3V power supply through resistor R12, the negative terminal of the light-emitting end of optocoupler U4 is connected to the output terminal of the CPU main control board, the collector of the light-receiving end of optocoupler U4 is connected to the first terminal of resistor R13 and the first terminal of resistor R14, the second terminal of resistor R13 is connected to a 5V power supply, the second terminal of resistor R14 is connected to the gate of MOSFET Q5, the source of MOSFET Q5 is grounded, the drain of MOSFET Q5 is connected to the first pin of fan terminal FAN1, and the second pin of fan terminal FAN1 is connected to a 5V power supply.

8. A heat dissipation method for an industrial network security encryption device, characterized in that, The method, applicable to the heat dissipation system of the industrial network security encryption device according to any one of claims 1-7, comprises: S1. The temperature sensor collects the GPU or CPU's own temperature and ambient temperature signals; the CPU main control board controls the TEC cooling chip to start cooling based on the ambient temperature signal, so that the cooling surface absorbs the heat generated by the GPU or CPU. S2. Based on the temperature change of the TEC cooling chip, dynamically adjust the start / stop and speed of the fan unit to maintain the internal temperature stability of the industrial network security encryption device (210).

9. The heat dissipation method for the industrial network security encryption device according to claim 8, characterized in that, Step S1 includes: S11. Collect the cold end temperature of the TEC cooling chip using a temperature sensor. TEC cooling chip hot end temperature GPU / CPU surface temperature and ambient temperature And collect the operating current of the TEC cooling chip. Operating voltage of TEC cooling chip and fan current ; S12. Intelligent control based on dynamic thermal equilibrium modeling: Define the thermal balance equation for the TEC system: ； in, This refers to the actual heat dissipation capacity of the TEC system; This refers to the heat dissipation power of the GPU. For system heat loss; For TEC cooling power; Introducing the TEC efficiency curve function: ； Among them, by fitting the efficiency curve in real time, the TEC operating point is dynamically adjusted to the preset optimal efficiency range.

10. The heat dissipation method for the industrial network security encryption device according to claim 9, characterized in that, Step S2 specifically includes a temperature-entropy coordinated regulation strategy: Define the system temperature entropy index : ； in, These are the weighting coefficients, corresponding to the heat dissipation temperature difference entropy, fan power consumption entropy, and temperature deviation entropy, respectively. The preset maximum fan current; Indicates the preset target temperature for the GPU or CPU; The control objective is to minimize the system temperature entropy index. The fan speed and TEC current are adjusted using a PID algorithm.

Images