Light emitting device, method of manufacturing the same, and display apparatus

Abstract

This invention provides a light-emitting device, its fabrication method, and a display apparatus, relating to the field of display devices. The light-emitting device includes a light-emitting layer, two semiconductor layers disposed on both sides of the light-emitting layer, and at least one polarized insulator. Under the influence of an external electric field, the two semiconductor layers respectively transport electron carriers and hole carriers. The polarized insulator is disposed on the periphery of the corresponding semiconductor layer, and its polarity is the same as that of the corresponding semiconductor layer. It can generate a repulsive force on the carriers within the semiconductor layer, causing the carriers to migrate towards the central region of the semiconductor layer. By applying a repulsive force using the principle of "like charges repel," the diffusion of carriers towards the edge of the semiconductor layer is suppressed. This reduces non-radiative recombination of carriers at the edge due to sidewall damage, lowers the probability of non-radiative recombination, and achieves control over carrier transport and distribution, thereby improving carrier utilization efficiency and quantum efficiency within the light-emitting layer.

Description

Technical Field

[0001] The invention belongs to the technical field of display devices, and in particular relates to a light-emitting device, its preparation method, and a display device. Background Technology

[0002] Sidewall damage is difficult to avoid during the fabrication of light-emitting diodes (LEDs). For example, when using plasma dry etching technology to process semiconductor layers, although high etching precision can be achieved due to the anisotropic etching characteristics of plasma, high-energy particles bombarding the semiconductor material surface during the etching process can easily cause lattice damage and dangling bonds on the etched sidewalls.

[0003] In traditional light-emitting devices, these damages can induce nonradiative recombination during light emission (nonradiative recombination refers to the process where charge carriers dissipate energy as heat or other forms instead of releasing photons during recombination), thus significantly reducing the internal quantum efficiency of the light-emitting device. Simultaneously, the damaged region may also become a trap center for charge carriers, capturing them and further reducing the number of charge carriers participating in effective light-emitting recombination, leading to a decrease in the device's brightness and lifetime. Summary of the Invention

[0004] In view of this, the present invention provides a light-emitting device, a method for preparing the same, and a display device, with the aim of improving the luminous efficiency of the light-emitting device.

[0005] The technical solution of the invention is implemented as follows:

[0006] An embodiment of the invention provides a light-emitting device, comprising a light-emitting layer, two semiconductor layers, and at least one polarized insulator. The two semiconductor layers are disposed on opposite sides of the light-emitting layer, and are respectively used to transport electron carriers and hole carriers under the action of an external electric field, so that the electron carriers and the hole carriers recombine within the light-emitting layer and generate light radiation. At least one polarized insulator is correspondingly disposed on the periphery of the semiconductor layer, and the polarity of the polarized insulator is the same as that of the corresponding semiconductor layer, so as to generate a repulsive force on the carriers within the semiconductor layer, causing the carriers to migrate towards the middle region of the corresponding semiconductor layer under the action of the repulsive force.

[0007] In one embodiment, the polarized insulator is disposed on two opposite sides of the periphery of the semiconductor layer.

[0008] In one embodiment, grooves are respectively provided on the two opposite sides, and the polarized insulator is disposed in the grooves.

[0009] In one embodiment, the two semiconductor layers include a first semiconductor layer and a second semiconductor layer, and the light-emitting device further includes a substrate layer. The substrate layer, the first semiconductor layer, the light-emitting layer, and the second semiconductor layer are sequentially disposed along a first direction. The trenches on the two opposite sides of the first semiconductor layer include a first trench and a second trench. The first trench extends along the first direction from the side of the second semiconductor layer away from the substrate layer to the interior of the first semiconductor layer, and the second trench extends along the first direction from the side of the second semiconductor layer away from the substrate layer to the surface of the substrate layer.

[0010] In one embodiment, the first semiconductor layer and the second semiconductor layer each have an oriented end face facing the light-emitting layer; in the first direction, the polarized insulator is flush with the oriented end face of the corresponding semiconductor layer.

[0011] In one embodiment, it further includes a positive electrode and a negative electrode, the positive electrode being disposed on the side of the second semiconductor layer away from the substrate layer; the negative electrode being disposed in the first trench and located on the outside of the polarized insulator.

[0012] In one embodiment, the charged polar insulator is formed by mixing an insulating material with a charged material.

[0013] In one embodiment, the charged material includes a negatively charged material, the negatively charged body being made of non-metallic oxides and / or metal sulfides; and / or, the insulator being made of at least one of polyimide, polytetrafluoroethylene, and boron nitride.

[0014] The present invention also provides a method for fabricating a light-emitting device, the method comprising the following steps: A light-emitting structure is provided; wherein the light-emitting structure includes a substrate layer, a first semiconductor layer, a light-emitting layer and a second semiconductor layer disposed sequentially, and a trench is formed on the periphery of the first semiconductor layer; Insulating materials and negatively charged materials are mixed according to a preset ratio to form a liquid insulator with negative polarity. The liquid negatively charged insulator is injected into the trench and shaped so that the end face of the negatively charged insulator facing away from the substrate layer is flush with the side of the second semiconductor layer facing away from the substrate layer. The charged polar insulator is processed to form a mounting space on the outside of the charged polar insulator, and the end face of the charged polar insulator facing away from the substrate layer is flush with the side of the first semiconductor layer facing away from the substrate layer. A negative electrode is formed within the mounting space, and a positive electrode is formed on the side of the second semiconductor layer opposite to the substrate layer.

[0015] In one embodiment, injecting and shaping the liquid negatively charged insulator into the trench includes: using an inkjet printing process to inject and shape the liquid negatively charged insulator into the trench.

[0016] In one embodiment, processing the negatively polarized insulator to form a mounting space on the outer side of the negatively polarized insulator, and making the end face of the negatively polarized insulator facing away from the substrate flush with the side of the first semiconductor layer facing away from the substrate, includes: processing the negatively polarized insulator using photolithography and etching processes to form a mounting space on the outer side of the negatively polarized insulator; and processing the negatively polarized insulator using photolithography and etching processes to make the end face of the negatively polarized insulator facing away from the substrate flush with the side of the first semiconductor layer facing away from the substrate.

[0017] The present invention also provides a display device, the display device including a light-emitting device, the light-emitting device including a light-emitting layer, two semiconductor layers and at least one polarized insulator; the two semiconductor layers are respectively disposed on both sides of the light-emitting layer, the two semiconductor layers are respectively used to transport electron carriers and hole carriers under the action of an external electric field, so that the electron carriers and the hole carriers recombine in the light-emitting layer and generate light radiation; at least one of the semiconductor layers is correspondingly disposed on the periphery of the polarized insulator, the polarity of the polarized insulator is the same as the polarity of the corresponding semiconductor layer, so as to generate a repulsive force on the carriers in the semiconductor layer, causing the carriers to migrate to the middle region of the corresponding semiconductor layer under the action of the repulsive force.

[0018] The light-emitting device provided in this invention utilizes a charged polarity insulator with the same polarity as the semiconductor layer, disposed around the periphery of the semiconductor layer. By applying the principle of "like charges repel," a repulsive force is exerted on the charge carriers within the semiconductor layer, suppressing their diffusion towards the edge region. This not only reduces nonradiative recombination of charge carriers at the edge due to sidewall damage and other factors, lowering the probability of nonradiative recombination, but also achieves control over carrier transport and distribution, directly improving carrier utilization efficiency and the internal quantum efficiency of the light-emitting layer. This, in turn, enhances the brightness and stability of the light-emitting device and extends its lifespan. Simultaneously, the charged polarity insulator possesses insulating properties, preventing interference with the normal electrical performance of the light-emitting device and maintaining the stability of its own charged characteristics, thereby ensuring the continuity and reliability of the carrier control effect. Attached Figure Description

[0019] Figure 1 A schematic diagram of the structure of the light-emitting device provided for the invention; Figure 2A schematic diagram illustrating the working principle of the light-emitting device provided for the invention; Figure 3 The light-emitting structure required in the preparation method provided for the invention; Figure 4 A schematic diagram of the injection of a liquid negatively charged insulator into a trench in the preparation method provided for the invention; Figure 5 A schematic diagram of coating photoresist on the light-emitting structure in the preparation method provided for the invention; Figure 6 A schematic diagram of exposing a first preset area of ​​photoresist using a mask in the preparation method provided for the invention; Figure 7 A schematic diagram of the first predetermined region for removing photoresist in the preparation method provided for the invention; Figure 8 A schematic diagram of the first preset region corresponding to the insulator with negative electrode in the preparation method provided for the invention; Figure 9 A schematic diagram of removing residual photoresist in the preparation method provided for the invention; Figure 10 A schematic diagram of the coating of a new photoresist in the preparation method provided for the invention; Figure 11 A schematic diagram of exposing a second preset area of ​​photoresist using a mask in the preparation method provided for the invention; Figure 12 A schematic diagram of the second predetermined region for removing photoresist in the preparation method provided by the invention; Figure 13 A schematic diagram of the second preset region corresponding to the negative electrode insulator in the preparation method provided for the invention; Figure 14 A schematic diagram of removing residual photoresist in the preparation method provided for the invention.

[0020] It should be noted that although the above figures only illustrate a negatively charged insulator disposed on the periphery of the first semiconductor layer, those skilled in the art should understand that the present invention is also applicable to technical solutions involving a positively charged insulator disposed on the periphery of the second semiconductor layer. The above figures are merely examples and do not constitute a limitation on the scope of protection of the present invention.

[0021] Explanation of reference numerals in the attached figures: 100. Light-emitting device; 1. Light-emitting layer; 2. Semiconductor layer; 21. First semiconductor layer; 22. Second semiconductor layer; 23. Facing end face; 31. Electron carrier; 32. Hole carrier; 4. Polarized insulator; 41. Negatively charged material; 42. Insulator; 5. Substrate layer; 6. Trench; 61. First trench; 62. Second trench; 7. Positive electrode; 8. Negative electrode; 9. Mounting space; 10. Substrate; 11. Photoresist; 12. Mask. Detailed Implementation

[0022] The technical solutions of the embodiments of the invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the invention, and not all of them. Based on the embodiments of the invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the invention.

[0023] It should be noted that if the embodiments of the invention involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement between the parts in a specific posture. If the specific posture changes, the directional indicators will also change accordingly.

[0024] Furthermore, if the embodiments of the invention involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the use of "and / or" or "and / or" throughout the text includes three parallel solutions. For example, "A and / or B" includes solution A, solution B, or a solution that simultaneously satisfies A and B. Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of a person skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by the invention.

[0025] To address the problem of low luminous efficiency in existing technologies, this invention provides a light-emitting device.

[0026] Please see Figure 1 and Figure 2The light-emitting device 100 includes a light-emitting layer 1 and two semiconductor layers 2 disposed on both sides of the light-emitting layer 1. These two semiconductor layers 2 are typically an n-type semiconductor layer 2 and a p-type semiconductor layer 2. Under the influence of an external electric field, the n-type semiconductor layer 2 primarily transports electron carriers 31, while the p-type semiconductor layer 2 primarily transports hole carriers 32. When a forward voltage is applied across the light-emitting device 100, electron carriers 31 migrate from the n-type semiconductor layer 2 to the light-emitting layer 1, and hole carriers 32 migrate from the p-type semiconductor layer 2 to the light-emitting layer 1. The two carriers meet and recombine within the light-emitting layer 1, and the energy released during recombination is emitted as light radiation, thus achieving light emission.

[0027] To improve the recombination efficiency of charge carriers within the light-emitting layer 1, a key improvement of this invention is that a charged polarity insulator 4 is provided on the periphery of at least one of the semiconductor layers 2 (the periphery is the side surface region of the outer periphery of the semiconductor layer 2; for example, when the semiconductor layer 2 has a plate-like or block-like structure, the side surface of its edge can be considered as the periphery). That is, a charged polarity insulator 4 can be provided on the periphery of one semiconductor layer 2, or a charged polarity insulator 4 can be provided on the periphery of two semiconductor layers 2 respectively.

[0028] The polarity of the charged insulator 4 is the same as that of the corresponding semiconductor layer 2. For example, if the corresponding semiconductor layer 2 is an n-type semiconductor layer 2 (mainly transporting electron carriers 31, exhibiting an overall negative polarity), then the charged insulator 4 also carries a negative charge; if the corresponding semiconductor layer 2 is a p-type semiconductor layer 2 (mainly transporting hole carriers 32, exhibiting an overall positive polarity), then the charged insulator 4 also carries a positive charge. That is: if the charged insulator 4 is disposed on the periphery of the first semiconductor layer 21, then the polarity of the charged insulator 4 is the same as that of the first semiconductor layer 21; if the charged insulator 4 is disposed on the periphery of the second semiconductor layer 22, then the polarity of the charged insulator 4 is the same as that of the second semiconductor layer 22; if the charged insulator 4 is disposed on the periphery of both the first semiconductor layer 21 and the second semiconductor layer 22, then the polarity of each corresponding charged insulator 4 is the same as that of the first semiconductor layer 21 and the second semiconductor layer 22, respectively.

[0029] Due to the principle of "like charges repel," the charged polarity insulator 4 exerts a repulsive force on the charge carriers within the semiconductor layer 2 that have the same polarity. For example, when a negatively charged polarity insulator 4 is disposed on the periphery of the n-type semiconductor layer 2, the charged polarity insulator 4 will exert a repulsive force on the electron charge carriers 31 within the n-type semiconductor layer 2 towards the central region of the semiconductor layer 2; similarly, when a positively charged polarity insulator 4 is disposed on the periphery of the p-type semiconductor layer 2, the insulator 42 will exert a repulsive force on the hole charge carriers 32 within the p-type semiconductor layer 2 towards the central region of the semiconductor layer 2. This repulsive force can effectively cause charge carriers that might originally migrate towards the edge region of the semiconductor layer 2 (such as regions that are prone to accumulation or loss due to sidewall damage, etc.) to change their migration path and accumulate towards the central region of the semiconductor layer 2. In this way, the number of charge carriers reaching the middle region of the light-emitting layer 1 to participate in recombination can be significantly increased, and the non-radiative recombination or trapping of charge carriers in the edge damage region of the semiconductor layer 2 can be reduced, thereby improving the effective utilization rate of charge carriers and the radiative recombination efficiency in the light-emitting layer 1, and ultimately improving the internal quantum efficiency and luminous brightness of the light-emitting device 100.

[0030] The polar insulator 4, as its name suggests, possesses both electrical and insulating properties. This characteristic allows it to repel charge carriers through polarity without introducing additional current or charge into the semiconductor layer 2 to interfere with normal charge carrier transport. Furthermore, its own charge is not lost or dissipated when the light-emitting device 100 is powered on, thus maintaining the stability of the charge carrier regulation effect.

[0031] When the polarized insulator 4 is placed on the periphery of the corresponding semiconductor layer 2, it can be flexibly set according to the structure type and control requirements: if it is a single structure (such as an integrally molded structure), one or more can be set; if it is a combined structure (such as a physical composite or an electrically controlled induction structure), one set can be set, or multiple or more sets can be set as needed.

[0032] There are no special restrictions on the shape of the peripheral edge of the semiconductor layer 2 of the light-emitting device 100; it can be rectangular, circular, or other polygonal structures. Taking a rectangular plate-shaped semiconductor layer 2 as an example, the polarized insulator 4 can be provided only on the two opposite long sides, or it can be arranged on all four sides. Furthermore, the shape of the polarized insulator 4 can also be flexibly adjusted. It can be designed as a continuous strip structure extending along the entire length of the side of the semiconductor layer 2 to achieve full peripheral carrier confinement; or it can be designed as a segmented block structure, spaced apart on the periphery of the semiconductor layer 2, to meet the packaging space and fabrication process requirements of the adapter device.

[0033] Of course, the light-emitting device 100 can be equipped with the charged polarity insulator 4 as described above on traditional horizontal, vertical and flip-chip light-emitting diodes, or it can be designed to use the charged polarity insulator 4 on a specific new type of light-emitting diode. The core of both is to use the repulsive effect of the charged polarity insulator 4 on charge carriers to optimize the distribution and transport path of charge carriers.

[0034] In summary, the light-emitting device 100 provided in this embodiment of the invention includes a light-emitting layer 1, two semiconductor layers 2, and a polarized insulator 4. The two semiconductor layers 2 are disposed on both sides of the light-emitting layer 1. The two semiconductor layers 2 are respectively used to transport electron carriers 31 and hole carriers 32 under the action of an external electric field, so that the electron carriers 31 and hole carriers 32 recombine in the light-emitting layer 1 and generate light radiation. At least one semiconductor layer 2 is provided with a polarized insulator 4 on its periphery. The polarity of the polarized insulator 4 is the same as that of the corresponding semiconductor layer 2, so as to generate a repulsive force on the carriers in the semiconductor layer 2, so that the carriers migrate to the middle region of the corresponding semiconductor layer 2 under the action of the repulsive force.

[0035] The light-emitting device 100 provided in this embodiment of the invention utilizes a charged polarity insulator 4 with the same polarity as the semiconductor layer 2, disposed around the semiconductor layer 2. This insulator applies a repulsive force to the charge carriers within the semiconductor layer 2 based on the principle of "like charges repel," suppressing the diffusion of charge carriers to the edge region of the semiconductor layer 2. This not only reduces nonradiative recombination of charge carriers at the edge due to sidewall damage and other factors, lowering the probability of nonradiative recombination, but also achieves regulation of charge carrier transport and distribution, directly improving the utilization efficiency of charge carriers and the internal quantum efficiency of the light-emitting layer 1. This, in turn, enhances the brightness and stability of the light-emitting device 100 and extends its lifespan. Simultaneously, the charged polarity insulator 4 has insulating properties, does not interfere with the normal electrical performance of the light-emitting device 100, and maintains the stability of its own charged characteristics, thereby maintaining the continuity and reliability of the charge carrier regulation effect.

[0036] In some embodiments, in order to enhance the uniformity of carrier regulation and to take into account the simplicity of device fabrication process, the polarized insulator 4 is disposed on two opposite sides of the semiconductor layer 2.

[0037] For example, for a rectangular plate-shaped semiconductor layer 2, polarized insulators 4 can be preferentially arranged on the two opposite long sides along its length direction. A uniform repulsive force field is formed by symmetrical arrangement, which guides the charge carriers to converge in the middle region of the semiconductor layer 2. This arrangement does not require full circumference packaging of the semiconductor layer 2, which can reduce the amount of insulator 42 used and the difficulty of preparation, while meeting the core requirement of charge carrier confinement. It is especially suitable for small-sized light-emitting devices 100 with strict requirements for packaging space.

[0038] In some embodiments, please refer to Figure 3 To reduce unnecessary additional support structures, grooves 6 are provided on the two opposite sides, and the polarized insulator 4 is directly placed in the grooves 6.

[0039] Typically, in actual production, the process of "overall preparation - batch processing - wafer forming" is adopted: first, a large-area overall epitaxial layer (i.e., including two semiconductor layers 2 and light-emitting layer 1) is prepared, and then the above-mentioned trenches 6 are pre-processed on the overall epitaxial structure. The trenches 6 at the corresponding positions of all unit devices can be formed simultaneously through photolithography, etching and other processes; after the trenches 6 are processed, the corresponding polarized insulators 4 and electrodes are prepared, and finally the large-area overall structure is divided into multiple independent unit light-emitting devices 100 by dicing process.

[0040] Based on the above production process, the structural form of the groove 6 will change adaptively with the production stage: on the large-area integral extensional structure before dicing, the groove 6 is a normal groove with a closed periphery; after being diced to form a single light-emitting device 100, the closed side of the groove 6 on the original integral structure is cut off with the dicing, so that the groove 6, relative to the single device, is transformed into a notch structure with an open periphery.

[0041] Of course, the groove 6 can also be designed as a regular groove that is closed on the periphery of a single light-emitting device 100.

[0042] The cross-sectional shape of the groove 6 can also be flexibly designed, such as rectangular, trapezoidal, arc, etc.

[0043] By placing the polarized insulator 4 inside the trench 6, the physical structure of the trench 6 can mechanically limit the insulator 42, thereby improving structural stability. On the other hand, the trench 6 allows the polarized insulator 4 to be closer to the carrier migration path inside the semiconductor layer 2, enhancing the repulsion effect on carriers and facilitating the miniaturization and integration of the device.

[0044] In some embodiments, please refer to Figure 1 and Figure 3 Considering that the overall structure of the light-emitting device 100 also includes a substrate layer 5, and the two semiconductor layers 2 include a first semiconductor layer 21 and a second semiconductor layer 22, the substrate layer 5, the first semiconductor layer 21 (used for transporting electron carriers 31 under the action of an external electric field, i.e., n-type semiconductor layer 2), the light-emitting layer 1 and the second semiconductor layer 22 (used for transporting hole carriers 32 under the action of an external electric field, i.e., p-type semiconductor layer 2) are arranged along the first direction (the stacking thickness direction, in...) Figure 1 (Represented by dashed line a) are arranged sequentially. Accordingly, the trenches 6 on the two opposite sides of the first semiconductor layer 21 include a first trench 61 and a second trench 62.

[0045] The first trench 61 and the second trench 62 are specifically configured as follows: the first trench 61 extends along a first direction from the side of the second semiconductor layer 22 away from the substrate layer 5 to the interior of the first semiconductor layer 21. That is, in the first direction, the first trench 61 extends from the side of the second semiconductor layer 22 away from the substrate layer 5 toward the side closer to the substrate layer 5, but does not penetrate the entire thickness of the first semiconductor layer 21; the second trench 62 extends along the first direction from the side of the second semiconductor layer 22 away from the substrate layer 5 to the surface of the substrate layer 5. That is, in the first direction, the second trench 62 extends from the side of the second semiconductor layer 22 away from the substrate layer 5 toward the side closer to the substrate layer 5, and terminates at the upper surface of the substrate layer 5, that is, the bottom of the trench 6 is in contact with the surface of the substrate layer 5.

[0046] Since both the first trench 61 and the second trench 62 extend along the first direction, and the openings of both trenches 6 are located at the second semiconductor layer 22 on the large-area epitaxial structure before segmentation, the first trench 61 and the second trench 62 can be fabricated by photolithography and etching processes during the fabrication stage of the overall epitaxial structure, and the patterning of the two trenches 6 can be achieved using the same photolithography mask 12. By simply controlling the etching time or etching depth parameters, the first trench 61 can be etched to a preset depth inside the first semiconductor layer 21, and the second trench 62 can be etched to the surface of the substrate layer 5, starting from the side of the second semiconductor layer 22 away from the substrate layer 5, thereby simplifying the photolithography process steps and reducing the fabrication cost.

[0047] The substrate layer 5 can serve as the growth substrate for the first semiconductor layer 21 (n-type semiconductor layer 2), and its material is generally sapphire, silicon, silicon carbide, or other materials with good mechanical support and insulating properties. Alternatively, the substrate layer 5 can serve as a conductive substrate, such as a doped silicon substrate or a metal substrate, to achieve vertical current conduction. The substrate layer 5 may or may not include a buffer layer; the buffer layer is provided to reduce lattice mismatch and improve the quality of the epitaxial layer.

[0048] In some embodiments, please refer to Figure 1 and Figure 2 In order to enable electron carriers 31 and / or hole carriers 32 to migrate to the light-emitting layer 1 continuously and efficiently, the first semiconductor layer 21 and the second semiconductor layer 22 each have an facing end face 23 facing the light-emitting layer 1; in the first direction, the polarized insulator 4 is flush with the facing end face 23 of the corresponding semiconductor layer 2.

[0049] This flush configuration allows the repulsive force field generated by the charged polar insulator 4 to form an effective confinement boundary in the region of semiconductor layer 2 near the light-emitting layer 1. When charge carriers migrate towards the middle region of semiconductor layer 2 under the action of the repulsive force and approach the light-emitting layer 1, the flush boundary can avoid the "dead zone" or "weak confinement region" that may be generated due to the charged polar insulator 4 being too high or too low relative to the facing end face 23. For example, if the charged polar insulator 4 is lower than the facing end face 23, its repulsive effect on charge carriers near the region of light-emitting layer 1 is weakened, which may cause some charge carriers to still have a tendency to diffuse towards the edge before reaching the light-emitting layer 1; if the charged polar insulator 4 is higher than the facing end face 23, it may invade the region of light-emitting layer 1 and interfere with the normal recombination of charge carriers in the light-emitting layer 1. Therefore, the flush configuration can maintain a strong confinement effect of the repulsive force field in the final stage before the charge carriers enter the light-emitting layer 1, so that more charge carriers are injected vertically and efficiently into the light-emitting layer 1, further increasing the probability of charge carrier recombination in the light-emitting layer 1.

[0050] In some embodiments, please refer to Figure 1 and Figure 3 Considering that the overall structure of the light-emitting device 100 also includes a positive electrode 7 and a negative electrode 8, the positive electrode 7 is disposed on the side of the second semiconductor layer 22 away from the substrate layer 5, the negative electrode 8 is disposed in the first trench 61, and the negative electrode 8 is located outside the polarized insulator 4.

[0051] In this embodiment of the invention, the positions and functions of the positive electrode 7 and the negative electrode 8 are consistent with the electrode placement principles of conventional horizontal or flip-chip LEDs. The positive electrode 7 is used to introduce hole carriers 32, and the negative electrode 8 is used to introduce electron carriers 31. In this embodiment, since the first trench 61 only extends into the interior of the first semiconductor layer 21, placing the negative electrode 8 within the first trench 61 allows it to directly contact the first semiconductor layer 21 (n-type semiconductor layer 2), thereby efficiently injecting electron carriers 31 into the first semiconductor layer 21. Simultaneously, the negative electrode 8 is positioned outside the polarized insulator 4. Here, "outside" refers to the polarized insulator 4 located between the side of the first semiconductor layer 21 and the negative electrode 8, relative to the center of the first semiconductor layer 21. This arrangement allows the charged polar insulator 4 to form a "barrier" between the negative electrode 8 and the edge region of the first semiconductor layer 21. By utilizing its identical polarity (negative) with the first semiconductor layer 21, it repels electron carriers 31, preventing excessive accumulation or non-radiative recombination of electron carriers 31 near the edge region of the negative electrode 8. This layout optimizes the carrier injection path and enhances the carrier regulation effect of the charged polar insulator 4, enabling more electron carriers 31 to be effectively guided to the light-emitting layer 1 for radiative recombination. Furthermore, integrating the negative electrode 8 within the trench 6 also helps reduce the overall device footprint and improve the device's integration density.

[0052] In some embodiments, please refer to Figure 1 The polarized insulator 4 is formed by mixing insulating material and charged material. If a positively polarized insulator 42 is required, the insulating material is mixed with a positively charged material; if a negatively polarized insulator 42 is required, the insulating material is mixed with a negatively charged material.

[0053] Positively charged materials can be selected from polyelectrolytes (such as polyethyleneimine, polyallylamine hydrochloride, etc.) or silica nanoparticles with positively charged groups (such as amino and quaternary ammonium groups) on their surface. These materials can stably carry positive charges.

[0054] Negatively charged materials can be selected from polyelectrolytes (such as polyimide, polytetrafluoroethylene, boron nitride, sodium polystyrene sulfonate, sodium ethylene sulfonate, potassium poly-p-styrene sulfonate, etc.) or zinc oxide nanoparticles with negatively charged groups (such as carboxyl groups, sulfonic acid groups) on their surface, which can effectively maintain the stability of negative charges and are suitable for hybrid molding processes.

[0055] Insulating materials should be selected from those with high insulation resistance and chemical stability, including non-metallic oxides and / or metal sulfides; such as silicon dioxide, alumina, silicon nitride, polyimide, epoxy resin, polytetrafluoroethylene, boron nitride, etc. These materials can prevent charge leakage and provide a stable substrate for charge-carrying materials.

[0056] In the specific mixing process, the insulating material is first heated to a molten state, and then charged material particles are added according to a preset ratio. Through stirring, ultrasonication, and other processes, the charged material is uniformly dispersed in the molten insulating material matrix. After uniform mixing, it is solidified and molded. At this point, the charged material particles are firmly solidified in the insulating material matrix, and their charged properties are stably maintained, preventing easy loss due to temperature fluctuations or electric field effects during device operation. Ultimately, a charged polar insulator with both excellent insulation and stable charged properties is obtained.

[0057] This hybrid molding method allows for flexible adjustment of the content and distribution density of charge materials, thereby controlling the charge strength of the polar insulator 4 to meet the regulation requirements of different semiconductor layer 2 carrier concentrations and migration characteristics.

[0058] In some embodiments, please refer to Figure 1 The charged material includes a negatively charged material 41, the material of which includes non-metallic oxides and / or metal sulfides; and / or, the material of the insulator 42 is at least one of polyimide, polytetrafluoroethylene and boron nitride.

[0059] The negative charge material 41 can be non-metallic oxide particles such as silicon dioxide and aluminum oxide. These materials can stably carry negative charges through surface modification or doping treatment. Alternatively, metal sulfide semiconductor nanoparticles such as cadmium sulfide and zinc sulfide can be selected, which can form fixed negative charge centers due to defects or doping.

[0060] When polyimide is chosen as the material for insulator 42, its high temperature resistance and high mechanical strength can be utilized to adapt to the temperature environment during the operation of the light-emitting device 100. When polytetrafluoroethylene is chosen, its excellent chemical stability and insulation properties can be leveraged to ensure that it does not degrade or change its electrical properties during long-term use. When boron nitride is chosen, its high thermal conductivity can also assist in heat dissipation of the device, preventing excessively high local temperatures from affecting carrier migration and luminous efficiency. By combining the above-mentioned charged materials with insulator 42, charged polarity insulators 4 that meet different performance requirements can be prepared, expanding their application scenarios in various light-emitting devices 100.

[0061] The present invention also provides a display device, please refer to [link / reference]. Figure 1The display device includes the light-emitting device 100 provided in any of the above embodiments. The display device includes various electronic devices with image display functions, such as television monitors, computer monitors, mobile phone displays, tablet computer displays, smartwatch displays, vehicle display panels, virtual reality (VR) device displays, and augmented reality (AR) device displays.

[0062] Because the light-emitting device 100 of this invention has advantages such as high brightness, good stability, long service life, and high carrier utilization efficiency, its application in display devices can significantly improve the display effect, such as increasing the contrast, color saturation, and brightness uniformity of the image, while extending the service life of the display device and reducing power consumption. For example, in mobile phone displays, using the light-emitting device 100 of this invention can make the screen present a brighter and more delicate image under the same power consumption, and reduce screen aging after long-term use; in VR device displays, high brightness and high stability help to provide a more immersive and realistic virtual visual experience, and reduce visual fatigue caused by fluctuations in device performance. In addition, the manufacturing process of the light-emitting device 100 of this invention is relatively simple, which is conducive to large-scale production, thereby reducing the manufacturing cost of display devices.

[0063] Please see Figures 3 to 14 The invention also provides a method for fabricating a light-emitting device 100. In the light-emitting device 100 fabricated by this method, a polarized insulator 4 (a negatively polarized insulator in the figure) is disposed on the periphery of the first semiconductor layer 21, adapting to the carrier regulation requirements of the first semiconductor layer 21 (n-type semiconductor layer 2, transporting electron carriers 31). The fabrication method includes the following steps: Step S1: Provide a light-emitting structure (exemplary, see reference). Figure 3The light-emitting structure includes a substrate layer 5, a first semiconductor layer 21, a light-emitting layer 1, and a second semiconductor layer 22 (p-type semiconductor layer 2, for transporting hole carriers 32) arranged sequentially. A trench 6 of a predetermined specification is formed on two opposite sides of the first semiconductor layer 21 by an etching process (plasma dry etching can be used as an example). The material of the first semiconductor layer 21 includes at least: group II-VI materials (e.g., N-type zinc selenide (n-ZnSe)) or group III-V materials (e.g., N-type aluminum gallium arsenide (n-AlGaAs), N-type gallium arsenide phosphide (n-GaAsP), N-type aluminum gallium indium phosphide (n-AlGaInP), N-type gallium aluminum phosphide (n-AlGaP), N-type indium gallium nitride (n-InGaN), N-type aluminum nitride (n-AlN), N-type indium nitride (n-InN), N-type aluminum gallium nitride (n-AlGaN), N-type aluminum indium gallium nitride (n-AlInGaN), N-type gallium nitride (n-GaN) or N-type gallium arsenide (n-GaAs)). The material of the second semiconductor layer 22 includes at least: group II-VI materials (e.g., p-type zinc selenide (p-ZnSe)) or group III-V materials (e.g., p-type aluminum gallium arsenide (p-AlGaAs), p-type gallium arsenide phosphide (p-GaAsP), p-type aluminum gallium indium phosphide (p-AlGaInP), p-type aluminum gallium phosphide (p-AlGaP), p-type indium gallium nitride (p-InGaN), p-type aluminum nitride (p-AlN), p-type indium nitride (p-InN), p-type aluminum gallium nitride (p-AlGaN), p-type aluminum indium gallium nitride (p-AlInGaN), p-type gallium nitride (p-GaN), or p-type gallium phosphide (p-GaP)). The light-emitting layer 1 refers to a multi-quantum-well light-emitting layer, where electron carriers 31 and hole carriers 32 recombine within the quantum wells, thereby emitting photons.

[0064] Step S2: Mix the insulator 42 material and the negative charge material 41 according to a preset ratio to prepare a uniformly dispersed liquid polarized insulator 4; for example, the amount of negative charge material 41 added is 5%-20% of the mass of the insulator 4 material. Of course, step S2 and step S1 can be performed simultaneously or before step S1.

[0065] Step S3, please refer to Figure 4 The liquid negatively charged insulator 42 is injected into the groove 6 using inkjet printing, dispensing or potting processes, and then solidified by cooling.

[0066] Step S4, please refer to Figures 5 to 13The formed charged polar insulator 4 is processed to form an installation space 9 for the negative electrode 8 on its outer side away from the center of the first semiconductor layer 21; at the same time, or subsequently or before, the height of the charged polar insulator 4 is processed so that the end face of the charged polar insulator 4 away from the substrate layer 5 is flush with the side of the first semiconductor layer 21 away from the substrate layer 5.

[0067] Step S5, please refer to Figure 1 Metal electrode material is deposited within the mounting space 9 to form a negative electrode 8; simultaneously, metal electrode material is deposited across the entire side of the second semiconductor layer 22 opposite to the substrate layer 5 to form a positive electrode 7. The positive electrode 7 / negative electrode 8 can be a high work function metal (e.g., platinum, nickel, titanium, gold, chromium, alloys thereof, and combinations thereof), a metal oxide (e.g., indium tin oxide and zinc oxide), or a conductive non-metallic material such as a conductive polymer, graphite, graphene, and black phosphorus.

[0068] In step S4, the treatment of the formed polarized insulator 4 can be performed using either a dry etching process or a wet etching process. For example, when using a wet etching process, the outer surface and top of the polarized insulator 4 are selectively etched. By controlling the etching time and the concentration of the etching solution, the excess portion on the outer side is precisely removed to form the mounting space 9, and the height of the polarized insulator 4 is adjusted to be flush with the side of the first semiconductor layer 21 that is away from the substrate layer 5.

[0069] After step S5, the light-emitting device 100 can be flip-chip mounted on the substrate 10 (the substrate 10 is also the driving circuit substrate 10 of the display device), and the electrical connection with the driving circuit on the substrate 10 can be achieved through a bonding process to complete the integrated assembly of the display device.

[0070] In some embodiments, please refer to Figure 4 The step of injecting the liquid polarized insulator 4 into the trench 6 and forming it in step S3 above includes: using inkjet printing technology to inject the liquid negatively polarized insulator 42 into the trench 6 and form it.

[0071] Inkjet printing technology features high precision and non-contact operation, enabling quantitative and precise filling of negatively charged insulator 42 material within the groove 6.

[0072] In some embodiments, the above step S4 involves process selection and optimization, and step S4 includes steps S41 and S42.

[0073] Step S41: The negative polarity insulator 4 is processed using photolithography and etching processes to form a mounting space 9 on the outer side of the negative polarity insulator 4. Specifically: S411, please refer to Figure 5Photoresist 11 is coated onto the surface of the second semiconductor layer 22 and the polarized insulator 4 facing away from the substrate layer 5; S412, please refer to Figure 6 A mask 12 matching the first preset etching area is used to expose the photoresist 11; the first preset etching area corresponds to the mounting position of the negative electrode 8. S413, please refer to Figure 7 After developing and removing the photoresist 11 in the first preset area, the portion of the polarized insulator 4 corresponding to the first preset area is exposed. S414, please refer to Figure 8 The exposed area is etched (exemplarily by wet etching) to form a mounting space 9 adapted to accommodate the negative electrode 8.

[0074] Step S42: The negatively charged insulator 42 is processed using photolithography and etching processes so that the end face of the negatively charged insulator 4 facing away from the substrate layer 5 is flush with the side of the first semiconductor layer 21 facing away from the substrate layer 5. Specifically: S421, please refer to Figure 11 A mask 12 matching the second preset etching area is used to expose the photoresist 11. The second preset etching area corresponds to the end face area of ​​the polarized insulator 4 away from the substrate layer 5. S422, please refer to Figure 12 After developing and removing the photoresist 11 in the second preset area, the end face of the polarized insulator 4 facing away from the substrate layer 5 is exposed. S423, please refer to Figure 13 The exposed polarized insulator 4 end face is etched (exemplarily by wet etching) until the end face of the polarized insulator 4 away from the substrate layer 5 is flush with the end face of the first semiconductor layer 21 away from the substrate layer 5, and then the remaining photoresist 11 is removed.

[0075] After step S414, the photoresist 11 can be removed, and then a new photoresist 11 can be applied. The reason for this is that after one etching process, the photoresist 11 may be damaged by chemical corrosion or physical bombardment, leading to a decrease in its protective performance. If subsequent photolithography steps are performed directly on the damaged photoresist 11, it may be impossible to accurately define the second preset etching area, thus affecting the precise control of the insulator 42 height. Therefore, removing the photoresist 11 after completing the etching of the mounting space 9 (step S414) and then applying a new, intact photoresist 11 provides more reliable mask protection for the photolithography and etching processes in step S421.

[0076] The above description is merely an exemplary embodiment of the invention and does not limit the patent scope of the invention. Any equivalent structural transformations made using the contents of the invention specification and drawings under the technical concept of the invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the invention.

Claims

1. A light emitting device, characterized by, It includes a light-emitting layer and two semiconductor layers disposed on both sides of the light-emitting layer; the two semiconductor layers are respectively used to transport electron carriers and hole carriers under the action of an external electric field, so that the electron carriers and the hole carriers recombine in the light-emitting layer and generate light radiation; At least one of the semiconductor layers is provided with a polarized insulator on its periphery, the polarity of which is the same as that of the corresponding semiconductor layer, so as to generate a repulsive force on the charge carriers in the semiconductor layer, causing the charge carriers to migrate to the middle region of the corresponding semiconductor layer under the action of the repulsive force.

2. The light emitting device of claim 1, wherein, The polarized insulators are disposed on two opposite sides of the periphery of the semiconductor layer.

3. The light emitting device of claim 2, wherein, The two opposite sides are respectively provided with grooves, and the polarized insulator is disposed in the grooves.

4. The light emitting device of claim 3, wherein, The two semiconductor layers include a first semiconductor layer and a second semiconductor layer, and the light-emitting device further includes a substrate layer. The substrate layer, the first semiconductor layer, the light-emitting layer and the second semiconductor layer are arranged sequentially along a first direction. The trenches on the two opposite sides of the first semiconductor layer include a first trench and a second trench. The first trench extends along the first direction from the side of the second semiconductor layer away from the substrate layer to the interior of the first semiconductor layer, and the second trench extends along the first direction from the side of the second semiconductor layer away from the substrate layer to the surface of the substrate layer.

5. The light emitting device of claim 4, wherein, The first semiconductor layer and the second semiconductor layer each have an facing end face toward the light-emitting layer; In the first direction, the polarized insulator is flush with the facing end face of the corresponding semiconductor layer.

6. The light emitting device of claim 4, wherein, It also includes a positive electrode and a negative electrode. The positive electrode is disposed on the side of the second semiconductor layer away from the substrate layer. The negative electrode is disposed in the first trench and is located on the outside of the polarized insulator.

7. The light emitting device of claim 1, wherein The charged polar insulator is formed by mixing insulating material and charged material.

8. The light emitting device of claim 7, wherein, The charged material includes a negatively charged material, and the negatively charged body is made of non-metallic oxides and / or metal sulfides; and / or, The insulator is made of at least one of polyimide, polytetrafluoroethylene, and boron nitride.

9. A method for fabricating a light-emitting device, characterized in that, Includes the following steps: A light-emitting structure is provided; wherein the light-emitting structure includes a substrate layer, a first semiconductor layer, a light-emitting layer and a second semiconductor layer disposed sequentially, and a trench is formed on the periphery of the first semiconductor layer; Insulating materials and negatively charged materials are mixed according to a preset ratio to form a liquid insulator with negative polarity. The liquid negatively charged insulator is injected into the trench and shaped so that the end face of the negatively charged insulator facing away from the substrate layer is flush with the side of the second semiconductor layer facing away from the substrate layer. The charged polar insulator is processed to form a mounting space on the outside of the charged polar insulator, and the end face of the charged polar insulator facing away from the substrate layer is flush with the side of the first semiconductor layer facing away from the substrate layer. A negative electrode is formed within the mounting space, and a positive electrode is formed on the side of the second semiconductor layer opposite to the substrate layer.

10. The method for fabricating a light-emitting device according to claim 9, characterized in that, Injecting the liquid negatively charged insulator into the trench and forming it includes: The liquid negatively charged insulator is injected into the groove and formed using inkjet printing technology.

11. The method for fabricating an electroluminescent device according to claim 9, characterized in that, The process of processing the negatively polarized insulator to form a mounting space on the outside of the polarized insulator, and such that the end face of the polarized insulator facing away from the substrate is flush with the side of the first semiconductor layer facing away from the substrate, includes: The negatively charged insulator is processed using photolithography and etching processes to form an installation space on the outside of the negatively charged insulator; The negatively charged insulator is processed using photolithography and etching processes so that the end face of the negatively charged insulator facing away from the substrate is flush with the side of the first semiconductor layer facing away from the substrate.

12. A display device, characterized in that, Includes the light-emitting device as described in any one of claims 1 to 8.

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