Detection analog front end for cgm, cgm device
By integrating a potentiostat, ADC, and DAC, the design solves the problems of complex structure and numerous external components in CGM detection analog front-end equipment, achieving low-power, high-precision sensor signal conversion and improving the reliability and simplicity of CGM equipment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN LETUO TECH CO LTD
- Filing Date
- 2026-06-08
- Publication Date
- 2026-07-07
AI Technical Summary
Existing CGM detection simulation front-end equipment has a complex structure and requires a large number of external components, which leads to reduced system reliability and increased costs.
The design integrates a potentiostat, an analog-to-digital converter (ADC) unit, and a digital-to-analog converter (DAC) unit, combined with low-power operational amplifiers and a high-precision ADC, to achieve accurate conversion and stable biasing of sensor signals, reducing the need for external components.
It reduces system power consumption, reduces peripheral equipment and costs, improves system reliability and accuracy, and enhances the ease of use of CGM equipment.
Smart Images
Figure CN122348748A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of microelectronics technology, and more specifically, to a detection simulation front-end device and a CGM device for CGM. Background Technology
[0002] Diabetes is one of the most prevalent chronic diseases globally, with a large patient population. Continuous glucose monitoring (CGM) systems can reflect blood glucose fluctuations throughout the day, effectively covering blind spots in detection. Effective blood glucose management can significantly improve patient prognosis and reduce the incidence of complications. Currently, the main blood glucose monitoring methods include traditional methods, which have strong consumer attributes. The CGM industry has high barriers to entry, with significant hurdles in research and development, and manufacturing. Research and development barriers are mainly reflected in sensor and chip design capabilities, which directly affect product performance and stability. Mass production barriers are also high; to ensure production capacity, yield, and cost control, companies need to achieve a high level of manufacturing processes. Currently, the analog front-end of CGM detection chips mainly converts the chemical signals from non-invasive or minimally invasive sensors into electrical signals for detection and stores the data in a digital memory, which is then read by the corresponding CGM management platform.
[0003] CGM products in related technologies typically employ a solution that integrates discrete components. For example, one solution uses a sensor + MCP6031 operational amplifier + main controller + Bluetooth + 10-bit ADC. Therefore, current manufacturer-application solutions have complex system architectures, require numerous external components, significantly increase overall system costs, and reduce system reliability.
[0004] There is currently no effective solution to the problem that the detection simulation front-end equipment used for CGM in related technologies has a complex structure and requires a large number of external components. Summary of the Invention
[0005] The main objective of this application is to provide a detection simulation front-end device and a CGM device for CGM, so as to solve the problem that the detection simulation front-end device for CGM has a complex structure and requires a large number of external components.
[0006] To achieve the above objectives, according to one aspect of this application, a detection simulation front-end device for CGM is provided.
[0007] The detection analog front-end device for CGM according to this application includes: a potentiostat, an analog-to-digital converter (ADC) unit, and a digital-to-analog converter (DAC) unit. The potentiostat is connected to the DAC unit, the DAC unit is used to provide a bias voltage to the potentiostat, and the ADC unit is used to convert the output voltage of the potentiostat into an output digital signal and store it.
[0008] In some embodiments, the potentiostat includes dual low-power operational amplifiers OPA1 / OPA2 and a switch SW. The switch SW is connected to the dual low-power operational amplifiers OPA1 / OPA2 and a sensor to process the current transmitted via the sensor according to the bias voltages DACO1 and DACO2 provided by the digital-to-analog converter (DAC) unit.
[0009] In some embodiments, the stable voltage of the potentiostat is configured by the digital-to-analog converter (DAC) unit and provided through the output of dual low-power operational amplifiers OPA1 / OPA2;
[0010] Based on the characteristics of the blood glucose sensor, a stable voltage deviation is provided through the CE, RE, or WE ports connected to the sensor to prevent abnormal deviations in the excitation signal caused by electrochemical reactions.
[0011] In some embodiments, the potentiostat further includes a programmable load resistor RLOAD and a programmable gain resistor RTIA, the potentiostat converting current into voltage, which is then buffered and measured by the analog-to-digital converter (ADC) unit.
[0012] In some embodiments, it further includes: BUF_IN or BUF_REF connected to the potentiostat to increase the driving capability and ensure that the signal sent to the ADC signal is not distorted from the reference voltage.
[0013] In some embodiments, the analog-to-digital converter (ADC) unit employs an on-chip 12-bit to 16-bit ADC.
[0014] In some embodiments, the device further includes: a power management module for providing the detection analog front-end device with a power reset signal, a digital power supply LDO circuit, and a low-power reference voltage source, wherein the power reset signal detects the circuit power supply voltage, the digital power supply LDO includes a normal mode LDO and a low-power LDO, which respectively drive the high-power load digital circuit and the low-power portion of the digital circuit, and the normal mode LDO is turned off in low-power mode; the low-power reference voltage source generates V REF Provides a conversion reference voltage for DAC and ADC.
[0015] In some embodiments, the system further includes a clock module for generating a 4M clock and a 32K clock, wherein the 4M clock provides the main clock for the digital circuit and the ADC, and the 32K clock is a low-speed clock that ensures the system remains in a wake-up state under low power conditions.
[0016] In some embodiments, while ensuring the normally open circuit is in a low-power state, the overall power consumption is controlled to within 5uA.
[0017] To achieve the above objectives, according to another aspect of this application, a CGM device is provided, the CGM device comprising: the above-described detection simulation front-end device.
[0018] In this application embodiment, a detection simulation front-end device and a CGM device are used. The detection simulation front-end device includes: a potentiostat, an analog-to-digital converter (ADC) unit, and a digital-to-analog converter (DAC) unit. The potentiostat is connected to the DAC unit, which provides a bias voltage to the potentiostat. The ADC unit converts the output voltage of the potentiostat into a digital output signal and stores it. The integrated potentiostat design achieves stable polarization voltage to meet sensor requirements, effectively reduces input noise at the WE terminal of the potentiostat's working electrode, and, combined with a high-precision ADC, enables the detection sensitivity to reach within the range of 0.1 nA. Attached Figure Description
[0019] The accompanying drawings, which form part of this application, are used to provide a further understanding of the application and to make other features, objects, and advantages of the application more apparent. The illustrative embodiments and descriptions of this application are used to explain the application and do not constitute an undue limitation of the application. In the drawings:
[0020] Figure 1 This is a schematic diagram of the detection simulation front-end device for CGM according to an embodiment of this application;
[0021] Figure 2 This is a schematic diagram of the circuit structure of a detection simulation front-end device for CGM according to an embodiment of this application;
[0022] Figure 3 This is a schematic diagram of the test effect in a detection simulation front-end device for CGM according to an embodiment of this application;
[0023] Figure 4 This is a connection diagram showing that the potentiostat in the detection simulation front-end device for CGM according to a preferred embodiment of this application can be configured in various modes. Detailed Implementation
[0024] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.
[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0026] In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "middle," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing this application and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.
[0027] Furthermore, in addition to indicating location or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.
[0028] Furthermore, the terms "installation," "setup," "equipped with," "connection," "linking," and "socketing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.
[0029] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.
[0030] like Figure 1As shown in the figure, this application provides a detection analog front-end device 100 for CGM. The detection analog front-end device 100 includes: a potentiostat 110, an analog-to-digital converter (ADC) unit 120, and a digital-to-analog converter (DAC) unit 130. The potentiostat 110 is connected to the DAC unit 130. The DAC unit 130 is used to provide a bias voltage to the potentiostat. The ADC unit 120 is used to convert the output voltage of the potentiostat into an output digital signal and save it.
[0031] In specific implementation, the detection simulation front-end device 100 accurately converts the chemical signal from the non-invasive or minimally invasive blood glucose sensor into an electrical signal, and then processes it into a digital signal. Specifically, the detection simulation front-end device 100 includes a low-power potentiostat that, on the one hand, converts the chemical signal from the blood glucose sensor into an electrical signal for amplification, enabling the internal circuitry of the chip to process the signal; on the other hand, it provides a constant bias voltage for the stable operation of the blood glucose sensor, ensuring normal sensor function.
[0032] Furthermore, the detection analog front-end device 100 integrates high-precision DAC and ADC circuits. The DAC circuit provides a reference voltage for the internal potentiometer, and the high-precision ADC converts the amplified electrical signal from the potentiometer into a digital signal and stores it in a FIFO buffer. Additionally, to ensure the main analog circuit can function properly, a power management module and a clock module are also included.
[0033] The aforementioned detection simulation front-end equipment for CGM utilizes a unique integrated design that fully integrates the main operational amplifier, high-precision ADC, and main control memory currently used in the market into a single chip. This reduces system power consumption, decreases the number of peripheral devices and costs associated with the system solution, and improves the ease of application of the overall CGM monitoring solution.
[0034] The digital section can average the ADC acquisition data, calculating the average of up to 32 ADC output data points as a single sample for storage. BUF_IN / BUF_REF primarily increase drive capability, ensuring that the signal sent to the ADC is not distorted relative to the reference voltage. For example... Figure 3 As shown, the error difference between the potentiostat and the ADC terminal measuring current and the signal current sent by the simulated blood glucose sensor in the range of 0-120nA, after calibration and normalization, is given. From the measurement results, the design of the present invention can ensure that the output error value is controlled within the range of 0.1nA.
[0035] In a preferred embodiment, the potentiostat includes dual low-power operational amplifiers OPA1 / OPA2 and a switch SW, which can be flexibly configured into a 2-electrode or 3-electrode mode. The switch SW and the dual low-power operational amplifiers OPA1 / OPA2 are connected to a sensor to process the current transmitted through the sensor according to the bias voltages DACO1 and DACO2 provided by the digital-to-analog converter (DAC) unit.
[0036] The potentiostat specifically comprises dual low-power operational amplifiers (OPA1 / OPA2) connected to the sensor's SW switch. Additionally, it includes a programmable load resistor (RLOAD) and a programmable gain resistor (RTIA). Figure 3 As shown, in Figure 3 The figure shows the error difference between the potentiostat and the ADC terminal measuring the current and the signal current sent by the simulated blood glucose sensor in the range of 0-120nA, after calibration and normalization. The measurement results show that the detection simulation front-end device in this embodiment can ensure that the output error value is controlled within the range of 0.1nA.
[0037] In this preferred embodiment, the stable voltage of the potentiostat is configured by the digital-to-analog converter (DAC) unit and provided by the output of dual low-power operational amplifiers OPA1 / OPA2. According to the characteristics of the blood glucose sensor, a stable voltage deviation is provided through the CE, RE, or WE ports connected to the sensor to prevent abnormal deviation of the excitation signal caused by electrochemical reactions.
[0038] In practice, based on the characteristics of the blood glucose sensor, to prevent the excitation signal from deviating abnormally due to electrochemical reactions, the CE / RE / WE ports need to stabilize the voltage deviation. The stable voltage is configured by the DAC and provided through the op-amp output.
[0039] Furthermore, the potentiostat in this embodiment can be configured in a 3-electrode or 2-electrode mode, and the connection diagrams for various modes are shown below. Figure 4 As shown, the connection requirements of various sensor applications are guaranteed, and the specific mode configuration is shown in Table 1.
[0040] Table 1: Mode Configuration
[0041] 3-electrode mode 2-electrode mode 1OPA1 configured as a buffer 2-electrode mode 2OPA2 off SW_CE Connectivity Connectivity disconnect SW_RE Connectivity Connectivity disconnect SW_CERE disconnect Connectivity disconnect SW_CEWE disconnect disconnect disconnect SW_REWE disconnect disconnect disconnect SW_CA disconnect disconnect disconnect
[0042] In a preferred embodiment, the potentiostat further includes a programmable load resistor RLOAD and a programmable gain resistor RTIA. The potentiostat converts current into voltage, which is then buffered and measured by the analog-to-digital converter (ADC) unit.
[0043] The trans-resistance resistor (RTIA) is adjustable and can be configured with 200kΩ / 400kΩ / 600kΩ / 800kΩ / 1MΩ, short-circuit, and open-circuit settings. When configured as open-circuit, an external resistor can be connected to the CA or CB terminals to achieve different trans-resistances, allowing the system to adapt to sensors with different sensitivities or different blood glucose concentrations for detection.
[0044] In addition, RLOAD is also an adjustable resistor, configured with 10 / 35 / 100 ohms and open circuit. When it is turned on, it plays a certain filtering role and optimizes the sensor signal to a certain extent.
[0045] As a preferred embodiment, it also includes: BUF_IN or BUF_REF connected to the potentiostat, which is used to increase the driving capability to ensure that the signal sent to the ADC is not distorted with the reference voltage, prevent the signal from being distorted when transmitted to the ADC, and ensure high-precision conversion.
[0046] like Figure 2 As shown, the main function of BUF_IN / BUF_REF is to increase the driving capability and ensure that the signal sent to the ADC is not distorted from the reference voltage.
[0047] As a preferred embodiment, the analog-to-digital converter (ADC) unit 120 adopts an on-chip 12-bit to 16-bit ADC.
[0048] In a preferred embodiment, the device further includes a power management module for providing a power reset signal, a digital power supply LDO circuit, and a low-power reference voltage source to the detection analog front-end device. The power reset signal detects the circuit power supply voltage. The digital power supply LDO includes a normal mode LDO and a low-power LDO, which respectively drive the high-power load digital circuit and the low-power portion of the digital circuit. In low-power mode, the normal mode LDO is turned off. The low-power reference voltage source generates V... REF Provides a conversion reference voltage for DAC and ADC.
[0049] In practice, the power management unit primarily provides the entire system with a power reset signal, a digital power supply LDO circuit, and a low-power reference voltage source. The power reset signal detects the circuit power supply voltage. The digital power supply LDO includes a normal mode LDO and a low-power LDO, which drive the high-power load digital circuit and the low-power digital circuit respectively. In low-power mode, the normal mode LDO is turned off.
[0050] As a preferred embodiment, it further includes: a clock module for generating a 4M clock and a 32K clock, wherein the 4M clock provides the main clock for the digital circuit and ADC, and the 32K is a low-speed clock to ensure that the system remains in a wake-up state under low power consumption.
[0051] In practical implementation, the reference voltage source generates VREF to provide the conversion reference voltage for the DAC and ADC. To ensure voltage stability and reduce noise, an external 1uF capacitor is required to ground. The clock module mainly generates 4MHz and 32kHz clocks. The 4MHz clock provides the main clock for the digital circuits and ADC, while the 32kHz clock is a low-speed clock that ensures the system remains in a wake-up state during low-power operation.
[0052] As a preferred embodiment, while ensuring the normally open circuit in the low-power state, the overall power consumption is controlled within 5uA.
[0053] In all modes, the analog front-end potentiostat, DAC, reference voltage source VREF, low-power LDO, and 32K low-speed clock are always operational. To meet the low-power application requirements of the system, the static power consumption of these modules must be less than 5uA.
[0054] This application embodiment also provides a CGM device, including: the detection analog front-end device, the detection analog front-end device including: a potentiostat, an analog-to-digital converter (ADC) unit and a digital-to-analog converter (DAC) unit, the potentiostat being connected to the DAC unit, the DAC unit being used to provide a bias voltage to the potentiostat, and the ADC unit being used to convert the output voltage of the potentiostat into an output digital signal and save it.
[0055] Regarding the critical low-power requirement of the CGM system solution, the embodiments of this application ensure that the overall power consumption of the normally open circuit is controlled within 5uA under low-power conditions. Through a unique low-power system design, the typical power consumption of the entire system with Bluetooth MCU in later applications is only in the 10uA range. Therefore, compared with the shortcomings of CGM solutions based on discrete components and low integration in related technologies, the CGM device in the embodiments of this application adopts an integrated design, which reduces costs, improves accuracy and battery life, reduces the overall size, and improves product wearing comfort.
[0056] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.
Claims
1. A detection simulation front-end device for CGM, characterized in that, The detection simulation front-end device includes: a potentiostat, an analog-to-digital converter (ADC) unit, and a digital-to-analog converter (DAC) unit. The potentiostat is connected to the DAC unit. The DAC unit is used to provide a bias voltage to the potentiostat. The ADC unit is used to convert the output voltage of the potentiostat into an output digital signal and save it. The potentiostat includes dual low-power operational amplifiers OPA1 / OPA2 and a switch SW. The switch SW and the dual low-power operational amplifiers OPA1 / OPA2 are connected to a sensor to process the current transmitted through the sensor according to the bias voltages DACO1 and DACO2 provided by the digital-to-analog converter (DAC) unit.
2. The detection simulation front-end device according to claim 1, characterized in that, The stable voltage of the potentiostat is configured by the digital-to-analog converter (DAC) unit and provided by the output of dual low-power operational amplifiers OPA1 / OPA2. Based on the characteristics of the blood glucose sensor, a stable voltage deviation is provided through the CE, RE, or WE ports connected to the sensor to prevent abnormal deviations in the excitation signal caused by electrochemical reactions.
3. The detection simulation front-end device according to claim 1, characterized in that, The potentiostat also includes a programmable load resistor RLOAD and a programmable gain resistor RTIA. The potentiostat converts current into voltage, which is then buffered and measured by the analog-to-digital converter (ADC) unit.
4. The detection simulation front-end device according to claim 1, characterized in that, Also includes: The BUF_IN or BUF_REF connected to the potentiostat is used to increase the driving capability and ensure that the signal sent to the ADC is not distorted from the reference voltage.
5. The detection simulation front-end device according to claim 1, characterized in that, The analog-to-digital converter (ADC) unit uses an on-chip 12-bit to 16-bit ADC.
6. The detection simulation front-end device according to claim 1, characterized in that, Also includes: The power management module provides the detection analog front-end device with a power reset signal, a digital power supply LDO circuit, and a low-power reference voltage source. The power reset signal detects the circuit power supply voltage. The digital power supply LDO includes a normal mode LDO and a low-power LDO, which respectively drive the high-power load digital circuit and the low-power portion of the digital circuit. In low-power mode, the normal mode LDO is turned off. The low-power reference voltage source generates V... REF Provides a conversion reference voltage for DAC and ADC.
7. The detection simulation front-end device according to claim 1, characterized in that, Also includes: The clock module generates a 4M clock and a 32K clock. The 4M clock provides the main clock for the digital circuits and ADC, while the 32K clock is a low-speed clock that ensures the system remains in a wake-up state while consuming low power.
8. The detection simulation front-end device according to claim 1, characterized in that, While ensuring the normally open circuit operates under low power conditions, the overall power consumption is controlled to within 5uA.
9. A CGM device, characterized in that, include: The detection simulation front-end device as described in any one of claims 1 to 8.