A high temperature compensated low temperature drift bandgap reference circuit

Abstract

This disclosure specifically relates to a high-temperature compensated low-temperature drift bandgap reference circuit, comprising a bandgap reference core circuit, a bias circuit, a temperature detection circuit, and a high-temperature compensation circuit; the bandgap reference core circuit is connected to the bias circuit, the bias circuit is connected to the temperature detection circuit, the temperature detection circuit is connected to the high-temperature compensation circuit, and the high-temperature compensation circuit is connected to the bandgap reference core circuit; the bandgap reference core circuit is used to generate an output reference voltage; the bias circuit is used to provide PTAT bias current and CTAT bias current to the temperature detection circuit; the temperature detection circuit is used to receive the PTAT bias current and CTAT bias current, and as the temperature increases, provides the portion of the PTAT bias current greater than the CTAT bias current as a compensation current to the high-temperature compensation circuit; the high-temperature compensation circuit is used to receive the compensation current and perform high-temperature compensation for the bandgap reference core circuit based on the compensation current.

Description

Technical Field

[0001] This disclosure relates to the field of reference voltage technology, specifically to a high-temperature compensated low-temperature drift bandgap reference circuit. Background Technology

[0002] A bandgap reference circuit is an analog circuit module that can still output a stable reference voltage under conditions of power supply voltage and ambient temperature variations. As a key module in integrated circuits, bandgap reference circuits are widely used in linear regulators, switching power supply controllers, analog-to-digital converters, digital-to-analog converters, and various analog and mixed-signal circuits. Their performance directly affects the performance of the entire system. Current research on bandgap reference circuits mainly focuses on the operating temperature range of -40℃ to 125℃, with very little research on bandgap reference circuits operating within the range of -55℃ to 225℃.

[0003] To obtain a lower temperature drift coefficient for the output voltage, traditional bandgap reference circuits, in addition to first-order temperature compensation, typically employ curvature correction techniques to compensate for the CTAT voltage in the base-emitter voltage difference VBE of the transistor. Among these methods, temperature-dependent resistor proportional compensation is a commonly used curvature correction technique. By combining positive and negative temperature coefficient resistors in a certain weighted ratio to generate higher-order terms that are positively correlated with temperature, this technique compensates for the higher-order terms in the transistor voltage VBE that are negatively correlated with temperature, thereby obtaining an output voltage with a lower temperature drift coefficient.

[0004] However, the temperature-dependent resistance ratio compensation method has limited compensation effect over a wide temperature range. This is because the higher-order temperature terms in the transistor voltage VBE will have a more significant impact on the output voltage temperature coefficient under high temperature conditions, making it difficult to obtain an output voltage with a low temperature coefficient.

[0005] Therefore, the market urgently needs new technical solutions that can perform high-temperature compensation to reduce the output voltage temperature drift coefficient of the bandgap reference, so as to solve the problem that existing technologies cannot obtain low temperature drift coefficient voltages over a wide temperature range.

[0006] The references are as follows: [1] KN Leung. A 2-V 23-μA 5.3-ppm / ℃ Curvature-Compensated CMOSBandgap Voltage Reference[J]. IEEE J. Solid-State Circuits, 2003, vol. 38(3):561–564. [2] Chun Yang. A 1.8ppm / ℃ Low Temperature Coefficient CurvatureCompensated Bandgap for the Low Voltage Application [C]. 2013 IEEEInternational Conference of Electron Devices and Solid-state Circuits, 2013,1-2. Summary of the Invention To address the problems existing in the prior art, this disclosure proposes a high-temperature compensation low-temperature drift bandgap reference circuit, aiming to resolve at least one of the aforementioned technical problems. The technical solution adopted in this disclosure is as follows: A high-temperature compensated low-temperature drift bandgap reference circuit includes a bandgap reference core circuit, a bias circuit, a temperature detection circuit, and a high-temperature compensation circuit. The core circuit of the bandgap reference is connected to the bias circuit, the bias circuit is connected to the temperature detection circuit, the temperature detection circuit is connected to the high temperature compensation circuit, and the high temperature compensation circuit is connected to the core circuit of the bandgap reference. The core circuit of the bandgap reference is used to generate the output reference voltage V. REF ; The bias circuit is used to provide PTAT bias current and CTAT bias current for the temperature sensing circuit; The temperature detection circuit is used to obtain the PTAT bias current and CTAT bias current from the bias circuit. As the temperature increases, the portion of the PTAT bias current that is greater than the CTAT bias current is provided as a compensation current to the high temperature compensation circuit. A high-temperature compensation circuit is used to receive the compensation current and perform high-temperature compensation for the bandgap reference core circuit based on the compensation current.

[0007] Preferably, the bandgap reference core circuit includes: resistors R1, R2, R3 and R4, PMOS transistor MP1, transistors Q1 and Q2, and operational amplifier A1; The source of PMOS transistor MP1 is connected to power supply VDD, the gate is connected to the output of operational amplifier A1, and the drain is connected to one end of resistor R4. One end of resistor R1 and one end of resistor R2 are connected in parallel to the other end of resistor R4. The other ends of resistor R1 and resistor R2 are connected to the non-inverting input and the inverting input of operational amplifier A1, respectively. The base and collector of transistor Q1 are connected together, the collector of transistor Q1 is connected to the other end of resistor R1, and the emitter of transistor Q1 is grounded. One end of resistor R3 is connected to the other end of resistor R2, and the other end of resistor R3 is connected to the collector of transistor Q2. The base and collector of transistor Q2 are connected, and the emitter of transistor Q2 is grounded.

[0008] Preferably, the resistance values ​​of resistors R1 and R2 are the same.

[0009] Preferably, resistors R1, R2, and R3 are negative temperature coefficient resistors of the same specification, while R4 is a positive temperature coefficient resistor.

[0010] Preferably, one end of resistor R4 outputs the reference voltage V. REF During implementation, to facilitate understanding and demonstrate the change in reference voltage, the reference voltage V before compensation can be... REF The output reference voltage V before compensation is denoted as V. REF_pre The compensated reference voltage V REF The compensated output reference voltage V is denoted as V. REF_post To distinguish the reference voltage V under different states REF .

[0011] Preferably, the bias circuit includes: PMOS transistors MP6, MP7 and MP8, NMOS transistors MN4, MN5 and MN6, resistor R5, and transistor Q3; The sources of PMOS transistors MP6, MP7, and MP8 are connected to the power supply VDD, respectively. The gate of PMOS transistor MP6 is connected to the output of operational amplifier A1, and its drain is connected to the drain of NMOS transistor MN4. The source and gate of PMOS transistor MP7 are connected, and the gate of PMOS transistor MP7 is connected to the gate of PMOS transistor MP8. The drain of PMOS transistor MP7 is connected to the drain of NMOS transistor MN5, and the drain of PMOS transistor MP8 is connected to the drain of NMOS transistor MN6. The drain of NMOS transistor MN4 is connected to the gate, and the source of NMOS transistor MN4 is grounded. The gates of NMOS transistors MN5 and MN6 are connected, and the gate and drain of NMOS transistor MN6 are connected. The source of NMOS transistor MN5 is connected to one end of resistor R5, and the other end of resistor R5 is grounded. The source of NMOS transistor MN6 is connected to the collector of transistor Q3, the collector of transistor Q3 is connected to the base, and the emitter of transistor Q3 is grounded.

[0012] Preferably, the PMOS transistors MP6, MP7, and MP8 have the same specifications.

[0013] Preferably, the specifications of NMOS transistors MN4, MN5 and MN6 are the same.

[0014] Preferably, the temperature detection circuit includes: a PMOS transistor MP5 and an NMOS transistor MN3; The source of PMOS transistor MP5 is connected to the power supply VDD, the gate of PMOS transistor MP5 is connected to the source of PMOS transistor MP7, and the drain of PMOS transistor MP5 is connected to the drain of NMOS transistor MN3. The gate of NMOS transistor MN3 is connected to the gate of NMOS transistor MN4; The source of NMOS transistor MN3 is grounded.

[0015] Preferably, the high-temperature compensation circuit includes: PMOS transistors MP2 and MP3, and NMOS transistors MN1 and MN2; The sources of PMOS transistors MP2 and MP3 are both connected to the power supply VDD; The gates of PMOS transistors MP2 and MP3 are connected; The gate and drain of the PMOS transistor MP3 are connected together; The drain of PMOS transistor MP3 is connected to the drain of PMOS transistor MP5 or the drain of NMOS transistor MN3. The drain of PMOS transistor MP2 is connected to the drain of NMOS transistor MN2; The drain and gate of NMOS transistor MN2 are connected, and the source of NMOS transistor MN2 is grounded. The gate of NMOS transistor MN1 is connected to the gate of NMOS transistor MN2, and the source of NMOS transistor MN1 is grounded. The drain of NMOS transistor MN1 is connected to the other end of resistor R3 or the collector of transistor Q2.

[0016] The beneficial effects of this disclosure are as follows: This disclosure provides a high-temperature compensation low-temperature drift bandgap reference circuit. By introducing temperature detection circuits for PTAT bias current and CTAT bias current, the high-temperature compensation circuit can be activated at a certain temperature threshold. This draws the collector current of transistor Q2 to reduce the base-emitter voltage VBE2 of transistor Q2, thereby increasing the magnitude of the PTAT bias current flowing through R3 and raising the output reference voltage. At high temperatures, this can further compensate for the decrease in output reference voltage caused by the decrease in transistor voltage VBE with temperature. This upgrades and improves the traditional curvature correction method based on the ratio of temperature-dependent resistors, and reduces the temperature drift coefficient of the output reference voltage, making it applicable to a wider range of temperature scenarios. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the specific embodiments of this disclosure or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the architecture of a high-temperature compensation low-temperature drift bandgap reference circuit as described in this disclosure.

[0019] Figure 2 This is a detailed schematic diagram of a high-temperature compensation low-temperature drift bandgap reference circuit as described in this disclosure.

[0020] Figure 3 This is a schematic diagram illustrating the compensation effect of a high-temperature compensation low-temperature drift bandgap reference circuit as described in this disclosure. Detailed Implementation

[0021] The present disclosure will now be described in detail with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in the present application can be combined with each other.

[0022] The following detailed descriptions are exemplary and intended to provide further detailed explanation of this disclosure. Unless otherwise specified, all technical terms used in this disclosure have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this disclosure.

[0023] Terminology Explanation: BGR: Bandgap Reference.

[0024] TC: Temperature Coefficient.

[0025] PTAT: Proportional to Absolute Temperature.

[0026] CTAT: Complementary to Absolute Temperature.

[0027] like Figure 1 As shown, a high-temperature compensation low-temperature drift bandgap reference circuit includes a bandgap reference core circuit 100, a bias circuit 200, a temperature detection circuit 300, and a high-temperature compensation circuit 400. The bandgap reference core circuit 100 is connected to the bias circuit 200, the bias circuit 200 is connected to the temperature detection circuit 300, the temperature detection circuit 300 is connected to the high temperature compensation circuit 400, and the high temperature compensation circuit 400 is connected to the bandgap reference core circuit 100. The bandgap reference core circuit 100 is used to generate the output reference voltage V. REF ; Bias circuit 200 is used to provide PTAT bias current and CTAT bias current to temperature detection circuit 300; Temperature detection circuit 300 is used to obtain PTAT bias current and CTAT bias current from bias circuit 200. As the temperature increases, the portion of PTAT bias current that is greater than CTAT bias current is provided as compensation current to high temperature compensation circuit 400. The high-temperature compensation circuit 400 is used to receive the compensation current and perform high-temperature compensation on the bandgap reference core circuit 100 based on the compensation current.

[0028] In one feasible implementation, such as Figure 2 As shown, the bandgap reference core circuit 100 includes: resistors R1, R2, R3 and R4, PMOS transistor MP1, transistors Q1 and Q2, and operational amplifier A1; The source of PMOS transistor MP1 is connected to power supply VDD, the gate is connected to the output of operational amplifier A1, and the drain is connected to one end of resistor R4. One end of resistor R1 and one end of resistor R2 are connected in parallel to the other end of resistor R4. The other ends of resistor R1 and resistor R2 are connected to the non-inverting input and the inverting input of operational amplifier A1, respectively. The base and collector of transistor Q1 are connected together, the collector of transistor Q1 is connected to the other end of resistor R1, and the emitter of transistor Q1 is grounded. One end of resistor R3 is connected to the other end of resistor R2, and the other end of resistor R3 is connected to the collector of transistor Q2. The base and collector of transistor Q2 are connected, and the emitter of transistor Q2 is grounded.

[0029] Furthermore, resistors R1 and R2 have the same resistance value.

[0030] Furthermore, resistors R1, R2, and R3 are all negative temperature coefficient resistors of the same specification, while R4 is a positive temperature coefficient resistor.

[0031] Furthermore, the reference voltage V is output at one end of resistor R4. REF During implementation, to facilitate understanding and demonstrate the change in reference voltage, the reference voltage V before compensation can be... REF The output reference voltage V before compensation is denoted as V.REF_pre The compensated reference voltage V REF The compensated output reference voltage V is denoted as V. REF_post To distinguish the reference voltage V under different states REF .

[0032] In one feasible implementation, such as Figure 2 As shown, the bias circuit 200 includes: PMOS transistors MP6, MP7 and MP8, NMOS transistors MN4, MN5 and MN6, resistor R5, and transistor Q3; The sources of PMOS transistors MP6, MP7, and MP8 are connected to the power supply VDD, respectively. The gate of PMOS transistor MP6 is connected to the output of operational amplifier A1, and its drain is connected to the drain of NMOS transistor MN4. The source and gate of PMOS transistor MP7 are connected, and the gate of PMOS transistor MP7 is connected to the gate of PMOS transistor MP8. The drain of PMOS transistor MP7 is connected to the drain of NMOS transistor MN5, and the drain of PMOS transistor MP8 is connected to the drain of NMOS transistor MN6. The drain of NMOS transistor MN4 is connected to the gate, and the source of NMOS transistor MN4 is grounded. The gates of NMOS transistors MN5 and MN6 are connected, and the gate and drain of NMOS transistor MN6 are connected. The source of NMOS transistor MN5 is connected to one end of resistor R5, and the other end of resistor R5 is grounded. The source of NMOS transistor MN6 is connected to the collector of transistor Q3, the collector of transistor Q3 is connected to the base, and the emitter of transistor Q3 is grounded.

[0033] Preferably, the PMOS transistors MP6, MP7, and MP8 all have the same specifications; The specifications of NMOS transistors MN4, MN5, and MN6 are all the same.

[0034] In one feasible implementation, such as Figure 2 As shown, the temperature detection circuit 300 includes: a PMOS transistor MP5 and an NMOS transistor MN3; The source of PMOS transistor MP5 is connected to the power supply VDD, the gate of PMOS transistor MP5 is connected to the source of PMOS transistor MP7, and the drain of PMOS transistor MP5 is connected to the drain of NMOS transistor MN3. The gate of NMOS transistor MN3 is connected to the gate of NMOS transistor MN4; The source of NMOS transistor MN3 is grounded.

[0035] In one feasible implementation, such as Figure 2As shown, the high-temperature compensation circuit 400 includes: PMOS transistors MP2 and MP3, and NMOS transistors MN1 and MN2; The sources of PMOS transistors MP2 and MP3 are both connected to the power supply VDD; The gates of PMOS transistors MP2 and MP3 are connected; The gate and drain of the PMOS transistor MP3 are connected together; The drain of PMOS transistor MP3 is connected to the drain of PMOS transistor MP5 or the drain of NMOS transistor MN3. The drain of PMOS transistor MP2 is connected to the drain of NMOS transistor MN2; The drain and gate of NMOS transistor MN2 are connected, and the source of NMOS transistor MN2 is grounded. The gate of NMOS transistor MN1 is connected to the gate of NMOS transistor MN2, and the source of NMOS transistor MN1 is grounded. The drain of NMOS transistor MN1 is connected to the other end of resistor R3 or the collector of transistor Q2.

[0036] The working principle of this disclosure can be understood from the following: The core circuit 100 of the bandgap reference consists of operational amplifier A1 and PMOS transistor MP1 forming a negative feedback loop. The voltage at one end of resistor R3 is clamped to the base-emitter voltage V of transistor Q1. BE1 Resistors of the same size are connected at the other end to the collector of transistor Q2. The voltage drop across resistor R3 reflects the base-emitter voltage V of transistor Q1. BE1 And the base-emitter voltage V of transistor Q2 BE2 The difference. Here, clamping refers to the negative feedback loop formed by operational amplifier A1 and PMOS transistor MP1, which makes the positive and negative input voltages of operational amplifier A1 eventually equal due to the negative feedback.

[0037] Resistor R1 and transistor Q1 constitute the first branch of the bandgap reference core circuit 100, while resistors R2 and R3 and transistor Q2 constitute the second branch of the bandgap reference core circuit 100. Since resistors R1 and R2 have the same specifications, their voltage drops are the same, and their resistance values ​​are also the same. Therefore, the current flowing through the first branch and the second branch are also the same.

[0038] The positive input terminal of A1 is the base-emitter voltage VBE1 of transistor Q1; the negative input terminal of A1 is connected to one end of resistor R3, so the voltage at this end of R3 is clamped to be the same as VBE1.

[0039] Due to the base-emitter voltage V of transistors operating at different current densities BE The difference V BE It is directly proportional to absolute temperature (PTAT), therefore the formula can be obtained: ; Among them, V T It is the thermoelectric voltage, I, which is proportional to the absolute temperature. C This is the collector current of transistor Q1, and n is the number of transistors Q2 connected in parallel. In specific implementations of this disclosure, n is determined according to actual needs and can be set to 24. The current in the second branch is the PTAT bias current. .

[0040] Therefore, the output reference voltage before compensation can be obtained. .

[0041] The bandgap reference core circuit 100 can employ a curvature correction method that uses resistance ratio compensation related to resistance and temperature. Specifically, resistors R1, R2, and R3 are of the same type with negative temperature coefficients, while R4 is a resistor with a positive temperature coefficient.

[0042] , ; Where T0 is the reference temperature of the corresponding resistor, R1(T0) is the reference temperature of resistor R1, R2(T0) is the reference temperature of resistor R2; R1(T) is the temperature of resistor R1, and R2(T) is the temperature of resistor R2. K n Let K be the temperature coefficient of resistor R1. p Let R4 be the temperature coefficient of resistor R4. Since R1 and R3 are the same type of negative temperature coefficient resistors, they have the same temperature coefficient. It is a constant term independent of temperature; while R1 and R4 are different types of resistors. These are higher-order terms related to temperature, which, when expanded, yield: .

[0043] Therefore, through Compensation V BE1 The first-order temperature term in Compensation V BE1 The higher-order temperature term in the equation yields the output reference voltage after curvature correction. At this point, the output reference voltage has not yet undergone subsequent compensation; therefore, it is the output reference voltage V before compensation. REF_pre .

[0044] Bias circuit 200: can provide PTAT bias current and CTAT bias current for temperature detection circuit 300.

[0045] Since the gate of PMOS transistor MP1 is connected to the output of operational amplifier A1, and the gate of PMOS transistor MP6 is also connected to the output of operational amplifier A1, the gate-source voltage of PMOS transistor MP6 is the same as that of PMOS transistor MP1. PMOS transistor MP6 actually acts as a current mirror, replicating the PTAT bias current on PMOS transistor MP1 at a certain ratio. PMOS transistor MP6 provides PTAT bias current to NMOS transistor MN3 through NMOS transistor MN4.

[0046] PMOS transistors MP7 and MP8 have the same gate-source voltage and size. They form two parallel branches in the bias circuit 200, and the current flowing through these two branches is the same, meaning the current flowing through NMOS transistors MN5 and MN6 is the same. Since MN5 and MN6 have the same gate voltage and size, their source voltages are also the same. Therefore, the voltage drop across resistor R5 is equal to the base-emitter voltage V of transistor Q3. BE3 V BE3 The voltage is CTAT, and the current flowing through resistor R5 is the CTAT bias current, the magnitude of which is... The PMOS transistor MP7 provides CTAT bias current to MP5 in the temperature detection circuit 300.

[0047] Temperature detection circuit 300: MP5 is a CTAT bias current device, and MN3 is a PTAT bias current device. During implementation, as the temperature rises continuously after power-on, the CTAT bias current supplied to MP5 at the initial temperature is greater than the PTAT bias current of MN3. The current in MP5 is determined by MN3, and no current flows through MP3. As the temperature increases, after reaching a preset temperature threshold, the PTAT bias current supplied to MN3 will be greater than the CTAT bias current of MP5. The current in MP5 is determined by MP5 itself, and the portion of the PTAT bias current exceeding the CTAT bias current will flow through MP3, serving as the first compensation current supplied to MP3 in the high-temperature compensation circuit 400.

[0048] The PTAT bias current on MN3 is denoted as k1I. PTAT The CTAT bias current on MP5 is denoted as k2I. CTAT (k1 and k2 are the current mirror replication ratios), the compensation current on the MP3 is I. NL We can obtain the following formula: ; Here, T0 is the preset temperature threshold. The preset temperature threshold can be obtained by referring to existing technologies or determined through a limited number of experiments.

[0049] High-temperature compensation circuit 400: The first compensation current obtained by MP3 is mirrored into a second compensation current through MP2 and MN2, and the second compensation current is obtained by MN1. The second compensation current obtained by MN1 can draw away a portion of the collector current on transistor Q2, thereby reducing the collector current IC of transistor Q2 at high temperatures. The base-emitter voltage V of transistor Q2 BE2 This reduces the voltage drop across R3. V BE Increase, meaning that the collector current IC of transistor Q2 after high-temperature compensation is reduced by a factor of k compared to the original value. Output compensated reference voltage At high temperatures, the output reference voltage increases compared to the uncompensated state to compensate for V. BE1 The output reference voltage drop caused by temperature-dependent higher-order terms at high temperatures.

[0050] like Figure 3 As shown, before high-temperature compensation, the output reference voltage V is... REF_pre The temperature drift coefficient is 14.2 ppm / ℃. High-temperature compensation can reduce the compensated output reference voltage V. REF_post The temperature drift coefficient is reduced to 2.1 ppm / ℃. It can be clearly seen that in this disclosure, the output reference voltage decreases due to the decrease in the higher-order term voltage VBE of the transistor, which is negatively correlated with temperature, at high temperatures, thereby increasing the temperature drift coefficient.

[0051] In implementing this disclosure, the high-temperature compensation circuit 400 can be designed to activate at a suitable temperature threshold. This requires setting appropriate PTAT and CTAT bias current values ​​to set the temperature threshold at the point where the output reference voltage begins to decrease. Simultaneously, an appropriate current mirror ratio needs to be set to avoid the compensation current being too small or too large, resulting in an insignificant compensation effect. Determining the appropriate temperature threshold or setting appropriate PTAT and CTAT bias current values ​​through debugging and / or experimentation can be achieved using existing technologies and does not affect the implementation of this disclosure.

[0052] In summary, through the aforementioned unique technical solution, this disclosure provides a high-temperature compensation low-temperature drift bandgap reference circuit. By introducing temperature detection circuits for PTAT bias current and CTAT bias current, the high-temperature compensation circuit can be activated at a certain temperature threshold. This draws the collector current of transistor Q2 to reduce the base-emitter voltage VBE2 of transistor Q2, thereby increasing the magnitude of the PTAT bias current flowing through R3 and raising the output reference voltage. At high temperatures, this further compensates for the decrease in output reference voltage caused by the decrease in transistor voltage VBE with temperature. Thus, it upgrades and improves upon the traditional curvature correction method based on the ratio of temperature-dependent resistors, and reduces the temperature drift coefficient of the output reference voltage, making it applicable to a wider range of temperature scenarios.

[0053] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure and not to limit them. Although this disclosure has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of this disclosure. Any modifications or equivalent substitutions that do not depart from the spirit and scope of this disclosure should be covered within the protection scope of the claims of this disclosure.

Claims

1. A high-temperature compensation low-temperature drift bandgap reference circuit, characterized in that, It includes a bandgap reference core circuit (100), a bias circuit (200), a temperature detection circuit (300), and a high temperature compensation circuit (400); The bandgap reference core circuit (100) is connected to the bias circuit (200), the bias circuit (200) is connected to the temperature detection circuit (300), the temperature detection circuit (300) is connected to the high temperature compensation circuit (400), and the high temperature compensation circuit (400) is connected to the bandgap reference core circuit (100). The bandgap reference core circuit (100) is used to generate the output reference voltage V. REF ; Bias circuit (200) is used to provide PTAT bias current and CTAT bias current for temperature sensing circuit (300); Temperature detection circuit (300) is used to obtain PTAT bias current and CTAT bias current from bias circuit (200), and as the temperature increases, the part of PTAT bias current greater than CTAT bias current is provided as compensation current to high temperature compensation circuit (400). A high-temperature compensation circuit (400) is used to receive the compensation current and perform high-temperature compensation on the bandgap reference core circuit (100) based on the compensation current.

2. The high-temperature compensation low-temperature drift bandgap reference circuit as described in claim 1, characterized in that, The bandgap reference core circuit (100) includes: resistors R1, R2, R3 and R4, PMOS transistor MP1, transistors Q1 and Q2, and operational amplifier A1; The source of PMOS transistor MP1 is connected to power supply VDD, the gate is connected to the output of operational amplifier A1, and the drain is connected to one end of resistor R4. One end of resistor R1 and one end of resistor R2 are connected in parallel to the other end of resistor R4. The other ends of resistor R1 and resistor R2 are connected to the non-inverting input and the inverting input of operational amplifier A1, respectively. The base and collector of transistor Q1 are connected together, the collector of transistor Q1 is connected to the other end of resistor R1, and the emitter of transistor Q1 is grounded. One end of resistor R3 is connected to the other end of resistor R2, and the other end of resistor R3 is connected to the collector of transistor Q2. The base and collector of transistor Q2 are connected, and the emitter of transistor Q2 is grounded.

3. The high-temperature compensation low-temperature drift bandgap reference circuit as described in claim 2, characterized in that, Resistors R1 and R2 have the same resistance value.

4. The high-temperature compensation low-temperature drift bandgap reference circuit as described in claim 2, characterized in that, Resistors R1, R2, and R3 are all negative temperature coefficient resistors of the same specification, while R4 is a positive temperature coefficient resistor.

5. The high-temperature compensation low-temperature drift bandgap reference circuit as described in claim 2, characterized in that, The reference voltage V is output from one end of resistor R4. REF .

6. The high-temperature compensation low-temperature drift bandgap reference circuit as described in claim 2, characterized in that, The bias circuit (200) includes: PMOS transistors MP6, MP7 and MP8, NMOS transistors MN4, MN5 and MN6, resistor R5, and transistor Q3; The sources of PMOS transistors MP6, MP7, and MP8 are connected to the power supply VDD, respectively. The gate of PMOS transistor MP6 is connected to the output of operational amplifier A1, and its drain is connected to the drain of NMOS transistor MN4. The source and gate of PMOS transistor MP7 are connected, and the gate of PMOS transistor MP7 is connected to the gate of PMOS transistor MP8. The drain of PMOS transistor MP7 is connected to the drain of NMOS transistor MN5, and the drain of PMOS transistor MP8 is connected to the drain of NMOS transistor MN6. The drain of NMOS transistor MN4 is connected to the gate, and the source of NMOS transistor MN4 is grounded. The gates of NMOS transistors MN5 and MN6 are connected, and the gate and drain of NMOS transistor MN6 are connected. The source of NMOS transistor MN5 is connected to one end of resistor R5, and the other end of resistor R5 is grounded. The source of NMOS transistor MN6 is connected to the collector of transistor Q3, the collector of transistor Q3 is connected to the base, and the emitter of transistor Q3 is grounded.

7. The high-temperature compensation low-temperature drift bandgap reference circuit as described in claim 6, characterized in that, The specifications of PMOS transistors MP6, MP7, and MP8 are all the same.

8. The high-temperature compensation low-temperature drift bandgap reference circuit as described in claim 6, characterized in that, The specifications of NMOS transistors MN4, MN5, and MN6 are all the same.

9. The high-temperature compensation low-temperature drift bandgap reference circuit as described in claim 6, characterized in that, The temperature detection circuit (300) includes: PMOS transistor MP5 and NMOS transistor MN3; The source of PMOS transistor MP5 is connected to the power supply VDD, the gate of PMOS transistor MP5 is connected to the source of PMOS transistor MP7, and the drain of PMOS transistor MP5 is connected to the drain of NMOS transistor MN3. The gate of NMOS transistor MN3 is connected to the gate of NMOS transistor MN4; The source of NMOS transistor MN3 is grounded.

10. The high-temperature compensation low-temperature drift bandgap reference circuit as described in claim 9, characterized in that, The high-temperature compensation circuit (400) includes: PMOS transistors MP2 and MP3, and NMOS transistors MN1 and MN2; The sources of PMOS transistors MP2 and MP3 are both connected to the power supply VDD; The gates of PMOS transistors MP2 and MP3 are connected; The gate and drain of the PMOS transistor MP3 are connected together; The drain of PMOS transistor MP3 is connected to the drain of PMOS transistor MP5 or the drain of NMOS transistor MN3. The drain of PMOS transistor MP2 is connected to the drain of NMOS transistor MN2; The drain and gate of NMOS transistor MN2 are connected, and the source of NMOS transistor MN2 is grounded. The gate of NMOS transistor MN1 is connected to the gate of NMOS transistor MN2, and the source of NMOS transistor MN1 is grounded. The drain of NMOS transistor MN1 is connected to the other end of resistor R3 or the collector of transistor Q2.

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