A control board card heat equalization system and method based on water circulation micro-channel cooling

Abstract

This disclosure relates to the field of chip technology, and in particular to a thermal equalization system and method for control boards based on water-circulating microfluidic cooling. This disclosure establishes a main pump in the main inlet pipe, extending it to multiple independent branch pipes, each equipped with an independent branch pump. Furthermore, each cooling area of ​​each chip is configured with completely independent inlet and outlet channels and zoned micro-valvees, forming a multi-level independent control system at the board, chip, and zone levels. This disclosure not only eliminates hydraulic coupling between zones, improving the independence and accuracy of flow regulation, but also allows for rapid adjustment of the flow rate in the target area when load changes or local hotspots occur, achieving shorter response times and higher thermal equalization effects. Simultaneously, the zoned independent supply and return water structure facilitates online isolation of faulty areas and maintenance replacement. Combined with comprehensive filtration, venting, bypass, check valve, and pressure relief engineering measures, it significantly improves the reliability and maintainability of the system in harsh environments such as new energy power plants.

Description

Technical Field

[0001] This disclosure relates to the field of chip technology, and in particular to a control board thermal equalization system and method based on water-circulating microchannel cooling. Background Technology

[0002] With the high-density integration of high-power devices such as multi-core processors, programmable logic devices (FPGAs), and power drive chips onto the same control board, the heat generation per unit area and total power consumption of the system continue to rise. In scenarios such as new energy power plants and industrial control centers that operate continuously for long periods, the heat dissipation capacity of traditional air cooling, vapor chambers, or uniform liquid cooling systems is no longer sufficient to meet the requirements for safe chip operation. These solutions often rely on a single liquid supply loop and a fixed microfluidic structure to distribute the coolant to the entire cold plate area. However, due to the large differences in thermal load among individual chips and the dynamic changes in hot spot locations, uneven heating and cooling and localized overheating are easily caused. In addition, under complex operating conditions, the superposition of factors such as ambient temperature, dust, humidity, vibration, and electromagnetic interference places higher demands on the reliability and maintainability of the cooling system. How to achieve efficient, controllable, and rapid-response fine-tuning of cooling between chips and different areas within chips within a limited installation space has become a significant technical challenge in the field of thermal management.

[0003] Currently, the common practice in engineering is to install a main pump on the main inlet pipe and chip-level proportional valves at the inlets leading to each chip's cold plate, using valve opening adjustments to distribute flow between chips. This method can improve the temperature difference between chips to some extent, but it still has significant limitations: First, the cold plate does not provide independent zoned water supply and return for each chip; different areas within the chip share a single inlet and outlet, failing to achieve truly independent regional cooling. Second, there is significant hydraulic coupling between the parallel channels; changes in the state of one valve will affect the flow in other channels, limiting control accuracy and stability. Some improved solutions add micro-valves within the cold plate to fine-tune the flow in each area, but due to the lack of independent inlets and outlets for each area, crosstalk still exists between zones, hotspot suppression is limited, and fault isolation and online maintenance are not convenient. These existing solutions cannot fully meet the high-reliability requirements of new energy power plants in terms of dynamic load response speed, cross-channel interference suppression, zone isolation, and fault tolerance.

[0004] Existing technologies have the following problems: Lack of independent supply and return water boundaries at the zone level: Most existing liquid cooling plates only have proportional valves at the chip inlet or zoned micro-valve inside the plate. However, these zones share the same chip inlet and outlet, resulting in significant hydraulic coupling between zones. Changes in the valve status of one zone can affect the flow distribution in other zones, making it difficult to achieve precise, rapid, and independent cooling for hot spots.

[0005] Crosstalk and insufficient control accuracy: In a parallel system with a single main pump, the pressure and flow changes between branches will interfere with each other. Adjusting one branch may cause passive changes in the flow of other branches, reducing the stability and accuracy of temperature control.

[0006] Limited dynamic response speed: Existing solutions mostly rely on the coordinated adjustment of the main pump and proportional valve, which limits the overall response speed. When there are sudden load changes or hot spots form rapidly, it is impossible to quickly pull the hot spot temperature back to the safe zone in a short time, which easily leads to temperature overshoot.

[0007] Insufficient fault tolerance and maintainability: When a branch is partially blocked, a valve is stuck, or a pump fails, because the branch is hydraulically connected to other channels, it often affects other cooling channels, lacking effective zone isolation and online degradation operation capabilities; on-site location and replacement of faulty parts are not convenient enough.

[0008] The design is not adapted to complex working conditions: For new energy power station applications that are used outdoors for a long time, the existing system lacks engineering support in terms of filtration, exhaust, bypass, backflow prevention, pressure relief, and EMI shielding, making it difficult to work stably for a long time under conditions such as dust, heat and humidity, salt spray, and electromagnetic interference. Summary of the Invention

[0009] To address the aforementioned issues, this disclosure provides a control board thermal equalization system and method based on water-circulating microchannel cooling.

[0010] Firstly, a control board thermal equalization system based on water-circulating microchannel cooling includes: The sensing unit, control unit, and execution unit adopt a closed-loop control architecture. The sensing unit includes sensors distributed throughout the board, used to collect data on temperature, coolant flow, and system pressure of each chip and cooling area; The control unit includes an upper-level model predictive control (MPC) and a lower-level PID controller. The upper-level MPC periodically calculates the globally optimal cooling allocation strategy, and the lower-level PID controller tracks the cooling allocation strategy of the upper-level MPC in real time and outputs control commands. The execution unit includes a main inlet pipe, a main return pipe, a main micro pump installed on the main inlet pipe, an adjustable-speed micro liquid cooling pump, and micro regulating valves for each channel, which regulate the flow of coolant according to control commands. The main inlet pipe extends into multiple inlet branch pipes, each equipped with an independent branch pump, which is connected to the main inlet channel of the corresponding chip cold plate. Each chip cold plate is divided into several cooling zones, each equipped with an independent inlet microchannel, an outlet microchannel, and a partition micro valve arranged on the inlet channel. The inlet microchannel is connected to the main inlet channel of the chip, the outlet microchannel is connected to the main outlet channel of the chip, and the main outlet channel of the chip merges into the main return pipe through the corresponding return branch pipe.

[0011] Furthermore, the sensors include: Temperature sensors are used to monitor the temperature of each chip and cooling area in real time; Flow meter, used to measure the coolant flow rate in each branch; Pressure sensors are used to monitor the pressure conditions of the cooling circuit.

[0012] Furthermore, the upper-level model predictive control (MPC) aims to reduce the difference between the highest and lowest temperatures in the system and energy consumption by continuously optimizing flow rate and pump speed, while the lower-level PID controller adjusts based on the optimization results of the upper-level model predictive control (MPC).

[0013] Furthermore, the upper-level model predictive control (MPC) aims to reduce the difference between the highest and lowest temperatures within the system and to minimize energy consumption. It continuously optimizes flow rate and pump speed. The lower-level PID controller adjusts based on the optimization results of the upper-level MPC, including: The upper-level model predictive control (MPC) solves an optimization problem based on the current temperature and estimated power consumption of all chips to determine the optimal setpoints for each actuator. MPC performs an optimization calculation every first time interval to globally optimize the coolant distribution, making the temperature of each chip or region more consistent and avoiding exceeding the safety threshold. The lower-level PID controller runs every second time interval; the lower-level PID controller includes several PID control loops, each PID control loop corresponds to a cooling channel, and continuously adjusts the opening of the corresponding micro valve or the output of the micro pump according to the deviation between the optimal set value given by the MPC and the measured value of the cooling channel; wherein, the second time interval is shorter than the first time interval.

[0014] Furthermore, in each MPC cycle, the upper-level model predictive control MPC starts from the current state, simulates the system behavior for the next N steps, optimizes the pump speed and valve opening sequence within N steps, executes only the control command for the first step, and then advances the optimization based on the real-time feedback rolling window, where N is a positive integer.

[0015] Furthermore, the lower-level PID controllers include: main pump PID control unit, branch pump PID control unit, chip-level valve PID control unit, and chip-level partitioned micro-valve PID control unit; The main pump PID control unit is used to control the main micropump, which is responsible for maintaining the circulation flow and pressure of the entire liquid cooling circuit. It adjusts the main liquid supply by adjusting the motor speed or drive voltage of the main micropump. The main pump PID control unit is configured in constant differential pressure control mode, which maintains a constant pressure difference between the main inlet pipe and the main return pipe by adjusting the speed of the main micropump, thus providing hydraulic power to each branch. The branch pump PID control unit is used to control the branch pump corresponding to each water inlet branch pipe; the branch pump PID control unit corresponding to each water inlet branch pipe is configured in flow tracking mode; the upper-level model predictive control (MPC) calculates the optimal total cooling flow required by the chip based on the real-time temperature distribution and power consumption prediction of each chip, and sends it as a set value to the corresponding branch pump PID control unit; the branch pump PID control unit adjusts the speed of the branch pump in real time based on the measured value fed back by the branch flow sensor. Specifically, the branch pump control employs a flow-closed-loop following strategy to achieve hydraulic decoupling of each cooling branch. Specifically, the main pump PID unit of the control system is configured in constant differential pressure control mode. By adjusting the speed of the main micropump, it maintains a constant pressure difference between the main inlet and return pipes, thereby providing a stable basic hydraulic pressure source for each branch and eliminating coupling interference caused by fluctuations in the main pipe pressure between branches. Simultaneously, the branch pump PID unit corresponding to each inlet branch is configured in flow-tracking mode. The upper-level MPC controller calculates the optimal total cooling flow required by each chip based on its real-time temperature distribution and power consumption prediction, and sends this as a setpoint to the corresponding branch pump PID. The branch pump PID adjusts the speed of the branch pump in real time based on the measured value fed back by the branch's flow sensor. Through this strategy, when a chip experiences a sudden increase in thermal load requiring increased flow, only the pump speed of that branch increases; the resulting pressure fluctuations in the main pipe are quickly compensated by the main pump, ensuring that the flow rates of other branches do not passively change, achieving true independent thermal equilibrium control.

[0016] Furthermore, the circulating driving force is provided by the main micropump in the execution unit; The flow rate distributed to each chip is regulated by the inlet valve; The flow rate distributed to each chip's internal partition is regulated by microvalves.

[0017] Furthermore, redundant channels can be installed in parallel for the chip's inlet valve, or normally open valves can be used that automatically open fully when power is off, to prevent the chip from overheating due to inlet valve failure and flow interruption.

[0018] Furthermore, asymmetrical microchannel configurations with varying densities are employed in the high heat flux chip region and the low heat flux chip region.

[0019] Furthermore, the main micropump and branch pumps adopt dual-pump redundancy, with the two pumps installed in parallel. Normally, the main pump runs while the standby pump is in hot standby mode. When the main pump fails, the standby pump immediately takes over.

[0020] Furthermore, when a microvalve malfunction is diagnosed based on sensor readings, other microvalves are adjusted to compensate for insufficient cooling of the passage caused by the malfunction, and a maintenance alarm is sent at the same time.

[0021] Furthermore, when the level sensor or humidity sensor detects a coolant leak, the system will safely shut down and disconnect the pump power.

[0022] Furthermore, a pressure relief valve is installed to automatically relieve pressure and protect the pipeline safety when the main micro pump or branch pump becomes uncontrolled and overpressured.

[0023] Furthermore, the cooling zones are independent. When a cooling zone malfunctions, the inlet valve and micro-valve of that cooling zone are closed and the pump is stopped, achieving online isolation and uninterrupted operation.

[0024] Secondly, a method for thermal equalization of control boards based on water-circulating microchannel cooling. Based on the above-mentioned control board thermal equalization system based on water circulation microchannel cooling, thermal equalization is performed on the control board.

[0025] This disclosure includes at least the following beneficial effects: This disclosure establishes a multi-level independent control system at the board, chip, and zone levels by installing a main pump on the main inlet pipe and extending it into multiple independent branch pipes, each equipped with its own independent branch pump. Furthermore, each cooling zone of each chip is configured with completely independent inlet and outlet channels and zoned micro-valvees, creating a multi-level independent control system. This design not only eliminates hydraulic coupling between zones, improving the independence and accuracy of flow regulation, but also allows for rapid adjustment of the flow rate in target areas when load changes or localized hotspots occur, achieving shorter response times and higher thermal balance. Simultaneously, the zoned independent supply and return water structure facilitates online isolation of faulty areas and maintenance replacement. Combined with comprehensive filtration, venting, bypass, check valve, and pressure relief engineering measures, it significantly enhances the system's reliability and maintainability in harsh environments such as new energy power plants.

[0026] Other features and advantages of this disclosure will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the disclosure. The objects and other advantages of this disclosure may be realized and obtained by means of the structures pointed out in the description and the accompanying drawings. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of the thermal equalization system architecture according to an embodiment of this disclosure; Figure 2 This is a schematic diagram of a microchannel according to an embodiment of the present disclosure; Figure 3 This is a schematic diagram of the control principle of an embodiment of this disclosure. Detailed Implementation

[0029] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0030] like Figure 1 As shown, a control board thermal equalization system based on water-circulating microchannel cooling includes: The sensing unit, control unit, and execution unit adopt a closed-loop control architecture, forming a cycle of perception-decision-execution-feedback; The sensing unit includes sensors distributed throughout the board, used to collect data on temperature, coolant flow, and system pressure of each chip and cooling area; The control unit includes an upper-level model predictive control (MPC) and a lower-level PID controller. The upper-level MPC periodically calculates the globally optimal cooling allocation strategy, and the lower-level PID controller tracks the cooling allocation strategy of the upper-level MPC in real time and outputs control commands. The actuator includes an adjustable-speed micro liquid-cooled pump and micro regulating valves for each channel, which regulate the flow of coolant according to control commands.

[0031] The specific implementation details are as follows: Modern high-performance multi-core boards (such as AI accelerator cards and industrial control boards) often integrate multiple high-power chips, leading to a sharp increase in single-board power consumption and heat flux density. The latest generation of AI accelerator chips consumes over 1 kW, and with the development of heterogeneous integration technology, different regions have different temperature requirements. Traditional air cooling or uniform liquid cooling solutions are insufficient to effectively address the uneven heat distribution within the chip, often employing uniformly sized through-channel microchannels or fin structures, lacking specificity for localized high-heat-fluidity hotspots. As chip power consumption increases and cooling temperature differences decrease, heat dissipation capacity has become a major bottleneck limiting system performance and energy efficiency. Therefore, there is an urgent need for an innovative thermal management device to achieve thermal equilibrium in multi-core boards: capable of timely cooling of high-temperature hotspots while avoiding unnecessary overcooling, ultimately improving performance density and energy efficiency while ensuring chip safety.

[0032] This disclosure aims to provide a liquid cooling thermal equilibrium technology solution for multi-core circuit boards based on a multi-level drive and independent zoned water supply and return architecture. By installing a main pump on the main inlet pipe and independent branch pumps on multiple extending inlet branch pipes, and designing independent inlet and outlet channels and zoned micro-valvees for each cooling area of ​​each chip, multi-level active control is achieved at the board level, chip level, and zone level. This solution effectively eliminates hydraulic coupling between zones, improves the independence and accuracy of flow distribution, and significantly enhances the system's rapid response capability to hot spots. In the event of a failure in any zone or branch, hardware isolation and online maintenance can be achieved, ensuring the normal operation of other pathways. Combined with comprehensive filtration, venting, bypass, check valve, pressure relief, and EMI protection designs, it adapts to long-term high-reliability operation in harsh environments such as new energy power plants, thereby ensuring the temperature balance, safety, and efficient operation of multi-core circuit boards under various operating conditions.

[0033] The thermal equilibrium liquid cooling system adopts a closed-loop control architecture, comprising four main parts: a sensing module, a control module, an execution module, and the cooled object, forming a "sensing-decision-execution-feedback" cycle. The sensing module consists of sensors distributed throughout the board, used to collect data such as temperature, coolant flow rate, and system pressure for each chip and cooling area. The control module includes a two-level controller: an upper-level Model Predictive Control (MPC) and a lower-level PID controller. The MPC periodically calculates the globally optimal cooling allocation strategy, while the PID controller tracks the upper-level settings in real time and performs rapid local adjustments. The execution module includes an adjustable-speed micro-liquid pump and micro-regulating valves for each channel, adjusting the coolant flow according to control commands. The cooled object is a customized microchannel cold plate and the multiple chips it cools, with the coolant flow carrying away the heat from the chips. The entire system achieves closed-loop control through the signal and heat flow from sensors to controllers to actuators to the cold plate.

[0034] Temperature sensors monitor the temperature of each chip or region in real time, flow meters measure the coolant flow rate in each branch, and pressure sensors monitor the pressure in the cooling loop. This data is then sent to the controller. The upper-level Model Predictive Control (MPC) controller of the control module solves an optimization problem based on the current temperature of all chips and the estimated power consumption to determine the optimal setpoints for each actuator, such as the speed of the main micropump and the opening of each stage of microvalves. The MPC performs optimization calculations every few seconds to proactively and globally optimize coolant distribution, ensuring that the temperatures of each chip and cooling area are consistent and avoiding exceeding safety thresholds. The lower-level PID controller array operates at a higher frequency (e.g., 100–200 ms). Each PID control loop corresponds to a cooling channel. Based on the deviation between the setpoint given by the upper level and the measured value of that channel, it continuously adjusts the corresponding microvalves or micropump outputs to quickly bring the actual temperature or flow rate close to the target. For example, when the temperature of a certain area is higher than the setpoint, its PID controller immediately increases the valve opening or pump speed in that area to increase the flow rate and suppress the temperature rise; when the temperature is lower than the target, it reduces cooling to avoid overcooling. The micro centrifugal pump in the execution module provides the driving force for circulation, and its speed directly affects the total flow rate; each micro proportional valve regulates the flow rate distributed to each chip and region. The coolant flows through each chip via a microchannel cold plate, carrying away heat and releasing it in an external heat exchanger before flowing back, forming a closed loop. This closed-loop operation, combined with the upper-level model predictive control (MPC) global optimization and the lower-level PID local fast response, achieves active thermal equilibrium of the multi-core board under dynamic loads.

[0035] Microchannel liquid cooling, with its high heat transfer coefficient and compact structure, has become a strong candidate for overcoming traditional heat dissipation bottlenecks. Introducing liquid-cooled microchannels directly into or close to the chip can reduce thermal interface resistance and remove heat from the heat source. However, previous demonstrations of fixed-structure microchannel cooling still exhibited problems such as high pressure drop, large temperature differences, and localized hot spots. The root cause is the lack of dynamic control over chip power distribution. This embodiment proposes a multi-core board thermal equalization device based on microchannel liquid cooling. It constructs a layered, multi-granular liquid cooling network using controllable micropumps and microvalves, supplemented by upper-level model predictive control (MPC) and lower-level PID real-time control, to achieve on-demand cooling distribution from the entire board to the chips and even to individual zones within the chip, minimizing temperature differences and hot spots. The design goals of this device include: equalizing the temperature of each chip / core on the board to near the same level without significantly increasing energy consumption, eliminating localized hot spots, and improving system reliability; responding quickly to dynamic load changes and maintaining temperature stability; and possessing a certain degree of self-adaptation and fault tolerance to ensure safe and reliable long-term operation.

[0036] Liquid Cooling Structure Overview: The system employs a board-level closed-loop liquid cooling system, including a main coolant supply loop and a microchannel network distributing coolant to each chip and chip area. The core component is a custom-designed cold plate, closely attached to all the high-heat chips on the multi-core board. The cold plate's interior is etched with a crisscrossing microchannel network, directly handling heat transfer from the chips. Coolant (e.g., deionized water or antifreeze) circulates through the cold plate's microchannels under the drive of a micropump, carrying heat from the chips to external heat sinks (such as radiators or heat exchangers) for release before returning to the original system, forming a closed loop. The geometry of the cold plate's microchannels fully considers the power consumption distribution of each chip: dense, fine channels are arranged in high-heat-flux chip areas to enhance heat transfer, while wider channels are arranged in low-heat areas to reduce resistance, thus initially balancing the heat dissipation capacity of each area in terms of physical structure. The entire liquid cooling structure is compactly mounted on the board without affecting the component layout and connects to external cooling subsystems (such as coolant reservoirs and fan radiators) via quick-connect interfaces.

[0037] Microchannel and partitioned design: The cold plate area beneath each cooled chip is divided into several microchannel partitions. For example, for high-power multi-core SoC chips, the cold plate can be divided into four partitions according to different functional modules or hot spots within the chip, with each partition covering one area of ​​the chip (e.g., upper left, upper right, lower left, and lower right quadrants). Within each partition, an independent microchannel sub-loop is designed: the inlet is controlled by a micro-valve, and the coolant enters the partition, swirling through a dense network of microchannels to carry away heat before flowing into the partition outlet. The outlets of each partition eventually converge into the chip-level outlet manifold. Through this multi-region microchannel layout within the chip, combined with independently controlled flow regulating valves, fine-grained control of cooling in different areas within the chip can be achieved. The parallel multi-partition flow channel design also helps reduce the overall pressure drop, mimicking the hierarchical network of a biological circulatory system, macroscopically balancing heat transfer capacity and flow resistance.

[0038] Pump and Valve Layout: The liquid cooling cycle consists of an active regulation network composed of a set of micropumps and electrically controlled microvalves. First, a main micropump (or multiple pumps in parallel) is installed at the entire board inlet to provide the basic circulation flow and pressure, delivering coolant from the cooler into the board's cold plates. Then, chip-level electrically controlled valves are installed at the inlet leading to each chip's cooling branch to regulate the flow rate allocated to that chip. Further, microvalves are arranged at the inlets of each zone within each chip's cold plate to finely control the amount of coolant flowing through that local area. This forms a three-stage flow regulation: the main pump controls the total flow (board level), chip valves distribute the flow to each chip (chip level), and microvalves within the chip fine-tune the cooling of local hot spots (zone level). All valves are adjustable proportional microvalves (such as micro solenoid valves or MEMS valves), capable of continuously changing the channel flow area according to the control signal, rather than simple switching, to achieve smooth flow modulation. The rational layout of pumps and valves at each level allows for on-demand distribution of coolant at different scales: when the overall power consumption of a chip increases, the valve opening or pump pressure of that circuit is increased to increase the total flow rate to that chip; conversely, when a hot spot appears in a certain area within the chip, the opening of the corresponding micro-valve is increased to enhance local cooling. Conversely, for low-load areas, valves are appropriately closed to avoid wasting cooling capacity in unnecessarily loaded areas. Through this active network, dynamic spatial balancing of cooling resources within multi-core boards can be achieved.

[0039] like Figure 2 As shown, multiple parallel through-channels or partitioned loops are arranged below each chip area corresponding to the cold plate. For example, for a 4-core SoC chip, the cold plate can be divided into four areas (corresponding to the upper left, upper right, lower left, and lower right quadrants of the chip), with several parallel microchannels designed below each area, closely attached to the heat source of that area. After the coolant enters through the inlet manifold, the fluid is evenly distributed to the inlet of each parallel microchannel through the distribution manifold; a manifold is set on the other side of the cold plate to collect the outlet fluid of each channel. This parallel structure ensures that each chip / area has an independent cooling channel, reducing interference between channels. At the same time, combined with the aforementioned adjustable microvalve, the flow rate of each channel can be distributed as needed to achieve temperature balance in different areas. When designing the flow channel layout, it is necessary to avoid other devices on the board, and the placement and routing of the channels should avoid conflict with electronic components as much as possible. For a single chip area with a large area, the microchannels can be designed in a serpentine curve to cover the entire heat-generating area and ensure a uniform flow field without dead corners. Schematic diagram of the microchannel layout inside the cold plate: A parallel microchannel array is etched within a 100×100mm copper cold plate. Each channel has a cross-section of approximately 0.3mm wide × 0.5mm deep, a rib thickness of approximately 0.3mm, and a center-to-center spacing of approximately 0.6–1.0mm. Dozens of parallel channels can be arranged to closely follow multiple chip heat sources. The channel inlet is uniformly supplied with liquid through a distribution cavity, and the outlet is collected through a confluence cavity. The channel for each chip region is independently controlled to achieve precise regional cooling. Dense microchannels are arranged in high heat flux density areas to enhance heat transfer, while the channel density can be reduced in low heat flux areas to reduce pressure loss.

[0040] The roles of the three control granularities: board-wide level, chip level, and intra-chip partition level. These three control granularities each have their own focus and work together. Board-level (main pump control): Regulates the total flow rate and supply pressure of the main circuit to ensure that the overall cooling capacity meets the current total heat load requirements of the board. When all chips on the board enter a high-power state, the main pump speed is increased to increase the overall flow rate; when the load is low, the pump speed is reduced to save energy. Board-level control ensures sufficient coolant supply and stable head, enabling effective regulation of downstream valves.

[0041] Chip-level (valve control): Based on the power consumption differences between different chips, the main flow is allocated to the cold plates of each chip. For example, if the power consumption of a certain chip is much higher than that of other chips, the opening of the inlet valve of that chip is increased to allocate more flow and reduce its temperature; for low-heat chips, the valve opening is decreased to reduce overcooling. Chip-level control achieves temperature uniformity among different chips and prevents any one chip from overheating and becoming a bottleneck.

[0042] In-chip zone-level (micro-valve control): Addresses uneven hotspot distribution within a single chip. By adjusting the opening of micro-valve in hotspot areas, more coolant flows through the microchannels in those areas, improving heat dissipation and quickly suppressing localized temperature rises. Simultaneously, it reduces flow to other, cooler areas, bringing the temperature across all chip zones closer to uniformity. Zone-level control provides precise local temperature regulation capabilities, resolving hotspot issues within the chip.

[0043] The various levels work together to form a comprehensive thermal management system from macro to micro: the board level provides the overall cooling "pool," the chip level determines the allocation of each "pool," and the zone level rebalances the cooling within each "pool." In terms of hardware, the main pump and each valve are driven by a controller, and closed-loop control is achieved by combining sensor feedback.

[0044] Sensing and Monitoring Module: The device incorporates sensors at key locations to acquire real-time status data for control and safety monitoring. These include: temperature sensors (such as embedded thermocouples or thermistors) installed at the outlet of each chip cold plate to monitor the outlet water temperature, approximately reflecting the chip's average temperature; and miniature temperature sensors installed at the outlets of each zone within the chip cold plate to provide feedback on localized temperature areas. Temperature, pressure, and flow sensors are configured at the main loop inlet and outlet, such as differential pressure sensors to measure the pressure difference between the cold plate inlet and outlet, micro-flow meters to monitor total flow rate, and coolant temperatures at the cold plate inlet and outlet. Additionally, an ambient temperature sensor monitors the air temperature surrounding the circuit board, allowing for appropriate strategy adjustments under high ambient temperatures. All sensor signals converge at the control unit, enabling comprehensive awareness of the heat dissipation status.

[0045] To achieve multi-level thermal equilibrium control, this disclosure adopts a hierarchical control architecture. The upper layer is an optimization control strategy, and the lower layer is real-time feedback control. Each layer has a clear division of labor and operates in a coordinated manner. The overall control system can be divided into an upper-level optimization decision-making layer and a lower-level real-time execution layer. The upper layer is mainly based on the Model Predictive Control (MPC) algorithm, which periodically calculates the optimal pump and valve settings; the lower layer consists of a classic PID controller, which tracks the settings of the upper layer and corrects for disturbances. Through this architecture, the upper layer is responsible for global optimization and look-ahead planning, while the lower layer is responsible for local rapid response. The combination of the two achieves precise and robust control.

[0046] This disclosure adopts a topology of "main pump + multiple branch independent pumps" and "completely independent inlet and outlet water channels + zoned micro-valve" for chip / zone to eliminate hydraulic coupling and crosstalk; hierarchical control of upper-level model predictive control (MPC) + lower-level multi-loop PID, with MPC aiming at uniform temperature and energy consumption penalty, and continuously optimizing flow rate / pump speed, and PID high-speed tracking; asymmetric microchannel density in high / low heat flux zones and online isolation / maintenance.

[0047] Topology decoupling (independent supply and return water + branch pumps) combined with MPC and multi-loop PID achieves faster response and higher temperature uniformity. When using an independent supply and return water and branch pump topology, the upper-level model predictive control MPC and the lower-level PID parameters are linked to the target (ΔT_max, energy consumption).

[0048] like Figure 3 As shown, in the main control loop, the controller first collects all sensor data, and then runs the upper-level model predictive control (MPC) optimization and the lower-level PID adjustment at different cycles. The specific steps are as follows: In each basic cycle (e.g., 100 ms), the controller reads sensor data such as temperature, flow rate, and pressure, and determines whether the MPC update time step has been reached. If so, it calls the MPC algorithm with the current state as the initial value, predicts the system's heat load changes within the next few seconds, and solves for the optimization targets of each cooling channel (e.g., valve flow settings or zone target temperatures). Subsequently, for each cooling channel, the controller calculates the error between the current feedback value and the target value, calculates the output through the PID control algorithm, and adjusts the corresponding micro-valve opening or pump speed in real time. The entire process continuously loops, with the MPC continuously optimizing new setpoints at fixed intervals, and the PID continuously providing high-speed feedback control between MPC cycles, thus achieving stable control with both forward optimization and real-time correction. The controller repeatedly executes the perception-decision-execution loop. Each cycle reads data from each sensor. If the MPC cycle is reached, model predictive optimization is performed to calculate a new optimal setting. Subsequently, PID feedback control is executed on each channel to correct the actual measured value to approach the set value. Finally, it waits for the next control cycle to begin the next round of looping. This multi-level control achieves a combination of upper-level optimization settings and lower-level rapid execution.

[0049] Control Flow Overview: The entire control process can be summarized as a closed-loop perception-decision-execution cycle. Data Acquisition: Temperature, pressure, and flow sensors periodically collect data on the current thermal status of the board, for example, every 0.1–1 seconds. The controller acquires real-time data on the temperature of all chips and zones, as well as the pressure and flow rate of the main loop.

[0050] State estimation and prediction: The controller updates the system thermodynamic model state based on the collected data, including the power consumption estimates of each chip (which can be calculated from the on-board power meter or CPU load) and the current state of the cooling system. Combined with the prediction model, the controller predicts and evaluates the thermal load changes in the next control time domain (e.g., tens of seconds).

[0051] Upper-level decision-making (MPC optimization): In each upper-level control cycle (e.g., every 1–5 seconds), the MPC optimization problem is solved. Starting from the current state, the temperature evolution over several future steps is predicted, and the optimized pump speed and valve opening settings at each stage are calculated while satisfying constraints. After obtaining the new optimal control sequence, the control objective for this cycle (e.g., valve opening or flow setpoint) is issued.

[0052] Lower-level execution (PID feedback): The lower-level control loop (operating at a higher frequency than the upper level, such as 10–100 Hz) runs continuously. Based on the setpoint sent from the upper level (such as the target opening or temperature of a valve for a certain chip), each PID controller performs high-speed adjustment of the corresponding actuator. They compare sensor feedback with the setpoint and output control signals to fine-tune the pump or valve, achieving precise tracking. During this process, if a disturbance occurs (such as a sudden surge in power consumption of a chip causing a temperature deviation), the PID controller will correct it before the next optimization by the upper level, keeping the error within the smallest possible range.

[0053] Cycle and Adjustment: The aforementioned perception-optimization-execution process continues in a loop. After each MPC cycle, the system enters the next perception and prediction phase. As time progresses, the controller repeatedly calculates and adjusts control parameters based on the latest state to continuously maintain thermal equilibrium.

[0054] This multi-layered closed-loop architecture combines forward-looking optimization with real-time correction: the upper-layer Model Predictive Control (MPC) proactively optimizes the allocation of cooling resources to achieve the optimal overall temperature distribution, reducing energy consumption and hot spots; the lower-layer PID ensures that the actual execution achieves the target and quickly suppresses disturbances within short cycles. Through this two-layer collaboration, the system can guarantee steady-state performance while also considering dynamic response.

[0055] Control objectives: The control objectives of the thermal equalization device can be summarized as follows: Temperature balance and safety: Keep the temperature of all chips and internal hot spots below safe limits and as close to each other as possible to reduce temperature gradients and thermal stress. Specifically, this can be defined as minimizing the difference between the highest and lowest temperatures, or directly minimizing the sum of the squares of the temperature deviations of each region from the average.

[0056] Energy efficiency optimization: Reduce cooling system power consumption and vibration noise while meeting temperature requirements. For example, by optimizing the combination of pump speed and valve opening, the pump power or the total coolant flow rate can be minimized without causing overheating.

[0057] Dynamic performance: The control system must respond quickly to temperature fluctuations caused by load changes (brief overshoot, rapid stabilization) to prevent the temperature from exceeding the safe range. The goal is to minimize temperature overshoot and settling time; for example, when chip power consumption increases dramatically, the temperature peak should not exceed the steady-state temperature by more than a few degrees Celsius and should recover to stability within seconds.

[0058] Robustness and stability: The control system is robust to model uncertainties, noise, and environmental changes, and does not oscillate or become unstable; even deviations of a single sensor or actuator will not cause temperature runaway.

[0059] There may be trade-offs among the above objectives (such as temperature balance and energy consumption), so higher-level optimization will take into account multiple objectives in a weighted or constrained manner.

[0060] Upper-level optimization control algorithm (based on MPC): The upper-level control employs the Model Predictive Control (MPC) algorithm to achieve optimal scheduling of the liquid cooling system. This MPC controller, based on the system's dynamic model, solves a constrained optimization problem at each decision moment to obtain the optimal control strategy for a future period (predictive time domain), and applies the first control action. Key implementation points are as follows: Control Time Domain and Rolling Optimization: A control time domain length N (e.g., N sampling periods, corresponding to a prediction of 5–10 seconds into the future) and a small control step size (e.g., 1 second) are selected. In each MPC cycle, the predictive model starts from the current state, simulates the system behavior for the next N steps, and optimizes the pump speed and valve opening sequence within these N steps. Only the control command for the first step is executed, and then the optimization is repeated based on the latest feedback rolling window. This rolling optimization ensures that even if the model prediction is biased, the decision can still be corrected through continuous feedback adjustments.

[0061] System Prediction Model: A dynamic model of liquid cooling-chip thermal coupling is established to characterize the relationship between temperature and flow rate and power consumption. The model can employ a lumped-parameter thermal-fluid network: for example, each chip or partition can be simplified as a lumped heat capacity node, with thermal resistance / heat transfer coefficient representing the coupling with the coolant, and the microchannel flow rate correlated with convective heat transfer. Furthermore, an energy equation for the coolant within the channel can be included to reflect the effect of flow rate on temperature difference. For each chip partition i, a difference equation can be used:

[0062] Among them, T i Indicates zone temperature, T f,i P represents the coolant temperature of that zone. i This indicates the power consumption (heat source) of this area of ​​the chip, h i A i Represents the equivalent convective heat transfer parameters. T represents the mass flow rate through this area. in,i Indicates the inlet coolant temperature. i represents the partition (or region within the chip) index, i=1,…,N.

[0063] t represents time (s); h i A represents the convective heat transfer coefficient at the solid-liquid interface; i This represents the equivalent solid-liquid heat transfer area of ​​the partition; C i M represents the equivalent heat capacity of the solid side of the partition; i This indicates that the coolant quality within the control zone is controlled; c p This indicates the specific heat capacity of the coolant at constant pressure.

[0064] By combining the relationships between flow rates in each zone and valve openings and pump pressures (obtained through fluid dynamics equations or experimental calibration), a state-space model of the entire system is formed. Since microfluidic systems are relatively complex, in practice, the model can be linearized or simplified, or an identified linear time-invariant model can be used to reduce computational load.

[0065] Optimization Variables and Output: MPC needs to determine the actuator settings for each control step in the prediction time domain. Key optimization variables include: the main micropump's rotational speed or head setting. pump (k) (Affecting total flow), the opening degree u of each chip inlet valve chip,i (k), and the microvalve opening u within each chip partition zone,i,j (k) (i represents the chip, j represents the j-th region within the chip). Due to the high decision-making dimensionality, hierarchical optimization or sparse control can be adopted as needed: for example, adjusting the chip valve opening every second, adjusting the partition valve every 0.2 seconds, etc. The MPC output includes all the above-mentioned optimal values ​​set at the current moment, and these values ​​will be sent to the lower-level control as a reference.

[0066] Objective Function: Design an objective function that characterizes the weighted sum of temperature deviation and energy consumption. The temperature-related objective can be set as the cumulative quadratic deviation of each chip / partition temperature relative to the target temperature. For example, let T... target To achieve the desired equilibrium temperature (which can be slightly below the safety threshold, such as 75°C), the cost of temperature deviation is... Cumulative. Furthermore, to achieve uniform temperature, terms addressing temperature differences can be added, such as a penalty for the difference between the maximum and minimum temperatures. Energy-related costs arise from the control opening of pumps and valves: pump power is approximately proportional to flow rate / head, and α can be added to the objective function. u pump (k) 2 The term (α is the weight) indicates that while valve energy consumption is relatively low, the valve opening affects hydraulic resistance and system pressure drop; a slight penalty can be added to prevent the valve from remaining fully open for extended periods. In summary, the objective function of MPC can be formalized as:

[0067] Where, ΔT max (k) represents the difference between the highest and lowest temperatures in the system at time k, w These are the weights for each item. By adjusting the weights, a trade-off can be achieved between balancing temperature and reducing power consumption.

[0068] i represents the chip index (or the controlled thermal unit index); j represents the index of the chip's internal partition (quadrant / functional block); k represents the discrete time step (the step number in the prediction time domain), and the sampling period is Δt, k=0,…,N; N represents the prediction time domain length (number of steps), such as the number of steps corresponding to 5–10 s; the control time domain can be the same or shorter; T i,j (k) represents the temperature (°C or K) of partition j of chip ii at step k; T target This indicates the equilibrium target temperature (°C or K), which is usually slightly below the safety threshold, such as 70–80°C. w T This indicates the weight of temperature deviation; a larger value emphasizes that the temperature in each zone is close to T. target ; ΔT max (k) represents the difference (°C) between the highest and lowest temperatures in the system at step k. w ΔT This indicates the weight of temperature uniformity; a larger value reduces the temperature difference between the chip / section. u pump(k) represents the main pump control quantity at step k (dimensionless, usually a speed / head normalized to 0–1, or a linear scaling of the actual speed rpm). w P This indicates the main pump energy consumption / intensity penalty weight, used to suppress excessive pump power or noise. u i,j (k): The execution quantity of the partition j entry of chip i at step k (dimensionless, often the partition micro-valve opening 0–1, or can be defined as normalized partition flow). w u This indicates the penalty weight for the partition execution amount, used to suppress long-term large valve opening or excessive adjustment; Constraints such as "temperature / actuator / fluid / rate" are fixed, and over-temperature forced de-load / full-load cooling is implemented.

[0069] Constraints: Optimization must satisfy physical and safety constraints: Temperature constraint: The temperature of all chips / areas must not exceed the safe upper limit (e.g., 85°C). This is treated as a hard constraint T in the prediction model. i,j (k)≤T max,safe To prevent the algorithm from providing an unsafe solution.

[0070] Actuator constraints: Pump speed and valve opening have upper and lower limits, such as 0≤u pump ≤100% corresponds to minimum and maximum speed), 0≤u valve ≤100% (corresponding to a fully closed to fully open valve). Furthermore, the rate of change of valve opening can also be limited to avoid mechanical overload (e.g., valve change not exceeding 10% within a single cycle).

[0071] Fluid constraints: Flow rate and pressure must not exceed the pipeline's capacity, such as limiting the maximum flow rate to avoid exceeding pump capacity or pipeline flow velocity limits, and limiting pressure differentials to avoid leakage risks.

[0072] Other coupling constraints: Valve opening and pump pressure jointly determine the flow rate of each branch, and according to the fluid equations, mass conservation must be satisfied. For example, total flow rate = sum of flow rates of each chip branch; if a pressure-driven model is used, the pressure drop balance relationship must also be satisfied. These physical relationships can be implicitly included in the prediction model.

[0073] The presence of constraints makes MPC a constrained optimization problem (typically quadratic programming (QP) or nonlinear programming (NLP)). Using an efficient solver, a solution can be obtained within the control cycle.

[0074] MPC Solving and Implementation: Considering the significant thermal inertia of the board, MPC calculations can be performed every few seconds, providing ample time to solve the optimization problem. Embedded solvers (such as QP OASES) can be used to solve the problem in real time on the controller. For larger-scale problems, optimization can be simplified to two levels: first optimize the allocation of board-level pumps and chip valves, then refine the micro-valve configuration within the chip; or distributed MPC can be used to solve the local flow optimization of each chip in parallel and then coordinate the processes. These are all feasible implementation schemes. Finally, the optimal settings given by the upper-level model predictive control MPC are sent to the lower-level control at the current moment and will be recalculated in the next cycle based on new measurements, thus achieving a "plan-correction" closed-loop operation.

[0075] Through the aforementioned MPC optimization, the upper-level controller can proactively provide the optimal cooling allocation scheme for the system. For example, when it predicts that a chip's load is about to increase, the MPC will increase its valve opening and pump supply in advance to prevent overheating later; when the load decreases, it will correspondingly reduce the flow rate to save energy. Compared to fixed or empirical rule control, this model-based optimization can significantly improve temperature uniformity and energy efficiency. In multi-core 3D chips using dynamic liquid cooling allocation, the frequency of hotspot occurrence can be reduced by approximately 95% compared to without optimization, fully demonstrating the potential of model predictive optimization in temperature uniformity and hotspot prevention.

[0076] Lower-level real-time feedback control PID: The lower-level control consists of multiple parallel PID control loops that directly drive the pump and valve actuators, achieving tracking of the upper-level settings and disturbance suppression. Compared to the upper-level optimization decisions made every few seconds, the lower-level PIDs operate at a higher frequency (e.g., 10Hz or faster), ensuring system stability even between optimization cycles. The feedback control design for the pump and valve is described below.

[0077] Main pump PID control unit: The main micropump is responsible for maintaining the circulation flow and pressure of the entire liquid cooling circuit. The main liquid supply parameters can be stabilized by controlling the pump's motor speed or drive voltage using PID control. Specifically, there are two control schemes: Constant pressure control: The main pump outlet pressure (or the pressure difference between the cold plate inlet and outlet) is used as feedback, and the controlled target is a constant setpoint. The PID controller adjusts the pump speed based on the measured pressure difference to maintain it at the level required by the upper layer. This helps ensure that the flow regulation of each branch has a stable head base, preventing large pressure fluctuations due to load changes. The setpoint can be predicted and controlled by the upper-level model to adjust the MPC output, such as increasing the target pressure difference under heavy load and decreasing it under light load.

[0078] Constant flow control: The total circulating flow rate is used as the control variable, and the pump speed is adjusted via PID control to maintain the total flow rate set by the upper layer. For example, if the upper layer requires a current total flow rate of 10 L / min, the PID controller will drive the pump to reach and maintain that flow rate. This method directly controls the overall cooling capacity and is suitable for situations where a precise pressure sensor is not installed at the pump outlet.

[0079] Regardless of whether it's constant pressure or constant flow, the PID parameters must be adjusted according to system inertia. The cooling circuit has a certain lag (it takes time for the pump speed to stabilize and the flow rate to return to normal), therefore the integral time needs to be long enough to avoid excessive oscillation; simultaneously, to obtain a fast response, an appropriate proportional gain can be assigned. Typically, a smaller proportional gain K can be selected. p To prevent pressure / flow overshoot, integral action eliminates steady-state error, while derivative terms can be introduced to suppress rapid disturbances. Through adjustment, the pump control can achieve rapid steady-state operation without overshooting during load changes, thus meeting overall flow requirements.

[0080] Chip-level valve PID control unit: Each chip inlet valve is configured with a PID controller to track the flow rate or outlet temperature set by the upper layer for that chip. There are two common implementation modes: Flow tracking mode: The upper-level model predictive control (MPC) determines the optimal flow allocated to a particular chip. PID control adjusts the valve opening to control the actual flow rate Q. chip,i near The flow rate can be measured by a miniature flow meter installed on this branch; if no direct measurement is available, it can be approximately estimated from the main flow rate proportional to the valve opening. This PID control loop quickly compensates for flow deviations caused by pressure fluctuations or nonlinear valve characteristics, ensuring that each chip receives the required cooling.

[0081] Temperature tracking mode: The upper layer can also provide the target outlet temperature for each chip. (Or target chip surface temperature). PID is based on the actual outlet temperature T of the chip. chip,i For feedback, the valve opening is adjusted based on the target temperature. When the chip temperature is higher than the target, the valve opens wider to increase coolant flow; when the temperature is lower, the valve closes slightly until it is maintained near the target temperature. In this mode, it is equivalent to establishing local constant temperature control for each chip, which can directly ensure that the chips are evenly heated to the desired temperature. However, it should be noted that the target temperature settings for multiple chips are generally the same or close to achieve temperature uniformity.

[0082] In practical implementation, the two modes can be combined: the flow rate is set through outer-loop temperature control, and then the valve opening is adjusted by inner-loop PID control to achieve that flow rate. For example, when the chip temperature exceeds the upper-level allowable value, the outer loop increases the target flow rate, and the inner-loop valve is activated. This dual-loop control improves robustness. The key to adjusting the parameters of the chip-level valve PID is that the chip has a large thermal inertia (slow heating and cooling), so the PID can use a large proportional gain for a strong response, while the integral term is small to prevent steady-state error. The adjustment period can be on the order of 100 ms, achieving temperature stabilization within a few seconds.

[0083] In-chip zoned microvalve PID control unit: For each microvalve within the chip, the control objective is to maintain a uniform temperature in its corresponding zone. An effective strategy is differential temperature control: selecting the highest temperature T among the various zones of the chip. max Or the average temperature of the chip T avg For reference, each partition i controls its temperature T. i Try to get as close to the reference as possible. For example, the error of a PID controller is defined as e. i =(T i T ref (If T) i (For temperatures above the reference, a positive error is applied). The control logic is as follows: when the temperature of a certain zone is higher than the reference, the micro-valve in that zone is opened larger (increasing flow for cooling); when it is lower than the reference, the valve is closed smaller (slightly reducing flow to conserve energy). Through this mechanism, the temperature of each zone gradually converges to near the reference, achieving temperature leveling across different areas within the chip. Reference temperature T ref It can be provided by the upper layer or calculated in real time by the chip (such as T). ref =T avg or T max (Slowly changing values).

[0084] The dynamic response of the microvalve PID controller needs to be faster than that of the overall chip to extinguish localized hot spots. For example, if a region experiences a temperature rise due to a sudden load spike, the microvalve PID controller should adjust the flow rate within one second to bring the temperature back down. Excessively large integral values ​​should be avoided to prevent oscillations caused by competition between different regions. In practice, pure proportional or PI control can be used, with the gain fine-tuned experimentally until the temperature curve shows no significant overshoot and stabilizes rapidly under localized excitation.

[0085] Controller Implementation and Coordination: Multiple PID controllers at the lower level operate in parallel under the same controller. Coordination between them must be ensured: for example, changes in valve opening can affect the main pump pressure, therefore the main pump PID and valve PID should avoid conflict. The solution is to separate them during the design phase (the pump PID can be appropriately slower than the valve PID) and to consider valve-pump interaction in the upper-level optimization. The lower-level PID mainly handles high-frequency, small disturbances, while the upper-level model predictive control (MPC) optimizes larger disturbances, resulting in good overall coordination. Through these real-time feedback controls at the lower level, this disclosure can maintain stable temperature under rapidly fluctuating loads. If a chip suddenly experiences a power increase leading to a temperature rise, before the upper-level system can react in the next cycle, the micro-valve PID immediately increases cooling in that area to suppress the temperature rise, thus preventing the temperature from exceeding the limit. This achieves fast and stable temperature control.

[0086] The control scheme disclosed herein has good scalability, and the control granularity can be adjusted according to needs, from the whole board level to the chip level, then to the chip partition level, and even more refined scales in the future.

[0087] From Board-Level to Chip-Level: In basic implementations, if the hardware only has board-level control (i.e., only the main pump regulates the overall flow, without individual chip valves), the system degenerates into single-area control, controlling the average temperature of all chips by adjusting the total flow. This is effective for uniform load scenarios but struggles to eliminate temperature differences between chips. With chip-level valves, each chip becomes an independent controlled unit, and the control model expands from a single temperature node to multiple chip nodes, each with its own temperature and flow state. The upper-level Model Predictive Control (MPC) adds decision variables accordingly, considering the differences in temperature and power consumption among chips for optimization, while the lower level adds corresponding PID loops. This expands from a single system to a multi-stage system: total board-level pump volume and chip-level valve allocation ratios. The control algorithm maintains its structure during the expansion process, only increasing the dimensions of the state and control vectors. Thanks to the model-based design of the MPC, it only requires expanding the model state from an overall temperature to T={T chip1 ,T chip2 By expanding the optimization variables from only pump speed to include the valve opening degree of each chip, the control expansion from the whole board to multiple chips can be naturally realized.

[0088] From Chip-Level to Intra-Chip Partition Level: Further, to address the uneven hotspots within a single chip, multi-partitioning and micro-valve control within the chip are introduced. Instead of treating the entire chip as a single node, each chip is now subdivided into multiple regional nodes. The control system needs to extend the model to describe the temperature of each region within the chip and their relationship to regional flow rates. In the model, this means that a chip i will have multiple temperature states T. i,1 ,T i,2 ,...T i,mFor the corresponding m partitions, thermal coupling may exist between regions (thermal diffusion between adjacent regions), and coupling terms can be added to the model. Upper-level model predictive control MPC optimization requires simultaneously determining the flow allocation for each region's valve. This increases the problem size, but can be simplified through hierarchical processing (e.g., treating each chip as a sub-MPC, with the main MPC allocating targets to the sub-MPCs). In this hierarchical MPC architecture, the top level determines the allocation between chips, the secondary MPCs optimize the allocation within each region of the chip under a fixed total flow rate, and then distribute the results to the micro-valve PID controller. Alternatively, a unified centralized MPC can be used to directly optimize the valve openings of all regions, but it must be ensured that the computation is completed within an acceptable timeframe.

[0089] Hardware Structure Expansion: From a hardware perspective, expanding the control granularity requires adding corresponding actuators and sensors. When introducing multi-zone microchannels within a chip, multiple independent flow path loops and valve interfaces must be added during cold plate manufacturing, and temperature sensors must be placed in each area. This increases hardware complexity, but microfabrication technology has enabled the etching of complex microchannel networks and multi-channel distribution structures. Some advanced designs have proposed hierarchical flow path networks similar to biological networks, with a trunk-branch-capillary structure delivering fluid to various local areas. This disclosure achieves a similar effect through active control, but adjusts the flow path in real time using sensors and valves instead of a fixed geometry. As the internal regions of the chip become finer, it is also possible to consider using MEMS microvalve arrays directly integrated into the chip cooling layer, with one independent microchannel unit per several hundred square micrometers, controlled by an on-chip microcontroller in array configuration. This would achieve "pixel-level cooling within the chip," although it is still in the research stage, this architecture can be smoothly expanded to such microscales.

[0090] With finer control granularity, temperature uniformity and peak reduction will be further improved. Chip-level control has significantly reduced inter-chip non-uniformity, while intra-chip zone control can eliminate temperature differences between cores within the chip, allowing all cores on each chip to operate at nearly the same temperature, improving multi-core parallel efficiency and reliability. On the other hand, fine control also improves the utilization of cooling resources: coolant is precisely directed to the areas that need it most, avoiding overcooling of the entire board. Some studies have used adaptive microfluidics to reduce hotspot temperature rise by tens of degrees Celsius and reduce the temperature difference between different areas of the chip to one-third of the original. It is expected that through active control and fine distribution, comparable or even better temperature uniformity can be achieved, while also having a stronger ability to respond to dynamic loads. Therefore, the expansion of control from the entire board to multiple chip zones paves the way for achieving true "on-demand cooling."

[0091] A hierarchical control architecture is adopted, including upper-level Model Predictive Control (MPC) optimization and lower-level PID feedback control. The upper-level MPC predicts future temperature trends based on the dynamic changes in temperature and power consumption in different areas of the multi-core board, optimizing the flow distribution in each cooling channel to ensure temperature uniformity without exceeding limits. Compared to a fixed, uniform cooling distribution method, intelligently optimized non-uniform flow distribution can further reduce chip temperature and improve temperature uniformity. The lower-level PID control, on the other hand, rapidly adjusts the micro-valve opening or micro-pump speed for each microchannel loop, eliminating deviations between actual temperature or flow rate and target values ​​to achieve stable control.

[0092] The control flow is as follows: First, temperature sensors on the board collect the temperature of each core area, flow meters collect the coolant flow rate of each branch, and pressure sensors monitor the inlet / outlet pressure. The controller reads all sensor data every cycle (e.g., 1 second) and performs preprocessing (filtering, unit conversion). Then, the upper-level model predictive control (MPC) continuously optimizes the cooling distribution strategy for the next few steps based on the current temperature distribution, power consumption prediction, and system model, calculating the target flow rate of each cooling channel or the target temperature of each area. These targets serve as the setpoints for the lower-level control. Next, the lower-level PID control runs at a higher frequency (e.g., 100~200 ms cycle): for each cooling channel, the PID controller reads the current temperature (or flow rate) of that area, compares it with the setpoint given by the upper level, calculates the error, and outputs control commands via the PID algorithm to adjust the corresponding micro-valve opening or micro-pump speed. Each PID loop runs continuously at high speed to cope with load transients and achieve rapid and stable temperature control, while the upper-level model predictive control (MPC) periodically updates the setpoints to optimize global thermal balance. The entire control is implemented on a real-time embedded controller. The upper-level Model Predictive Control (MPC) is called periodically as a supervisory controller, while the lower-level PID controller runs continuously as an execution controller. The two are connected through a shared setpoint interface.

[0093] The upper-level Model Predictive Control (MPC) takes inputs including current temperatures in each zone and possible power consumption predictions, and outputs flow rate or temperature setpoints for each cooling path. The lower-level PID takes inputs from corresponding sensor measurements and outputs direct control of the micro-valve opening (0~100%) or micro-pump speed. Through this "MPC setpoint - local PID execution" structure, the upper layer optimizes globally, while the lower layer responds quickly, achieving active thermal balance control for multi-core heat dissipation.

[0094] Careful selection of hardware components is crucial to meeting performance requirements while also considering engineering feasibility. The main hardware components and recommended parameters are as follows: Miniature liquid pumps: Select small-sized, high-head, adjustable-speed DC miniature centrifugal pumps or gear pumps as the main circulation pump. In terms of parameters, they should be able to provide the required maximum flow rate and pressure. For example, for a system with a total heat dissipation power of several hundred watts, a flow rate of approximately several liters per minute is required (calculated based on the heat load; for example, 1000W of heat consumption at a 10°C temperature difference requires approximately 4.3 L / min), and a head of approximately tens of kPa is needed to overcome the resistance of the microchannel. The pump's peak head should be no less than 100 kPa, with an optimal operating point around 50 kPa to allow for margin. The pump should support PWM or voltage speed regulation with a wide speed range (e.g., 10%–100% of rated speed) to adapt to different loads. Noise and vibration should also be considered; choose a low-noise design, such as a brushless DC pump. When the working liquid is water or ethylene glycol solution, the pump's flow-through materials must be corrosion-resistant and leak-proof. A typical device is a certain model of micro centrifugal pump with a rated flow rate of 5 L / min @ 0.5 bar, powered by 12–24 V. The speed can be adjusted by the PWM signal output by the controller to achieve linear and controllable flow output.

[0095] Electro-proportional valves: Valves used in chip branches and zones should be miniature valves with fast response and linearly adjustable flow area. Miniature electromagnetic proportional valves or piezoelectric microvalves can be selected. In terms of parameters, the valve diameter must match the microchannel diameter (typically from hundreds of micrometers to 1-2 millimeters) to accurately control small flow rates. Valve linearity and resolution are crucial, requiring stable and repeatable flow-opening characteristics within the 0-100% opening range, with hysteresis less than a few percentage points. The valve response time should ideally be within tens of milliseconds to meet the rapid adjustment requirements of PID control. Pressure resistance should reach 1–2 bar to prevent leakage under high pressure. Fluid contact materials should be compatible with coolants (such as brass, stainless steel, or water-resistant plastics). A common model is a miniature proportional valve from a certain manufacturer, with a 0.5 mm diameter, 24 V coil drive, capable of switching from fully closed to fully open within 50 ms, and a rated flow rate of 0.1 L / min @ 0.1 MPa differential pressure. For in-chip microvalves, MEMS silicon microvalve arrays can also be considered, which are even smaller (millimeter-level or even chip-integrated), but have limited flow capacity and are suitable for single-core localized cooling. In this disclosure, most scenarios can use commercial microvalve arrays mounted on the cold plate inlet distribution manifold, with each valve corresponding to a zoned flow channel.

[0096] Cold plate and microchannel structure: The cold plate material should ideally be a high thermal conductivity metal (such as copper or aluminum), and the internal microchannels are fabricated through precision machining (micromilling, etching, 3D printing, etc.). Typical microchannel widths are 0.2–1.0 mm, and heights are 0.5–2.0 mm. Channel shapes can be parallel straight channels, pin-fin arrays, or biomimetic branching networks. The microchannel density and layout are designed according to the chip's heat dissipation; high-heat areas have denser channels to enhance heat transfer, while low-heat areas have sparser channels to reduce resistance. The cold plate's shape must fit the chip's position on the board, and it can be designed as a modular cold plate: each chip corresponds to a small cold plate with independent inlet / outlet ports and microchannels, connected to the motherboard via micropipes. This facilitates customized thermal design for different chips and reduces piping complexity. Threaded holes or quick connectors need to be machined on the cold plate for mounting microvalves and sensors. The cold plate thickness is limited by the chip package height, generally 5–10 mm, and should be as thin as possible overall to reduce thermal resistance. A high thermal conductivity interface material (such as thermal grease or phase change material) is used to fill the space between the cold plate and the chip to ensure good thermal contact.

[0097] Temperature Sensors: Small, high-precision temperature sensors are used to monitor the temperature at key points. Options include K-type thermocouples, platinum resistance thermometers (PT100 / PT1000), or semiconductor temperature sensing ICs. Thermocouples offer fast response but require cold junction compensation; platinum resistance thermometers offer high accuracy (±0.1°C) but are slightly more expensive; semiconductor sensors are easy to interface with digital systems. Considering the need for multi-point distribution, thermistors (NTCs) are also an economical choice. Small-size surface-mount NTCs can be directly attached to the cold plate near the chip or embedded in the coolant channel wall to achieve approximate chip temperature measurement. In terms of parameters, the sensors must operate accurately within the 0–100°C range, with an accuracy within ±1°C and a response time of less than 1 second. Multiple sensors are connected to the controller via a multi-channel ADC. Pay attention to the insulation and waterproofing of the sensors, especially those in direct contact with liquids, which require sealed encapsulation.

[0098] Flow and pressure sensors: A miniature flow meter is installed in the main circulation loop to monitor the total flow. A turbine flow meter (high accuracy, requires a certain straight pipe section) or a MEMS thermal flow meter (small size, can be directly inserted into the pipe) can be used. The measurement range is selected based on the pump's maximum flow rate (e.g., 0–5 L / min), requiring a measurement accuracy of ±5%. If monitoring of the chip branch flow is required, a small differential pressure sensor can be installed in each branch. The flow rate is calculated by measuring the pressure difference before and after the valve (combined with the valve flow characteristic curve), which is simpler than installing a flow meter in each branch. For pressure sensors, one differential pressure sensor is connected to the inlet and outlet of the cold plate to measure the total pressure drop, used to monitor blockage or adjust pump pressure; additionally, an absolute pressure sensor is configured at the pump outlet or before each valve to monitor absolute pressure and prevent overpressure. The sensor range is selected as 0–100 kPa differential pressure, 0–300 kPa absolute pressure, with an accuracy of 1–2%. These sensors typically output analog voltage or a 4–20mA signal, which is acquired by the controller.

[0099] Controller and Communication: The entire system is coordinated by an embedded controller. An industrial control board or a microcontroller + DSP combination can be used: for example, an STM32 series microcontroller handles sensor acquisition and PID calculations, while an external small industrial computer or ARM processor runs the MPC algorithm (e.g., using a Linux real-time system). Alternatively, a powerful single-board computer (e.g., a DSP with floating-point capabilities or an ARM Cortex-A series) can handle both optimization and control. Crucially, the controller must have multi-channel high-speed ADCs (>16 channels, used for acquiring temperature, pressure, etc.), multiple DAC or PWM outputs (to drive pumps and valves; valves often use analog signals or PWM to control coil current), and communication interfaces (e.g., CAN, SPI for expanding sensors / actuators). High real-time performance is required; the lower-level PID control loop needs millisecond-level loops. Therefore, the controller should run a real-time operating system or a bare-metal loop to ensure minimal control cycle jitter. MPC calculations are performed every few seconds, allowing for sub-real-time task execution. The controller software needs to implement sensor data filtering, fault detection, control algorithms, and a human-machine interface. Given the complex environment of the circuit board, the controller hardware should be equipped with EMC protection and isolation, such as adding isolation amplifiers to the analog front end and isolation transceivers to the digital communication, to avoid noise interference.

[0100] Auxiliary components include coolant storage / exchange assemblies (small water tanks, onboard micro heat exchangers, or cooling fans), piping and fittings (high-temperature resistant flexible hoses, quick-connect fittings for easy maintenance), filters, and degassing devices. In particular, microfilters should be installed at the pump inlet or before each branch line to filter particles and prevent clogging of the microchannels; exhaust ports should also be designed to remove air bubbles and avoid air resistance affecting heat dissipation performance. All pipe fittings and valves must ensure reliability under long-term humidity and high temperatures, and vulnerable parts such as filter elements should be regularly maintained and replaced. The entire hardware system needs to be integrated and packaged within the limited space around the circuit board; therefore, modular and miniaturized design is crucial.

[0101] Data structures and interface formats: Sensor data acquisition: The system deploys multiple sensors to monitor parameters such as temperature, flow rate, and pressure. A typical configuration is as follows: Temperature Sensors: Temperature sensors (such as thermocouples, RTD platinum resistance thermometers, or precision thermistors) are installed at each controlled core area and coolant inlet / outlet. If analog sensors are used, their outputs are acquired via AD conversion; if digital temperature sensors (such as temperature chips with I²C interfaces) are used, the data is read directly via the bus. The sampling period depends on the dynamic requirements; generally, since the board temperature changes slowly, a sampling frequency of 1–10 Hz is sufficient for control needs. If a microcontroller with a built-in multi-channel ADC is used, each temperature sensor can be connected to a different ADC channel (e.g., 12-bit resolution, channel mapping such as ADC_CH0: cold plate inlet temperature, ADC_CH1~CH4: temperatures of each core area,...). After each sampling, the raw value is converted to engineering units (°C) and stored in the temperature data structure.

[0102] When data packets are sent via the internal bus or communication interface, they can be packaged into a sequence of [timestamp|sensor ID|temperature value] or arranged in a fixed order for easy parsing.

[0103] Flow meters: A miniature flow sensor should be installed in each cooling branch and at the main inlet to monitor the coolant flow rate / velocity in real time. Typical micro-flow meters can be MEMS thermal flow meters or turbine flow meters, with output formats including pulse frequency (proportional to flow rate) or analog voltage signals (0-5V). For frequency signals, a microcontroller timer can be used to capture the pulses and calculate the flow rate; for analog outputs, they can be sampled using an ADC channel. It is recommended that the flow data sampling period be similar to or slightly higher than the temperature period (e.g., 10 Hz) to ensure timely feedback of flow rate changes.

[0104] When encapsulating data, register mapping using protocols such as Modbus can be employed. For example, register 0x1000 can be used to store the flow rate values ​​of each channel in consecutive addresses. Sampling accuracy: Micro-flow sensors typically provide ±(1-2)% reading accuracy, and the data should retain sufficient bit width (such as fixed-point or floating-point values ​​in mL / min).

[0105] Pressure sensors: Pressure sensors are installed at the coolant inlet, outlet, and critical points to monitor pressure drop and ensure safety. Common pressure transmitters output 4–20 mA current or 0.5–4.5 V voltage, corresponding to a certain range (e.g., 0–500 kPa). These signals can be acquired by a high-speed ADC, and the sampling frequency can be lower (e.g., 1 Hz) for condition monitoring and protection.

[0106] The controller can be set with upper and lower pressure thresholds, triggering an alarm or safety shutdown when these limits are exceeded. Pressure data can also be integrated into a Modbus register mapping or broadcast to a host computer for monitoring via the CAN bus.

[0107] Microvalve and micropump control commands: The microchannel cooling system regulates flow rate through micro-electronic valves and micropumps. To ensure controllability and integration, it is recommended to select devices with digital interfaces or precise actuation capabilities. Microvalve: A linearly adjustable proportional microvalve or a high-speed on / off valve is preferred. Control commands can be analog (e.g., 0.5 V or 420 mA corresponding to 0-100% opening) or digital communication commands. If using a smart valve with a digital interface, such as a microvalve control module with an I²C / SPI interface, the controller can send a set opening command via the bus. For example, writing a value of 0-255 to the address register via I²C indicates the percentage of the valve from fully closed to fully open. Regarding communication interface selection, I²C is suitable for short-distance control of multiple devices on a single board, SPI offers higher speed but requires a chip select line, and Modbus / RS485 is suitable for long-distance or multi-node modular connections. Since microvalves are typically integrated near the cold plate of the board, I²C or SPI bus is sufficient.

[0108] Example of instruction format: For I²C interface microvalves, each valve is defined with a unique address, such as 0x50, 0x51, etc. Control commands are two bytes: the first byte is the command code (e.g., 0x01 indicates setting the opening), and the second byte is the valve opening value (0~255). For example, sending the instruction [0x50, 0x01, 0xFF] sets the valve opening at address 0x50 to 100%. If a PWM-driven proportional valve is used, the microcontroller generates a PWM signal with a frequency and duty cycle matched to the valve drive circuit (e.g., 1kHz PWM, 20% duty cycle means 20% valve opening). Execution latency: Typical electronically controlled microvalves have response times in the range of milliseconds to tens of milliseconds. High-speed micro-solenoid valves can open / close in <10 ms, while precision proportional valves may require tens of milliseconds to reach a stable opening due to internal drive. The control software should consider this dynamic; amplitude and rate limits can be added to the PID control output to prevent valve lag from causing oscillations. Feedback mechanism: Some advanced micro valves have built-in position sensors, which can read the actual opening degree or valve status position through an interface. In the absence of direct position feedback, the valve action effect can be indirectly verified based on the flow sensor readings, and a fault alarm can be triggered in case of abnormalities (such as changes in valve command but no change in flow rate).

[0109] Micropumps: While the main circulation pump typically provides the basic coolant circulation flow, micropumps can be used to finely adjust the flow rate in each channel (if an independent micropump configuration is used for each channel). Micropump speed is commonly controlled by PWM speed regulation or voltage regulation. For example, a DC brushless micropump with a driver can control the speed via analog control from 0 to 5 V, or set the speed percentage by sending a UART / Modbus command. It is recommended to use a smart micropump with a closed-loop driver, whose control interface, such as UART or CAN, supports directly sending the speed setpoint and feeding back the actual speed. Example command format: If the micropump supports the Modbus protocol, function code 0x06 can be defined to write a single holding register to represent the target speed; for example, register address 0x2000 represents the speed setpoint RPM value. Sending [ID=1, Func=0x06, Addr=0x2000, Value=3000 RPM] sets the speed of pump 1 to 3000 rpm. For pumps with simple PWM control, the microcontroller generates a PWM signal (e.g., a frequency of 20 kHz to avoid audible noise), with the duty cycle corresponding to the supply voltage ratio. Execution Delay: The acceleration inertia of a micropump is slightly higher than that of a valve. When commands change abruptly, the pump may take tens to hundreds of milliseconds to reach a new steady-state flow rate, depending on the pump's impeller inertia and drive characteristics. Control algorithms can introduce soft-start and slope limiting to gradually adjust the pump speed to avoid water hammer or large flow fluctuations. Feedback Mechanism: Smart micropumps typically provide speed feedback (e.g., Hall sensor output pulse frequency or actual RPM reported via communication). The controller should read this feedback and compare it with the setpoint to correct errors or diagnose slip. For pumps without built-in feedback, changes in output flow rate can be monitored via a flow sensor to indirectly infer the pump's operating status.

[0110] Communication and Data Packet Structure: Microvalve and micropump control can be centrally executed by the main control MCU, or coordinated by distributed control nodes through communication. If a standard industrial bus (such as Modbus RTU / RS485) is used, device addresses and register mappings need to be defined: for example, address 1x for the pump, address 2x for the valve, reading registers to return sensor data, and writing to registers to send control values. It is recommended to define a communication heartbeat and ACK mechanism: after each control command is sent, the device should reply with an acknowledgment frame (such as echoing the setting value or status word). The main controller should resend or issue an alarm if no ACK is received within a timeout. The internal data structure can maintain the status of each device.

[0111] Microchannel cold plate structural parameters: Cold Plate Size and Layout: A microchannel cold plate is designed for a typical 100×100 mm core heat dissipation area to cover the main heat source areas on a multi-core board. The flow channel layout of the cold plate should be optimized according to the location of the multi-core chip and the heat flow distribution. Parallel microchannel arrays or partitioned loop designs are typically used: for example, multiple parallel microchannels are etched within a 100×100 mm copper substrate, with a length covering the width of the heat-generating area, and each channel corresponding to the area below a core. The inlet manifold evenly distributes the coolant to each parallel channel, and the outlet manifold collects the outflowing liquid. This parallel structure ensures that each core receives an independent cooling channel, and combined with the aforementioned microvalves, flow rate is distributed on demand, thereby achieving temperature balance in each area. Furthermore, consideration should be given to avoiding interference between the flow channels and other components on the board; the inlet and outlet positions and piping directions should be designed to avoid conflicts with electronic components.

[0112] Channel Dimensions: The cross-sectional dimensions of microchannels directly affect heat transfer and pressure drop performance. Based on engineering experience, the channel width and depth should ideally be selected within the range of 200–1000 μm to balance heat dissipation performance and manufacturing feasibility. For example, a rectangular cross-section with a channel width of approximately 0.3 mm and a channel depth of approximately 0.5 mm can be selected. Such dimensions can be achieved through precision milling or etching on a copper substrate, resulting in a high heat transfer coefficient under single-phase liquid cooling. The channel wall (rib) thickness is generally comparable to the channel width (e.g., rib thickness ≈ 0.3 mm) to ensure sufficient mechanical strength to withstand pressure. Multiple microchannels are arranged with a center-to-center distance of 0.6–1.5 mm (rib spacing plus channel width), allowing for dozens of parallel channels to be arranged over a width of 100 mm. If a partitioned loop (one loop per core) is used, each loop contains one or more microchannels closely attached to the bottom of the core, with the same dimensions, but possibly designed in a serpentine curve to cover the entire core area before converging into the outlet. It is necessary to ensure that the flow channel evenly covers the heat-generating area and avoids dead zones, so as to make the coolant flow field uniform.

[0113] Flow channel design selection: Straight parallel flow channels can be used, or microstructures (such as micro-ribs, pin fins, etc.) can be introduced to enhance heat transfer as needed. However, for adjustable flow rate active cooling, straight-line channels facilitate control of flow resistance and distribution. To reduce flow resistance, the flow channel cross-section can be increased or the length shortened; to achieve higher heat transfer, the cross-section can be reduced to increase the flow velocity, but the pressure drop will increase accordingly. Recommended flow velocity: To strike a balance between heat transfer and pressure drop, the coolant flow velocity within the cold plate is generally controlled to be no higher than 1.5 m / s. Within this range, sufficient turbulent heat transfer (if the Reynolds number is sufficient) can be achieved while avoiding excessive pressure drop and erosion. The temperature rise ΔT of the coolant within the cold plate is typically controlled within 5–10℃ to ensure that the outlet temperature does not become too high and affect the downstream cooling effect.

[0114] Materials and Packaging: The cold plate material should ideally be a high thermal conductivity metal, such as copper or aluminum alloy, to ensure rapid heat transfer from the chip to the liquid cooling channels. Copper, with its excellent thermal conductivity and corrosion resistance (provided the selected coolant is compatible), is a commonly used choice; aluminum is lighter but has slightly lower thermal conductivity and can also be used, but requires careful corrosion protection. Metals with large potential differences should not be mixed within a single cold plate to avoid electrochemical corrosion. Therefore, all flow channels and substrate materials should be as consistent as possible (e.g., all copper), and seals should be non-metallic and compatible with the liquid coolant. The following packaging / manufacturing processes are available: Metal processing solution (copper + sealing cover): The required microchannel structure is formed on a copper substrate through CNC precision milling, etching, or EDM, and then sealed with another copper cover to form a closed channel. Sealing methods can include vacuum brazing, diffusion welding, or laser welding. For example, the copper cover and the etched copper sheet are diffusion welded together at high temperature to achieve a reliable seal. Vacuum brazing can be performed by adding a thin layer of filler metal (such as an alloy with a melting point lower than the substrate) in the middle and then heating it. This type of all-metal encapsulation has high pressure resistance and excellent heat dissipation. It is important to note the impact of brazing / welding temperature on the channel accuracy; fixtures can be used to keep the board flat during welding. If observation or electrical isolation is required, a copper substrate + transparent polymer cover solution can also be used, such as using a high-temperature resistant transparent polymer (such as polyethersulfone PES board) as the top cover for visual inspection of the flow. Engineering plastics such as PES can be connected to metals through laser welding or bonding, but since copper and plastic cannot be directly welded together, a layer of metal is usually plated on the plastic cover or a bolted and sealing ring clamping structure is used to achieve a seal.

[0115] Silicon-based microfabrication (silicon + glass bonding): Utilizing MEMS microfabrication processes, a precise microchannel network is formed on a silicon wafer through anisotropic wet etching or deep reactive ion etching (DRIE), and then encapsulated with a glass cover via anodic bonding. Silicon has a thermal conductivity of approximately 150 W / (m·K), lower than copper (approximately 400 W / (m·K)), but still several orders of magnitude higher than traditional PCB materials. Furthermore, silicon microchannels can be directly integrated into the chip substrate for on-chip cooling. Silicon-glass anodic bonding can achieve glue-free bonding by applying an electric field at approximately 400°C, providing highly reliable micro-package hermeticity. This method is suitable for mass production and precise small-sized channels; for example, channels with a width / depth of 200–300 μm can have etching errors controlled within ±5 μm on the silicon wafer, ensuring high consistency. However, limited by the size of the silicon wafer, the area of ​​a single cold plate is generally difficult to reach 100 × 100 mm (large areas can be covered by multiple plates connected in parallel).

[0116] Manufacturing Tolerances and Surface Roughness: Regardless of the process used, manufacturing tolerance requirements must be provided to the processing plant for implementation. Dimensional Tolerances: It is recommended that the width and depth of the flow channels be controlled within ±10%. For example, if the design width is 500 μm, the allowable tolerance is ±50 μm. This ensures that the cross-sectional area variation of the flow channels does not exceed approximately ±20%, minimizing the difference in flow resistance between different channels and facilitating uniform flow distribution. The position and parallelism of the flow channels should also be within a small error range (the distance error between adjacent flow channels should not exceed ±0.1 mm) to ensure accurate alignment with the chip's heat source. Flatness: The flatness of the contact surface between the cold plate and the chip must meet the chip manufacturer's requirements (typically <0.05 mm) to avoid warping caused by processing stress; the flatness of the bottom surface must still meet the requirements after installing / removing the cold plate. Surface Roughness: Moderate roughness of the inner surface of the flow channel is beneficial for turbulent heat transfer, but excessive roughness will increase pressure drop. It is recommended to control the roughness Ra in the range of a few micrometers. For example, the Ra of the milled copper flow channel sidewall is ~1–3 μm, and the inner surface can be reduced by electropolishing or chemical treatment to reduce burrs. Manufacturing roughness has a limited impact on microchannel heat transfer, but extreme roughness can slightly worsen pressure drop. Therefore, while ensuring tolerances, there is no need for special polishing of the mirror surface; simply removing sharp burrs is sufficient to ensure smooth flow.

[0117] Material Compatibility and Reliability: When selecting a coolant, compatibility with the cold plate material must be considered. If using water-glycol or a special medium, corrosion inhibitors should be added to match the copper or aluminum material to prevent long-term corrosion and scale buildup. Sealing gasket materials (such as silicone rubber O-rings) must also be resistant to coolant aging and not contaminate the liquid. Finished cold plates should undergo pressure testing (generally a water pressure test applying pressure 1.5 times higher than the working pressure) to ensure no leakage. The maximum permissible pressure is determined by the cold plate wall thickness and material. For example, copper cold plates with a wall thickness >1 mm can generally withstand pressures of tens of Psi (1 Psi ≈ 6.9 kPa). During design, at least a 20% safety margin should be reserved based on the maximum working pressure. During installation, care must be taken to ensure that the mechanical stress at the interface between the cold plate and the piping is not transmitted to the microchannel structure to prevent deformation of the microchannels or sealing failure due to external forces.

[0118] In summary, this microfluidic liquid-cooled multi-core board thermal equalization device provides engineering-featured details in terms of control, data, and structure: including a clear MPC+PID control logic and pseudocode framework, standardized sensor data and actuator command interfaces, and cold plate design parameters and manufacturing requirements that conform to advanced heat dissipation technology practices. With this comprehensive information, engineers in the field should be able to reproduce and deploy the actual device to achieve efficient liquid cooling and thermal equalization control of multi-core boards.

[0119] Stability design and fault tolerance: Ensuring long-term stable system operation and timely response to anomalies are key considerations in project implementation. Multiple robustness and fault-tolerant designs are employed in both hardware and control systems. Over-temperature protection mechanism: Dual hardware and software over-temperature protection is implemented. On the software side, the controller continuously monitors the temperature of all chips / areas. Once the temperature of any sensing point approaches the safety threshold (e.g., 85°C), an over-temperature handling process is immediately triggered: this includes issuing an alarm, forcibly increasing the opening of relevant valves and pumps to their maximum (regardless of the MPC's current plan), and fully cooling the hotspot; simultaneously, it can notify the upper-level system to reduce the chip's load (e.g., requesting CPU downclocking or pausing some tasks, if the system allows). Automatic control is gradually restored once the temperature returns to the normal range. On the hardware side, an independent overheat circuit can be introduced: for example, a temperature control switch can be attached to the chip surface. When the temperature exceeds 90°C, the board's power supply is directly cut off or redundant cooling circuitry is triggered to prevent uncontrolled burnout.

[0120] Actuator Fault Tolerance: Considering the potential failure of micropumps or microvalves (stagnation, jamming, leakage, etc.), a dual-pump redundancy design can be implemented for main pump failure: two pumps are installed in parallel, with one running normally and the other on hot standby. When the main pump fails, the standby pump immediately takes over. Similarly, critical chip valves can be installed in parallel with redundant channels, or normally open valves (automatically fully opening in case of power failure) can be used to prevent complete flow interruption due to valve failure, which could lead to chip overheating. If a valve jams in a certain position, the controller can diagnose the issue based on sensor readings (e.g., the flow rate in that path does not change with control commands, or the area temperature rises abnormally). In this case, a fault-tolerant strategy is activated: other valves are adjusted appropriately to partially compensate for insufficient cooling in that path, and a maintenance alarm is sent. For potential coolant leaks, a level / humidity sensor is installed for detection. If the leak becomes severe, an emergency shutdown and pump power cut-off will occur to prevent dry-running damage. A pressure relief valve is also designed throughout the flow path to automatically release pressure and protect the pipeline when the pump becomes uncontrollable and overpressures occur.

[0121] Sensor Fault Handling: If temperature, flow, or pressure sensors malfunction (open circuit, short circuit, or reading deviation), the control system must be able to detect and take appropriate measures. Sensor redundancy can be implemented: two independent sensors can be set at critical measuring points (such as the temperature of a high-heat chip), and the reliability of the readings can be judged using a cross-monitoring method; or a reasonableness check can be performed through software (e.g., comparing the differences between adjacent sensor readings, and judging one as abnormal if it exceeds a threshold). Once a single sensor fault is detected, the system will discard the sensor data and use an estimated value or a redundant value instead. For example, if the chip outlet temperature sensor fails, the average temperature of various areas within the chip can be used as a temporary substitute. If no substitute is available, a safety mode will be triggered (e.g., setting a safer value higher for the valve opening in that area to ensure cooling, and alerting for maintenance). Similar strategies are adopted for flow meter and pressure sensor malfunctions, or the flow rate can be estimated based on the pump characteristic curve for control use. In all these cases, the fault will be recorded and maintenance personnel will be notified.

[0122] Electromagnetic Interference and Communication Reliability: Industrial environments often experience electromagnetic interference (EMI). This disclosure enhances immunity through both hardware and software improvements: analog sensor signals are filtered and isolated before amplification; critical measurements utilize digital filtering algorithms (such as moving average and median filtering) to remove glitches; the controller's board layout and grounding design are optimized to reduce noise coupling. A freewheeling diode (for pump / valve coils) and an RC buffer circuit are added to actuator drive signals to prevent backflow of switching noise. For communication, if valves or smart sensors are connected via a bus (such as I²C, SPI, or CAN), a checksum and heartbeat mechanism is used to monitor communication status. In case of communication loss or data errors, the controller can enter a preset fault mode: for example, maintaining the most recent valid control command or placing the relevant actuator in a safe position (most often fully open to provide maximum cooling). Additionally, a watchdog timer can be set in the controller software to prevent program freezes from affecting control output. If no response is detected, the controller will automatically reset or switch to a simple backup control logic (e.g., degrading to constant pump high speed and fully open valves to maximize cooling and allow time for manual intervention).

[0123] System Stability Analysis: Through the above design, this disclosure possesses a certain degree of robustness and stability margin. Stability analysis and verification were performed on the control system during commissioning. For example, the Lyapunov method was used to evaluate the PID parameter range to ensure closed-loop stability; for MPC control, the optimization results were monitored to avoid excessively frequent switching that could cause actuators to adjust back and forth. Furthermore, tests show that even in the event of a single-point sensor error or a microvalve failure, the remaining control degrees of freedom can still be redistributed for cooling within a short time to prevent the main chip temperature from overheating, demonstrating fault-tolerant operation. Overall, through multi-layered hardware and software protection, the system can operate reliably for extended periods under complex operating conditions, preventing localized faults from escalating into catastrophic failures.

[0124] Application scenarios and performance evaluation: This disclosure applies to heat dissipation scenarios for multi-core electronic systems with high power and high reliability requirements. A typical application case is deployment on control boards in new energy power plants. For example, the control system board of a large wind farm integrates multiple high-performance processors and power electronic drive chips for real-time data processing and power control. This board needs to operate for extended periods in outdoor cabinets, where summer ambient temperatures can reach as high as 50°C, and the processors experience severe load fluctuations during wind turbine start-up and shutdown and changes in operating conditions. Traditional air cooling struggles to prevent chip overheating, frequency throttling, or damage under such harsh conditions, while this disclosure provides an ideal solution.

[0125] In a real-world project, a microfluidic liquid-cooled thermal equalization device was integrated into a wind power control board. Each control board contains four heterogeneous multi-core CPU / FPGA chips with a total power consumption of approximately 300W, distributed across different locations on the PCB. A custom-designed liquid-cooled plate covering all four chips was created, featuring a relatively independent microfluidic structure for each chip area. The plate is 6mm thick and directly adheres to the chip tops using a thermally conductive interface material. The system is equipped with a micro-ceramic pump (maximum flow rate 3 L / min) and four electrically controlled valves (corresponding to the four chip branches). Each chip is further subdivided into two cooling zones, each with its own microvalve, for a total of eight microvalves. The controller utilizes a real-time industrial processor, running the MPC+PID control algorithm described in this implementation. The coolant is antifreeze, and the outdoor heat exchanger is cooled by a fan. The liquid flowing through the board returns to the heat exchanger with heat for dissipation.

[0126] Experimental Verification Procedure: The board underwent rigorous testing in a laboratory environment. First, thermal balance performance was tested: at 25°C, the four chips were run with different load combinations, and the steady-state temperature of each chip was measured. The results showed that regardless of the load distribution, the temperature of each chip was controlled between 60±3°C, with a maximum temperature difference of no more than 6°C between chips. In contrast, without this paper's disclosure, relying solely on a passive cooling plate, the high-load chip reached 85°C, while the low-load chip reached 45°C, a significant difference of 40°C. Next, dynamic load testing was conducted: simulating the impact of fan start-up and shutdown on the control algorithm, two chips were periodically subjected to short-term jumps from low load to full load, then back down, repeating this cycle. It was measured that at the moment of sudden load increase, the temperature of the corresponding chip rose by less than 5°C before stabilizing, returning to a stable value within 10 seconds; the temperatures of the remaining unloaded chips were almost unaffected. This indicates that the system has good dynamic response and avoids localized overheating.

[0127] Key performance indicator evaluation: Based on the comprehensive experimental data, the following performance indicators were evaluated: Temperature uniformity: Under various load conditions, the standard deviation of temperature for each chip and cooling area was consistently controlled within 2–4°C, significantly better than the above 15°C without active balancing. The maximum chip temperature decreased by approximately 20°C compared to the uncontrolled temperature, and hot spots were significantly reduced. The improved temperature uniformity enhanced system stability.

[0128] Rapid response capability: Both temperature overshoot and recovery time are very small. Faced with a step load increase, the target chip temperature overshoot is <5°C and converges within approximately 8 seconds; there is no significant undershoot during load reduction. The control loop's speed is sufficient to handle transient conditions in wind farms.

[0129] Cooling efficiency: Under typical load, the pump power is approximately 15W, representing a small proportion of the cooling capacity. Compared to a fixed cooling solution operating at full speed, the MPC strategy adjusts the pump speed and valves according to actual needs, reducing the average pump power by approximately 30%. Simultaneously, the reduced chip operating temperature improves computing efficiency, thus optimizing overall energy efficiency.

[0130] Reliability: After undergoing high and low temperature (-20~60°C) and electromagnetic compatibility tests in the environmental chamber, the system operated without abnormalities. Simulating a temperature sensor failure, the controller successfully detected and operated with fault tolerance; the chip temperature rose slightly but remained within a safe range. This demonstrates the effectiveness of the fault-tolerance mechanism.

[0131] Economy and Maintenance: In application, this disclosure demonstrates long-term economic efficiency. Microchannel cooling improves component lifespan, with chip lifespan expected to be extended by more than 30% due to reduced thermal stress. Although initial hardware costs are higher, downtime or replacement losses due to overheating are avoided. In terms of maintenance, the modular design facilitates the replacement of cold plates or valves; the control software can be remotely updated to optimize parameters to adapt to field conditions.

[0132] In summary, the microfluidic liquid-cooled multi-core board thermal equalization device demonstrates excellent performance in high-reliability applications such as control boards in new energy power stations. Through multi-level active control, it successfully maintains the temperature of each chip at a balanced and safe level, reducing hot spots and temperature differences. Experiments have verified its technical feasibility and innovation, providing a practical solution for thermal management of next-generation high-power electronic devices. This design is versatile and can also be extended to thermal management in areas such as data center servers, power electronic converters, and electric vehicle power control modules, helping these systems achieve higher efficiency and reliability.

[0133] A method for achieving thermal equilibrium of control boards based on water-circulating microchannel cooling. Based on the above-mentioned control board thermal equalization system based on water circulation microchannel cooling, thermal equalization is performed on the control board.

[0134] Specifically, an exemplary implementation of the cooling zone disclosed herein is described: It includes: a main inlet pipe, a main return pipe, and a main micro pump installed on the main inlet pipe; the main inlet pipe extends into multiple inlet branch pipes, each of which is equipped with an independent branch pump and is connected to the main inlet channel of the corresponding chip cold plate; each chip cold plate is divided into several cooling areas, each of which is equipped with an independent inlet channel, an outlet channel, and a partition micro valve arranged on the inlet channel. The inlet channel is connected to the chip's main inlet channel, and the outlet channel is connected to the chip's main outlet channel. The chip's main outlet channel flows into the main return pipe through the corresponding return branch pipe.

[0135] This disclosure adopts a topology of "main pump + multiple branch independent pumps" and "completely independent inlet and outlet water channels + partition micro valves" for the chip / partition, in order to eliminate hydraulic coupling and crosstalk.

[0136] The zoned microvalve is an electronically controlled proportional microvalve or a MEMS microvalve, which can continuously adjust the opening degree according to the control signal to achieve precise control of the zoned coolant flow.

[0137] Each of the aforementioned water inlet branch pipes is equipped with a chip-level electrically controlled valve, which is used to further adjust the chip-level total flow rate based on the liquid supply from the branch pump.

[0138] It also includes multiple temperature sensors, flow sensors and pressure sensors. The temperature sensors are respectively set at the outlet of each cooling area or chip outlet, and the flow sensors and pressure sensors are set at key locations in the water inlet channel, water outlet channel and main supply and return water pipe.

[0139] It also includes a control system, which includes an upper-level model predictive control (MPC) unit and a lower-level proportional-integral-derivative (PID) control unit. The upper-level MPC unit is used to calculate the target setpoints of each pump and zone micro-valve based on the real-time data from the sensors. The lower-level PID control unit is used to quickly track and adjust the actual output of each actuator to achieve the target value.

[0140] The cold plate has multiple microchannels inside. Each microchannel has a cross-sectional width of 0.2–1.0 mm, a height of 0.5–2.0 mm, a rib thickness of 0.2–0.5 mm, and a center-to-center distance of 0.6–1.5 mm.

[0141] The cold plate is made of copper, aluminum or silicon, and is sealed by vacuum brazing, diffusion welding, mechanical sealing or silicon-glass anodic bonding.

[0142] This invention employs a multi-stage pump and branch independent drive architecture. A main micro-pump is installed on the main inlet pipe to ensure the basic liquid supply pressure and flow rate of the entire system. Four branches extend from the main inlet pipe, each equipped with an independent branch pump, allowing for individual adjustment of the liquid supply to the cold plates in each zone, achieving precise flow control and dynamic balance at the zone level. The combination of the main pump and branch pumps realizes a dual-drive mode of system-level pressure maintenance + zone-level independent flow regulation.

[0143] This disclosure employs an independent supply and return water channel design for the chip-partitioned liquid cooling plates. Each liquid cooling plate corresponds to one chip partition, and each partition has completely independent inlet and outlet water channels, preventing coolant cross-flow between different areas and thus avoiding a decrease in cooling efficiency. The inlet water channels are uniformly connected to the inlet branch pipe of that partition, and the outlet water channels uniformly merge into the return water branch pipe of that partition. The return water pipeline also consists of four independent return water branch pipes, which ultimately converge into the main return water pipe, ensuring that the return water paths do not interfere with each other.

[0144] This disclosure employs a multi-stage flow regulation and dynamic control strategy. In addition to the main pump and branch pumps, a partitioned micro-valve can be installed at the connection between the inlet branch pipe and the partitioned liquid cooling plate, forming a three-stage regulation system of main pump-branch pump-partitioned valve. Through control logic, the operating status of the main pump, branch pumps, and partitioned valves can be dynamically adjusted according to the temperature feedback of each partition and the changes in chip power consumption, achieving rapid response and fine-grained flow distribution.

[0145] This invention employs a highly reliable and maintainable structure with completely independent branch circuits. If a pump or liquid-cooled plate in a particular zone fails, the corresponding zone's valve can be closed and the pump stopped, achieving online isolation and uninterrupted operation. The independent supply and return water design facilitates maintenance and replacement of individual zone liquid-cooled plates or pumps without affecting the normal operation of other zones.

[0146] This disclosure employs a pump-valve coordinated flow closed-loop following strategy to achieve hydraulic decoupling and high-precision control of each cooling branch. Specifically, the main pump PID unit of the control system is configured in constant differential pressure control mode. By adjusting the speed of the main micropump, the pressure difference between the main inlet pipe and the main return pipe is maintained constant, thereby providing a stable basic hydraulic source for each branch and eliminating coupling interference between branches caused by pressure fluctuations in the main pipe. Simultaneously, the branch pump and chip-level valve corresponding to each inlet branch pipe adopt a graded adjustment strategy. Branch pump (flow master control): The branch pump PID unit is configured in flow tracking mode. The upper-level MPC controller calculates the optimal total cooling flow required by each chip based on the real-time temperature distribution and power consumption prediction of each chip. The branch pump adjusts its speed according to the feedback value of the flow sensor, undertaking the main driving force for flow regulation, ensuring that the branch has an independent pressure head supply under different flow demands, and avoiding the energy loss caused by simply relying on valve throttling.

[0147] Chip-level valves (auxiliary fine-tuning and isolation): Chip-level valves work in conjunction with branch pumps. When flow demand experiences high-frequency, small fluctuations or requires rapid response (such as when MPC predicts a transient thermal shock), the valve's response speed is faster than the pump speed adjustment, enabling rapid fine-tuning of the flow. When a branch fails or the chip enters a dormant state and flow needs to be cut off, the chip-level valve performs a physical shutdown function, achieving reliable isolation.

[0148] Using the above strategy, when a chip experiences a sudden increase in thermal load requiring increased flow, the pump speed in that branch increases to provide the flow, while valves assist in maintaining flow field stability; the resulting pressure fluctuations in the main pipeline are quickly compensated by the main pump. This design achieves true independent thermal equilibrium control while also considering the system's response speed and safety.

[0149] Although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A control board thermal equalization system based on water-circulating microchannel cooling, characterized in that, include: The sensing unit, control unit, and execution unit adopt a closed-loop control architecture. The sensing unit includes sensors distributed throughout the board, used to collect data on temperature, coolant flow, and system pressure of each chip and cooling area. The control unit includes an upper-level model predictive control (MPC) and a lower-level PID controller. The upper-level MPC periodically calculates the globally optimal cooling allocation strategy, and the lower-level PID controller tracks the cooling allocation strategy of the upper-level MPC in real time and outputs control commands. The execution unit includes a main inlet pipe, a main return pipe, a main micro pump installed on the main inlet pipe, an adjustable-speed micro liquid cooling pump, and micro regulating valves for each channel, which regulate the flow of coolant according to control commands. The main inlet pipe extends into multiple inlet branch pipes, each equipped with an independent branch pump, which is connected to the main inlet channel of the corresponding chip cold plate. Each chip cold plate is divided into several cooling zones, each equipped with an independent inlet microchannel, an outlet microchannel, and a partition micro valve arranged on the inlet channel. The inlet microchannel is connected to the main inlet channel of the chip, the outlet microchannel is connected to the main outlet channel of the chip, and the main outlet channel of the chip merges into the main return pipe through the corresponding return branch pipe.

2. The control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, Sensors, including: Temperature sensors are used to monitor the temperature of each chip and cooling area in real time; Flow meter, used to measure the coolant flow rate in each branch; Pressure sensors are used to monitor the pressure conditions of the cooling circuit.

3. The control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, The upper-level model predictive control (MPC) aims to reduce the difference between the highest and lowest temperatures in the system and energy consumption by continuously optimizing flow rate and pump speed. The lower-level PID controller adjusts based on the optimization results of the upper-level model predictive control (MPC).

4. The control board thermal equalization system based on water-circulating microchannel cooling according to claim 3, characterized in that, The upper-level Model Predictive Control (MPC) aims to reduce the difference between the highest and lowest temperatures within the system and to minimize energy consumption. It continuously optimizes flow rate and pump speed. The lower-level PID controller adjusts based on the optimization results of the upper-level MPC, including: The upper-level model predictive control (MPC) solves an optimization problem based on the current temperature and estimated power consumption of all chips to determine the optimal setpoints for each actuator. MPC performs an optimization calculation every first time interval to globally optimize the coolant distribution, making the temperature of each chip or region more consistent and avoiding exceeding the safety threshold. The lower-level PID controller runs every second time interval; the lower-level PID controller includes several PID control loops, each PID control loop corresponds to a cooling channel, and continuously adjusts the opening of the corresponding micro valve or the output of the micro pump according to the deviation between the optimal set value given by the MPC and the measured value of the cooling channel; wherein, the second time interval is shorter than the first time interval.

5. A control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, In each MPC cycle, the upper-level model predictive control MPC starts from the current state, simulates the system behavior for the next N steps, optimizes the pump speed and valve opening sequence within N steps, executes only the control command for the first step, and then advances the optimization based on the real-time feedback rolling window, where N is a positive integer.

6. The control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, The lower-level PID controllers include: main pump PID control unit, branch pump PID control unit, chip-level valve PID control unit, and chip-level partitioned micro-valve PID control unit; The main pump PID control unit is used to control the main micropump, which is responsible for maintaining the circulation flow and pressure of the entire liquid cooling circuit. It adjusts the main liquid supply by adjusting the motor speed or drive voltage of the main micropump. The main pump PID control unit is configured in constant differential pressure control mode, which maintains a constant pressure difference between the main inlet pipe and the main return pipe by adjusting the speed of the main micropump, thus providing hydraulic power to each branch. The branch pump PID control unit is used to control the branch pump corresponding to each water inlet branch pipe; the branch pump PID control unit corresponding to each water inlet branch pipe is configured in flow tracking mode; the upper-level model predictive control (MPC) calculates the optimal total cooling flow required by the chip based on the real-time temperature distribution and power consumption prediction of each chip, and sends it as a set value to the corresponding branch pump PID control unit; the branch pump PID control unit adjusts the speed of the branch pump in real time based on the measured value fed back by the branch flow sensor. Chip-level valve PID control unit is used to control the inlet valve of the chip to regulate the liquid supply flow or temperature of the chip; The chip-based micro-valve PID control unit controls the micro-valve within each chip to maintain a balanced temperature in each area.

7. A control board thermal equalization system based on water-circulating microchannel cooling according to claim 6, characterized in that, The cyclic driving force is provided by the main micropump in the execution unit; The flow rate distributed to each chip is regulated by the inlet valve; The flow rate distributed to each chip's internal partition is regulated by microvalves.

8. A control board thermal equalization system based on water-circulating microchannel cooling according to claim 6, characterized in that, Redundant channels are installed in parallel for the chip's inlet valve, or normally open valves are used that automatically open fully when power is off, to prevent the chip from overheating due to inlet valve failure and flow interruption.

9. A control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, Asymmetrical microchannel configurations with varying densities are employed in the high heat flux chip region and the low heat flux chip region.

10. A control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, The main pump and branch pumps adopt dual-pump redundancy and are installed in parallel. The main pump runs normally, while the standby pump is on hot standby. When the main pump fails, the standby pump takes over immediately.

11. A control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, When a fault is diagnosed in a microvalve based on sensor readings, other microvalves are adjusted to compensate for insufficient cooling of the passage caused by the fault, and a maintenance alarm is sent at the same time.

12. The control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, When the level sensor or humidity sensor detects a coolant leak, the system will safely shut down and disconnect the pump power.

13. A control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, A pressure relief valve is installed to automatically relieve pressure and protect the pipeline safety when the main micro pump or branch pump becomes uncontrollable and overpressured.

14. The control board thermal equalization system based on water-circulating microchannel cooling according to claim 1, characterized in that, The cooling zones are independent. When a failure occurs in a certain cooling zone, the inlet valve and micro-valve of that cooling zone are closed and the pump is stopped, achieving online isolation and uninterrupted operation.

15. A method for thermal equalization of a control board based on water-circulating microchannel cooling, characterized in that, A control board thermal equalization system based on water circulation microchannel cooling according to any one of claims 1-14 is used to perform thermal equalization on the control board.

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