Frequency modulation method, frequency modulation device and electronic equipment
By utilizing PID algorithms and historical running data in heterogeneous multi-core processors, the reserved running time of threads and the combination of kernel types are dynamically adjusted, solving the problems of frequency modulation control and thread core selection allocation in heterogeneous multi-core processors. This achieves fine control at the frame and thread levels, reduces power consumption, and ensures the stability of graphics-intensive applications.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING X RING TECHNOLOGY CO LTD
- Filing Date
- 2026-05-06
- Publication Date
- 2026-07-10
AI Technical Summary
In heterogeneous multi-core processors, existing technologies cannot achieve precise frequency control and thread selection allocation for multiple core clusters, resulting in high power consumption and failing to meet the performance and power requirements of graphics-intensive applications.
By determining the historical running data of the target thread, the frame differential factor and thread integral factor are calculated using the PID algorithm. The running time and performance indicators under different kernel type combinations and frequencies are predicted, the thread reserved running time is dynamically adjusted, and the kernel type combination and frequency combination that meet the performance requirements are selected to achieve precise frame-level and thread-level frequency modulation control.
It achieves precise frequency control of heterogeneous multi-core processors, reduces power consumption, ensures frame rate stability and device performance for graphics-intensive applications, and enhances the heterogeneous computing advantages of the processor.
Smart Images

Figure CN122363853A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of processor technology, and in particular to a frequency modulation method, frequency modulation device and electronic device. Background Technology
[0002] Currently, heterogeneous multi-core processor configurations are commonplace in electronic devices, and processing business applications based on various types of kernel clusters is beneficial for improving computing power and device response speed. However, in the process of processing business applications based on heterogeneous multi-core processors, the core selection and allocation strategies for multiple threads and the frequency adjustment control methods for kernel clusters are rather crude. Either they indiscriminately increase the frequency of multiple kernel clusters when frame rate performance is insufficient, or they adjust the frequency of a single kernel cluster in isolation while ignoring the overall system power consumption. How to achieve precise frame-granular frequency adjustment control and thread core selection and allocation adjustment for multiple kernel clusters, while saving power consumption, is a major pain point in this field. Summary of the Invention
[0003] In view of this, this application provides a frequency modulation method, frequency modulation device and electronic device, which aim to achieve precise frequency modulation control at the frame granularity and adjustment of thread selection and core allocation for heterogeneous multi-core processors, thereby saving power consumption.
[0004] According to a first aspect of the embodiments of this application, a frequency modulation method for a heterogeneous multi-core processor is provided, comprising: For the target business, multiple target threads running on the heterogeneous multi-core processor are identified, and historical running data of the multiple target threads are obtained. The heterogeneous multi-core processor includes at least two types of cores with different performance.
[0005] Based on the frame time difference of the target service, determine the thread reserved running time for the next frame corresponding to each target thread; wherein, the frame time difference is the difference between the actual frame length of the frame and the target frame length corresponding to the target service.
[0006] Based on the historical running data, predict the predicted running time and predicted performance metrics of the target thread when running at different frequencies with different combinations of candidate kernel types.
[0007] Select a target kernel type combination and a corresponding target frequency combination whose predicted runtime meets the thread's reserved runtime requirements and whose predicted performance metrics meet the set requirements, so as to run the target thread in the next frame.
[0008] In some possible implementations, the thread-reserved runtime for the next frame corresponding to each target thread is determined based on the frame time difference of the target service, including: Using the PID algorithm, the frame differential factor and the thread integral factor corresponding to the target thread are calculated based on the frame time difference.
[0009] The reserved running time for the thread in the next frame is determined based on the target frame length corresponding to the target service, the thread integral factor of the previous frame of the target thread, and the frame differential factor of the current frame.
[0010] In some possible implementations, the step of using the PID algorithm to calculate the frame differential factor and the thread integral factor corresponding to the target thread based on the frame time difference includes: The frame differential factor of the current frame is determined based on the time difference of historical frames.
[0011] The thread differential factor of the target thread in the current frame is determined based on the frame differential factor of the current frame.
[0012] The thread integral factor of each target thread in the current frame is determined based on the thread differential factor of the current frame and the thread integral factor of the previous frame.
[0013] In some possible implementations, determining the thread differential factor of the target thread in the current frame based on the frame differential factor of the current frame includes: determining that the thread differential factor is equal to the frame differential factor when the kernel type combination of the current frame indicates that the multiple target threads are running on the same type of kernel.
[0014] In some possible implementations, determining the thread differential factor of the target thread in the current frame based on the frame differential factor of the current frame includes: Given that the kernel type combination in the current frame indicates that the multiple target threads are running on two different types of kernels, the original point is constructed based on the thread integral factor of the most heavily loaded thread in the previous frame on each type of kernel.
[0015] Based on the frame differential value and the thread integral factor of the previous frame of the most heavily loaded thread, a corresponding performance-safe search region is constructed; the performance-safe search region is used to indicate the reserved running time for the thread.
[0016] Based on the historical running data of the most heavily loaded thread, the predicted running time of the most heavily loaded thread is predicted when the candidate kernel type combinations are run at different frequencies.
[0017] Among the candidate kernel type combinations and candidate frequency combinations whose predicted runtime falls within the performance safety search area, the target kernel type combination and target frequency combination for the next frame are determined.
[0018] The predicted runtime of the most heavily loaded thread under the kernel type combination and target frequency combination is determined as the selection point.
[0019] The thread differential factor is determined based on the relative positional relationship between the selected point and the original point.
[0020] In some possible implementations, determining the thread differential factor based on the relative positional relationship between the selected point and the original point includes: When the frame differential value is less than zero, the performance safety search region is divided into four quadrants with the original point as the origin.
[0021] When the selected point is located in the first quadrant, the thread differential factor of each target thread is determined to be equal to half of the frame differential factor.
[0022] Otherwise, according to the preset mapping rules, the mapping point from the selected point to the boundary of the performance safety search region is determined, and the thread differential factor of the target thread on each type of kernel is determined according to the difference between the mapping point and the original point.
[0023] In some possible implementations, determining the thread differential factor based on the relative positional relationship between the selected point and the original point includes: determining that the thread differential factor of each target thread is equal to the frame differential value when the frame differential value is greater than zero; or, when determining that the operating frequency of at least one type of core corresponding to the selected point exceeds a set value based on the load ratio of the heterogeneous multi-core processor, determining the thread differential factor of the target thread on that type of core based on the difference between the selected point and the original point.
[0024] In some possible implementations, predicting the predicted runtime and predicted performance metrics of the target thread when the candidate kernel type combinations are run at different frequencies based on the historical runtime data includes: determining the runtime data of the target thread in the next frame based on the historical runtime data; and predicting the predicted runtime and predicted power consumption of the target thread in the next frame when the candidate kernel type combinations are run at different frequencies based on a pre-trained prediction model.
[0025] The step of selecting the target kernel type combination and the corresponding target frequency combination whose predicted runtime meets the thread reserved runtime requirement and whose predicted performance index meets the set requirements includes: when the predicted runtime is less than or equal to the thread reserved runtime, determining the candidate kernel type combination corresponding to the minimum predicted power consumption as the target kernel type combination and the corresponding running frequency as the target frequency combination.
[0026] In some possible implementations, the prediction model is further configured to: determine the predicted runtime and the predicted power consumption by combining a first operating frequency of the memory subsystem and a second operating frequency of the cache subsystem; wherein the predicted power consumption includes the power consumption of the heterogeneous multi-core processor, the power consumption of the memory subsystem, and the power consumption of the cache subsystem.
[0027] In some possible implementations, at least one of the plurality of target threads is assigned to a kernel with performance lower than that of the highest-performing kernel in the heterogeneous multi-core processor.
[0028] In some possible implementations, the target service includes a frame drawing service; the number of target threads is less than or equal to three, and the load of the target threads is greater than the load of other threads in the frame drawing service besides the target threads.
[0029] According to a second aspect of the embodiments of this application, a frequency modulation device for a heterogeneous multi-core processor is also provided, comprising: A thread filter is used to identify multiple target threads running on the heterogeneous multi-core processor for a given target business, and to obtain historical running data of the multiple target threads. The heterogeneous multi-core processor includes at least two types of cores with different performance levels.
[0030] A frame length adjuster is used to determine the thread-reserved running time for the next frame corresponding to each target thread based on the frame time difference of the target service; wherein, the frame time difference is the difference between the actual frame length of the frame and the target frame length corresponding to the target service.
[0031] The fusion calculator is used to predict the predicted runtime and predicted performance metrics of the target thread when running at different frequencies in candidate kernel type combinations, based on the historical running data; and to select the target kernel type combination and the corresponding target frequency combination whose predicted runtime meets the thread's reserved runtime requirement and whose predicted performance metrics meet the set requirements, so as to run the target thread in the next frame.
[0032] In some possible implementations, the frame length adjuster is configured to: use a PID algorithm to calculate the frame differential factor of the current frame and the thread integral factor of the current frame corresponding to the target thread based on the frame time difference; and determine the reserved running time of the thread in the next frame based on the target frame length corresponding to the target service, the thread integral factor of the previous frame of the target thread, and the frame differential factor of the current frame.
[0033] In some possible implementations, the frame length adjuster includes: The differential calculator is used to determine the frame differential factor of the current frame based on the time difference of historical frames.
[0034] A differential allocator is used to determine the thread differential factor of the target thread in the current frame based on the frame differential factor of the current frame.
[0035] The integral calculator is used to determine the thread integral factor of each target thread in the current frame based on the thread differential factor of the current frame and the thread integral factor of the previous frame.
[0036] In some possible implementations, the fusion calculator includes: A predictor is used to determine the running data of the target thread for the next frame based on the historical running data.
[0037] A fitter is used to predict the predicted runtime and predicted power consumption of the target thread in the next frame when the candidate kernel type combinations run at different frequencies; if the predicted runtime is less than or equal to the thread's reserved runtime, the candidate kernel type combination corresponding to the minimum predicted power consumption is determined as the target kernel type combination, and the corresponding running frequency is determined as the target frequency combination.
[0038] According to a third aspect of the embodiments of this application, a computer program product is also provided, including a computer program that, when executed by a processor, implements the method described in the above embodiments.
[0039] According to a fourth aspect of the embodiments of this application, an electronic device is also provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method described in the above embodiments.
[0040] According to a fifth aspect of the embodiments of this application, a computer-readable storage medium is also provided, on which a computer program is stored, which, when executed by a processor, implements the method described in the above embodiments.
[0041] The technical solutions provided by the embodiments of this application may include the following beneficial effects: In this embodiment, based on thread load tracing of the target service, the target thread is identified, and combined with its historical running data, multiple prediction results are predicted for different core type combinations running at different frequencies. These prediction results include predicted running time and predicted performance metrics. Based on the historical frame time difference of the target service, the thread's reserved running time for the next frame can also be dynamically adjusted. Using this thread's reserved running time as a constraint, a set of results is selected from multiple prediction results whose predicted running time is less than the thread's reserved running time (to ensure no frame loss) and whose predicted performance metrics meet set requirements (e.g., minimum processor power consumption). The core type combination and target frequency combination corresponding to this selected result are the core selection and frequency adjustment results corresponding to the system running state in the next frame. That is, based on frame-level performance requirements and inter-thread dependencies, more precise tracking and management of multiple target threads is achieved, with fine-grained selection, enabling fine-grained control at both the frame and thread levels. Adaptively adjusting the thread's reserved running time based on the frame time difference, combined with candidate core type combinations and corresponding running frequencies, allows for differentiated, frame-level automated scheduling of processors configured with different core clusters (multiple clusters), which is beneficial for fully leveraging the advantages of heterogeneous processor computing.
[0042] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description
[0043] Figure 1 This is a flowchart of a frequency modulation method provided in an embodiment of this application; Figure 2 This is a schematic diagram of a target thread tracing process provided in an embodiment of this application; Figure 3 This is a flowchart of a PID algorithm provided in an embodiment of this application; Figure 4 This is a schematic diagram of a performance-safe search region provided in an embodiment of this application; Figure 5 This is a schematic diagram of another performance-safe search region provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of a dispensing device provided in an embodiment of this application; Figure 7 This is a schematic diagram of a frame length adjuster provided in an embodiment of this application; Figure 8 This is a schematic diagram of the structure of a fusion calculator provided in an embodiment of this application; Figure 9 This is a schematic diagram of the working process of a frequency modulation device provided in an embodiment of this application; Figure 10This is a schematic diagram of the workflow of a fusion calculator provided in an embodiment of this application; Figure 11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0044] With the comprehensive development of computer technology, mobile processor CPU architecture has undergone a major evolution from homogeneous multi-core to heterogeneous multi-core.
[0045] Early mobile processors used a symmetric multiprocessing architecture, where all CPU cores had the same performance, and the scheduling strategy was relatively simple. With technological advancements, heterogeneous multiprocessing architectures have gradually replaced symmetric multiprocessing architectures. For example, combining processors with high-performance core clusters with processors with high-efficiency core clusters can achieve a balance between performance and power consumption.
[0046] Currently, mainstream processor architectures have broken down the physical cluster isolation of processor cores with different performance levels, allowing for mixed configurations of different types of cores within a single processor. For example, cores are categorized into super-large cores, large cores, and small cores based on their performance. Some processors are configured with one super-large core, three large cores, and four small cores, or one super-large core and seven small cores, and so on. These mixed-configuration processors also feature dynamic shared units, which are cache and memory control centers shared by all cores, to improve the flexibility and efficiency of task scheduling.
[0047] Dynamic voltage and frequency adjustment technology plays a crucial role in ensuring reliable processor operation and reducing power consumption. This technology dynamically adjusts the processor's operating frequency and voltage based on the actual load to minimize power consumption while meeting performance requirements. With the evolution of standardized interfaces, it is theoretically possible to finely adjust frequencies across hundreds of performance levels. Furthermore, with technological advancements, processors can now automatically adjust their frequencies when the operating system provides performance range and efficiency preference hints. Some manufacturers have also developed their own frequency regulators that can combine thermal management and power budget mechanisms to achieve more intelligent frequency adjustment strategies.
[0048] Furthermore, as mobile applications increasingly demand higher performance, thread scheduling technology is evolving from traditional load-based scheduling to more intelligent approaches. For example, some technologies use hardware counters to monitor thread performance metrics, then employ sliding window algorithms to analyze thread load and prioritize critical threads with significant performance impact. Alternatively, in single-kernel scenarios, performance margins are reserved to handle sudden load spikes, ensuring stable frame rates. Theoretically, machine learning can also be used to predict future loads and adjust resource allocation in advance to improve scheduling efficiency and response speed.
[0049] However, the development of the aforementioned processor frequency modulation and power management technologies and thread scheduling and performance optimization technologies still cannot meet the performance and power consumption requirements of graphics-intensive applications such as games, animations, window scrolling, and camera shooting.
[0050] For example, the aforementioned graphics-intensive applications typically run at a fixed frame rate, such as 60fps, 90fps, or 120fps. Fluctuations in the processor's frame rate can cause stuttering and dropped frames, thus requiring fine-grained frame-level performance control for these applications. Furthermore, due to the stringent real-time requirements of graphics rendering, thread scheduling and processor frequency adjustment need to respond within milliseconds to avoid frame drops caused by untimely resource allocation. Additionally, modern graphics applications often employ multi-threaded collaborative rendering architectures, involving the coordinated work of multiple core threads such as rendering threads, computation threads, and compositing threads, necessitating the adaptation of sophisticated thread-level scheduling strategies.
[0051] In summary, the high power consumption resulting from such high-performance graphics applications places higher demands on processor frequency control, power management, thread scheduling, and performance optimization. For processors with mixed core configurations, optimizing power consumption while ensuring stable application frame rates and reliable performance becomes a key challenge.
[0052] In view of this, this application provides a frequency tuning method for heterogeneous multi-core processors, aiming to achieve frame-level core selection frequency tuning strategy adjustment. Here, the core selection frequency tuning strategy refers to how business threads are allocated across multiple cores of the processor and how the operating frequency of each type of core is adjusted.
[0053] like Figure 1 As shown, Figure 1 This is a flowchart of a frequency modulation method provided in an embodiment of this application. The frequency modulation method includes the following steps S100 to S400.
[0054] Step S100: For the target service, identify multiple target threads running on the heterogeneous multi-core processor, and obtain the historical running data of the multiple target threads. The heterogeneous multi-core processor includes at least two types of cores with different performance.
[0055] As will be understood by those skilled in the art, a cluster is a general term for a class of cores with the same performance in a processor. Here, a heterogeneous multi-core processor refers to a processor that includes at least two types of core clusters, that is, at least two types of cores with different performance levels.
[0056] In the numerous business scenarios of electronic devices, any target business may correspond to multiple threads. For any given target business, selecting a few threads with heavier loads as target threads ensures that the processor can meet the performance requirements of the target business, provided that the processor can meet the performance requirements of those target threads.
[0057] For example, in some possible implementations, the target service includes a frame drawing service, the number of target threads is less than or equal to three, and the load of the target threads is greater than the load of other threads in the frame drawing service other than the target threads.
[0058] Taking a target thread count of three as an example, that is, selecting the three most heavily loaded threads from the frame rendering business as target threads, and using these as a benchmark to adjust the subsequent core selection and frequency adjustment strategy to ensure that the processor performance can always meet the business requirements.
[0059] For example, Figure 2 This is a schematic diagram of a target thread tracing process provided in an embodiment of this application.
[0060] Taking frame rendering as an example, the process first identifies at most three core threads related to frame rendering, including the Render thread itself and one or two other frame-related threads that are most heavily loaded besides Render. For instance, using thread tracing technology, once the main rendering thread Render is identified after the service begins, it is designated as the target thread. Further, if a new candidate tracing thread ThreadA is detected, it is also designated as a target thread. If no new tracing thread is detected, these two target threads are reordered according to their load. If another new candidate tracing thread ThreadB is detected, it is also designated as a target thread. If no new tracing thread is detected, these three target threads are reordered according to their load. If a new candidate tracing thread ThreadC is detected and meets the replacement criteria, the lightest-loaded target thread among the original three is replaced by ThreadC; otherwise, these three target threads are reordered. If a thread terminates, the remaining threads are sorted, and subsequent operations are performed.
[0061] The historical runtime data mentioned above includes at least one of the following: runtime, Activity Monitor Unit (AMU), and load information. For example, during the selection of target threads, runtime, AMU, load information, and other runtime data for each frame of these target threads are collected for subsequent analysis.
[0062] Among these, AMU / load information is related to processor performance and corresponding runtime. In other words, thread runtime data can characterize the thread's load, that is, whether the thread load is light or heavy. Therefore, based on the above runtime data, threads can be sorted according to their load.
[0063] Understandably, the load on each thread changes dynamically during actual operation. In this application, the target thread with the heaviest load is determined in real time and dynamically based on the actual operating status of the target service, thereby adaptively and dynamically adjusting the core selection and frequency adjustment strategy. That is, the processor's operating state can be adaptively adjusted based on factors such as application type, user behavior, and system status.
[0064] Step S200: Determine the thread-reserved running time for the next frame corresponding to each target thread based on the frame time difference of the target service; wherein, the frame time difference is the difference between the actual frame length of the frame and the target frame length corresponding to the target service.
[0065] Taking the frame rate of the target service as an example, that is, the number of frames per second is f, then the target frame length is... In actual frame rendering operations, after a frame is rendered, the queueBuffer interface sends a completion signal to the system. By obtaining the timestamps of the current frame and the previous frame, the actual frame length T can be determined based on the difference between the two. R Therefore, the frame time difference of the current frame can be determined. .
[0066] Frame time difference can characterize the business execution result of a frame from a time perspective. A frame time difference greater than 0 indicates that the current processor core performance cannot meet the business requirements, and there is a risk of frame dropping. A frame time difference less than 0 indicates that the actual thread execution time is short, and the frame drawing duration fluctuates slightly around the target frame length due to the influence of the vertical signal. If the frame time difference is too small, it indicates that there may be wasted processor core performance.
[0067] In this embodiment, the thread reserved running time for the next frame can be dynamically adjusted according to the time difference of the target service's historical frames, thereby constraining the core selection and frequency adjustment strategy to ensure that the service does not drop frames and does not waste processor resources, thus achieving fine-grained control of the frame granularity of the target service and the processor.
[0068] For example, if the time difference between historical frames is greater than zero, the thread's reserved runtime for the next frame can be reduced. Using this as a constraint, the processor's operating frequency can be increased during the next frame's execution, or a higher-performance processor core can be allocated to the target thread to ensure no frame is dropped. If the time difference between historical frames is greater than zero, the thread's reserved runtime for the next frame can be appropriately increased. Using this as a constraint, the processor's operating frequency can be reduced during the next frame's execution, or the target thread can be allocated to a lower-performance processor core to avoid resource waste.
[0069] Step S300: Based on the historical running data, predict the predicted running time and predicted performance indicators of the target thread when running at different frequencies with different combinations of candidate kernel types.
[0070] The candidate kernel type combination here corresponds to the kernel selection strategy, which refers to the multiple allocation results of assigning multiple target threads to different types of kernels. Taking three target threads as an example, if the heterogeneous multi-core processor includes two types of kernels, the cluster corresponding to the weaker kernel type is clusterX, and the cluster corresponding to the stronger kernel type is clusterY, then the corresponding candidate kernel type combination (or kernel selection strategy) can include: (1) all target threads run on clusterX; (2) the most heavily loaded target thread runs on clusterY, and the other target threads run on clusterX; (3) the most heavily loaded and the second most heavily loaded target threads run on clusterY, and the other target thread runs on clusterX, etc.
[0071] It is understandable that the combination result of candidate kernel type combinations is also related to the number of kernels of different types. Here, the candidate kernel type combinations corresponding to different target thread numbers and different kernel numbers will not be listed one by one. You can infer them by analogy based on the above principle.
[0072] Those skilled in the art will understand that each type of kernel corresponds to a specific candidate frequency based on its own attribute information, and kernels of the same type correspond to the same operating frequency. For example, the kernels in clusterX include n candidate frequencies, namely FX1, FX2...FXn, and the kernels in clusterY include m candidate frequencies, namely FY1, FY2...FYm.
[0073] Each candidate kernel type combination corresponds to multiple candidate frequencies (or candidate frequency combinations). For example, if a candidate kernel type combination indicates that all target threads run on clusterX, then the corresponding candidate frequencies for this kernel type combination are FX1, FX2, ..., FXn. Alternatively, if a candidate kernel type combination indicates that the target threads run on clusterX and clusterY respectively, then the corresponding candidate frequency combinations include n×m. For example, one candidate frequency combination indicates that the running frequency of clusterX is FXn, and the running frequency of clusterY is FYm.
[0074] Target threads under different load conditions, running on different kernels at different frequencies, will have different processor power consumption, load rates, and other performance indicators, as well as different running times. In this embodiment, the running time and performance indicators of the next frame are predicted based on the permutation results of different combinations of candidate kernel types and candidate frequencies, and according to the historical running data of the target thread.
[0075] Based on the above prediction results, the following step S400 is performed: Select the target kernel type combination and the corresponding target frequency combination whose predicted running time meets the thread's reserved running time requirement and whose predicted performance index meets the set requirements, so as to run the target thread in the next frame.
[0076] In other words, from the permutations of candidate kernel type combinations and their corresponding operating frequencies, the target kernel type combination and its corresponding target frequency combination are selected as the kernel selection and frequency tuning result for the next frame. This kernel selection and frequency tuning result can ensure that the next frame runs without frame loss and without wasting resources.
[0077] For example, taking the predicted performance indicators including processor power consumption as an example, in the embodiments of this application, the core selection and frequency adjustment result corresponding to when the predicted running time is less than the thread's reserved running time and the processor power consumption is less than a set value can be selected, or the core selection and frequency adjustment result corresponding to the minimum processor power consumption can be selected.
[0078] In other words, in this embodiment, based on thread load tracing of the target service, the target thread is determined, and combined with its historical running data, multiple prediction results are predicted for different kernel type combinations running at different frequencies. These prediction results include predicted running time and predicted performance metrics. Based on the historical frame time difference of the target service, the thread's reserved running time for the next frame can also be dynamically adjusted. Using this thread's reserved running time as a constraint, a set of results is selected from multiple prediction results whose predicted running time is less than the thread's reserved running time (to ensure no frame loss) and whose predicted performance metrics meet set requirements (e.g., minimum processor power consumption). The kernel type combination and the corresponding target frequency combination corresponding to this selected result are the kernel selection and frequency adjustment results corresponding to the system running state of the next frame.
[0079] In this embodiment, based on frame-level performance requirements and inter-thread dependencies, more precise tracking and management of multiple target threads is achieved, with fine-grained filtering, enabling precise control at both the frame and thread levels. By adaptively adjusting thread reserved runtime based on frame time differences and combining candidate kernel type combinations with corresponding operating frequencies, differentiated, frame-level automated scheduling can be performed for processors configured with different kernel clusters (multi-cluster), which is beneficial for fully leveraging the advantages of heterogeneous processor computing.
[0080] In some possible implementations, step 200, which determines the thread-reserved running time for the next frame corresponding to each target thread based on the frame time difference of the target service, includes: using a PID algorithm to calculate the frame differential factor and the thread integral factor corresponding to the target thread based on the frame time difference; and determining the thread-reserved running time for the next frame based on the target frame length corresponding to the target service, the thread integral factor of the previous frame of the target thread, and the frame differential factor of the current frame.
[0081] That is, by using the PID algorithm, the thread's reserved running time T for the next frame is dynamically adjusted. DDL .
[0082] As mentioned above, the historical frame time difference (LOSS) can characterize whether frame drops or resource waste occurred during historical execution. Based on this, the frame differential factor of the current frame is dynamically calculated, and the frame-level constraint time is adjusted according to this frame differential factor, ShortMargin_Frame. Furthermore, the thread integral factor LongMargin corresponding to the target thread in the current frame can be further calculated for fine-tuning for each target thread.
[0083] Therefore, the thread-reserved running time corresponding to each target thread can be determined, as shown in the following formula (1). Among them, for each parameter, (t) corresponds to the current frame parameter, (t-1) corresponds to the previous frame parameter, and (t+1) corresponds to the next frame parameter.
[0084] (1) In some possible implementations, the initial value of the thread integration factor is the target frame length T. j 20%.
[0085] Based on the foregoing, it is understandable that the key to ensuring the reliability of core selection and frequency tuning results lies in the accuracy of predicted runtime and the reliability of thread reserved runtime.
[0086] Taking runtime prediction using a predictive model as an example, the accuracy of runtime prediction can be guaranteed by linear fitting of offline training data and online AMU / load prediction data. Availability can be guaranteed if the error is within 10%.
[0087] Using the PID algorithm to adjust the reserved running time of the thread is not only used to constrain the core selection and frequency adjustment strategy, but also to make up for the error in the predicted running time, thereby improving the overall reliability of the system.
[0088] For example, Figure 3 This is a flowchart of a PID algorithm provided in an embodiment of this application.
[0089] Combination Figure 3 As shown, the step of using the PID algorithm to calculate the frame differential factor and the thread integral factor corresponding to the target thread based on the frame time difference includes the following steps S210 to S230: Step S210: Determine the frame differential factor of the current frame based on the time difference of historical frames.
[0090] For example, a weighted average calculation can be used to calculate the frame differential factor ShortMargin_Frame of the current frame based on the time difference of multiple historical frames.
[0091] For example, taking the calculation using the time difference of the last 4 frames as an example, the weighted average is calculated using 2 and 4 windows. The formula for calculating the frame differential factor of the current frame is shown in formula (2).
[0092] (2) Here, A1 and A2 are weighting constants, for example, A1 is 0.6 and A2 is 0.3. That is, the time difference between frames that are close to the current frame has a higher weight.
[0093] Step S220: Determine the thread differential factor of the target thread in the current frame based on the frame differential factor of the current frame.
[0094] That is, the aforementioned frame differential factor ShortMargin_Frame is allocated to each target thread, and the corresponding thread differential factor ShortMargin for each target thread is determined, so as to perform fine-grained control at the thread level for each target thread.
[0095] Step S230: Determine the thread integral factor of each target thread in the current frame based on the thread differential factor of the current frame and the thread integral factor of the previous frame.
[0096] For example, for each target thread, the integral adjustment factor is determined by calculating a weighted average based on the thread differential factor ShortMargin of its most recent multiple frames. For example, the thread differential factor ShortMargin of the most recent 60 frames is calculated as a weighted average with windows of 10, 30, and 60, and the integral adjustment factor is determined by the following formula (3).
[0097] (3) Among them, B1, B2 and B3 are weighting constants, for example, 3 is 0.01, 0.01 and 0.005.
[0098] The thread integral factor of the current frame is calculated and determined by the following formula (4).
[0099] (4) in, It is an adjustment factor between 0 and 1, for example, its value can be 0.96.
[0100] The thread integral factor and thread differential factor mentioned above are both related to the thread's running data. That is, in the process of obtaining the thread's historical running data, the thread differential factor and thread integral factor corresponding to the thread in a certain historical frame can be determined.
[0101] The step S220 above, which involves allocating the frame differential factor to each target thread, i.e., determining the thread differential factor of the target thread in the current frame, is related to the kernel type running the target thread.
[0102] When the kernel type combination of the current frame indicates that the multiple target threads are running on the same type of kernel, it can be determined that the thread differential factor is equal to the frame differential factor.
[0103] For example, if all target threads are running on clusterX in the current frame, then the thread differential factor ShortMargin corresponding to each target thread is equal to the value of the frame differential factor ShortMargin_Frame determined in step S210 based on the time difference of historical frames.
[0104] If the kernel type combination of the current frame indicates that the multiple target threads are running on two different types of kernels, then the thread differential factor corresponding to the target threads on each type of kernel is determined by constructing a performance safety domain and searching for the optimal power consumption point.
[0105] The performance safety domain here refers to the following: assuming that the predicted runtime of the next frame for the heaviest thread on clusterX is X and the predicted runtime of the next frame for the heaviest thread on clusterY is Y, it can be guaranteed with a high probability that the next frame will meet the performance requirements (i.e., no frame dropping will occur). Mapping (X, Y) onto a two-dimensional coordinate system, the constraint space in the coordinate system that meets its performance requirements is defined as the performance safety domain.
[0106] It is understandable that the boundary of this performance safety domain is a manifestation of the thread's reserved runtime mentioned earlier, and this performance safety domain is related to the core selection and frequency tuning results.
[0107] The following section explains the calculation process of the thread differential factor in conjunction with the construction of the performance safety domain and the core selection and frequency tuning process.
[0108] First, the original point is constructed based on the thread integral factor of the heaviest thread in the previous frame on each type of kernel. For example, if the thread integral factor of the heaviest thread in the previous frame on clusterX is LongMargin_X and the thread integral factor of the heaviest thread in the previous frame on clusterY is LongMargin_Y, then the coordinate point (LongMargin_X, LongMargin_Y) in the two-dimensional coordinate system is constructed as the original point.
[0109] Then, based on the frame differential value and the thread integral factor of the previous frame of the most heavily loaded thread, a corresponding performance-safe search region is constructed; the performance-safe search region is used to indicate the reserved running time for the thread. That is, the performance-safe search region refers to the region in the two-dimensional coordinate system corresponding to the predicted running time that ensures that the target threads on clusterX and clusterY do not experience frame dropping issues.
[0110] Next, based on the historical execution data of the most heavily loaded thread, the predicted execution time of the most heavily loaded thread when running at different frequencies in the candidate kernel type combinations is predicted. Among the candidate kernel type combinations and candidate frequency combinations whose predicted execution times fall within the performance safety search area, the target kernel type combination and target frequency combination for the next frame are determined.
[0111] Then, the predicted runtime of the most heavily loaded thread under the kernel type combination and target frequency combination is determined as the selection point.
[0112] For example, based on the predicted running times of the two most heavily loaded threads under different running states, their coordinate points in a two-dimensional coordinate system are determined. Provided that the coordinate points are within the performance-safe search area, a point with the minimum overall power loss is determined based on the running frequency of each cluster (or, in other words, based on the predicted power loss), which is the selection point mentioned above.
[0113] For example, based on the historical execution data of the heaviest thread on clusterX and the heaviest thread on clusterY, predict its predicted runtime under the corresponding candidate frequency combination. Determine its coordinates (runtimeX, runtimeY) in a two-dimensional coordinate system based on the predicted runtime, with each candidate frequency combination having a one-to-one correspondence with a coordinate point.
[0114] If the predicted runtime coordinates (runtimeX, runtimeY) are located within the performance-safe search region, it indicates that the thread's reserved runtime requirement is met. The frequency combination corresponding to this coordinate point is (ClusterFreqX, ClusterFreqY), indicating that the running frequency of clusterX is ClusterFreqX and the running frequency of clusterY is ClusterFreqY.
[0115] If the overall power consumption is minimized under this frequency combination, then this coordinate point is determined to be the selection point mentioned above. That is, the coordinates of the selection point in the two-dimensional coordinate system are (runtimeX, runtimeY).
[0116] Finally, the thread differential factor can be determined based on the relative positional relationship between the selected point and the original point. Threads running on the same type of kernel (i.e., running on the same cluster) have the same thread differential factor.
[0117] In other words, in this embodiment, the frame differential factor is allocated based on the heaviest-loaded thread on each type of kernel. If the cluster can ensure the performance requirements of the heaviest-loaded thread, then it can be determined that the performance requirements of multiple threads running on the cluster can all be met.
[0118] Next, this application will further explain the above process in conjunction with specific performance and safety search areas.
[0119] First, based on the sign of the frame differential value, corresponding performance-safe search regions are constructed.
[0120] For example, Figure 4 This is a schematic diagram of a performance-safe search region provided in an embodiment of this application.
[0121] When the frame differential value is less than zero, such as Figure 4 As shown, the constraint range of the two-dimensional space corresponding to the performance and safety search region is: .
[0122] Combination Figure 4 As shown, the performance safety search area is divided into four quadrants with the original point as the origin. Then, based on the distribution of the selected points (runtimeX, runtimeY) in the four quadrants (i.e., which quadrant the selected point falls into), the corresponding mapping points (nextX, nextY) are determined according to the preset mapping rules of each quadrant. Furthermore, based on the coordinates of the mapping points and the coordinates of the original point, the thread differential factor of the target thread on each type of cluster is determined, as shown in the following formula (5).
[0123] (5) For example, if the selected point 1 is located in the first quadrant, then the coordinates of the mapped point 1 are determined to be... .
[0124] Accordingly, the thread differential factor for each target thread is equal to half of the frame differential factor, that is... .
[0125] If point 2 is located in the second quadrant, then by translating the selected point to the left boundary of the performance safety search area to determine the corresponding mapping point, we have: Therefore, the thread differential factor can be determined as .
[0126] If point 3 is located in the fourth quadrant, then by translating the selected point to the lower boundary of the performance and safety search area to determine the corresponding mapping point, we have: Therefore, the thread differential factor can be determined as .
[0127] If point 4 is located in the third quadrant, the coordinates of the selected point are determined by the intersection of the ray from the original point to the selected point and the boundary of the performance safety search area. Then, the corresponding thread differential factor is determined by formula (5). This will not be elaborated here.
[0128] Figure 5 This is a schematic diagram of another performance-safe search region provided in an embodiment of this application.
[0129] When the frame differential value is greater than zero, such as Figure 5 As shown, the constraint range of the two-dimensional space corresponding to the performance and safety search region is: .
[0130] A frame differential value greater than zero indicates a risk of frame dropping, meaning kernel performance needs further improvement. Based on this, the thread differential factor for each target thread can be determined to be equal to the frame differential value, increasing the thread integral factor and thus constraining the core selection and frequency modulation results for the next frame by reducing the thread's reserved runtime.
[0131] Alternatively, if the operating frequency of at least one type of core corresponding to the selected point exceeds a set value based on the load ratio of the heterogeneous multi-core processor, the thread differential factor of the target thread on that type of core is determined based on the difference between the selected point and the original point.
[0132] In other words, the load ratio of the heterogeneous multi-core processors can be used to determine whether the cluster's computing power supply exceeds the actual demand (i.e., whether it is in an oversupply state). If the computing power supply exceeds the actual demand, i.e., it is in an oversupply state, it indicates that the core frequency is too high or the core performance exceeds the thread execution requirements, which will cause resource waste.
[0133] Based on this, for clusters in an oversupply state, their corresponding performance-safe search region can be expanded, and the thread differential factor of threads running on that cluster can be reduced.
[0134] Combination Figure 5 As shown in point 1, when neither cluster is in an oversupply state, regardless of the location of the selected point, its x-coordinate is mapped to the minimum boundary of the performance safety search region's x-axis range, and its y-coordinate is mapped to the minimum boundary of the performance safety search region's y-axis range. The mapped point is ( , Accordingly, the thread differential factor is .
[0135] Based on the region where point 2 is located, if clusterX is in an oversupply state, then the performance safety search region will be expanded along the X-axis boundary to... That is, the performance safety search area is updated along the X-axis. If the selected point 2 is located within the expanded area in this updated performance safety search area, that is, its X-axis coordinate... Then it is mapped to the lower boundary of the updated performance-safe search region. That is, in this state, the coordinates of the mapping point can be determined as ( , Accordingly, the thread differential factor is .
[0136] Similarly, considering the region where selection point 3 is located, if clusterY is in an oversupply state, the performance-safe search region will be expanded to the boundary along the Y-axis. That is, the performance safety search area is updated along the Y-axis. If the selected point 3 is located within the expanded area in this updated performance safety search area, that is, its Y-axis coordinate... Then it is mapped to the left boundary of the updated performance safety search region. That is, in this state, the coordinates of the mapping point can be determined as ( , Accordingly, the thread differential factor is .
[0137] Considering the region where point 4 is located, if both clusterX and clusterY are in an oversupply state, then the constraint range of the two-dimensional space corresponding to the updated performance-safe search region is: .
[0138] If we choose point 4 on the X-axis coordinates... The coordinates on the Y-axis Then the mapping point is the selection point. Correspondingly, the thread differential factor is... .
[0139] In some possible implementations, step S300, which predicts the predicted runtime and performance metrics of the target thread based on the historical runtime data when the candidate kernel type combinations are run at different frequencies, further includes the following steps: First, based on the historical running data, determine the running data for the next frame of the target thread.
[0140] Secondly, based on a pre-trained prediction model, the predicted runtime and predicted power consumption of the target thread in the next frame when the candidate kernel type combinations are run at different frequencies are predicted.
[0141] For example, the prediction model is first trained by extensive fitting using offline data. The input of the prediction model includes the AMU / load information of the thread, as well as the kernel parameter information such as the kernel frequency and voltage of the thread, so that it outputs the corresponding running time and processor power consumption.
[0142] Based on the trained prediction model, candidate kernel type combinations and corresponding operating frequencies can be pre-set according to the device configuration.
[0143] During implementation, the AMU / load information is input into the predictor for fitting calculation. For example, a linear predictor is used for fitting calculation to predict the AMU / load information of the next frame, which is used to characterize the predicted load situation of the next frame.
[0144] Then, the predicted AMU / load information of the predictor is input into the prediction model. Based on the combination of candidate core types and the corresponding operating frequency, multiple prediction results can be obtained. Each prediction result corresponds to a core selection and frequency adjustment strategy.
[0145] Based on this, in step S400, during the selection of the target kernel type combination and the corresponding target frequency combination, the predicted running time can be first filtered from the multiple prediction results to be less than or equal to the thread's reserved running time. Then, the prediction result corresponding to the minimum predicted power consumption is selected from the filtered results. The kernel selection and frequency adjustment strategy corresponding to this prediction result is the strategy for running the target thread in the next frame. That is, the candidate kernel type combination corresponding to this kernel selection and frequency adjustment strategy is the target kernel type combination, and the corresponding running frequency is the target frequency combination.
[0146] The above implementations represent core selection and frequency adjustment strategies from the processor's own perspective. However, thread execution time is not only related to processor performance but also to the memory subsystem and cache subsystem.
[0147] In view of this, in some possible implementations, the prediction model is further configured to: determine the predicted runtime and the predicted power consumption by combining a first operating frequency of the memory subsystem and a second operating frequency of the cache subsystem; wherein the predicted power consumption includes the power consumption of the heterogeneous multi-core processor, the power consumption of the memory subsystem, and the power consumption of the cache subsystem.
[0148] In other words, increasing the operating frequency of the memory subsystem and cache subsystem can reduce thread runtime, but it will increase the overall system power consumption. In the embodiments of this application, the impact of the memory subsystem and cache subsystem can be taken into account during the training process of the prediction model. The combined impact of processor, memory subsystem and cache subsystem frequency tuning on thread runtime and overall power consumption can be comprehensively considered so that the final core selection and frequency tuning result can reduce the overall system power consumption.
[0149] In some possible implementations, at least one of the plurality of target threads is assigned to a kernel with performance lower than that of the highest-performing kernel in the heterogeneous multi-core processor.
[0150] For example, when the processor has two types of cores, in practical engineering situations, it's generally not advisable to allocate all target threads to the higher-performing core. If the number of target threads is 3, then the number of candidate core type combinations is 3.
[0151] Alternatively, under the constraint of the number of cores, the corresponding combinations of candidate core types can be reduced accordingly. For example, if the processor includes two types of cores, with one core of the higher-performance type, then the number of corresponding combinations of candidate core types is two. That is, all target threads can be assigned to the lower-performance core, or the most heavily loaded target thread can be assigned to the higher-performance core, and the remaining target threads can be assigned to the lower-performance core.
[0152] In the embodiments described above, the example is a processor comprising two types of cores with different performance levels. It is understood that, based on the above principles, this can also be extended to processors with other different architectures, such as processors comprising three or more types of cores, or combinations of multiple heterogeneous multi-core processors.
[0153] For example, taking a processor with 4 small cores, 4 medium cores, and 2 large cores as an example, when adjusting the core selection and frequency of this processor, the above method can be combined. Predictions can be made based on the three corresponding candidate core type combinations, assuming 4 small cores and 2 medium cores. Furthermore, predictions can also be made based on the three corresponding candidate core type combinations, assuming 4 medium cores and 2 large cores. Finally, from the prediction results corresponding to the above six candidate core type combinations, the group that meets the performance requirements and has the lowest power consumption is selected.
[0154] In some implementations, a core selection debouncing strategy can also be used to avoid frequent core selection migrations.
[0155] This application also provides a frequency modulation device for a heterogeneous multi-core processor, such as... Figure 6 As shown, Figure 6 This is a schematic diagram of a frequency modulation device provided in an embodiment of this application. The frequency modulation device includes: Thread filter 10 is used to identify multiple target threads running on the heterogeneous multi-core processor for a target business, and to obtain historical running data of the multiple target threads. The heterogeneous multi-core processor includes at least two types of cores with different performance.
[0156] The frame length adjuster 20 is used to determine the thread reserved running time for the next frame corresponding to each target thread based on the frame time difference of the target service; wherein, the frame time difference is the difference between the actual frame length of the frame and the target frame length corresponding to the target service.
[0157] The fusion calculator 30 is used to predict the predicted runtime and predicted performance index of the target thread when the candidate kernel type combination runs at different frequencies based on the historical running data; and to select the target kernel type combination and the corresponding target frequency combination whose predicted runtime meets the thread's reserved runtime requirement and whose predicted performance index meets the set requirements, so as to run the target thread in the next frame.
[0158] In some possible implementations, the frame length adjuster 20 is configured to: use a PID algorithm to calculate the frame differential factor of the current frame and the thread integral factor of the current frame corresponding to the target thread based on the frame time difference; and determine the reserved running time of the thread in the next frame based on the target frame length corresponding to the target service, the thread integral factor of the previous frame of the target thread, and the frame differential factor of the current frame.
[0159] Figure 7 This is a schematic diagram of a frame length adjuster provided in an embodiment of this application.
[0160] In some possible implementations, the frame length adjuster 20 includes: Differential calculator 21 is used to determine the frame differential factor of the current frame based on the time difference of historical frames.
[0161] Differential allocator 22 is used to determine the thread differential factor of the target thread in the current frame based on the frame differential factor of the current frame.
[0162] Integrator calculator 23 is used to determine the thread integral factor of each target thread in the current frame based on the thread differential factor of the current frame and the thread integral factor of the previous frame.
[0163] Figure 8 This is a schematic diagram of the structure of a fusion calculator provided in an embodiment of this application.
[0164] In some possible implementations, the fusion calculator 30 includes: Predictor 31 is used to determine the running data of the next frame of the target thread based on the historical running data.
[0165] Fitter 32 is used to predict the predicted running time and predicted power consumption of the target thread in the next frame when the candidate kernel type combinations run at different frequencies; when the predicted running time is less than or equal to the thread's reserved running time, the candidate kernel type combination corresponding to the minimum predicted power consumption is determined as the target kernel type combination, and the corresponding running frequency is determined as the target frequency combination.
[0166] For example, Figure 9 This is a schematic diagram of the working process of a frequency modulation device provided in an embodiment of this application.
[0167] The thread filter 10 is used to select 1 to 3 target threads from the target business and is responsible for collecting the running data (such as AMU / load / frame running time information) of these target threads.
[0168] The differential calculator 21 is used to determine the frame differential factor of the current frame based on the time difference of historical frames.
[0169] The integrator calculator 23 is used to determine the thread integral factor of each target thread in the current frame based on the thread differential factor of the current frame and the thread integral factor of the previous frame. The thread integral factor of the previous frame can be determined based on the data information collected by the thread filter 10.
[0170] The fusion calculator 30 is used to implement cluster-level core selection strategy decisions, that is, to determine how multiple target threads are allocated to different clusters and to decide the operating frequency of each type of cluster, aiming to find a frequency that can meet the performance requirements of each target thread and optimize overall power consumption. In other words, the fusion calculator 30 performs performance predictions for various pre-allocation schemes for the threads selected by the thread filter 10, and selects a set of core selection and frequency tuning results that can meet the performance requirements of each target thread and have the best overall power consumption.
[0171] For example, Figure 10 This is a schematic diagram of the workflow of a fusion calculator provided in an embodiment of this application.
[0172] The historical execution data of the target thread, the thread integral factor of the previous frame, and the differential factor of the current frame are input into the fusion calculator 30. Combined with the candidate kernel type combinations, the fusion calculation predicts the predicted execution time and corresponding system predicted power consumption of the target thread in the next frame under various execution states. Finally, a core selection and frequency adjustment decision is made, that is, the core selection strategy of the target thread (referring to which type of kernel the target thread runs on) and the cluster operating frequency are determined.
[0173] Furthermore, in combination Figure 9 As shown, based on the core selection and frequency modulation decision of the fusion calculator 30, the differential allocator 22 also allocates the frame differential factor to the corresponding target thread, determines the thread differential factor, and further adjusts the thread integral factor.
[0174] In other words, this application can achieve more precise tracking and management of multiple target threads based on frame-level performance requirements and inter-thread dependencies, combined with a PID algorithm. This allows for finer-grained selection and enables precise frame-level and thread-level control. By adaptively adjusting thread reserved runtime based on frame time differences and combining candidate kernel type combinations and corresponding operating frequencies, differentiated, frame-level automated scheduling can be performed for processors configured with different kernel clusters (multi-cluster), which is beneficial for fully leveraging the advantages of heterogeneous processor computing.
[0175] In an exemplary embodiment, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the method as described in any of the above embodiments.
[0176] For the device embodiments and computer program product embodiments, since they basically correspond to the method embodiments, the relevant parts can be referred to in the description of the method embodiments. Furthermore, the device embodiments described above are illustrative; the modules described as separate components may or may not be physically separate, and the components shown as modules may or may not be physical modules, i.e., they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this application according to actual needs. Those skilled in the art can understand and implement this without any inventive effort.
[0177] This application can be implemented by executing several computer program code flows using an electronic device. The electronic device loads the computer program into non-volatile memory and uses the processor of the electronic device to read these computer program instructions into memory for execution.
[0178] Figure 11 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. The following is in conjunction with... Figure 11 The electronic devices described in some embodiments of this application will be explained.
[0179] Reference Figure 11 Electronic device 1100 can be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.
[0180] Device 1100 may include one or more of the following components: processing component 1101, memory 1102, power supply component 1103, multimedia component 1104, audio component 1105, input / output (I / O) interface 1106, sensor component 1107, and communication component 1108.
[0181] Processing component 1101 typically controls the overall operation of device 1100, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 1101 may include one or more processors 1109 to execute instructions to perform all or part of the steps of the methods described above. Furthermore, processing component 1101 may include one or more modules to facilitate interaction between processing component 1101 and other components. For example, processing component 1101 may include a multimedia module to facilitate interaction between multimedia component 1104 and processing component 1101.
[0182] Memory 1102 is configured to store various types of data to support the operation of device 1100. Examples of this data include instructions for any application or method operating on device 1100, contact data, phonebook data, messages, pictures, videos, etc. Memory 1102 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.
[0183] Power supply component 1103 provides power to various components of device 1100. Power supply component 1103 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to device 1100.
[0184] Multimedia component 1104 includes a screen that provides an output interface between the device 1100 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, swipe, and gestures on the touch panel. The touch sensors may sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 1104 includes a front-facing camera and / or a rear-facing camera. When the device 1100 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.
[0185] Audio component 1105 is configured to output and / or input audio signals. For example, audio component 1105 includes a microphone (MIC) configured to receive external audio signals when device 1100 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 1102 or transmitted via communication component 1108. In some embodiments, audio component 1105 also includes a speaker for outputting audio signals.
[0186] Input / output (I / O) interface 1106 provides an interface between processing component 1101 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, start buttons, and lock buttons.
[0187] Sensor assembly 1107 includes one or more sensors for providing status assessments of various aspects of device 1100. For example, sensor assembly 1107 may detect the on / off state of device 1100, the relative positioning of components such as the display and keypad of device 1100, changes in the position of device 1100 or a component of device 1100, the presence or absence of user contact with device 1100, the orientation or acceleration / deceleration of device 1100, and temperature changes of device 1100. Sensor assembly 1107 may also include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 1107 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 1107 may also include an accelerometer, a gyroscope, a magnetometer, a pressure sensor, or a temperature sensor.
[0188] Communication component 1108 is configured to facilitate wired or wireless communication between device 1100 and other devices. Device 1100 can access wireless networks based on communication standards, such as WiFi, 2G or 3G, 4G or 5G, or combinations thereof. In one exemplary embodiment, communication component 1108 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 1108 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.
[0189] In an exemplary embodiment, device 1100 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components.
[0190] In an exemplary embodiment, this application also provides a non-transitory computer-readable storage medium including instructions, such as a memory 1102 including instructions that can be executed by a processor 1109 of device 1100. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.
Claims
1. A frequency modulation method for a heterogeneous multi-core processor, characterized in that, include: For the target business, identify multiple target threads running on the heterogeneous multi-core processor, and obtain the historical running data of the multiple target threads. The heterogeneous multi-core processor includes at least two types of cores with different performance. Based on the frame time difference of the target service, determine the thread reserved running time for the next frame corresponding to each target thread; wherein, the frame time difference is the difference between the actual frame length of the frame and the target frame length corresponding to the target service; Based on the historical running data, predict the predicted running time and predicted performance indicators of the target thread when running at different frequencies with different combinations of candidate kernel types. Select a target kernel type combination and a corresponding target frequency combination whose predicted runtime meets the thread's reserved runtime requirements and whose predicted performance metrics meet the set requirements, so as to run the target thread in the next frame.
2. The frequency modulation method according to claim 1, characterized in that, Based on the frame time difference of the target service, determine the thread-reserved runtime for the next frame corresponding to each target thread, including: Using the PID algorithm, the frame differential factor and the thread integral factor corresponding to the target thread are calculated based on the frame time difference. The reserved running time for the thread in the next frame is determined based on the target frame length corresponding to the target service, the thread integral factor of the previous frame of the target thread, and the frame differential factor of the current frame.
3. The frequency modulation method according to claim 2, characterized in that, The step of using the PID algorithm to calculate the frame differential factor and the thread integral factor corresponding to the target thread based on the frame time difference includes: Determine the frame differential factor of the current frame based on the time difference of historical frames; Based on the frame differential factor of the current frame, determine the thread differential factor of the target thread in the current frame; The thread integral factor of each target thread in the current frame is determined based on the thread differential factor of the current frame and the thread integral factor of the previous frame.
4. The frequency modulation method according to claim 3, characterized in that, The determination of the thread differential factor of the target thread in the current frame based on the frame differential factor of the current frame includes: When the kernel type combination of the current frame indicates that the multiple target threads are running on the same type of kernel, the thread differential factor is determined to be equal to the frame differential factor.
5. The frequency modulation method according to claim 3, characterized in that, The determination of the thread differential factor of the target thread in the current frame based on the frame differential factor of the current frame includes: Given that the kernel type combination in the current frame indicates that the multiple target threads are running on two different types of kernels, the original point is constructed based on the thread integral factor of the most heavily loaded thread on each type of kernel in the previous frame. Based on the frame differential value and the thread integral factor of the previous frame of the most heavily loaded thread, a corresponding performance-safe search region is constructed; the performance-safe search region is used to indicate the reserved running time for the thread. Based on the historical running data of the most heavily loaded thread, predict the predicted running time of the most heavily loaded thread when the candidate kernel type combinations are run at different frequencies; Among the candidate kernel type combinations and candidate frequency combinations whose predicted runtime falls within the performance safety search area, the target kernel type combination and target frequency combination for the next frame are determined. The predicted runtime of the most heavily loaded thread under the kernel type combination and target frequency combination is determined as the selection point; The thread differential factor is determined based on the relative positional relationship between the selected point and the original point.
6. The frequency modulation method according to claim 5, characterized in that, The step of determining the thread differential factor based on the relative positional relationship between the selected point and the original point includes: When the frame differential value is less than zero, the performance safety search region is divided into four quadrants with the original point as the origin. When the selected point is located in the first quadrant, the thread differential factor of each target thread is determined to be equal to half of the frame differential factor; Otherwise, according to the preset mapping rules, the mapping point from the selected point to the boundary of the performance safety search region is determined, and the thread differential factor of the target thread on each type of kernel is determined according to the difference between the mapping point and the original point.
7. The frequency modulation method according to claim 5, characterized in that, The step of determining the thread differential factor based on the relative positional relationship between the selected point and the original point includes: If the frame differential value is greater than zero, determine that the thread differential factor for each target thread is equal to the frame differential value; or, If, based on the load ratio of the heterogeneous multi-core processor, it is determined that the operating frequency of at least one type of core corresponding to the selected point exceeds a set value, the thread differential factor of the target thread on that type of core is determined based on the difference between the selected point and the original point.
8. The frequency modulation method according to claim 1, characterized in that, The step of predicting the predicted runtime and performance metrics of the target thread when running at different frequencies with different combinations of candidate kernel types, based on the historical runtime data, includes: Based on the historical execution data, determine the execution data for the next frame of the target thread; Based on a pre-trained prediction model, the predicted runtime and predicted power consumption of the target thread in the next frame when the candidate kernel type combinations are run at different frequencies are predicted. The selection of target kernel type combinations and corresponding target frequency combinations that meet the thread's reserved runtime requirements in terms of predicted runtime and whose predicted performance metrics meet set requirements includes: If the predicted running time is less than or equal to the thread's reserved running time, the candidate kernel type combination corresponding to the minimum predicted power consumption is determined as the target kernel type combination, and the corresponding running frequency is determined as the target frequency combination.
9. The frequency modulation method according to claim 8, characterized in that, The prediction model is also configured to: The predicted runtime and predicted power consumption are determined by combining the first operating frequency of the memory subsystem and the second operating frequency of the cache subsystem. The predicted power consumption includes the power consumption of the heterogeneous multi-core processor, the power consumption of the memory subsystem, and the power consumption of the cache subsystem.
10. The frequency modulation method according to claim 8, characterized in that, At least one of the target threads is assigned to a kernel whose performance is lower than that of the highest-performing kernel in the heterogeneous multi-core processor.
11. The frequency modulation method according to claim 1, characterized in that, The target service includes frame drawing service; the number of target threads is less than or equal to three, and the load of the target threads is greater than the load of other threads in the frame drawing service other than the target threads.
12. A frequency modulation device for a heterogeneous multi-core processor, characterized in that, include: A thread filter is used to identify multiple target threads running on the heterogeneous multi-core processor for a given target business, and to obtain historical running data of the multiple target threads. The heterogeneous multi-core processor includes at least two types of cores with different performance characteristics. A frame length adjuster is used to determine the thread-reserved running time for the next frame corresponding to each target thread based on the frame time difference of the target service; wherein, the frame time difference is the difference between the actual frame length of the frame and the target frame length corresponding to the target service; The fusion calculator is used to predict the predicted runtime and predicted performance metrics of the target thread when running at different frequencies in candidate kernel type combinations, based on the historical running data; and to select the target kernel type combination and the corresponding target frequency combination whose predicted runtime meets the thread's reserved runtime requirement and whose predicted performance metrics meet the set requirements, so as to run the target thread in the next frame.
13. The frequency modulation device according to claim 12, characterized in that, The frame length adjuster is configured as follows: Using the PID algorithm, the frame differential factor of the current frame and the thread integral factor of the current frame corresponding to the target thread are calculated based on the frame time difference. The reserved running time for the thread in the next frame is determined based on the target frame length corresponding to the target service, the thread integral factor of the previous frame of the target thread, and the frame differential factor of the current frame.
14. The frequency modulation device according to claim 13, characterized in that, The frame length adjuster includes: The differential calculator is used to determine the frame differential factor of the current frame based on the time difference of historical frames. A differential allocator is used to determine the thread differential factor of the target thread in the current frame based on the frame differential factor of the current frame. The integral calculator is used to determine the thread integral factor of each target thread in the current frame based on the thread differential factor of the current frame and the thread integral factor of the previous frame.
15. The frequency modulation device according to claim 12, characterized in that, The fusion calculator includes: A predictor is used to determine the execution data of the target thread in the next frame based on the historical execution data. A fitter is used to predict the predicted runtime and predicted power consumption of the target thread in the next frame when the candidate kernel type combinations run at different frequencies; if the predicted runtime is less than or equal to the thread's reserved runtime, the candidate kernel type combination corresponding to the minimum predicted power consumption is determined as the target kernel type combination, and the corresponding running frequency is determined as the target frequency combination.
16. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1-11.
17. An electronic device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method as described in any one of claims 1-11.
18. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the method as described in any one of claims 1-11.