A low-ripple output ac-ac converter

Abstract

The application discloses a low-ripple output AC-AC converter, and belongs to the technical field of converters. The converter comprises input voltage V in , inductance L 1 and inductance L 2, capacitance C 1 and capacitance C 2, six controlled switching tubes S 1- S 6, four power frequency diodes D 1- D 4 and a load R ; the input voltage V in , inductance L 1, inductance L 2 and a power conversion network composed of controlled switching tubes S 1- S 4 and body diodes are sequentially connected; the two ends of capacitance C 1, capacitance C 2 are respectively connected across controlled switching tubes S 5, controlled switching tubes S 6 and body diodes; the four power frequency diodes D 1- D 4 constitute an output polarity switching network and are connected with the load R . The application realizes loop equivalent inductance by means of adding controlled switching tubes between bridge arms and capacitors, realizes high-quality power output under the condition of not increasing inductance values and other filtering elements, and greatly reduces output voltage ripple.

Description

Technical Field

[0001] This invention relates to the field of converter technology, and in particular to a low-ripple output AC-AC converter. Background Technology

[0002] Currently, with the increasing demands for power quality in modern power systems, dynamic power quality issues such as voltage sags, swells, and fluctuations are becoming increasingly prominent, posing a serious threat to the stable operation of sensitive loads. Taking dynamic voltage restorers, precision AC voltage regulation systems, and variable frequency drives as examples, their core components all require AC-AC converters capable of directly converting AC power. Compared to the traditional two-stage AC-DC-AC conversion scheme, direct AC-AC converters, by eliminating the intermediate DC energy storage stage, offer significant advantages such as high efficiency, compact size, controllable cost, and long system life. In particular, symmetrical bipolar AC-AC converters capable of providing both in-phase and out-of-phase outputs demonstrate irreplaceable value in the aforementioned application scenarios due to their flexible output voltage polarity control capabilities.

[0003] To achieve symmetrical buck-boost functionality, traditional single-phase matrix converters require eight fully controlled switches, resulting in inherent drawbacks such as high system cost, complex control, and significant losses. To reduce the number of switches, simplified topologies with four or five switches have been developed. However, these topologies, while minimizing the number of switches, make significant compromises in performance. The core issue is that the filter inductor in the circuit operates independently, and its limited filtering capability leads to large output voltage ripple. Excessive output voltage ripple can cause electromagnetic interference, increase the stress on the output filter capacitor, and severely restrict the increase in system switching frequency. At high frequencies, excessive ripple current leads to a sharp increase in core losses, forcing designers to use larger inductors, thus limiting the improvement of converter power density. Summary of the Invention

[0004] The purpose of this invention is to provide a low-ripple output AC-AC converter to fundamentally suppress output voltage ripple without increasing the inductance value or other filtering components, while ensuring the basic buck-boost performance of the converter, so as to achieve higher power density and better power quality.

[0005] To achieve the above objectives, the present invention provides a low-ripple output AC-AC converter, including an input voltage... V in ,inductance L 1 and inductor L 2. Capacitor C 1 and capacitor C 2. Six controlled switching transistors S 1- S 6. Four power frequency diodes D 1-D 4 and load R ; Input voltage V in ,inductance L 1. Inductor L 2 and controlled switch tube S 1- S The power conversion network consisting of 4 diodes and body diodes is connected sequentially; capacitors C 1. Capacitor C 2. Both ends are connected across the controlled switch transistor. S 5. Controlled switching transistor S Between the 6-cell body diode and the four power frequency diodes. D 1- D 4. Constructing an output polarity switching network and load R connect.

[0006] Preferably, by controlling the controlled switching transistor S 5 and controlled switching transistors S The conduction state of 6 will turn the inductor L 1 and inductor L 2. Connected in series in the circuit, forming an equivalent large inductance. L eq The formula for calculating low ripple using the equivalent inductance is as follows: (This is used to suppress output voltage ripple.) ; In the formula, L This is the inductance value. V 0 represents the load voltage. d Duty cycle, T s For switching frequency, I L For inductor current, x % represents the output voltage ripple rate.

[0007] Preferred equivalent large inductance L eq The value is inductance L 1 and inductor L The sum of 2, that is L eq = L 1+ L 2.

[0008] Preferably, six controlled switching transistors S 1- S In 6, the controlled switch transistor S 1 and controlled switching transistor S 2 forms the first bridge arm, controlled switch transistor S 3 and controlled switching transistors S4 forms the second bridge arm, controlled switch transistor S 5 and controlled switching transistors S 6. Control the capacitors respectively C 1 and capacitor C The branch road where 2 is located is disconnected.

[0009] Preferably, the converter's operating mode switches according to the polarity of the input voltage: In non-inverting voltage ramp-up / pull-down mode: when the input voltage is in the positive half-cycle, the controlled switch transistor... S 3 and controlled switching transistors S 5. Keep constantly on, controlled switch tube S 4 and controlled switching transistors S 6. Keep off, controlled switch tube S 1 and controlled switching transistor S 2. Perform high-frequency complementary PWM modulation; when the input voltage is in the negative half-cycle, the controlled switching transistor... S 1 and controlled switching transistor S 6. Keep constantly on, controlled switch tube S 2 and controlled switching transistors S 5. Keep off, controlled switch tube S 3 and controlled switching transistors S 4. Perform high-frequency complementary PWM modulation; In inverting voltage ramp-up / pull-down mode: when the input voltage is in the positive half-cycle, the controlled switch transistor... S 1 and controlled switching transistor S 6. Keep constantly on, controlled switch tube S 2 and controlled switching transistors S 5. Keep off, controlled switch tube S 3 and controlled switching transistors S 4. Perform high-frequency complementary PWM modulation; when the input voltage is in the negative half-cycle, the controlled switching transistor... S 3 and controlled switching transistors S 5. Keep constantly on, controlled switch tube S 4 and controlled switching transistors S 6. Keep off, controlled switch tube S 1 and controlled switching transistor S 2. Perform high-frequency complementary PWM modulation.

[0010] Preferably, a dead time is provided between the controlled switching transistors of the high-frequency complementary PWM modulation, and the inductor L 1 and inductor L 2. During the dead time, the current is freewheeled through the body diode of the controlled switch, while avoiding high voltage spikes and bridge arm shoot-through.

[0011] Preferably, when the converter achieves symmetrical bipolar low-ripple buck-boost AC-AC conversion, the relationship between voltage gain and switching duty cycle is expressed as follows: ; in, G For voltage gain, D This represents the switch duty cycle; a positive sign indicates a non-inverting output, and a negative sign indicates an inverting output.

[0012] Therefore, the present invention adopts the above-mentioned low-ripple output AC-AC converter. Based on the equivalent inductance method and on the basis of the AC-AC converter, it suppresses the output voltage ripple by dynamically connecting two independent filter inductors in series to form an equivalent large inductance. At the same time, by optimizing the modulation strategy and dead-time control, the converter can achieve stable soft-switching operation at high frequency, thereby reducing switching losses, improving system efficiency and power density.

[0013] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0014] Figure 1 This is a structural diagram of an embodiment of a low-ripple output AC-AC converter according to the present invention; Figure 2 This is a schematic diagram of the circuit structure in non-inverting voltage boost / buck mode, where (a) is mode I, (b) is mode II, (c) is mode III, and (d) is mode IV. Figure 3 This is a schematic diagram of the circuit structure in the inverted voltage boost / buck mode, where (a) is mode I, (b) is mode II, (c) is mode III, and (d) is mode IV. Figure 4 It is a switching transistor in non-inverting voltage boost / buck mode. S 1. S 2. S 3. S 4. S 5. S 6. Switch timing diagram; Figure 5 It is a switching transistor in inverted voltage boost / buck mode. S 1. S 2. S 3. S 4. S 5. S 6. Switch timing diagram; Figure 6 The output voltage waveforms are shown in the non-inverting voltage boost mode, where (a) is the boost mode and (b) is the buck mode. Figure 7 The output voltage waveforms are shown in the reverse voltage boost mode, where (a) is the boost mode and (b) is the buck mode. Figure 8 The output voltage waveforms in non-inverting mode of a traditional four-switch topology are shown, where (a) is the boost mode and (b) is the buck mode. Figure 9 The output voltage waveform in the inverted mode of the traditional four-switch topology is shown in (a) for boost mode and (b) for buck mode. Detailed Implementation

[0015] The technical solution of the present invention will be further described below with reference to the accompanying drawings and embodiments.

[0016] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0017] Example 1: like Figure 1 As shown, the present invention provides a low-ripple output AC-AC converter, including an input voltage... V in ,inductance L 1 and inductor L 2. Capacitor C 1 and capacitor C 2. Six controlled switching transistors S 1- S 6. Four power frequency diodes D 1- D 4 and load R .

[0018] Among them, input voltage V in ,inductance L 1. Inductor L 2 and controlled switch tube S 1- S The power conversion network consisting of 4 diodes and body diodes is connected sequentially, and the capacitors are connected in series. C 1. Capacitor C 2. Both ends are connected across the controlled switch transistor. S 5. Controlled switching transistorS Between the 6-cell body diode and the four power frequency diodes. D 1- D 4. Constructing an output polarity switching network and load R connect.

[0019] Six controlled switching transistors S 1- S In 6, the controlled switch transistor S 1 and controlled switching transistor S 2 forms the first bridge arm, controlled switch transistor S 3 and controlled switching transistors S 4 forms the second bridge arm, controlled switch transistor S 5 and controlled switching transistors S 6. Control the capacitors respectively C 1 and capacitor C The circuit in branch 2 is open. Four power frequency diodes. D 1- D 4. Provides a freewheeling path for inductor current and ensures the continuity of input current.

[0020] By controlling the controlled switching transistor S 5 and controlled switching transistors S The conduction state of 6 will turn the inductor L 1 and inductor L 2. Connected in series in the circuit, forming an equivalent large inductance. L eq The formula for calculating low ripple using the equivalent inductance is as follows: (This is used to suppress output voltage ripple.) (1) In the formula, L This is the inductance value. V 0 represents the load voltage. d Duty cycle, T s For switching frequency, I L For inductor current, x The percentage represents the output voltage ripple rate. It's clear that to reduce the output voltage ripple rate while maintaining a stable output voltage, the only way is to increase the inductance value. However, the equivalent inductance method reduces output voltage ripple without changing the inductance itself. (Equivalent large inductance) L eq The value is inductance L 1 and inductor L The sum of 2, that is L eq = L 1+ L 2.

[0021] The converter's operating mode switches according to the polarity of the input voltage: In non-inverting voltage ramp-up / pull-down mode: when the input voltage is in the positive half-cycle, the controlled switch transistor... S 3 and controlled switching transistors S 5. Keep constantly on, controlled switch tube S 4 and controlled switching transistors S 6. Keep off, controlled switch tube S 1 and controlled switching transistor S 2. Perform high-frequency complementary PWM modulation; when the input voltage is in the negative half-cycle, the controlled switching transistor... S 1 and controlled switching transistor S 6. Keep constantly on, controlled switch tube S 2 and controlled switching transistors S 5. Keep off, controlled switch tube S 3 and controlled switching transistors S 4. Perform high-frequency complementary PWM modulation; In inverting voltage ramp-up / pull-down mode: when the input voltage is in the positive half-cycle, the controlled switch transistor... S 1 and controlled switching transistor S 6. Keep constantly on, controlled switch tube S 2 and controlled switching transistors S 5. Keep off, controlled switch tube S 3 and controlled switching transistors S 4. Perform high-frequency complementary PWM modulation; when the input voltage is in the negative half-cycle, the controlled switching transistor... S 3 and controlled switching transistors S 5. Keep constantly on, controlled switch tube S 4 and controlled switching transistors S 6. Keep off, controlled switch tube S 1 and controlled switching transistor S 2. Perform high-frequency complementary PWM modulation.

[0022] The controlled switching transistors in the high-frequency complementary PWM modulation have a dead time, and the inductor L 1 and inductor L 2. During the dead time, freewheeling occurs through the body diode of the controlled switch, while avoiding high-voltage spikes and bridge arm shoot-through. (Capacitor) C 1 and capacitor C Both have the function of absorbing voltage spikes and harmonic filtering of switching transistors.

[0023] When the converter achieves symmetrical bipolar low-ripple buck-boost AC-AC conversion, the relationship between voltage gain and switching duty cycle is expressed as follows: (2) in, G For voltage gain, D This represents the switch duty cycle; a positive sign indicates a non-inverting output, and a negative sign indicates an inverting output.

[0024] In non-inverting voltage ramp-up / pull-down mode, the output voltage polarity is made the same as the input voltage polarity. This is achieved by controlling the switch duty cycle. D Perform voltage boost / buck control, when D When <0.5, it is in buck mode. D When the voltage is greater than 0.5, it is in boost mode. During the positive half-cycle, the output PWM wave modulates the controlled switching transistor. S 1 and controlled switching transistor S 2. Working mode diagram as follows Figure 2 As shown in (a) and (b) in the figure; the controlled switching transistor is modulated by the output PWM wave during the negative half-cycle. S 3 and controlled switching transistors S 4. Working mode diagram as follows Figure 2 As shown in (c) and (d) in the figure.

[0025] In inverting voltage ramp-up / pull-down mode, the output voltage polarity is reversed compared to the input voltage polarity. This is achieved by controlling the switch duty cycle. D Perform voltage boost / buck control, when D When <0.5, it is in buck mode. D When the voltage is greater than 0.5, it is in boost mode. During the positive half-cycle, the output PWM wave modulates the controlled switching transistor. S 3 and controlled switching transistors S 4. Working mode diagram as follows Figure 3 As shown in (a) and (b) in the figure; the controlled switching transistor is modulated by the output PWM wave during the negative half-cycle. S 1 and controlled switching transistor S 2. Working mode diagram as follows Figure 3 As shown in (c) and (d) in the figure.

[0026] In this embodiment, when the converter is in non-inverting voltage boost / buck mode: During the positive half-cycle, the controlled switch transistor S 3 and controlled switching transistors S 5. Conducting, controlled switch transistor S 4 and controlled switching transistors S 6. Turn off, controlled switch tube S 1 and controlled switching transistor S 2. Continuous switching via complementary PWM waves. Controlled switching transistor. S 3. Continuously conducting, controlled switching transistor S 2. The conducting inductor continuously charges and stores energy in parallel with the input power supply; the power frequency diode... D 1 and power frequency diode D 3. Natural conduction. Then the controlled switch is turned off. S 2. Turn on the controlled switch transistor S 1. Put the inductor L 1. Connected in series with the input power supply, to the capacitor. C 1 and loadR Power is supplied, thereby raising the voltage across the capacitor to a level higher than the input voltage. V C1 , V C1 The value is shown in equation (3): (3) In the formula, V in Input voltage, V C1 For capacitor C The voltage on 1, V L1 Inductor L The voltage on 1.

[0027] The voltage value on the right side of the load is the input voltage. V in The voltage value on the left is the capacitor. C voltage on 1 V C1 The capacitor raises the voltage across the load to V C1 At this time, the load voltage direction is the same as the loop current direction, thus achieving positive voltage rise and fall. This is due to the controlled switching transistor. S 6 is turned off, at which time the inductor L 1 and inductor L 2. Forming a loop, such as Figure 2 As shown in (b), the inductor L 1 and inductor L 2 is equivalent to an inductor with a larger inductance value, which effectively suppresses the ripple of the output voltage without increasing the inductance. During the negative half-cycle, the controlled switch transistor S 1 and controlled switching transistor S 6-channel, controlled switch transistor S 2 and controlled switching transistors S 5. Turn off the controlled switch. S 3 and controlled switching transistors S 4. Continuous switching via complementary PWM waves. Controlled switching transistor. S 1. Continuously conducting, controlled switching transistor S 4. The conducting inductor continuously charges and stores energy in parallel with the input power supply; power frequency diode. D 1 and power frequency diode D 4. Natural conduction. Then the controlled switch is turned off. S 4. Turn on the controlled switch transistor S 3. Add the inductor L 2. Connected in series with the input power supply, to the capacitor. C 2 and load R Power is supplied, thereby raising the voltage across the capacitor to a level higher than the input voltage.V C2 The voltage on the right side of the load is equal to that of the capacitor. C voltage on 2 V C2 The voltage value on the left is the input voltage. V in The capacitor raises the voltage across the load to V C1 At this time, the load voltage direction is opposite to the loop current direction, thus achieving reverse voltage rise and fall. This is due to the controlled switching transistor. S 5 is turned off, at which time the inductor L 1 and inductor L 2. Forming a loop, such as Figure 2 As shown in (d), the inductor L 1 and inductor L 2 is equivalent to an inductor with a larger inductance value, which effectively suppresses the ripple of the output voltage without increasing the inductance.

[0028] In this embodiment, when the converter is in the inverted voltage boost / buck mode: During the positive half-cycle, the circuit branch outputting the negative half-cycle is forced to operate, and the capacitor... C The voltage is increased to a level higher than the input voltage, causing the voltage polarity across the load to be reversed, thus achieving a reverse AC voltage with completely opposite phase at the output. (Controlled switching transistor) S 1 and controlled switching transistor S 6-channel, controlled switch transistor S 2 and controlled switching transistors S 5. Turn off the controlled switch. S 3 and controlled switching transistors S 4. Continuous switching via complementary PWM waves. Controlled switching transistor. S 1. Continuously conducting, controlled switching transistor S 4. The conducting inductor continuously charges and stores energy in parallel with the input power supply; power frequency diode. D 1 and power frequency diode D 3. Natural conduction. Then the controlled switch is turned off. S 4. Turn on the controlled switch transistor S 3. Add the inductor L 2. Connected in series with the input power supply, to the capacitor. C 2 and load R Power is supplied, thereby raising the voltage across the capacitor to a level higher than the input voltage. V C2 The voltage on the right side of the load is equal to that of the capacitor. C voltage on 2 V C2 The voltage value on the left is the input voltage. V in The capacitor raises the voltage across the load to VC2 At this point, the load voltage direction is opposite to the loop current direction, thus achieving an output reverse voltage with the opposite polarity to the input voltage. This is due to the controlled switching transistor. S 5 is turned off, at which time the inductor L 1 and inductor L 2. Forming a loop, such as Figure 3 As shown in (b), the inductor L 1 and inductor L 2 is equivalent to an inductor with a larger inductance value, which effectively suppresses the ripple of the output voltage without increasing the inductance. During the negative half-cycle, the circuit branch outputting the positive half-cycle is forced to operate, and the capacitor... C The voltage is increased to a level higher than the input voltage, causing the voltage polarity across the load to be reversed, thus achieving a reverse AC voltage with completely opposite phase at the output. (Controlled switching transistor) S 3 and controlled switching transistors S 5. Conducting, controlled switch transistor S 4 and controlled switching transistors S 6. Turn off, controlled switch tube S 1 and controlled switching transistor S 2. Continuous switching via complementary PWM waves. Controlled switching transistor. S 3. Continuously conducting, controlled switching transistor S 2. The conducting inductor continuously charges and stores energy in parallel with the input power supply; the power frequency diode... D 2 and power frequency diodes D 4. Natural conduction. Then the controlled switch is turned off. S 2. Turn on the controlled switch transistor S 1. Put the inductor L 1. Connected in series with the input power supply, to the capacitor. C 1 and load R Power is supplied, thereby raising the voltage across the capacitor to a level higher than the input voltage. V C1 The voltage value on the right side of the load is the input voltage. V in The voltage value on the left is the capacitor. C voltage on 1 V C1 The capacitor raises the voltage across the load to V C1 At this point, the load voltage direction is the same as the loop current direction, thus achieving an output positive voltage with opposite polarity to the input voltage. This is due to the controlled switching transistor. S 6 is turned off, at which time the inductor L 1 and inductor L 2. Forming a loop, such as Figure 3 As shown in (d), the inductor L 1 and inductor L2 is equivalent to an inductor with a larger inductance value, which effectively suppresses the ripple of the output voltage without increasing the inductance.

[0029] In the above operating mode, the switching on and off of the switching transistor must be strictly controlled. The switching sequence for the non-inverting voltage rise / fall mode is as follows: Figure 4 As shown, during the positive half-cycle, the controlled switching transistor... S 3 and controlled switching transistors S 5. Conducting, controlled switch transistor S 4 and controlled switching transistors S 6. Turn off, controlled switch tube S 1 and controlled switching transistor S 2. Continuous switching on and off via complementary PWM waves, and in the controlled switching transistor S 1 and controlled switching transistor S A dead time is set between 2. During the negative half-cycle, the controlled switch transistor... S 1 and controlled switching transistor S 6-channel, controlled switch transistor S 2 and controlled switching transistors S 5. Turn off the controlled switch. S 3 and controlled switching transistors S 4. Continuous switching on and off via complementary PWM waves, and in the controlled switching transistor S 3 and controlled switching transistors S A dead time is set between 4. During the dead time, the inductor freewheels through the body diode of the controlled switch, thus avoiding high voltage spikes and bridge arm shoot-through.

[0030] The switching sequence of the inverted voltage boost / buck mode is as follows: Figure 5 As shown, during the positive half-cycle, the controlled switch transistor... S 1 and controlled switching transistor S 6-channel, controlled switch transistor S 2 and controlled switching transistors S 5. Turn off the controlled switch. S 3 and controlled switching transistors S 4. Continuous switching on and off via complementary PWM waves, and in the controlled switching transistor S 3 and controlled switching transistors S A dead time is set between 4. During the negative half-cycle, the controlled switch transistor... S 3 and controlled switching transistors S 5. Conducting, controlled switch transistor S 4 and controlled switching transistors S 6. Turn off, controlled switch tube S 1 and controlled switching transistor S 2. Continuous switching on and off via complementary PWM waves, and in the controlled switching transistor S 1 and controlled switching transistor SA dead time is set between 2. During the dead time, the inductor freewheels through the body diode of the controlled switch, thus avoiding high voltage spikes and bridge arm shoot-through.

[0031] Based on the above topology design, this embodiment was simulated on a simulation platform. In non-inverting voltage boost / buck mode: when the effective value of the input voltage is 70V and the duty cycle is 0.6, the converter is in boost mode. The input voltage measured at this time is... V in and output voltage V The experimental waveform of 0 is as follows Figure 6 As shown in (a), the output voltage and input voltage have the same polarity, the output voltage is stable and the harmonics are low; when the effective value of the input voltage is 70V and the duty cycle is 0.4, the voltage gain can be obtained from equation (2). G =0.67, the converter is in buck mode. Measured output voltage V The experimental waveform of 0 is as follows Figure 6 As shown in (b), the output voltage remains smooth and stable with low ripple in non-inverting operating mode.

[0032] In reverse voltage boost mode: when the effective input voltage is 70V and the duty cycle is 0.6, the converter is in boost mode. The input voltage measured at this time... V in and output voltage V The experimental waveform of 0 is as follows Figure 7 As shown in (a), the output voltage and input voltage have opposite polarities, resulting in a stable output voltage with low harmonics. When the effective value of the input voltage is 70V and the duty cycle is 0.4, the voltage gain can be obtained from equation (2). G =0.67, the converter is in buck mode. Measured output voltage V The experimental waveform of 0 is as follows Figure 7 As shown in (b), the output voltage remains stable and has low ripple output in non-inverting operating mode.

[0033] In existing technologies, the newly published four-switch topology reduces the number of switches, making the topology more streamlined, but the output voltage has a larger ripple. In non-inverting voltage boost / buck mode: when the input voltage RMS is 70V and the duty cycle is 0.6, the converter is in boost mode. The measured input voltage at this time... V in and output voltage V The experimental waveform of 0 is as follows Figure 8 As shown in (a), the output voltage and input voltage have the same polarity, and the output voltage harmonics are relatively high; when the effective value of the input voltage is 70V and the duty cycle is 0.4, the voltage gain can be obtained from equation (2). G=0.67, the converter is in buck mode. Measured output voltage V The experimental waveform of 0 is as follows Figure 8 As shown in (b) in the figure, it can be seen that the output voltage ripple is always large in the non-inverting operating mode.

[0034] In reverse voltage boost mode: when the effective input voltage is 70V and the duty cycle is 0.6, the converter is in boost mode. The input voltage measured at this time... V in and output voltage V The experimental waveform of 0 is as follows Figure 9 As shown in (a), the output voltage and input voltage have opposite polarities, resulting in higher harmonics in the output voltage. When the effective value of the input voltage is 70V and the duty cycle is 0.4, the voltage gain can be obtained from equation (2). G =0.67, the converter is in buck mode. Measured output voltage V The experimental waveform of 0 is as follows Figure 9 As shown in (b) in the figure, it can be seen that the output voltage harmonics are always high in the non-inverting operating mode.

[0035] The comparison results with the four-switch topology show that the proposed topology in this embodiment has a smooth and stable output voltage waveform with significantly reduced ripple voltage. This waveform verifies the effective suppression of output ripple by the equivalent inductance of the circuit, indicating that this embodiment achieves high-quality power output and significantly reduces output voltage ripple without increasing the inductance value or other filtering components.

[0036] Therefore, the present invention adopts the above-mentioned low-ripple output AC-AC converter, which solves the problem that existing AC-AC converters can effectively suppress output voltage ripple through topology reconstruction without increasing the inductance value or adding output filter components, thereby saving production costs and improving the quality of power output.

[0037] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit them. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the technical solutions of the present invention, and these modifications or equivalent substitutions cannot cause the modified technical solutions to deviate from the spirit and scope of the technical solutions of the present invention.

Claims

1. A low-ripple output AC-AC converter, characterized in that: Including input voltage V in ,inductance L 1 and inductor L 2. Capacitor C 1 and capacitor C 2. Six controlled switching transistors S 1- S 6. Four power frequency diodes D 1- D 4 and load R ; Input voltage V in ,inductance L 1. Inductor L 2 and controlled switch tube S 1- S The power conversion network consisting of 4 diodes and body diodes is connected sequentially; capacitors C 1. Capacitor C 2. Both ends are connected across the controlled switch transistor. S 5. Controlled switching transistor S Between the 6-cell body diode and the four power frequency diodes. D 1- D 4. Constructing an output polarity switching network and load R connect.

2. The low-ripple output AC-AC converter according to claim 1, characterized in that: By controlling the controlled switching transistor S 5 and controlled switching transistors S The conduction state of 6 will turn the inductor L 1 and inductor L 2. Connected in series in the circuit, forming an equivalent large inductance. L eq The formula for calculating low ripple using the equivalent inductance is: [Formula for equivalent inductance to suppress output voltage ripple] ； In the formula, L This is the inductance value. V 0 represents the load voltage. d Duty cycle, T s For switching frequency, I L For inductor current, x % represents the output voltage ripple rate.

3. A low-ripple output AC-AC converter according to claim 2, characterized in that: Equivalent large inductance L eq The value is inductance L 1 and inductor L The sum of 2, that is L eq = L 1+ L 2.

4. A low-ripple output AC-AC converter according to claim 1, characterized in that: Six controlled switching transistors S 1- S In 6, the controlled switch transistor S 1 and controlled switching transistor S 2 forms the first bridge arm, controlled switch transistor S 3 and controlled switching transistors S 4 forms the second bridge arm, controlled switch transistor S 5 and controlled switching transistors S 6. Control the capacitors respectively C 1 and capacitor C The branch road where 2 is located is disconnected.

5. A low-ripple output AC-AC converter according to claim 1, characterized in that, The converter's operating mode switches according to the polarity of the input voltage: In non-inverting voltage ramp-up / pull-down mode: when the input voltage is in the positive half-cycle, the controlled switch transistor... S 3 and controlled switching transistors S 5. Keep constantly on, controlled switch tube S 4 and controlled switching transistors S 6. Keep off, controlled switch tube S 1 and controlled switching transistor S 2. Perform high-frequency complementary PWM modulation; when the input voltage is in the negative half-cycle, the controlled switching transistor... S 1 and controlled switching transistor S 6. Keep constantly on, controlled switch tube S 2 and controlled switching transistors S 5. Keep off, controlled switch tube S 3 and controlled switching transistors S 4. Perform high-frequency complementary PWM modulation; In inverting voltage boost / buck mode: when the input voltage is in the positive half-cycle, the controlled switch transistor... S 1 and controlled switching transistor S 6. Keep constantly on, controlled switch tube S 2 and controlled switching transistors S 5. Keep off, controlled switch tube S 3 and controlled switching transistors S 4. Perform high-frequency complementary PWM modulation; when the input voltage is in the negative half-cycle, the controlled switching transistor... S 3 and controlled switching transistors S 5. Keep constantly on, controlled switch tube S 4 and controlled switching transistors S 6. Keep off, controlled switch tube S 1 and controlled switching transistor S 2. Perform high-frequency complementary PWM modulation.

6. A low-ripple output AC-AC converter according to claim 5, characterized in that: The controlled switching transistors in the high-frequency complementary PWM modulation have a dead time, and the inductor L 1 and inductor L 2. During the dead time, the current is freewheeled through the body diode of the controlled switch, while avoiding high voltage spikes and bridge arm shoot-through.

7. A low-ripple output AC-AC converter according to claim 1, characterized in that: When the converter achieves symmetrical bipolar low-ripple buck-boost AC-AC conversion, the relationship between voltage gain and switching duty cycle is expressed as follows: ； in, G For voltage gain, D This represents the switch duty cycle; a positive sign indicates a non-inverting output, and a negative sign indicates an inverting output.

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