Event-based dual-memory optimization method and sequence generation and image encryption method thereof

Abstract

This invention relates to an event-based dual-memristor optimization method and its sequence generation and image encryption methods in the fields of information security and cryptography. The dual-memristor output optimization method includes optimizing the output based on the state variable y at time n in a chaotic system. n z n The baseline outputs M1 and M2 are obtained respectively. 1，base (n), M 2，base (n); based on the volatile variable ρ at time n in the chaotic system n The trigger rate λ is obtained. n , by λ n Get the trigger probability P n Normalize the chaotic sequence generated by the chaotic system at time n-1 to obtain a uniform random number r. n ; where, when P n >r n When P triggers the event-driven mechanism, n <r n When the event-driven mechanism is not triggered, M1(n+1) and M2(n+1) under different branches are obtained. This invention improves the image encryption quality by setting an event-driven mechanism, which makes the participation of the memristor branch intermittent and state-dependent, so that the system has different dynamic switching behaviors under the same parameter conditions.

Description

Technical Field

[0001] This invention relates to a chaotic sequence generation method in the field of information security and cryptography, and particularly to an event-driven dual memristor output optimization method, a chaotic sequence generation method based on an event-driven dual memristor three-dimensional discrete chaotic system, and an image encryption and decryption method based on the chaotic sequence generated by this method. Background Technology

[0002] With the development of the Internet of Things, edge computing, and cloud storage, multimedia data such as images face risks of eavesdropping, tampering, and privacy leaks during acquisition, transmission, and storage. Traditional block ciphers are costly to implement on resource-constrained devices, thus lightweight image encryption schemes based on chaotic systems have attracted attention. Chaotic encryption schemes using chaotic systems typically employ fixed-step (time-driven) discrete mappings (such as Logistic, Tent, Henon, etc.) or continuous system discretization to generate a keystream, and combine one pixel scrambling with one, a small number of rounds of diffusion to complete the encryption.

[0003] Existing chaotic systems typically include a discrete chaotic module and a dual memristor to enhance system complexity. The discrete chaotic module generates the original chaotic sequence based on a pre-defined discrete iterative equation, while the dual memristor, coupled to the discrete chaotic module, updates its memristor value based on partial state variables and injects it into the iterative process of the state variables as a nonlinear feedback term. The discrete chaotic module includes state variables x, y, and z constituting the system's principal phase space, and a volatile variable ρ used to introduce time-varying perturbations into the system.

[0004] However, while traditional chaotic systems can exhibit rich nonlinear behaviors in dynamical studies, their dual memristors, updated with fixed step sizes, fail to fully capture the randomness and suddenness of the actual dual memristor's microscopic conduction process. Numerous experimental studies have shown that the conduction and recovery processes of real dual memristors are not continuous but driven by the random formation and disintegration of carrier channels. This physical mechanism results in the memristor state exhibiting a statistical characteristic of "intermittent conduction—slow decay" over time. Existing chaotic models struggle to capture this time-varying dynamic, making chaotic encryption schemes for chaotic systems vulnerable to attack and reducing their effectiveness. Summary of the Invention

[0005] (1) Technical problems to be solved To address the technical problem that existing dual memristors, which use fixed-step updates, struggle to capture the time-varying dynamic characteristics of "intermittent conduction-slow decay" caused by the random formation and collapse of carrier channels in real memristors, thus affecting the security of chaotic encryption, this invention provides an event-driven dual memristor output optimization method, a chaotic sequence generation method for an event-driven dual memristor three-dimensional discrete chaotic system, and an image encryption / decryption method based on the chaotic sequence generated by this method.

[0006] (2) Technical solution The first aspect of this invention provides an event-driven dual memristor output optimization method, comprising: Based on the state variable y at time n in the chaotic system n z n The outputs of the dual memristors M1 and M2 at time n are the baseline output M. 1，base (n), M 2，base (n): ; In the formula, k is the internal control parameter of M1; Based on the volatile variable ρ at time n in the chaotic system n The trigger rate λ is obtained. n , by λ n Get the trigger probability P n : ; In the formula, λ0 is the reference trigger rate, and γ is the gain coefficient; The chaotic sequence generated by the chaotic system at time n-1 is normalized to obtain a uniform random number r. n r n ∈[0,1]; Where, when P n >r n When the event-driven mechanism is triggered, the outputs M1(n+1) and M2(n+1) of the dual memristors M1 and M2 at time n+1 remain the baseline outputs M1(n+1) and M2(n+1). 1，base (n), M 2，base (n): ; When P n <r n When the event-driven mechanism is not triggered, the outputs M1(n+1) and M2(n+1) of the dual memristors M1 and M2 at time n+1 are: ; In the formula, leak is the leakage coefficient function.

[0007] As a further improvement to the above scheme, the volatile variable ρ n Based on the state variable x at time n in the chaotic system n Updated to ρ n+1 , ρ n+1 Used to calculate the trigger rate λ at time n+1. n+1 : ; In the formula, c is x n The contribution coefficient to the triggered activation, τ is the decay coefficient.

[0008] The second aspect of this invention provides a method for generating chaotic sequences based on an event-driven dual-memristor three-dimensional discrete chaotic system. The method involves coupling a memristor coupling term obtained from the dual-memristor outputs M1(n+1) and M2(n+1) with the output term of the discrete chaotic module to obtain x. n+1 M1(n+1) and M2(n+1) are M1(n+1) and M2(n+1) in the event-driven dual memristor output optimization method described above.

[0009] As a further improvement to the above scheme, chaotic sequence generation methods include: x n The main chaotic mapping term obtained after the discrete chaotic module is added to the memristor coupling terms obtained from M1(n+1) and M2(n+1) in the above event-driven dual memristor output optimization method to obtain the state variable x at time n+1. n+1 ; ; In the formula, A is the Logistic control parameter, B is the dual memristor coupling strength, and M1(y) is the variable coupling strength. n The expression represents the output of memristor M1 at time n+1, which is M1(n+1) and M2(z). n ) represents the output of memristor M2 at time n+1, which is M2(n+1); According to x n+1 y was calculated n+1 z n+1 : ; The x obtained at time n will be updated n+1 y n+1 z n+1 ρ n+1 And M1(n+1) and M2(n+1) are used as inputs at time n+1. The above process is repeated to complete n iterations and updates, resulting in three original chaotic sequences {x}. n x n+1 , ..., x 2n}、{y ny n+1 , ..., y 2n}、{z n , z n+1 ,…,z 2n}; Discard the transient states of the first t terms in each chaotic sequence, and output the subsequent steady-state segments of length L from each original chaotic sequence to obtain three steady-state chaotic sequences {x}. t x t+1 , ..., x t+L-1}、{y t y t+1 , ..., y t+L-1}、{z t , z t+1 ,…,z t+L-1}

[0010] As a further improvement to the above scheme, the three original chaotic sequences {x} are... n x n+1 , ..., x 2n}、{y n y n+1 , ..., y 2n}、{z n , z n+1 ,…,z 2n The transient states of the first t terms in the sequence are discarded, and the subsequent steady-state segments of length L in any original chaotic sequence are output, generating multiple steady-state chaotic sequences.

[0011] The third aspect of the present invention provides an image encryption and decryption method based on event-driven dual memristor three-dimensional discrete chaotic sequences, which uses multiple steady-state chaotic sequences as scrambling indexes and diffusion key streams respectively. The multiple steady-state chaotic sequences used are multiple steady-state chaotic sequences obtained by the chaotic sequence generation method described above.

[0012] As a further improvement to the above scheme, image encryption methods include: Step 1, Input a color plaintext image The three-channel RGB image is split into three independent matrix blocks: R, G, and B. The two-dimensional matrix of each matrix block is flattened into a one-dimensional pixel vector C by column or row, and the image size parameters H and W and the total length L are recorded, where L is the product of H and W. Step 2: Normalize, quantize, and integerize the multiple steady-state chaotic sequences obtained by the above chaotic sequence generation method to obtain r chaotic sequences Z. r (1:L), and r=1,2,…,n; Z r Any chaotic sequence S in (1:L) x(1:L) is sorted to obtain the index P = argsort(S X The pixel vector C is scrambled pixel-level using the scrambling index P; the scrambled vector is then expanded into a quaternary matrix BS; BS is further scrambled numerically using the scrambling index P, and the scrambled vector is then reassembled to obtain the scrambled vector ID. （1） ; Step 3, for the remaining chaotic sequence Z r (1:L) Perform diffusion from round 1 to round r; where each round will yield a key stream, and the scrambled vector ID will be... （1） Introduced, and chained XOR diffusion is performed together with each key stream; Step 4: After all diffusion rounds are completed, the final ciphertext vectors obtained from each channel are restored to a two-dimensional matrix, and the R, G, and B channels are recombined to output the final color ciphertext image.

[0013] As a further improvement to the above scheme, in step 2, the formula for pixel-level scrambling of the pixel vector C is: ; In the formula, C(P(i)) is the pixel value at the i-th position in the original pixel vector, C P (i) represents the i-th position of the scrambled vector after introducing the scrambled index P.

[0014] As a further improvement to the above scheme, the quaternion expansion involves splitting the 8-bit pixel into four 2-bit numbers, as shown in the following formula: ; Set each pixel value v=C P (i)∈[0,255] according to: Represent four quaternion numbers taking values ​​{0, 1, 2, 3}, forming a matrix BS. .

[0015] As a further improvement to the above scheme, in step 2, the formula for digital-level scrambling of BS is: ; In the formula, IP(i,:) represents the i-th row of the quaternary matrix IP after digital scrambling, and BS(P(i),:) represents taking the i-th row from the pixel-level scrambling matrix BS.

[0016] As a further improvement to the above scheme, the four 2-bit numbers are reassembled into 8 bits, and the scrambling vector ID is output. （1） The formula is: .

[0017] As a further improvement to the above scheme, in step 3, the calculation formula for each round of key stream is as follows: ; In the formula, α is used to amplify the fractional differences of continuous sequences and map them to 0-255; Diffusion introduces a dependency on the previous ciphertext: ; In the formula, IA （0） For scrambling vector ID （1） .

[0018] As a further improvement to the above scheme, image decryption methods include: Step R1: Input the encrypted image, using the same S generated in the image encryption method. x (1:L) and Z r (1:L).

[0019] Step R2 involves splitting and vectorizing the ciphertext image into three channels: R, G, and B, and converting them into data vectors in the same form as those used in image encryption methods.

[0020] Step R3: Regenerate the diffusion key streams for each round and perform reverse diffusion in reverse order; first restore the data before the last round of diffusion, then restore the previous round, the first two rounds in sequence, until an intermediate result is obtained that has been scrambled but not yet descrambled. Step R4: Perform reverse two-level scrambling; first undo the numeric level scrambling, then undo the pixel level scrambling, gradually restoring the original arrangement order of the channels; Step R5: Restore the three channels after inverse scrambling to two-dimensional matrices respectively, and combine them to output the final decrypted image, which is the plaintext image.

[0021] (3) Beneficial effects 1. This invention utilizes the state variable x of a discrete chaotic module in a chaotic system at time n. n volatile variable ρ n The trigger rate λ is obtained. n , and by λ n Get the trigger probability P n Furthermore, the chaotic sequence obtained at time n-1 is normalized to obtain a uniform random number r. n ∈[0,1], and calculate the state variables y of memristors M1 and M2 at time n. n z n The corresponding baseline output M 1，base (n), M 2，base (n). P n With r nThe comparison is performed, and the result determines whether an event-driven mechanism is triggered, thereby updating the outputs M1(n+1) and M2(n+1) of the dual memristors M1 and M2 on different branches. Specifically, when r... n <P n When, the event-driven mechanism is triggered; when r n >P n At this time, the event-driven mechanism is not triggered. Therefore, the obtained M1(n+1) and M2(n+1) are not updated at a fixed period, but are randomly determined according to the trigger probability, making the participation of the memristor branch intermittent and state-dependent. This breaks the complete determinism of the traditional fixed-step memristor update method, and makes the system have richer local evolution differences under the same parameter conditions. This solves the technical problem that the existing dual memristor uses fixed-step updates, which makes it difficult to capture the time-varying dynamic characteristics of "intermittent conduction-slow decay" caused by the random formation and collapse of the carrier channels of the real memristor, thus affecting the security of chaotic encryption.

[0022] 2. This invention introduces both pixel-level and number-level scrambling during the scrambling stage. Pixel-level scrambling generates an index through chaotic sequence sorting, globally rearranging pixel positions and directly disrupting the spatial structure and local correlations of the plaintext image. Number-level scrambling further disrupts the source of the numerical composition within pixel values ​​by expanding pixel values ​​into quaternary form and rearranging them again according to the same index. The synergistic effect of these two levels of scrambling simultaneously obfuscates the plaintext image at both the positional structure and pixel value composition levels, thereby effectively reducing the possibility of residual plaintext statistical features in the ciphertext.

[0023] 3. The diffusion stage of this invention employs a multi-round chain-like XOR diffusion structure. Each round of diffusion uses a key stream generated by different chaotic sequences, and introduces a chain-like dependency relationship of the previous output element within the same round. Therefore, a tiny change in any pixel in the plaintext will gradually propagate to subsequent pixels through chain-like diffusion, and be further amplified during multiple rounds of diffusion, making the ciphertext significantly sensitive to changes in the plaintext and effectively enhancing its resistance to differential attacks. Attached Figure Description

[0024] Figure 1 This is a structural diagram of the event-driven dual-memristor three-dimensional discrete chaotic system in Embodiment 1 of the present invention; Figure 2 This is a flowchart illustrating the generation of chaotic sequences in the event-driven dual-memristor three-dimensional discrete chaotic system in Embodiment 1 of the present invention. Figure 3 This is a flowchart of the event triggering module in the event-driven dual-memristor three-dimensional discrete chaotic system of Embodiment 1 of the present invention; Figure 4 This is a flowchart of the image encryption / decryption method in Embodiment 2 of the present invention; Figure 5 This is a flowchart of the second-level scrambling in the image encryption / decryption method example of Embodiment 2 of the present invention; Figure 6 This is a flowchart of the four rounds of diffusion to generate the key stream in the image encryption / decryption method example of Embodiment 2 of the present invention; Figure 7 This is a flowchart of the four rounds of diffusion in the image encryption / decryption method example of Embodiment 2 of the present invention; Figure 8 This is a plaintext image 1 in the image encryption / decryption method example of Embodiment 2 of the present invention; Figure 9 This is the plaintext image two in the image encryption / decryption method example of Embodiment 2 of the present invention; Figure 10 This is the plaintext image three in the example of the image encryption / decryption method in Embodiment 2 of the present invention; Figure 11 This is an example of an image encryption / decryption method in Embodiment 2 of the present invention; Figure 12 This is a plaintext image correlation histogram in the image encryption / decryption method example of Embodiment 2 of the present invention; Figure 13 This is the histogram of the correlation between encrypted images in the image encryption / decryption method example of Embodiment 2 of the present invention; Figure 14 This is a three-channel histogram of the plaintext image in the image encryption / decryption method example of Embodiment 2 of the present invention; Figure 15 This is a three-channel histogram of the encrypted image in the image encryption / decryption method example of Embodiment 2 of the present invention; Figure 16 Lyapunov exponent plot and system histogram for the E-LDMC system; Figure 17 The Lyapunov exponent diagram for the L-DMCS chaotic system; Figure 18 The bifurcation diagram of A and B parameters in the E-LDMC chaotic system; Figure 19 The coexisting attractor phase path diagram for the initial state (x0, y0, z0) = (0.6, 0.5, 0.01) in the E-LDMC chaotic system; Figure 20 The coexisting attractor phase path diagram for the initial state (x0, y0, z0) = (0.6, 0.3, 0.1) in the E-LDMC chaotic system; Figure 21 The coexisting attractor phase path diagram for the initial state (x0, y0, z0) = (0.6, 0.5, 0.1) in the E-LDMC chaotic system; Figure 22The coexisting attractor phase path diagram for the initial state (x0, y0, z0) = (0.6, 0.5, 0.14) in the E-LDMC chaotic system; Figure 23 The graph shows the spectral entropy complexity of a chaotic system without an event-triggered module. Figure 24 The C0 complexity graph for a chaotic system without an event-triggered module; Figure 25 Introducing an event-triggered module spectral entropy complexity graph into a chaotic system; Figure 26 Introducing an event-triggered module C0 complexity graph into a chaotic system; Figure 27 A photograph of the hardware implementation of the E-LDMC system. Detailed Implementation

[0025] The technical solutions in the embodiments of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0026] It should be noted that when a component is said to be "installed on" another component, it can be directly on the other component or it may be in a component that is centered on it. When a component is said to be "set on" another component, it can be directly set on the other component or it may also be in a component that is centered on it. When a component is said to be "fixed to" another component, it can be directly fixed to the other component or it may also be in a component that is centered on it.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "or / and" as used herein includes any and all combinations of one or more of the associated listed items.

[0028] Example 1 This embodiment introduces an event-driven dual-memristor three-dimensional discrete chaotic system (E-LDMC). It utilizes an enhanced Logistic mapping to provide the main dynamics, dual-memristor branches to provide nonlinear memory coupling, and an event-triggered mechanism to determine whether a memristor branch is activated at the current moment. Furthermore, it achieves an evolutionary pattern of "burst update – slow recovery" through volatile variables and a leakage process. The chaotic system includes a discrete chaotic module, a dual-memristor coupling module, an event-triggered control module, a volatile feedback and leakage module, and a coupling synthesis and state output module.

[0029] The discrete chaotic module is the core state update unit of the system, with the main variable x as the main variable. n As input, it is used to generate the basic evolutionary trend of the chaotic system at the current step by enhancing the Logistic nonlinear mapping. This module determines the basic chaotic skeleton of the chaotic system and serves as the platform for subsequent memristor coupling and event-driven mechanisms. Without introducing event triggering and dual memristor coupling, this module can be regarded as the basic time-driven version of the existing chaotic system. The module's functions include two aspects: first, providing the state variable x. n The first is to establish the nonlinear evolution basis; the second is to provide the current state reference for the event-triggered control module and the volatile feedback and leakage module, so that the trigger probability of events in the event-triggered control module and the feedback intensity in the volatile feedback and leakage module can adapt to the state of the chaotic system.

[0030] The dual-memristor coupling module consists of two parallel memristor branches, corresponding to an absolute value memristor M1 and a quadratic memristor M2, respectively. The two branches utilize the state variable y. n With z n The memristor output is generated and then participates in the coupled feedback of the master mapping. Since the two types of memristors have different nonlinear characteristics and memory properties, this module can enhance the nonlinear dimension and dynamic complexity of the system in different ways.

[0031] The event-triggered control module determines whether the dual-memristor coupled branch is activated at the current discrete moment. This module does not update at a fixed period but rather makes a random decision based on the trigger probability, thus making the participation of the memristor branch intermittent and state-dependent. This breaks the complete determinism of traditional fixed-step memristor updates, allowing the system to exhibit richer local evolutionary differences under the same parameter conditions. The event-triggered control module includes a volatile variable update submodule, a trigger rate calculation submodule, and a random decision submodule. The volatile variable update submodule updates the slow variable based on the current state variable, characterizing the internal activation level of the device. The trigger rate calculation submodule obtains the trigger rate at the current moment based on the volatile variable. The random decision submodule compares a uniformly random number with the trigger probability, thereby outputting a logical result of "triggered" or "not triggered" for this step.

[0032] The volatile feedback and leakage return module is used to maintain the gradual recovery behavior of the memristor output when not triggered, giving the system not only "burst conduction" characteristics but also "slow decay" characteristics. This module reflects the volatile memory effect of the memristor at the physical level and is the key difference between event-driven systems and ordinary time-driven discrete memristor systems. When the current step is not triggered, the memristor does not recalculate and replace it with a new baseline value. Instead, it uses the previous valid output as a starting point and gradually approaches the current baseline output under the control of the leakage return coefficient. Thus, the system forms a hybrid update mechanism of "rapid injection when triggered and slow decay when not triggered".

[0033] The coupling synthesis and state output module is used to unify and merge the "main chaotic mapping term" and the "memristor coupling component," outputting the three-dimensional state of the system at the next moment, providing input for the next round of event judgment and memristor baseline calculation. The two effective memristor outputs are combined under the action of the coupling strength parameter and superimposed with the output of the main chaotic mapping to finally generate the system state x at the next moment. n+1 Meanwhile, in the auxiliary state y n+1 z n+1 It also completes recursive updates based on the current master variable, thus forming a complete three-dimensional state closed loop.

[0034] This embodiment also provides a method for generating chaotic sequences based on an event-driven dual-memristor three-dimensional discrete chaotic system. Based on the aforementioned event-driven dual-memristor three-dimensional discrete chaotic system, this method uses the chaotic system to generate chaotic sequences, which exhibit higher complexity compared to chaotic sequences generated by a chaotic system without an added event-triggered control module. Specifically, at each discrete moment, the event-driven dual-memristor chaotic system completes one iteration according to a fixed logical order, such as... Figure 1 As shown, the state variable x n The state variable x at the next moment is obtained through the chaotic system in this embodiment. n+1 This embodiment updates from time n to time n+1. Please refer to [link / reference]. Figure 2 The specific steps of the chaotic sequence generation method are as follows: Step 1: Read the current state and internal variables of the discrete chaotic module and the dual memristor coupled module.

[0035] First, input the state variable x of the chaotic system at the current time (time n). n y n z n (Assume the initial values ​​of the chaotic system state variables at this moment are x0, y0, and z0, for example, (x0, y0, z0) = (0.6, 0.5, 0.01)), and the two valid memristor outputs M1(n) and M2(n) retained from the previous moment. Simultaneously, read the volatile variable ρ. n The random number r corresponding to the random seedn， r n ∈[0,1].

[0036] Wherein, uniform random number r n由 The chaotic sequence generated at time n-1 of the chaotic system is obtained by normalization. The current state variable determines not only the evolution trend of the discrete chaotic module, but also the baseline output of the two memristors and the trigger probability of this step.

[0037] Step 2: Optimize the effective output of the two memristors based on the event-driven module and the volatile feedback and leakage return module. The process is as follows: Figure 3 As shown, Figure 3 for Figure 1 The specific process of the event triggering mechanism in China.

[0038] Based on the state variable y at time n in the chaotic system n z n The baseline outputs M1 and M2 are obtained respectively. 1，base (n), M 2，base (n): ; In the formula, k is the internal control parameter of M1; Based on the volatile variable ρ at time n in the chaotic system n The trigger rate λ is obtained. n , by λ n Get the trigger probability P n : ; In the formula, λ0 is the reference trigger rate, and γ is the gain coefficient; The chaotic sequence generated by the chaotic system at time n-1 is normalized to obtain a uniform random number r. n ∈[0,1]; Where, when P n >r n When the event-driven mechanism is triggered, M1(n+1) and M2(n+1) are obtained as follows: ; When P n <r n When the event-driven mechanism is not triggered, M1(n+1) and M2(n+1) are obtained as follows: ; In the formula, leak is the leakage coefficient function.

[0039] Among them, the volatile variable ρ n Based on the state variable x at time n in the chaotic system n Updated to ρn+1 This is used to calculate the trigger rate λ at time n+1. n+1 : ; In the formula, c is x n The contribution coefficient to the triggered activation, τ is the decay coefficient.

[0040] Step 3: Based on the iterative results obtained from the coupled synthesis and state output modules, the state variables at multiple time points are combined into a chaotic sequence.

[0041] x n The main chaotic mapping term obtained after the discrete chaotic module is added to the memristor coupling term obtained by combining M1(n+1) and M2(n+1) according to the event-driven dual memristor output optimization method described above and multiplying by the coupling strength parameter, to obtain the state variable x at time n+1. n+1 According to x n+1 y was calculated n+1 z n+1 : ; In the formula, A is the Logistic control parameter, B is the dual memristor coupling strength, and M1(y) n ) represents the updated output of memristor M1 at time n, which is M1(n+1), M2(z) n ) represents the updated output of memristor M2 at time n, which is M2(n+1); The x obtained at time n will be updated n+1 y n+1 z n+1 ρ n+1 And M1(n+1) and M2(n+1) are used as inputs at time n+1. The above process is repeated to complete n iterations and updates, resulting in three original chaotic sequences {x}. n x n+1 , ..., x 2n}、{y n y n+1 , ..., y 2n}、{z n , z n+1 ,…,z 2n}; Discard the transient states of the first t terms in each chaotic sequence, and output the subsequent steady-state segments of length L from each original chaotic sequence to obtain three steady-state chaotic sequences {x}. t x t+1 , ..., x t+L-1}、{y t y t+1 , ..., y t+L-1}、{z t, z t+1 ,…,z t+L-1}

[0042] Furthermore, the three original chaotic sequences {x n x n+1 , ..., x 2n}、{y n y n+1 , ..., y 2n}、{z n , z n+1 ,…,z 2n Discard the transient states of the first t terms in the original chaotic sequence and output the subsequent steady-state segments of length L in any original chaotic sequence to generate multiple steady-state chaotic sequences.

[0043] To ensure that the system in this embodiment can obtain the same chaotic sequence, the following fixed parameters are used: Where A = -0.3, as the enhanced Logistic master mapping parameter; B = 1.7, as the memristor coupling strength, used to determine the dual memristor coupling weight; k = 2.0, as the internal control parameter of the absolute value memristor M1; λ0 = 0.06, as the baseline trigger rate; γ = 2, as the trigger gain coefficient, used to define the exponential modulation strength of the volatile variable on the trigger rate; c = 0.7, as the volatile excitation coefficient; τ = 35, the volatile decay constant; leak1 = leak2 = 0.06, as the variable values ​​of the leakage return coefficient function. Meanwhile, the chaotic system in this embodiment includes at least the following key materials: initial values ​​(x0, y0, z0, ρ0) and random numbers r generated by the random source Seed. n ; Parameter set (A, B, k, λ) 0、 γ, c, τ, leak1, leak2) can also be written as system configuration parameters into the key or into the system configuration file, so that multiple steady-state chaotic sequences can be generated when the parameters remain the same in this embodiment.

[0044] It should contain at least the following key materials: initial value and random source seed; the parameter set can also be written into the key or into the system configuration file as system configuration parameters. It should be noted that the chaotic system in this embodiment uses a continuous-time charge-controlled memristor model, the expression of which is as follows: ; The expression of the continuous-time charge-controlled memristor model is discretized using forward Euler discretization to obtain a discrete form; ; In Example 1, two types of discrete memristor models are used: absolute value memristor M1 and quadratic memristor M2. Their expressions are shown below: ; ; In the formula, k is the internal control parameter of the absolute value memristor. In Example 1, σ1 is fixed at 0.2 and σ2 is fixed at -0.5.

[0045] To verify the memristor hysteresis characteristics, a sinusoidal excitation current was used for driving: ; In the formula, A represents the amplitude, and ω represents the frequency. The two memristor outputs provide a significant nonlinear mapping relationship, providing a nonlinear perturbation source for the subsequent chaotic sequence.

[0046] Example 2 This embodiment 2 implements an image encryption and decryption method based on the chaotic sequence generation method of an event-driven dual-memristor three-dimensional discrete chaotic system introduced in embodiment 1. This effectively reduces the possibility of residual plaintext statistical features in the ciphertext and enhances the resistance to differential attacks. The image encryption and decryption method includes a preprocessing module, a chaotic sequence generation module, a two-level scrambling module, a multi-sub-multi-round diffusion module, and a ciphertext image reconstruction module.

[0047] The preprocessing module is used to initially organize the input color plaintext image. Specifically, it first splits the input color image into three independent channels: R, G, and B, so that subsequent scrambling and diffusion operations can be performed on them respectively. At the same time, the two-dimensional matrix of each channel is flattened into a one-dimensional pixel vector by column or row, and the image size parameters H and W and the total length L=H×W are recorded. The function of this module is to transform the original image into a data format suitable for chaotic index mapping and chain diffusion processing, thereby providing a unified input for subsequent modules.

[0048] The chaotic sequence generation module generates pseudo-random driving sequences for subsequent scrambling and diffusion based on the key material. Its inputs include the control parameters, initial state, and random seed of the E-LDMC in Example 1; its outputs include a chaotic sequence for generating the scrambling index and multiple independent chaotic keystream sequences for multiple rounds of diffusion. According to the paper, the system can reconstruct consistent chaotic sequences under the same parameters and seed, ensuring the reversibility of the encryption and decryption process. Simultaneously, multiple independent seeds drive the E-LDMC to generate multiple decorrelated sequences for subsequent rounds of diffusion. This is the sequence generated by the chaotic system designed in the previous example. The chaotic sequence generation module includes a scrambling sequence generation submodule, a diffusion sequence generation submodule, and a sequence normalization and quantization submodule. The scrambling sequence generation submodule generates the chaotic driving sequences required for the scrambling index. The diffusion sequence generation submodule generates the keystreams corresponding to the first to nth rounds of diffusion. The sequence normalization and quantization submodule maps continuous or real-valued chaotic sequences to scrambling indices and byte-level diffusion key material.

[0049] The two-level scrambling module is used to destroy the original spatial correlation between image pixels and is the first core transformation module of the encryption end of this invention. This module is not a single scrambling operation, but consists of two levels.

[0050] The first layer is a pixel-level scrambling submodule. This submodule uses the position index obtained after sorting the chaotic sequence to rearrange the positions of the flattened pixel vectors, thereby disrupting the macroscopic spatial structure of the original image.

[0051] The second layer is a base expansion and re-scrambling submodule. This submodule further decomposes the pixel values ​​scrambled in the first layer into multi-base bit groups, which corresponds to quaternion expansion in your paper's current implementation. Then, it rearranges these bit groups using the same or corresponding scrambling indices, and finally reassembles them back into the byte field. The paper clearly states that the scrambled pixel values ​​are decomposed into base-4 numbers and rearranged again at the numerical level, thereby further expanding the scrambling space and enhancing the obfuscation effect without increasing the complexity of inverse operations.

[0052] The multi-round diffusion module further modifies pixel values ​​after the initial scrambling, rapidly amplifying minute changes in the plaintext within the ciphertext. Based on the algorithm design in the paper, this module uses multiple independent seeds to drive E-LDMC to generate multiple diffusion keystreams, and performs chain diffusion round by round on the scrambling results. The multi-round diffusion module includes a round keystream generation submodule, a chain diffusion submodule, and a multi-round iteration submodule. The round keystream generation submodule generates the sequence required for the r-th round of diffusion based on the r-th seed. The chain diffusion submodule updates the result according to the chain relationship between the previous ciphertext element, the current keystream element, and the current data element; the algorithm is included in the pseudocode, including the formulas. The multi-round iteration submodule completes continuous diffusion from round 1 to round n. Each round's current ciphertext depends not only on the current keystream but also on the previous ciphertext element, thus significantly enhancing the avalanche effect and resistance to differential attacks.

[0053] The encrypted image reconstruction module is used to restore the results of each channel after multiple rounds of diffusion into a two-dimensional matrix and recombine them into the final color encrypted image.

[0054] This embodiment also provides an image encryption / decryption method, please refer to [link / reference]. Figure 3 The image encryption method specifically includes the following steps: Step 1, Input a color plaintext image The three-channel RGB image is split into three independent matrix blocks: R, G, and B. The two-dimensional matrix of each matrix block is flattened into a one-dimensional pixel vector C by column or row, and the image size parameters H and W and the total length L are recorded, where L is the product of H and W.

[0055] Step 2, for the multiple steady-state chaotic sequences {x} obtained by the chaotic sequence generation method described above. t x t+1 , ..., x t+L-1 After normalization, quantization, and integerization, r chaotic sequences Z are obtained. r (1:L), and r=1,2,…,n.

[0056] Z r Any chaotic sequence S in (1:L) x (1:L) is sorted to obtain the index P = argsort(S X The pixel vector C is scrambled pixel-level using the scrambling index P; the scrambled vector is then expanded into a quaternary matrix BS; BS is further scrambled numerically using the scrambling index P, and the scrambled vector is then reassembled to obtain the scrambled vector ID. （1） .

[0057] The formula for scrambling the pixel vector C at the pixel level is: ; In the formula, C(P(i)) is the pixel value at the i-th position in the original pixel vector, C P (i) represents the i-th position of the scrambled vector after introducing the scrambled index P.

[0058] The quaternion expansion involves splitting an 8-bit pixel into four 2-bit numbers, as shown in the following formula: ; Set each pixel value v=C P (i)∈[0,255] according to: Represent four quaternion numbers taking values ​​{0, 1, 2, 3}, forming a matrix BS. .

[0059] The formula for digital-level scrambling of BS is: ; In the formula, IP(i,:) represents the i-th row of the quaternary matrix IP after digital scrambling, and BS(P(i),:) represents taking the i-th row from the pixel-level scrambling matrix BS.

[0060] Reassemble the four 2-bit numbers into an 8-bit array and output the scrambling vector ID. （1） The formula is: .

[0061] Step 3, for the remaining chaotic sequence Z r(1:L) Perform diffusion from round 1 to round r; where each round will yield a key stream, and the scrambled vector ID will be... （1） Introduced, and chained XOR diffusion is performed together with each key stream.

[0062] The formula for calculating the key stream in each round is as follows: ; In the formula, α is used to amplify the fractional differences of continuous sequences and map them to 0-255; Diffusion introduces a dependency on the previous ciphertext: ; In the formula, IA （0） For scrambling vector ID （1） .

[0063] It should be noted that the i-th output depends not only on the current input. With key stream It also depends on the output of the previous position in the same round. Therefore, when any pixel in the plaintext changes, it will propagate along the vector direction through a chain relationship and affect multiple subsequent elements; when the number of diffusion rounds increases to n rounds, this effect will be repeatedly superimposed and amplified, thereby achieving a more complete diffusion result.

[0064] Step 4: After all diffusion rounds are completed, the final ciphertext vectors obtained from each channel are restored to a two-dimensional matrix, and the R, G, and B channels are recombined to output the final color ciphertext image.

[0065] The formula for rearranging the output ciphertext vector to its original size is as follows: .

[0066] To facilitate understanding of the encryption method in Example 2, the following example is provided: Take the test image baboon as input A, let L=25, and generate the scrambling index P and scrambling vector ID according to the encryption method described above. （1） Then, taking the diffusion round number r=4, four rounds of key streams are generated from Z1, Z2, Z3, and Z4 respectively, and the four-round chained XOR diffusion is completed according to the encryption method described above (e.g. Figure 4 The diagram shows a scrambling flowchart with four rounds of diffusion in quaternary form. Figure 5 The diagram shown is a flowchart of an example of chaotic sequence generation. Figure 6 The flowchart shown is for its diffusion process, which yields the ciphertext vector and reconstructs it into a ciphertext block. Three 512*512 images are used for testing: plaintext image one, plaintext image two, and plaintext image three. Figures 7 to 9 As shown, it is obtained through encryption as follows Figure 10The encrypted image is then decrypted to obtain decrypted images 1, 2, and 3, which contain the same content as plaintext images 1, 2, and 3. Information entropy, differential attack, histogram, and correlation analysis are then performed on the encrypted images. (See Tables 1 and 2.) Figures 11 to 14 It is evident that the quality of the encrypted images is close to the theoretical value (the theoretical value of information entropy is 8), the theoretical value of NPCR (Number of Pixels Change Rate) is 99.61%, and the theoretical value of UACI (Unified Average Changing Intensity) is 33.46%, demonstrating excellent encryption performance.

[0067] Table 1 Information Entropy picture R-channel entropy G-channel entropy B-channel entropy Baboon 7.9992 7.9994 7.9994 fruits 7.9994 7.9992 7.9994 peppers 7.9993 7.9994 7.9992 Table 2 Differential Attacks picture NPCR UACI Baboon 99.6127 33.4650 fruits 99.6002 33.4588 peppers 99.6128 33.4625 The image decryption method specifically includes the following steps: Step R1: Input the encrypted image, using the same system parameters and seed as in the image encryption method, to obtain the same S. x (1:L) and Z r (1:L).

[0068] Step R2 involves splitting and vectorizing the ciphertext image into three channels: R, G, and B, and converting them into data vectors in the same form as those used in image encryption methods.

[0069] Step R3: Regenerate the diffusion key streams for each round and perform reverse diffusion in reverse order; first restore the data before the last round of diffusion, then restore the previous round, the first two rounds in sequence, until an intermediate result is obtained that has been scrambled but not yet descrambled. Step R4: Perform reverse two-level scrambling; first undo the numeric level scrambling, then undo the pixel level scrambling, gradually restoring the original arrangement order of the channels; Step R5: Restore the three channels after inverse scrambling to two-dimensional matrices respectively, and combine them to output the final decrypted image, which is the plaintext image.

[0070] It should be noted that the decryption process of this invention relies on two points: the reproducibility of the index and the reversibility of the chained operation. (1) The scrambled index is essentially a normalized sorted chaotic sequence. Under the same seed and parameter set, the index can be reproduced, and thus the inverse scrambled mapping can be constructed to achieve pixel-level and numerical-level inverse recovery.

[0071] (2) Diffusion uses bitwise XOR operation, and XOR satisfies the self-reversible property; at the same time, each item in the chain relationship From the previous item Therefore, during decryption, as long as the input vectors of each round are followed in a predetermined order and the same keystream is used, the decryption can be reversed to obtain the final input vector. Then regarding the ID （1） The original plaintext image can be restored by performing a reverse scrambling operation.

[0072] Example 3 To test the chaotic performance of the chaotic sequence, its dynamic characteristics will be analyzed, including bifurcation diagrams, Lyapunov exponential phase paths, two-parameter bifurcation diagrams, and complexity. Furthermore, it will be compared with a three-dimensional chaotic system without an event-triggered mechanism in terms of Lyapunov exponential complexity, spectral entropy complexity, and C0 complexity.

[0073] First, adjust the system control parameters and draw a bifurcation diagram as follows: Figure 15 As shown, the proposed system exhibits a continuous and dense bifurcation structure over a wide parameter range, and the system state shows obvious aperiodicity and irregularity with parameter changes. Figure 16 As shown, compared with a three-dimensional chaotic system without an event-triggered mechanism, the system described in this invention has a wider range of parameters for entering a chaotic state and a significantly reduced periodic window, indicating that the event-triggered mechanism helps to enhance the overall stability of the system's chaotic behavior.

[0074] Secondly, Lyapunov exponent analysis was performed on the system. Experimental results show that, under the same parameter conditions, the maximum Lyapunov exponent of the system of this invention always remains positive, and its value is generally higher than that of the comparative system without the introduction of an event triggering mechanism, indicating that the generated sequence has a stronger sensitivity to initial conditions. Simultaneously, the multidimensional Lyapunov exponent spectrum distribution is more balanced, reflecting that the system exhibits strong divergence characteristics in multiple state dimensions, which is beneficial to improving the unpredictability of the sequence, and also optimizes the chaotic performance of the introduced one-dimensional chaotic mapping.

[0075] Please see Figure 17 The bifurcation diagram of the system in the A–B parameter plane is presented. Different colors in the diagram correspond to periodic, quasi-periodic, chaotic, hyperchaotic, and unbounded states, respectively. It can be seen that a chaotic band is formed in the two-dimensional parameter space, distributed from the upper left to the lower right. It is clearly observed from the diagram that as B increases, the chaotic band widens significantly, the periodic region gradually shrinks, and is eventually almost completely replaced by chaotic and hyperchaotic regions within a strong coupling range. Simultaneously, the hyperchaotic region gradually evolves from a scattered distribution into a continuous banded structure, indicating that the system is more likely to simultaneously satisfy the exponential divergence conditions in two directions under greater coupling strength, i.e., stronger chaotic performance.

[0076] Furthermore, analysis of the phase trajectory diagram reveals that the phase trajectory distribution of the system of this invention is more complex and dense, with no obvious closed trajectories or regular structures. This indicates that the event-triggered mechanism continuously introduces disturbances during the system's evolution, making it difficult for the system state to fall into low-dimensional periodic motion, thus maintaining high dynamic complexity, while also exhibiting coexisting attractor phenomena such as... Figures 18 to 21 As shown.

[0077] Regarding sequence complexity, spectral entropy complexity and C0 complexity were compared and analyzed. Experimental results are presented by... Figures 22 to 25 The results show that the chaotic sequences generated by the system of this invention achieve higher values ​​in the aforementioned complexity metrics and maintain good stability with parameter changes. In contrast, the system without an event triggering mechanism shows a significant decrease in complexity within certain parameter ranges, indicating that its sequence structure still possesses a certain degree of predictability.

[0078] In summary, through comprehensive analysis of bifurcation characteristics, Lyapunov exponents, phase trajectory structure, and complexity indices, it can be confirmed that the event-driven dual-memristor three-dimensional chaotic system employed in this invention outperforms the comparative systems in terms of dynamic performance. This system can generate chaotic sequences with higher levels of chaos, stronger randomness, and more complex structures, providing a high-quality key sequence foundation for the scrambling and diffusion processes in subsequent image encryption. Meanwhile, the hardware of the E-LDMC system, such as... Figure 26 As shown.

[0079] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0080] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. An event-driven dual-memristor output optimization method, comprising: Based on the state variable y at time n in the chaotic system n z n The outputs of the dual memristors M1 and M2 at time n are the baseline output M. 1，base (n), M 2，base (n): ； In the formula, k is the internal control parameter of M1; Its characteristic is that, based on the volatile variable ρ at time n in the chaotic system n The trigger rate λ is obtained. n , by λ n Get the trigger probability P n : ； In the formula, λ0 is the reference trigger rate, and γ is the gain coefficient; The chaotic sequence generated by the chaotic system at time n-1 is normalized to obtain a uniform random number r. n r n ∈[0,1]; Where, when P n >r n When the event-driven mechanism is triggered, the outputs M1(n+1) and M2(n+1) of the dual memristors M1 and M2 at time n+1 remain the baseline outputs M1(n+1) and M2(n+1). 1，base (n), M 2，base (n): ； When P n <r n When the event-driven mechanism is not triggered, the outputs M1(n+1) and M2(n+1) of the dual memristors M1 and M2 at time n+1 are: ； In the formula, leak is the leakage coefficient function.

2. The dual memristor output optimization method according to claim 1, characterized in that, Volatile variable ρ n Based on the state variable x at time n in the chaotic system n Updated to ρ n+1 , ρ n+1 Used to calculate the trigger rate λ at time n+1. n+1 : ； In the formula, c is x n The contribution coefficient to the triggered activation, τ is the decay coefficient.

3. A chaotic sequence generation method based on an event-driven dual-memristor three-dimensional discrete chaotic system, wherein x is obtained by coupling the memristor coupling terms obtained from the dual-memristor outputs M1(n+1) and M2(n+1) with the output terms of the discrete chaotic module. n+1 Its characteristics are, M1(n+1) and M2(n+1) are M1(n+1) and M2(n+1) in the event-driven dual memristor output optimization method as described in claim 1.

4. The chaotic sequence generation method according to claim 3, characterized in that, Methods for generating chaotic sequences include: x n The main chaotic mapping term obtained after the discrete chaotic module is added to the memristor coupling terms obtained according to M1(n+1) and M2(n+1) in the event-driven dual memristor output optimization method as described in claim 1 to obtain the state variable x at time n+1. n+1 ; ； In the formula, A is the Logistic control parameter, B is the dual memristor coupling strength, and M1(y) is the variable coupling strength. n The expression represents the output of memristor M1 at time n+1, which is M1(n+1) and M2(z). n ) represents the output of memristor M2 at time n+1, which is M2(n+1); According to x n+1 y was calculated n+1 z n+1 : ； The x obtained at time n will be updated n+1 y n+1 z n+1 ρ n+1 And M1(n+1) and M2(n+1) are used as inputs at time n+1. The above process is repeated to complete n iterations and updates, resulting in three original chaotic sequences {x}. n x n+1 , ..., x 2n }、{y n y n+1 , ..., y 2n }、{z n , z n+1 ,…,z 2n }; Discard the transient states of the first t terms in each chaotic sequence, and output the subsequent steady-state segments of length L from each original chaotic sequence to obtain three steady-state chaotic sequences {x}. t x t+1 , ..., x t+L-1 }、{y t y t+1 , ..., y t+L-1 }、{z t , z t+1 ,…,z t+L-1 }; And / or, the three original chaotic sequences {x n x n+1 , ..., x 2n }、{y n y n+1 , ..., y 2n }、{z n , z n+1 ,…,z 2n The transient states of the first t terms in the sequence are discarded, and the subsequent steady-state segments of length L in any original chaotic sequence are output, generating multiple steady-state chaotic sequences.

5. An image encryption and decryption method based on event-driven dual-memristor three-dimensional discrete chaotic sequences, which uses multiple steady-state chaotic sequences as scrambling indices and diffusion key streams respectively, characterized in that, The multiple steady-state chaotic sequences used are the multiple steady-state chaotic sequences obtained by the chaotic sequence generation method described in claim 4.

6. The image encryption / decryption method according to claim 5, characterized in that, Image encryption methods include: Step 1, Input a color plaintext image The three-channel RGB image is split into three independent matrix blocks: R, G, and B. The two-dimensional matrix of each matrix block is flattened into a one-dimensional pixel vector C by column or row, and the image size parameters H and W and the total length L are recorded, where L is the product of H and W. Step 2: Normalize, quantize, and integerize the multiple steady-state chaotic sequences obtained by the chaotic sequence generation method as described in claim 4 to obtain r chaotic sequences Z. r (1:L), and r=1,2,…,n; Z r Any chaotic sequence S in (1:L) x (1:L) is sorted to obtain the index P = argsort(S X The pixel vector C is scrambled pixel-level using the scrambling index P; the scrambled vector is then expanded into a quaternary matrix BS; BS is further scrambled numerically using the scrambling index P, and the scrambled vector is then reassembled to obtain the scrambled vector ID. （1） ; Step 3, for the remaining chaotic sequence Z r (1:L) Perform diffusion from round 1 to round r; where each round will yield a key stream, and the scrambled vector ID will be... （1） Introduced, and chained XOR diffusion is performed together with each key stream; Step 4: After all diffusion rounds are completed, the final ciphertext vectors obtained from each channel are restored to a two-dimensional matrix, and the R, G, and B channels are recombined to output the final color ciphertext image.

7. The image encryption / decryption method according to claim 6, characterized in that, In step 2, the formula for pixel-level scrambling of pixel vector C is: ； In the formula, C(P(i)) is the pixel value at the i-th position in the original pixel vector, C P (i) represents the i-th position of the scrambled vector after introducing the scrambled index P; Alternatively, the quaternion expansion can be achieved by splitting an 8-bit pixel into four 2-bit numbers, as shown in the following formula: ； Set each pixel value v=C P (i)∈[0,255] according to: Represent four quaternion numbers taking values ​​{0, 1, 2, 3}, forming a matrix BS. .

8. The image encryption / decryption method according to claim 7, characterized in that, In step 2, the formula for digital-level scrambling of BS is: ； In the formula, IP(i,:) represents the i-th row of the quaternary matrix IP after digital scrambling, and BS(P(i),:) represents taking the i-th row from the pixel-level scrambling matrix BS; Alternatively, reassemble the four 2-bit numbers into an 8-bit array and output the scrambling vector ID. （1） The formula is: 。 9. The image encryption / decryption method according to claim 8, characterized in that, In step 3, the formula for calculating the key stream in each round is: ； In the formula, α is used to amplify the fractional differences of continuous sequences and map them to 0-255; Diffusion introduces a dependency on the previous ciphertext: ； In the formula, IA （0） For scrambling vector ID （1） .

10. The image encryption / decryption method according to claim 9, characterized in that, Image decryption methods include: Step R1: Input the encrypted image, using the same S generated in the image encryption method. x (1:L) and Z r (1:L); Step R2 involves splitting and vectorizing the ciphertext image into three channels: R, G, and B, and converting them into data vectors in the same form as those used in image encryption methods. Step R3: Regenerate the diffusion key streams for each round and perform reverse diffusion in reverse order; first restore the data before the last round of diffusion, then restore the previous round, the first two rounds in sequence, until an intermediate result is obtained that has been scrambled but not yet descrambled. Step R4: Perform reverse two-level scrambling; first undo the numeric level scrambling, then undo the pixel level scrambling, gradually restoring the original arrangement order of the channels; Step R5: Restore the three channels after inverse scrambling to two-dimensional matrices respectively, and combine them to output the final decrypted image, which is the plaintext image.

Images