Display substrate, display device and high-precision metal mask plate

Abstract

This disclosure provides a display substrate, a display device, and a high-precision metal mask. The display substrate includes: a first sub-pixel, a second sub-pixel, and a third sub-pixel; in a first direction, the first and third sub-pixels are alternately arranged to form a first sub-pixel row, and the second sub-pixel forms a second sub-pixel row; in a second direction, the first and second sub-pixel rows are alternately arranged, and the first and second directions are substantially perpendicular; two first sub-pixels and two third sub-pixels distributed in adjacent rows and columns of the first sub-pixel row form a 2*2 matrix, in which the two first sub-pixels are located in different rows and columns, the two third sub-pixels are located in different rows and columns, and the second sub-pixel is located within the area enclosed by the 2*2 matrix. This disclosure can improve the display effect.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a display substrate, a display device, and a high-precision metal mask. Background Technology

[0002] An organic light-emitting diode (OLED) display device structure includes a substrate, a light-emitting layer, and a protective encapsulation layer. The light-emitting layer comprises subpixels arranged in a matrix on the substrate. Each subpixel typically has organic light-emitting material deposited onto its corresponding subpixel position on the array substrate using a fine metal mask (FMM). With societal progress, the demands for display device resolution are constantly increasing.

[0003] Currently, due to limitations in the manufacturing capabilities of high-precision metal photomasks and the accuracy of vapor deposition processes, it is difficult to increase high resolution by reducing subpixel size and pixel pitch. The commonly used method is Sub-Pixel Rendering (SPR) technology, which utilizes the sharing of subpixels at certain locations between different pixels to simulate higher resolution with a relatively small number of subpixels. However, existing pixel arrangement structures often have unevenly distributed virtual pixel brightness centers, inevitably leading to graininess and distortion when displaying certain text and graphics. Summary of the Invention

[0004] In view of this, the present disclosure provides a display substrate, a display device, and a high-precision metal mask to solve the problem of uneven virtual pixel brightness center arrangement in existing pixel arrangement structures, which leads to graininess and distortion in the display.

[0005] To solve the above-mentioned technical problems, the present disclosure adopts the following technical solution:

[0006] In a first aspect, embodiments of the present disclosure provide a display substrate, including: a first sub-pixel, a second sub-pixel, and a third sub-pixel;

[0007] In a first direction, the first sub-pixel and the third sub-pixel are arranged alternately to form a first sub-pixel row, and the second sub-pixel forms a second sub-pixel row;

[0008] In the second direction, the first sub-pixel row and the second sub-pixel row are arranged alternately, and the first direction and the second direction are approximately perpendicular.

[0009] Two first sub-pixels and two third sub-pixels distributed in two adjacent rows and two columns of the first sub-pixel row form a 2*2 matrix. In the 2*2 matrix, the two first sub-pixels are located in different rows and different columns, the two third sub-pixels are located in different rows and different columns, and the second sub-pixel is located within the area enclosed by the 2*2 matrix.

[0010] In the first direction, the centers of the first sub-pixel and the third sub-pixel are on a straight line. In the second direction, the line connecting the centers of two adjacent first sub-pixels does not pass through the center of the third sub-pixel between the two adjacent first sub-pixels, and / or, the line connecting the centers of two adjacent third sub-pixels does not pass through the center of the first sub-pixel between the two adjacent third sub-pixels.

[0011] The nearest distance between the second sub-pixel located within the area enclosed by the 2*2 matrix and the boundary of the two adjacent first sub-pixels is equal; the nearest distance between the second sub-pixel located within the area enclosed by the 2*2 matrix and the boundary of the two adjacent third sub-pixels is equal.

[0012] In the 2*2 matrix, the ratio of the distances from the center of the first sub-pixel and the center of the third sub-pixel to the center of the second sub-pixel enclosed by the 2*2 matrix ranges from 0.7 to 1.3.

[0013] Optionally, in the second direction, the line connecting the centers of two adjacent first sub-pixels passes through the third sub-pixel between the two adjacent first sub-pixels, but does not pass through the center of the third sub-pixel between the two adjacent first sub-pixels;

[0014] And / or, in the second direction, the line connecting the centers of two adjacent third sub-pixels passes through the first sub-pixel between the two adjacent third sub-pixels, but does not pass through the center of the first sub-pixel between the two adjacent third sub-pixels.

[0015] Optionally, the centers of the first sub-pixels located in the same row are on a straight line parallel to the row direction, and the centers of the first sub-pixels located in the same column are on a straight line parallel to the column direction.

[0016] And / or, the center of the third sub-pixel located in the same row is on a straight line parallel to the row direction, and the center of the third sub-pixel located in the same column is on a straight line parallel to the column direction.

[0017] Optionally, the shape formed by connecting the centers of two first sub-pixels and two third sub-pixels in the 2*2 matrix is ​​a trapezoid.

[0018] Optionally, the range of all interior angles of the graphic formed by the center lines connecting the two first sub-pixels and the two third sub-pixels in the 2*2 matrix is ​​70° to 120°.

[0019] Optionally, the interior angles of the figure include at least one obtuse angle or at least one acute angle.

[0020] Optionally, two first sub-pixels and two third sub-pixels in the 2*2 matrix surround a second sub-pixel, and the nearest distance from other first sub-pixels and third sub-pixels outside the 2*2 matrix to the second sub-pixel surrounded by the 2*2 matrix is ​​greater than the nearest distance from two first sub-pixels and two third sub-pixels in the 2*2 matrix to the second sub-pixel surrounded by the 2*2 matrix.

[0021] Optionally, the vertical distance from the boundary of the second sub-pixel enclosed by the 2*2 matrix to the center of the second sub-pixel is the same for two first sub-pixels in the 2*2 matrix.

[0022] And / or,

[0023] The vertical distance from the boundary of the second sub-pixel enclosed by the 2*2 matrix to the center of the second sub-pixel is the same for two third sub-pixels in the 2*2 matrix.

[0024] And / or,

[0025] The vertical distance from the boundary of the first sub-pixel in the 2x2 matrix to the center of the second sub-pixel is the same as the vertical distance from the boundary of the third sub-pixel in the 2x2 matrix to the center of the second sub-pixel.

[0026] Optionally, the distance between the center of the second sub-pixel enclosed by the 2*2 matrix and the center of the two third sub-pixels in the 2*2 matrix is ​​not equal, while the distance between the center of the second sub-pixel enclosed by the 2*2 matrix and the center of the two first sub-pixels in the 2*2 matrix is ​​equal.

[0027] Alternatively, the center of the second sub-pixel enclosed by the 2*2 matrix is ​​equidistant from the center of the two third sub-pixels in the 2*2 matrix, and the center of the second sub-pixel enclosed by the 2*2 matrix is ​​equidistant from the center of the two first sub-pixels in the 2*2 matrix.

[0028] Alternatively, the center of the second sub-pixel enclosed by the 2*2 matrix is ​​equidistant from the center of the two third sub-pixels in the 2*2 matrix, while the center of the second sub-pixel enclosed by the 2*2 matrix is ​​not equidistant from the center of the two first sub-pixels in the 2*2 matrix.

[0029] Optionally, the distance between the center of the two first sub-pixels and the center of the two third sub-pixels in the 2*2 matrix and the center of the second sub-pixel enclosed by the 2*2 matrix ranges from 20 to 60 μm.

[0030] Optionally, the line connecting the centers of two first sub-pixels and two third sub-pixels in the 2*2 matrix forms a non-square virtual quadrilateral.

[0031] Optionally, 16 virtual quadrilaterals arranged in an array form a virtual polygon, with each virtual quadrilateral having the same number of interior angles.

[0032] Alternatively, four virtual quadrilaterals arranged in an array form a virtual polygon, which contains two types of virtual quadrilaterals, with the interior angles of the two diagonally opposite virtual quadrilaterals being assigned the same value.

[0033] Alternatively, four virtual quadrilaterals arranged in an array form a virtual polygon, which contains three types of virtual quadrilaterals, wherein the interior angles of two opposite virtual quadrilaterals are assigned the same.

[0034] Optionally, the lines connecting the centers of the four first sub-pixels surrounding each first sub-pixel form a square, the center of the central first sub-pixel is located at the center of the square, and the two first sub-pixels on the diagonal are symmetrical about the center of the central first sub-pixel;

[0035] And / or, the lines connecting the centers of the four third sub-pixels surrounding each third sub-pixel form a square, the center of the central third sub-pixel is located at the center of the square, and the two third sub-pixels on the diagonals are symmetrical about the central third sub-pixel.

[0036] Optionally, the line connecting the centers of the four third sub-pixels surrounding each first sub-pixel forms a virtual quadrilateral, wherein the diagonal third sub-pixels in the virtual quadrilateral are symmetrical about the center of the first sub-pixel;

[0037] And / or, the lines connecting the centers of the four first sub-pixels surrounding each third sub-pixel form a virtual quadrilateral, wherein the first sub-pixels at opposite corners of the virtual quadrilateral are symmetrical about the center of the third sub-pixel.

[0038] Optionally, the total aperture areas of the third sub-pixel, the second sub-pixel, and the first sub-pixel decrease sequentially, with the total aperture area of ​​the first sub-pixel being x, the total aperture area of ​​the second sub-pixel being a*x / 2, and the total aperture area of ​​the third sub-pixel being b*x, where 0.5 ≤ a ≤ 0.8, 1 <b≤2.2。

[0039] Optionally, the first sub-pixel is a red sub-pixel, the second sub-pixel is a green sub-pixel, and the third sub-pixel is a blue sub-pixel.

[0040] Secondly, embodiments of this disclosure provide a display device including the display substrate described in the first aspect above.

[0041] Optionally, the display device further includes a pixel defining layer, the pixel defining layer including a plurality of pixel defining layer openings, each of the first sub-pixels, each of the second sub-pixels, and each of the third sub-pixels respectively corresponding to a pixel defining layer opening, the shapes of the first sub-pixels, the second sub-pixels, and the third sub-pixels being approximately the same as the shapes of the openings of their corresponding pixel defining layers.

[0042] Optionally, the first sub-pixel includes multiple film layers, and the multiple film layers of the first sub-pixel at least partially cover the area outside the pixel defining layer opening; and / or, the second sub-pixel includes multiple film layers, and the multiple film layers of the second sub-pixel at least partially cover the area outside the pixel defining layer opening; and / or, the third sub-pixel includes multiple film layers, and the multiple film layers of the third sub-pixel at least partially cover the area outside the pixel defining layer opening.

[0043] Optionally, the openings in the pixel defining layer may have at least a partially different shape and / or area.

[0044] Optionally, the pixel-defining layer openings corresponding to the first or third sub-pixel have at least a partial difference in shape and / or area.

[0045] Thirdly, embodiments of this disclosure provide a high-precision metal mask for fabricating the display substrate described in the first aspect above. The first sub-pixel includes multiple film layers, the second sub-pixel includes multiple film layers, and the third sub-pixel includes multiple film layers. The mask includes a plurality of opening regions, including a first opening region corresponding to the shape and distribution of at least one film layer in the first sub-pixel, or a second opening region corresponding to the shape and distribution of at least one film layer in the second sub-pixel, or a third opening region corresponding to the shape and distribution of at least one film layer in the third sub-pixel.

[0046] The beneficial effects of the above-mentioned technical solution disclosed herein are as follows:

[0047] In this embodiment, on the one hand, higher resolution can be achieved by sharing sub-pixels; on the other hand, the pixel arrangement design makes the brightness center of the virtual pixels more uniform, avoiding graininess and distortion in the display and improving the display effect. Furthermore, the brightness center of the virtual pixels can be shifted without moving the sub-pixels, resulting in lower implementation costs. Attached Figure Description

[0048] Figure 1 This is a schematic diagram of the pixel arrangement structure in related technologies;

[0049] Figure 2 and Figure 3 This is a schematic diagram of a display substrate according to an embodiment of the present disclosure;

[0050] Figure 4 This is a schematic diagram of the display substrate according to Embodiment 1 of this disclosure;

[0051] Figure 5 This is a schematic diagram of the display substrate according to Embodiment 2 of this disclosure;

[0052] Figure 6 This is a schematic diagram of the display substrate according to Embodiment 3 of this disclosure;

[0053] Figure 7 This is a schematic diagram of the cross-sectional structure of the display substrate according to an embodiment of the present disclosure. Detailed Implementation

[0054] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure are within the scope of protection of this disclosure.

[0055] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the pixel arrangement structure in related technologies. Figure 1 In this structure, the blue sub-pixel (B) and the red sub-pixel (R) are both squares (or squares with rounded corners). In the i-1 row, the distance l1 between the brightness centers (black dots) of the virtual pixel in the j column and the virtual pixel in the j+1 column (triangles in the figure) is greater than the distance l2 between the brightness centers of the virtual pixel in the j-1 column and the virtual pixel in the j-1 column. In the i row, the distance between the brightness centers (black dots) of the virtual pixel in the j column and the virtual pixel in the j+1 column is less than the distance between the brightness centers of the virtual pixel in the j-1 column and the virtual pixel in the j-1 column. As a result, when displaying images with vertical lines or images dominated by vertical lines, the human eye will have a perceptible sense of distortion and graininess.

[0056] To solve the above problems, please refer to... Figure 2 This disclosure provides a display substrate, comprising:

[0057] First sub-pixel R, second sub-pixel G, and third sub-pixel B;

[0058] In a first direction, the first sub-pixel R and the third sub-pixel B are alternately arranged to form a first sub-pixel row, and the second sub-pixel G forms a second sub-pixel row;

[0059] In the second direction, the first sub-pixel row and the second sub-pixel row are arranged alternately, and the first direction and the second direction are perpendicular or substantially perpendicular;

[0060] Two first sub-pixels R and two third sub-pixels B, distributed in two adjacent rows and two columns, form a 2*2 matrix. In the 2*2 matrix, the two first sub-pixels R are located in different rows and different columns, and the two third sub-pixels B are located in different rows and different columns. At least one of the two first sub-pixels and the two third sub-pixels is a shape with a missing corner. The center line connecting the two first sub-pixels R and the two third sub-pixels B forms a non-square virtual quadrilateral, and the second sub-pixel G is located inside the virtual quadrilateral.

[0061] Figure 2 In the illustrated embodiment, the two third sub-pixels B in the virtual quadrilateral are squares with missing corners. Of course, it is also possible that the sub-pixels are rectangles, ellipses, or other shapes.

[0062] from Figure 2 As can be seen, adjacent first sub-pixels R and third sub-pixels B in the same row, together with a second sub-pixel G in the next row, form a virtual pixel (the triangle in the figure). Furthermore, adjacent virtual pixels in the same row share a first sub-pixel R or a third sub-pixel B.

[0063] In this embodiment of the present disclosure, by setting the first sub-pixel and / or the third sub-pixel as a missing corner graphic, the center position of the first sub-pixel and / or the third sub-pixel is changed, so that the difference in the spacing between the brightness centers of adjacent virtual pixels in the same row is smaller than the difference in the spacing between the brightness centers of adjacent virtual pixels in the same row in related technologies, thus making the arrangement of the brightness centers of virtual pixels in this embodiment of the present disclosure more uniform.

[0064] In this embodiment, on the one hand, higher resolution can be achieved by sharing sub-pixels; on the other hand, by setting the first sub-pixel and / or the third sub-pixel as a corner-cut graphic, the brightness center of the virtual pixel is more evenly distributed, avoiding graininess and distortion in the display and improving the display effect. Furthermore, the brightness center of the virtual pixel can be shifted without moving the position of the sub-pixels, resulting in lower implementation costs.

[0065] Figure 2 In the illustrated embodiment, all third sub-pixels B are squares with a missing corner. Of course, in other embodiments of this disclosure, some third sub-pixels B may also be squares with a missing corner. Furthermore, the positions of the missing corners of different third sub-pixels B with missing corners may be the same or different.

[0066] In some other embodiments, the third sub-pixel B may also be a square missing two corners or a triangle.

[0067] In other embodiments, some or all of the first sub-pixels R may be squares with one, two, or three corners missing. The positions of the missing corners of different first sub-pixels R with missing corners may be the same or different.

[0068] In this embodiment of the disclosure, optionally, two first sub-pixels R and two third sub-pixels B corresponding to the same virtual quadrilateral surround a second sub-pixel G, and the nearest distance from other first sub-pixels R and third sub-pixels B outside the virtual quadrilateral to the second sub-pixel G is greater than the nearest distance from the two first sub-pixels R and two third sub-pixels B to the second sub-pixel G. The distance can be the boundary distance of the sub-pixels. Furthermore, if the sub-pixel graphic has rounded corners, the distance to the rounded corner portion may have some deviation, so the distance size needs to take into account the error caused by the rounded corners, or measurement error, such as a deviation of about 3 micrometers, which is considered equivalent.

[0069] In this embodiment of the disclosure, optionally, within the virtual quadrilateral, the second sub-pixel G is symmetrical with respect to the center line connecting the two diagonally opposite third sub-pixels B, or symmetrical with respect to the center line connecting the two diagonally opposite first sub-pixels R. Figure 2 In the embodiment shown, the second sub-pixel G is symmetrical about the center line connecting the two first sub-pixels R diagonally opposite each other.

[0070] In this embodiment of the disclosure, optional details may be found, please refer to... Figure 3 The vertical distance L3 from the boundary of the two first sub-pixels R corresponding to the second sub-pixel G to the center of the second sub-pixel G is the same.

[0071] And / or,

[0072] The vertical distance L4 from the boundary of the two third sub-pixels B corresponding to the same virtual quadrilateral to the center of the second sub-pixel G is the same.

[0073] And / or,

[0074] The vertical distance L3 from the boundary of the first sub-pixel R near the second sub-pixel G to the center of the second sub-pixel G corresponding to the same virtual quadrilateral is the same as the vertical distance L4 from the boundary of the third sub-pixel B near the second sub-pixel G to the center of the second sub-pixel G.

[0075] In this embodiment of the present disclosure, optionally, within at least one of the virtual quadrilaterals, the distance between the center of the second sub-pixel G and the center of the two third sub-pixels B is not equal, and the distance between the center of the second sub-pixel G and the center of the two first sub-pixels R is equal; in this embodiment, the third sub-pixel B is a sub-pixel with a missing corner, and its center position has changed.

[0076] or

[0077] Within at least one of the virtual quadrilaterals, the center of the second sub-pixel G is equidistant from the center of the two third sub-pixels B, and the center of the second sub-pixel G is equidistant from the center of the two first sub-pixels R.

[0078] or

[0079] Within at least one of the virtual quadrilaterals, the center of the second sub-pixel G is equidistant from the centers of the two third sub-pixels B, while the center of the second sub-pixel G is unequal from the centers of the two first sub-pixels R. In this embodiment, the first sub-pixel R is a corner-missing sub-pixel, and its center position has changed.

[0080] In this embodiment of the disclosure, optionally, the distance between the center of the two first sub-pixels R and the center of the two third sub-pixels B corresponding to the same virtual quadrilateral and the center of the second sub-pixel G is in the range of 20-60 μm. More optionally, the distance between the center of the two first sub-pixels R and the center of the two third sub-pixels B corresponding to the same virtual quadrilateral and the center of the second sub-pixel G is in the range of 25-50 μm, or 30-48 μm, for example, 30 μm, 32 μm, 35 μm, or 37 μm.

[0081] In this embodiment of the present disclosure, optionally, within a virtual quadrilateral, if the distance between the center of the second sub-pixel G and the center of the two third sub-pixels B is equal, and the distance between the center of the second sub-pixel G and the center of the two first sub-pixels R is equal, the ratio of the distances from the center of the first sub-pixel R and the center of the third sub-pixel B to the center of the second sub-pixel G is in the range of 0.7-1.3.

[0082] In this embodiment of the disclosure, optionally, the center of the first sub-pixel R located in the same row is on a straight line parallel to the row direction, and / or, the center of the first sub-pixel R located in the same column is on a straight line parallel to the column direction.

[0083] In this embodiment of the disclosure, optionally, the center of the third sub-pixel B located in the same row is on a straight line in the direction parallel to the row, and / or, the center of the third sub-pixel B located in the same column is on a straight line in the direction parallel to the column.

[0084] In this embodiment of the disclosure, optionally, all interior angles of the virtual quadrilateral range from 70° to 120°. More optionally, the interior angles of the virtual quadrilateral include at least one obtuse angle or at least one acute angle.

[0085] In this embodiment of the disclosure, optional details may be found, please refer to... Figure 3 At least one of the virtual quadrilaterals is a right trapezoid, with two interior angles of 90°, and the other two interior angles being an obtuse angle of X° and an acute angle of Y°. The obtuse angle ranges from greater than 90° to less than or equal to 100°, and optionally from 91° to 96°. The acute angle ranges from greater than or equal to 80° to greater than 90°, and optionally from 84° to 89°. Figure 3 In the embodiment shown, the acute angle is 86° and the obtuse angle is 94°.

[0086] In this embodiment of the disclosure, optional details may be found, please refer to... Figure 4 Sixteen virtual quadrilaterals arranged in an array form a virtual polygon. The centers of the first sub-pixel R and the third sub-pixel B are located on the vertices or sides of the virtual polygon, and the first sub-pixel R and the third sub-pixel B are arranged alternately in a clockwise direction. One of the first sub-pixels R is located at the center of the virtual polygon. The interior angles of each virtual quadrilateral are assigned equally, and the two third sub-pixels B at opposite corners around each first sub-pixel R are symmetrical about the center of the first sub-pixel R.

[0087] In this embodiment of the disclosure, optional details may be found, please refer to... Figure 5Four virtual quadrilaterals arranged in an array form a virtual polygon. The centers of the four first sub-pixels R and the four third sub-pixels B are located on the vertices or edges of the virtual polygon, and the first sub-pixels R and the third sub-pixels B are arranged alternately in a clockwise direction. One of the first sub-pixels R is located at the center of the virtual polygon. The virtual polygon contains two types of virtual quadrilaterals. The interior angles of the two diagonally opposite virtual quadrilaterals are allocated equally, and the shapes and the directions of the missing corners of the two diagonally opposite third sub-pixels surrounding the first sub-pixel R are the same.

[0088] In this embodiment of the disclosure, optional details may be found, please refer to... Figure 6 The four virtual quadrilaterals arranged in an array form a virtual polygon. The centers of the four first sub-pixels R and the four third sub-pixels B are located on the vertices or edges of the virtual polygon, and the first sub-pixels R and the third sub-pixels B are arranged alternately in a clockwise direction. One of the first sub-pixels R is located at the center of the virtual polygon. The virtual polygon contains three types of virtual quadrilaterals, in which the interior angles of a pair of opposite virtual quadrilaterals are assigned the same, and the shapes and the directions of the missing corners of the two opposite third sub-pixels around the first sub-pixel R are the same.

[0089] In this embodiment of the disclosure, optionally, the lines connecting the centers of the four first sub-pixels R surrounding each first sub-pixel R form a square, the center of the first sub-pixel R is located at the center of the square, and the two first sub-pixels R on the diagonal are symmetrical about the central first sub-pixel R.

[0090] In this embodiment of the disclosure, optionally, the lines connecting the centers of the four third sub-pixels B surrounding each third sub-pixel B form a square, the center of the third sub-pixel B is located at the center of the square, and the two third sub-pixels B on the diagonal are symmetrical about the central third sub-pixel B.

[0091] In this embodiment of the disclosure, optionally, the four third sub-pixels B surrounding each first sub-pixel R are symmetrical about the center of the first sub-pixel R.

[0092] In this embodiment of the disclosure, optionally, the four first sub-pixels R surrounding each third sub-pixel B are centrally symmetrical about the third sub-pixel B.

[0093] The human eye has different resolution capabilities for the first sub-pixel R, the second sub-pixel G, and the third sub-pixel B, and the brightness effects of the three sub-pixels are also different. Among them, the brightness effect of the second sub-pixel G is the largest, followed by the first sub-pixel R, and the brightness effect of the third sub-pixel B is the smallest. At the same time, the device lifetimes of organic light-emitting materials of different colors are different. Therefore, optionally, the total opening area of the sub-pixels: the third sub-pixel B > the second sub-pixel G > the first sub-pixel R. That is, the total opening areas of the third sub-pixel B, the second sub-pixel G, and the first sub-pixel R decrease in sequence. The total opening area of the first sub-pixel R is x, the total opening area of the second sub-pixel G is a*x / 2, and the total opening area of the third sub-pixel B is b*x, where 0.5 ≤ a ≤ 0.8 and 1 < b ≤ 2.2. In the embodiments of the present disclosure, the total opening area of the sub-pixels refers to the total light-emitting area of the sub-pixels on the entire panel.

[0094] In the above embodiments of the present disclosure, the shapes of the first sub-pixel, the second sub-pixel, and the third sub-pixel are taken as quadrilaterals with rounded corners for illustration. In some other embodiments of the present disclosure, optionally, the shapes of the first sub-pixel, the second sub-pixel, and the third sub-pixel can also be other polygons; or, the shapes of the first sub-pixel, the second sub-pixel, and the third sub-pixel can also be selected from any one of other types of polygons with rounded corners, circles, and ellipses.

[0095] In the above embodiments of the present disclosure, the first sub-pixel is taken as a red sub-pixel (R), the second sub-pixel is taken as a green sub-pixel (G), and the third sub-pixel is taken as a blue sub-pixel (B) for illustration. The present disclosure does not exclude using sub-pixels of other colors.

[0096] In the above embodiments of the present disclosure, the number ratio of the first sub-pixel, the second sub-pixel, and the third sub-pixel is 1:2:1, so as to achieve sub-pixel sharing and improve the resolution.

[0097] It should be noted that the specific shapes, positional relationships, etc. of the sub-pixels in the present disclosure can be designed according to needs. In actual processes, due to process condition limitations or other factors, there may also be some deviations. Therefore, as long as the shapes, positions, and relative positional relationships of the sub-pixels generally meet the above conditions, they all belong to the pixel arrangement structures provided by the embodiments of the present disclosure.

[0098] The embodiments of the present disclosure further provide a display substrate, including: a first sub-pixel, a second sub-pixel, and a third sub-pixel;

[0099] In the first direction, the first sub-pixel and the third sub-pixel are alternately arranged to form a first sub-pixel row, and the second sub-pixel forms a second sub-pixel row;

[0100] In the second direction, the first sub-pixel row and the second sub-pixel row are arranged alternately, and the first direction and the second direction are approximately perpendicular.

[0101] Two first sub-pixels and two third sub-pixels distributed in two adjacent rows and two columns form a 2*2 matrix. In the 2*2 matrix, the two first sub-pixels are located in different rows and different columns, and the two third sub-pixels are located in different rows and different columns. The center line connecting the two first sub-pixels and the two third sub-pixels forms a non-square virtual quadrilateral, and the second sub-pixel is located inside the virtual quadrilateral.

[0102] Four virtual quadrilaterals form a hexagon, which includes two parallel sides. The four virtual quadrilaterals share a first sub-pixel. The first side of the two sides passes through a first sub-pixel, a third sub-pixel, and another first sub-pixel. The second side passes through a first sub-pixel, a third sub-pixel, and another first sub-pixel. The line connecting the centers of the third sub-pixels on the two parallel sides does not pass through the center of the first sub-pixel shared by the four virtual quadrilaterals. Alternatively, the four virtual quadrilaterals share a third sub-pixel, and the first side of the two sides passes through a third sub-pixel, a first sub-pixel, and another third sub-pixel. The second side passes through a third sub-pixel, a first sub-pixel, and another third sub-pixel. The line connecting the centers of the first sub-pixels on the two parallel sides does not pass through the center of the third sub-pixel shared by the four virtual quadrilaterals.

[0103] In this embodiment of the present disclosure, by connecting the centers of two first sub-pixels and two third sub-pixels in two adjacent rows and two columns to form a non-square virtual quadrilateral, and the four virtual quadrilaterals to form a hexagon, the difference in the spacing between the brightness centers of adjacent virtual pixels in the same row is less than the difference in the spacing between the brightness centers of adjacent virtual pixels in the same row in related technologies, thus making the brightness center arrangement of virtual pixels in this embodiment of the present disclosure more uniform.

[0104] In this embodiment of the disclosure, on the one hand, higher resolution can be achieved by sharing sub-pixels; on the other hand, the brightness center of the virtual pixels is more uniformly distributed, avoiding the graininess and distortion of the display and improving the display effect.

[0105] In this embodiment of the disclosure, please refer to Figures 3-6 Optionally, the vertices or parallel sides of the hexagon pass through eight sub-pixels, including four first sub-pixels R and four third sub-pixels B, and the first sub-pixels R and the third sub-pixels B in the eight sub-pixels are alternately set.

[0106] Please refer to the following: Figure 5The line connecting the center of the first sub-pixel R among the eight sub-pixels to the center of an adjacent first sub-pixel R is a parallel side of the hexagon, and the line connecting the first sub-pixel R to the center of another adjacent first sub-pixel R does not pass through the center of the third sub-pixel B between the two first sub-pixels R.

[0107] or

[0108] Please refer to Figure 3 The line connecting the center of the third sub-pixel B among the eight sub-pixels to the center of an adjacent third sub-pixel B is a parallel side of the hexagon, and the line connecting the third sub-pixel B to the center of another adjacent third sub-pixel B does not pass through the center of the first sub-pixel R between the two third sub-pixels B.

[0109] In this embodiment of the disclosure, optionally, at least one of the two first sub-pixels and two third sub-pixels corresponding to the virtual quadrilateral is a shape with a missing corner.

[0110] In this embodiment of the disclosure, optionally, at least one of the two first sub-pixels and the two third sub-pixels is a square with a missing corner.

[0111] In this embodiment of the disclosure, optionally, at least one of the two first sub-pixels and the two third sub-pixels is a shape with one corner missing, two corners missing, or a triangle missing.

[0112] In this embodiment of the present disclosure, optionally, two first sub-pixels and two third sub-pixels corresponding to the same virtual quadrilateral surround a second sub-pixel, and the nearest distance from the other first sub-pixels and third sub-pixels outside the virtual quadrilateral to the second sub-pixel is greater than the nearest distance from the two first sub-pixels and two third sub-pixels to the second sub-pixel.

[0113] In this embodiment of the disclosure, optionally, the positions of the missing corners of the two first sub-pixels corresponding to the same virtual quadrilateral are the same or different; or, the positions of the missing corners of the two third sub-pixels corresponding to the same virtual quadrilateral are the same or different.

[0114] In this embodiment of the disclosure, optionally, the vertical distance from the boundary of the two first sub-pixels corresponding to the same virtual quadrilateral to the center of the second sub-pixel is the same.

[0115] And / or,

[0116] The vertical distance from the boundary of the second sub-pixel to the center of the second sub-pixel is the same for the two third sub-pixels corresponding to the same virtual quadrilateral;

[0117] And / or,

[0118] The vertical distance from the boundary of the first sub-pixel closest to the second sub-pixel to the center of the second sub-pixel corresponding to the same virtual quadrilateral is the same as the vertical distance from the boundary of the third sub-pixel closest to the second sub-pixel to the center of the second sub-pixel.

[0119] In this embodiment of the disclosure, optionally, within at least one of the virtual quadrilaterals, the distance between the center of the second sub-pixel and the center of the two third sub-pixels is not equal, and the distance between the center of the second sub-pixel and the center of the two first sub-pixels is equal;

[0120] or

[0121] Within at least one of the virtual quadrilaterals, the center of the second sub-pixel is equidistant from the center of the two third sub-pixels, and the center of the second sub-pixel is equidistant from the center of the two first sub-pixels.

[0122] or

[0123] Within at least one of the virtual quadrilaterals, the center of the second sub-pixel is equidistant from the centers of the two third sub-pixels, while the center of the second sub-pixel is unequal from the centers of the two first sub-pixels.

[0124] In this embodiment of the disclosure, optionally, the distance between the center of the two first sub-pixels and the center of the two third sub-pixels corresponding to the same virtual quadrilateral and the center of the second sub-pixel is in the range of 20-60μm.

[0125] In this embodiment of the disclosure, optionally, all interior angles of the virtual quadrilateral range from 70° to 120°.

[0126] In this embodiment of the disclosure, optionally, at least one of the virtual quadrilaterals is a right trapezoid with two interior angles of 90° and the other two interior angles being an obtuse angle and an acute angle, respectively.

[0127] In this embodiment of the disclosure, optional details may be found, please refer to... Figure 4 Sixteen virtual quadrilaterals arranged in an array form a virtual polygon, with each virtual quadrilateral having the same number of interior angles.

[0128] In this embodiment of the disclosure, optional details may be found, please refer to... Figure 5 Four virtual quadrilaterals arranged in an array form a virtual polygon. The virtual polygon contains two types of virtual quadrilaterals, and the interior angles of the two diagonally opposite virtual quadrilaterals are assigned the same.

[0129] In this embodiment of the disclosure, optional details may be found, please refer to... Figure 6The four virtual quadrilaterals arranged in an array form a virtual polygon. The virtual polygon contains three types of virtual quadrilaterals, in which the interior angles of two opposite virtual quadrilaterals are assigned the same.

[0130] The center of the first sub-pixel located in the same row is on a straight line parallel to the row direction, and / or the center of the first sub-pixel located in the same column is on a straight line parallel to the column direction.

[0131] In this embodiment of the disclosure, optionally, the center of the third sub-pixel located in the same row is on a straight line in the direction parallel to the row, and / or, the center of the third sub-pixel located in the same column is on a straight line in the direction parallel to the column.

[0132] In this embodiment of the disclosure, optionally, the lines connecting the centers of the four first sub-pixels surrounding each first sub-pixel form a square, the center of the first sub-pixel is located at the center of the square, and the two first sub-pixels on the diagonal are symmetrical about the center first sub-pixel.

[0133] In this embodiment of the disclosure, optionally, the lines connecting the centers of the four third sub-pixels surrounding each third sub-pixel form a square, the center of the third sub-pixel is located at the center of the square, and the two third sub-pixels on the diagonal are symmetrical about the central third sub-pixel.

[0134] In this embodiment of the disclosure, optionally, the diagonal third sub-pixels surrounding each first sub-pixel are symmetrical about the center of the first sub-pixel.

[0135] In this embodiment of the disclosure, optionally, the diagonal first sub-pixels surrounding each of the third sub-pixels are symmetrical about the center of the third sub-pixel.

[0136] In this embodiment of the disclosure, optionally, the shape of the third sub-pixel diagonally surrounding each first sub-pixel is consistent with the position of the missing corner.

[0137] In this embodiment of the disclosure, optionally, the shape of the first sub-pixel diagonally surrounding each of the third sub-pixels is consistent with the position of the missing corner.

[0138] In this embodiment of the disclosure, optionally, the total opening area of ​​the third sub-pixel, the second sub-pixel, and the first sub-pixel decreases sequentially, with the total opening area of ​​the first sub-pixel being x, the total opening area of ​​the second sub-pixel being a*x / 2, and the total opening area of ​​the third sub-pixel being b*x, where 0.5≤a≤0.8, 1 <b≤2.2。

[0139] In this embodiment of the disclosure, optionally, the first sub-pixel is a red sub-pixel, the second sub-pixel is a green sub-pixel, and the third sub-pixel is a blue sub-pixel.

[0140] In the above embodiments of this disclosure, the first sub-pixel is a red sub-pixel (R), the second sub-pixel is a green sub-pixel (G), and the third sub-pixel is a blue sub-pixel (B) as an example for illustration. This disclosure does not exclude the use of sub-pixels of other colors.

[0141] In the embodiments disclosed above, the ratio of the number of the first sub-pixel, the second sub-pixel, and the third sub-pixel is 1:2:1, thereby achieving sub-pixel sharing and improving resolution.

[0142] This disclosure also provides a display device including the above-described display substrate.

[0143] In this embodiment of the present disclosure, optionally, the display device further includes a pixel defining layer, the pixel defining layer including a plurality of pixel defining layer openings, each of the first sub-pixels, each of the second sub-pixels, and each of the third sub-pixels respectively corresponding to a pixel defining layer opening, the shapes of the first sub-pixels, the second sub-pixels, and the third sub-pixels being approximately the same as the shapes of the openings of their corresponding pixel defining layers.

[0144] In this embodiment of the present disclosure, optionally, the first sub-pixel includes a multilayer film layer, and the multilayer film layer of the first sub-pixel at least partially covers the area outside the pixel defining layer opening; and / or, the second sub-pixel includes a multilayer film layer, and the multilayer film layer of the second sub-pixel at least partially covers the area outside the pixel defining layer opening; and / or, the third sub-pixel includes a multilayer film layer, and the multilayer film layer of the third sub-pixel at least partially covers the area outside the pixel defining layer opening.

[0145] In this embodiment of the disclosure, optionally, the openings of the pixel defining layer have at least a portion different shapes and / or areas.

[0146] In this embodiment of the disclosure, optionally, the pixel defining layer openings corresponding to the first sub-pixel and / or the third sub-pixel have at least partially different shapes or areas.

[0147] In this embodiment of the disclosure, optionally, the pixel defining layer opening corresponding to the first sub-pixel or the third sub-pixel has at least a portion of the nearest distance from the adjacent opening that is not equal.

[0148] This disclosure also provides a high-precision metal mask for fabricating a display substrate in any of the above embodiments. The first sub-pixel includes multiple film layers, the second sub-pixel includes multiple film layers, and the third sub-pixel includes multiple film layers. The mask includes a plurality of opening regions, including a first opening region corresponding to the shape and distribution of at least one film layer in the first sub-pixel, a second opening region corresponding to the shape and distribution of at least one film layer in the second sub-pixel, or a third opening region corresponding to the shape and distribution of at least one film layer in the third sub-pixel.

[0149] Here, shape refers to graphic type and / or size, while distribution refers to spacing, orientation, and / or density.

[0150] In some embodiments, a first sub-pixel includes a first effective light-emitting area, a second sub-pixel includes a second effective light-emitting area, and a third sub-pixel includes a third effective light-emitting area, wherein the area of ​​a second effective light-emitting area is less than the area of ​​a first effective light-emitting area and the area of ​​a third effective light-emitting area. On a display substrate, the total area of ​​all third effective light-emitting areas included in a third sub-pixel is greater than the total area of ​​all third effective light-emitting areas included in a second sub-pixel, which is greater than the total area of ​​all third effective light-emitting areas included in a first sub-pixel. In some embodiments, each first effective light-emitting area, each second effective light-emitting area, and each third effective light-emitting area are separated. In some embodiments, each first effective light-emitting area, each second effective light-emitting area, and each third effective light-emitting area are defined by a plurality of separated openings formed in a pixel defining layer. In some embodiments, each first effective light-emitting area is defined in a corresponding first sub-pixel by a light-emitting layer located between opposing anodes and cathodes in a direction perpendicular to the substrate and driven to emit light. In some embodiments, each second effective light-emitting area is defined in a corresponding second sub-pixel by a light-emitting layer located between opposing anodes and cathodes in a direction perpendicular to the substrate and driven to emit light. In some embodiments, each third effective light-emitting region is defined by a light-emitting layer in the corresponding third sub-pixel, located between opposing anodes and cathodes in the direction perpendicular to the substrate, and driven to emit light. In some embodiments, each first, second, and third effective light-emitting region is defined by a corresponding light-emitting layer and an electrode (anode or cathode) or portion of an electrode that carries charge carriers (holes or electrons) with the corresponding light-emitting layer. In some embodiments, each first, second, and third effective light-emitting region is defined by at least a portion of a cathode and at least a portion of an anode whose orthogonal projections on the substrate overlap, and the at least portion of the cathode and at least a portion of the anode do not overlap with the orthogonal projection of a first insulating layer on the substrate, which is located between the cathode and anode in the direction perpendicular to the substrate. For example, the first insulating layer includes a pixel defining layer. In some embodiments, each first sub-pixel, each second sub-pixel, and each third sub-pixel respectively includes a first electrode, a light-emitting layer located on the side of the first electrode away from the substrate, and a second electrode located on the side of the light-emitting layer away from the first electrode. In the direction perpendicular to the substrate, a second insulating layer is further disposed between the first electrode and the light-emitting layer, and / or between the second electrode and the light-emitting layer. The second insulating layer overlaps with the projection of the first electrode or the second electrode onto the substrate, and the second insulating layer has an opening. On the side facing the light-emitting layer, the opening of the second insulating layer can expose at least a portion of the first electrode or the second electrode, allowing it to contact the light-emitting layer or the auxiliary light-emitting functional layer. Each first effective light-emitting area, each second effective light-emitting area, and each third effective light-emitting area are defined by the portion of the first electrode or the second electrode that contacts the light-emitting layer or the auxiliary light-emitting functional layer.In some embodiments, the second insulating layer includes a pixel defining layer. In some embodiments, the auxiliary light-emitting functional layer can be any one or more layers selected from hole injection layer, hole transport layer, electron transport layer, hole blocking layer, electron blocking layer, electron injection layer, auxiliary light-emitting layer, interface improvement layer, antireflection layer, etc. In some embodiments, the first electrode can be an anode, and the second electrode can be a cathode. In some embodiments, the first electrode can include at least two layers of indium tin oxide (ITO) and silver (Ag), for example, a three-layer stack of ITO, Ag, and ITO. In some embodiments, the second electrode can include any one or more of magnesium (Mg), Ag, ITO, and indium zinc oxide (IZO), for example, a mixed layer or alloy layer of Mg and Ag.

[0151] Each sub-pixel includes a light-emitting layer, each first sub-pixel includes a first color light-emitting layer located within the opening and on the pixel limiting layer, each second sub-pixel includes a second color light-emitting layer located within the opening and on the pixel limiting layer, and each third sub-pixel includes a third color light-emitting layer located within the opening and on the pixel limiting layer.

[0152] In some exemplary embodiments, the fabrication process of the display substrate in this embodiment may include steps (1) to (9). In this exemplary embodiment, please refer to... Figure 7 The following explanation will be based on a top-emitting flexible display substrate.

[0153] (1) Prepare a substrate on a glass carrier.

[0154] In some exemplary embodiments, the substrate 10 can be a flexible substrate, such as including a first flexible material layer, a first inorganic material layer, a semiconductor layer, a second flexible material layer, and a second inorganic material layer stacked on the glass carrier plate 1. The first and second flexible material layers are made of materials such as polyimide (PI), polyethylene terephthalate (PET), or surface-treated polymer films. The first and second inorganic material layers are made of materials such as silicon nitride (SiNx) or silicon oxide (SiOx) to improve the substrate's resistance to water and oxygen; these first and second inorganic material layers are also referred to as barrier layers. The semiconductor layer is made of amorphous silicon (a-Si). In some exemplary embodiments, taking the stacked structure PI1 / Barrier1 / a-si / PI2 / Barrier2 as an example, the preparation process includes: firstly, coating a layer of polyimide on a glass substrate 1, curing it into a film to form a first flexible (PI1) layer; then depositing a barrier film on the first flexible layer to form a first barrier (Barrier1) layer covering the first flexible layer; then depositing an amorphous silicon film on the first barrier layer to form an amorphous silicon (a-si) layer covering the first barrier layer; then coating another layer of polyimide on the amorphous silicon layer, curing it into a film to form a second flexible (PI2) layer; then depositing a barrier film on the second flexible layer to form a second barrier (Barrier2) layer covering the second flexible layer, thus completing the preparation of the substrate 10.

[0155] (2) Fabricate a driving structure layer on the substrate. The driving structure layer includes multiple driving circuits, each driving circuit including multiple transistors and at least one storage capacitor, such as a 2T1C, 3T1C or 7T1C design.

[0156] In some exemplary embodiments, the fabrication process of the driving structure layer can be described with reference to the following description. The fabrication process of the driving circuit of the first sub-pixel 21 is used as an example for illustration.

[0157] A first insulating film and an active layer film are sequentially deposited on a substrate 10. The active layer film is patterned by a patterning process to form a first insulating layer 11 covering the entire substrate 10, and an active layer pattern disposed on the first insulating layer 11. The active layer pattern includes at least the first active layer.

[0158] Subsequently, a second insulating film and a first metal film are deposited sequentially. The first metal film is patterned using a patterning process to form a second insulating layer 12 covering the active layer pattern, and a first gate metal layer pattern disposed on the second insulating layer 12. The first gate metal layer pattern includes at least a first gate electrode and a first capacitor electrode.

[0159] Subsequently, a third insulating film and a second metal film are deposited sequentially. The second metal film is patterned using a patterning process to form a third insulating layer 13 covering the first gate metal layer, and a second gate metal layer pattern disposed on the third insulating layer 13. The second gate metal layer pattern includes at least a second capacitor electrode, and the position of the second capacitor electrode corresponds to the position of the first capacitor electrode.

[0160] Subsequently, a fourth insulating film is deposited, and the fourth insulating film is patterned by a patterning process to form a pattern of the fourth insulating layer 14 covering the second gate metal layer. At least two first vias are formed on the fourth insulating layer 14. The fourth insulating layer 14, the third insulating layer 13 and the second insulating layer 12 in the two first vias are etched away to expose the surface of the first active layer.

[0161] Subsequently, a third metal thin film is deposited, and the third metal thin film is patterned using a patterning process to form a source / drain metal layer pattern on the fourth insulating layer 14. The source / drain metal layer includes at least a first source electrode and a first drain electrode located in the display area. The first source electrode and the first drain electrode can be connected to the first active layer through first vias, respectively.

[0162] In the driving circuit of the first sub-pixel 21 of the display area, the first active layer, the first gate electrode, the first source electrode, and the first drain electrode can form a first transistor 210, and the first capacitor electrode and the second capacitor electrode can form a first storage capacitor 212. During the above fabrication process, the driving circuits for the second sub-pixel 22 and the third color sub-pixel 23 can be formed simultaneously.

[0163] In some exemplary embodiments, the first insulating layer 11, the second insulating layer 12, the third insulating layer 13, and the fourth insulating layer 14 are any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and can be single-layer, multi-layer, or composite layers. The first insulating layer 11 is called a buffer layer, used to improve the substrate's resistance to water and oxygen; the second insulating layer 12 and the third insulating layer 13 are called gate insulator (GI) layers; and the fourth insulating layer 14 is called an interlayer dielectric (ILD) layer. The first metal thin film, the second metal thin film, and the third metal thin film are made of metallic materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or alloys of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb), and can be a single-layer structure or a multi-layer composite structure, such as Ti / Al / Ti. The active layer thin film uses one or more materials such as amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene, and polythiophene. That is, this disclosure is applicable to transistors manufactured based on oxide technology, silicon technology, and organic technology.

[0164] (3) A planarization layer is formed on the substrate on which the aforementioned pattern is formed.

[0165] In some exemplary embodiments, a planarization thin film of organic material is coated on the substrate 10 on which the aforementioned pattern is formed to form a planarization layer 15 covering the entire substrate 10. A plurality of second vias K2 are formed on the planarization layer 15 in the display area through a masking, exposure, and development process. The planarization layer 15 within the plurality of second vias K2 is developed away, exposing the surface of the first drain electrode of the first transistor 210 of the driving circuit of the first sub-pixel 21, the surface of the first drain electrode of the first transistor of the driving circuit of the second sub-pixel 22, and the surface of the first drain electrode of the first transistor of the driving circuit of the third color sub-pixel 23, respectively.

[0166] (4) A first electrode pattern is formed on the substrate on which the aforementioned pattern is formed. In some examples, the first electrode is a reflective anode.

[0167] In some exemplary embodiments, a conductive thin film is deposited on the substrate 10 on which the aforementioned pattern is formed, and the conductive thin film is patterned by a patterning process to form a first electrode pattern. The first anode 213 of the first sub-pixel 21 is connected to the first drain electrode of the first transistor 210 through a second via K2, the second anode 223 of the second sub-pixel 22 is connected to the first drain electrode of the first transistor of the second sub-pixel 22 through a second via K2, and the third anode 233 of the third color sub-pixel 23 is connected to the first drain electrode of the first transistor of the third color sub-pixel 23 through a second via K2.

[0168] In some examples, the first electrode can be made of a metallic material, such as any one or more of magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo), or an alloy of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb). It can be a single-layer structure or a multi-layer composite structure, such as Ti / Al / Ti, or a stacked structure formed of metal and transparent conductive material, such as reflective materials like ITO / Ag / ITO or Mo / AlNd / ITO.

[0169] (5) A pixel definition layer (PDL) pattern is formed on the substrate on which the aforementioned pattern is formed.

[0170] In some exemplary embodiments, a pixel definition film is coated on the substrate 10 on which the aforementioned pattern is formed, and a pixel definition layer pattern is formed by masking, exposure, and development processes. The pixel definition layer 30 of the display area includes a plurality of sub-pixel definition portions 302, and a plurality of pixel definition layer openings 301 are formed between adjacent sub-pixel definition portions 302. The pixel definition layer 30 within the plurality of pixel definition layer openings 301 is developed away, exposing at least a portion of the surface of the first anode 213 of the first sub-pixel 21, at least a portion of the surface of the second anode 223 of the second sub-pixel 22, and at least a portion of the surface of the third anode 233 of the third color sub-pixel 23.

[0171] In some examples, the pixel definition layer 30 can be made of polyimide, acrylic, or polyethylene terephthalate, etc.

[0172] (6) A post spacer pattern is formed on the substrate on which the aforementioned pattern is formed.

[0173] In some exemplary embodiments, an organic material thin film is coated on the substrate 10 on which the aforementioned pattern is formed, and the spacer pillar 34 pattern is formed by a masking, exposure, and development process. The spacer pillar 34 can serve as a support layer, configured to support the FMM during the evaporation process. In some examples, along the row arrangement direction of the sub-pixels, a repeating unit is spaced between two adjacent spacer pillars 34; for example, the spacer pillar 34 can be located between adjacent first sub-pixel 21 and third color sub-pixel 23.

[0174] (7) An organic functional layer and a second electrode are sequentially formed on the substrate on which the aforementioned pattern is formed. In some examples, the second electrode is a transparent cathode. The light-emitting element can emit light from the side away from the substrate 10 through the transparent cathode, achieving top emission. In some examples, the organic functional layer of the light-emitting element includes: a hole injection layer, a hole transport layer, a light-emitting layer, and an electron transport layer.

[0175] In some exemplary embodiments, a hole injection layer 241 and a hole transport layer 242 are sequentially deposited on the substrate 10 on which the aforementioned pattern is formed using an open mask. Then, a blue light-emitting layer 236, a green light-emitting layer 216, and a red light-emitting layer 226 are sequentially deposited using an open mask. Finally, an electron transport layer 243, a cathode 244, and an optical coupling layer 245 are sequentially deposited using an open mask. The hole injection layer 241, hole transport layer 242, electron transport layer 243, and cathode 244 are all common layers for multiple sub-pixels. In some examples, the organic functional layer may further include a microcavity adjustment layer located between the hole transport layer and the light-emitting layer. For example, after forming the hole transport layer, a blue microcavity adjustment layer, a blue light-emitting layer, a green microcavity adjustment layer, a green light-emitting layer, a red microcavity adjustment layer, and a red light-emitting layer may be sequentially deposited using an FMM.

[0176] In some exemplary embodiments, an organic functional layer is formed within a sub-pixel region, enabling the organic functional layer to be connected to the anode. A cathode is formed on the pixel definition layer and connected to the organic functional layer.

[0177] In some exemplary embodiments, the cathode may be any one or more of magnesium (Mg), silver (Ag), and aluminum (Al), or an alloy made of any one or more of the above metals, or a transparent conductive material, such as indium tin oxide (ITO), or a multilayer composite structure of metal and transparent conductive material.

[0178] In some exemplary embodiments, an optical coupling layer can be formed on the side of the cathode 244 away from the substrate 10. This optical coupling layer can be a common layer for multiple sub-pixels. The optical coupling layer can work in conjunction with the transparent cathode to increase light output. For example, the material of the optical coupling layer can be a semiconductor material. However, this embodiment is not limited to this.

[0179] (8) An encapsulation layer is formed on the substrate on which the aforementioned pattern is formed.

[0180] In some exemplary embodiments, an encapsulation layer is formed on the substrate 10 on which the aforementioned pattern is formed. The encapsulation layer may include a first encapsulation layer 41, a second encapsulation layer 42, and a third encapsulation layer 43 stacked together. The first encapsulation layer 41 is made of an inorganic material and covers the cathode 244 in the display area. The second encapsulation layer 42 is made of an organic material. The third encapsulation layer 43 is made of an inorganic material and covers the first encapsulation layer 41 and the second encapsulation layer 42. However, this embodiment is not limited to this. In some examples, the encapsulation layer may adopt a five-layer structure of inorganic / organic / inorganic / organic / inorganic.

[0181] The above description represents some embodiments of this disclosure. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles described herein, and these improvements and modifications should also be considered within the scope of protection of this disclosure.

Claims

1. A display substrate, characterized in that, include: First sub-pixel, second sub-pixel, and third sub-pixel; In a first direction, the first sub-pixel and the third sub-pixel are arranged alternately to form a first sub-pixel row, and the second sub-pixel forms a second sub-pixel row; In the second direction, the first sub-pixel row and the second sub-pixel row are arranged alternately, and the first direction and the second direction are approximately perpendicular. Two first sub-pixels and two third sub-pixels distributed in two adjacent rows and two columns of the first sub-pixel row form a 2*2 matrix. In the 2*2 matrix, the two first sub-pixels are located in different rows and different columns, the two third sub-pixels are located in different rows and different columns, and the second sub-pixel is located within the area enclosed by the 2*2 matrix. In the first direction, the centers of the first sub-pixel and the third sub-pixel are on a straight line. In the second direction, the line connecting the centers of two adjacent first sub-pixels does not pass through the center of the third sub-pixel between the two adjacent first sub-pixels, and / or, the line connecting the centers of two adjacent third sub-pixels does not pass through the center of the first sub-pixel between the two adjacent third sub-pixels. The nearest distance between the second sub-pixel located within the area enclosed by the 2*2 matrix and the boundary of the two adjacent first sub-pixels is equal; the nearest distance between the second sub-pixel located within the area enclosed by the 2*2 matrix and the boundary of the two adjacent third sub-pixels is equal. In the 2*2 matrix, the ratio of the distances from the center of the first sub-pixel and the center of the third sub-pixel to the center of the second sub-pixel enclosed by the 2*2 matrix ranges from 0.7 to 1.

3.

2. The display substrate according to claim 1, characterized in that: In the second direction, the line connecting the centers of two adjacent first sub-pixels passes through the third sub-pixel between the two adjacent first sub-pixels, but does not pass through the center of the third sub-pixel between the two adjacent first sub-pixels; And / or, in the second direction, the line connecting the centers of two adjacent third sub-pixels passes through the first sub-pixel between the two adjacent third sub-pixels, but does not pass through the center of the first sub-pixel between the two adjacent third sub-pixels.

3. The display substrate according to claim 1, characterized in that: The center of the first sub-pixel located in the same row is on a straight line parallel to the row direction, and the center of the first sub-pixel located in the same column is on a straight line parallel to the column direction. And / or, the center of the third sub-pixel located in the same row is on a straight line parallel to the row direction, and the center of the third sub-pixel located in the same column is on a straight line parallel to the column direction.

4. The display substrate according to claim 1, characterized in that, The shape formed by connecting the centers of the two first sub-pixels and the two third sub-pixels in the 2*2 matrix is ​​a trapezoid.

5. The display substrate according to claim 1, characterized in that, The range of all interior angles of the graphic formed by the center lines connecting the two first sub-pixels and the two third sub-pixels in the 2*2 matrix is ​​from 70° to 120°.

6. The display substrate according to claim 5, characterized in that, The interior angles of the figure include at least one obtuse angle or at least one acute angle.

7. The display substrate according to claim 1, characterized in that, The two first sub-pixels and the two third sub-pixels in the 2*2 matrix surround a second sub-pixel, and the nearest distance from the other first sub-pixels and the third sub-pixels outside the 2*2 matrix to the second sub-pixel surrounded by the 2*2 matrix is ​​greater than the nearest distance from the two first sub-pixels and the two third sub-pixels in the 2*2 matrix to the second sub-pixel surrounded by the 2*2 matrix.

8. The display substrate according to claim 1, characterized in that, The vertical distance from the boundary of the second sub-pixel enclosed by the 2*2 matrix to the center of the second sub-pixel is the same for two first sub-pixels in the 2*2 matrix. And / or, The vertical distance from the boundary of the second sub-pixel enclosed by the 2*2 matrix to the center of the second sub-pixel is the same for two third sub-pixels in the 2*2 matrix. And / or, The vertical distance from the boundary of the first sub-pixel in the 2x2 matrix to the center of the second sub-pixel is the same as the vertical distance from the boundary of the third sub-pixel in the 2x2 matrix to the center of the second sub-pixel.

9. The display substrate according to claim 1, characterized in that, The distance between the center of the second sub-pixel enclosed by the 2*2 matrix and the center of the two third sub-pixels in the 2*2 matrix is ​​not equal, while the distance between the center of the second sub-pixel enclosed by the 2*2 matrix and the center of the two first sub-pixels in the 2*2 matrix is ​​equal. Alternatively, the center of the second sub-pixel enclosed by the 2*2 matrix is ​​equidistant from the center of the two third sub-pixels in the 2*2 matrix, and the center of the second sub-pixel enclosed by the 2*2 matrix is ​​equidistant from the center of the two first sub-pixels in the 2*2 matrix. Alternatively, the center of the second sub-pixel enclosed by the 2*2 matrix is ​​equidistant from the center of the two third sub-pixels in the 2*2 matrix, while the center of the second sub-pixel enclosed by the 2*2 matrix is ​​not equidistant from the center of the two first sub-pixels in the 2*2 matrix.

10. The display substrate according to claim 1, characterized in that, The distance between the center of the two first sub-pixels and the center of the two third sub-pixels in the 2*2 matrix and the center of the second sub-pixel enclosed by the 2*2 matrix ranges from 20 to 60 μm.

11. The display substrate according to claim 1, characterized in that, The line connecting the centers of the two first sub-pixels and the two third sub-pixels in the 2*2 matrix forms a non-square virtual quadrilateral.

12. The display substrate according to claim 11, characterized in that, Sixteen virtual quadrilaterals arranged in an array form a virtual polygon, with each virtual quadrilateral having the same number of interior angles. Alternatively, four virtual quadrilaterals arranged in an array form a virtual polygon, which contains two types of virtual quadrilaterals, with the interior angles of the two diagonally opposite virtual quadrilaterals being assigned the same value. Alternatively, four virtual quadrilaterals arranged in an array form a virtual polygon, which contains three types of virtual quadrilaterals, wherein the interior angles of two opposite virtual quadrilaterals are assigned the same.

13. The display substrate according to claim 1, characterized in that, The lines connecting the centers of the four first sub-pixels surrounding each first sub-pixel form a square, with the center of the first sub-pixel located at the center of the square, and the two first sub-pixels on the diagonal being symmetrical about the center of the first sub-pixel. And / or, the lines connecting the centers of the four third sub-pixels surrounding each third sub-pixel form a square, the center of the central third sub-pixel is located at the center of the square, and the two third sub-pixels on the diagonals are symmetrical about the central third sub-pixel.

14. The display substrate according to claim 1, characterized in that, The line connecting the centers of the four third sub-pixels surrounding each first sub-pixel forms a virtual quadrilateral, wherein the diagonal third sub-pixels in the virtual quadrilateral are symmetrical about the center of the first sub-pixel; And / or, the lines connecting the centers of the four first sub-pixels surrounding each third sub-pixel form a virtual quadrilateral, wherein the first sub-pixels at opposite corners of the virtual quadrilateral are symmetrical about the center of the third sub-pixel.

15. The display substrate according to claim 1, characterized in that, The total aperture areas of the third sub-pixel, the second sub-pixel, and the first sub-pixel decrease sequentially. The total aperture area of ​​the first sub-pixel is x, the total aperture area of ​​the second sub-pixel is a*x / 2, and the total aperture area of ​​the third sub-pixel is b*x, where 0.5 ≤ a ≤ 0.

8. <b≤2.2。 16. The display substrate according to any one of claims 1-15, characterized in that, The first sub-pixel is a red sub-pixel, the second sub-pixel is a green sub-pixel, and the third sub-pixel is a blue sub-pixel.

17. A display device, characterized in that, Includes the display substrate as described in any one of claims 1-16.

18. The display device according to claim 17, characterized in that, It also includes a pixel delimiting layer, which includes multiple pixel delimiting layer openings. Each of the first sub-pixels, each of the second sub-pixels, and each of the third sub-pixels corresponds to a pixel delimiting layer opening. The shapes of the first sub-pixels, the second sub-pixels, and the third sub-pixels are approximately the same as the shapes of the openings of their corresponding pixel delimiting layers.

19. The display device according to claim 18, characterized in that, The first sub-pixel includes multiple film layers, and the multiple film layers of the first sub-pixel at least partially cover the area outside the pixel defining layer opening; and / or, the second sub-pixel includes multiple film layers, and the multiple film layers of the second sub-pixel at least partially cover the area outside the pixel defining layer opening; And / or, the third sub-pixel includes a multilayer film, and the multilayer film of the third sub-pixel at least partially covers the area outside the pixel defining layer opening.

20. The display device according to claim 18, characterized in that, The openings in the pixel-defining layer are at least partially different in shape and / or area.

21. The display device according to claim 18, characterized in that, The pixel-defining layer openings corresponding to the first or third sub-pixel have at least partially different shapes and / or areas.

22. A high-precision metal mask template, characterized in that, For fabricating a display substrate as described in any one of claims 1-16, the first sub-pixel includes multiple film layers, the second sub-pixel includes multiple film layers, the third sub-pixel includes multiple film layers, and the mask includes: a plurality of opening regions, the plurality of opening regions including a first opening region corresponding to the shape and distribution of at least one film layer in the first sub-pixel, or a second opening region corresponding to the shape and distribution of at least one film layer in the second sub-pixel, or a third opening region corresponding to the shape and distribution of at least one film layer in the third sub-pixel.

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