Translation barrier instruction
By introducing translation barrier instructions into out-of-order processors, the inconsistency between address translation and register changes is prevented, thus solving the problem of inconsistent address translation and program order in out-of-order processors, improving processor performance and reducing the waste of speculative operations.
CN122374736APending Publication Date: 2026-07-10APPLE INC
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- APPLE INC
- Filing Date
- 2024-12-20
- Publication Date
- 2026-07-10
AI Technical Summary
Technical Problem
In out-of-order processors, the inconsistency between address translation operations and program order leads to performance degradation and potential errors. Existing barrier instruction mechanisms result in performance loss and wasted speculative operations.
Method used
The introduction of translation barrier instructions prevents address translations and system register changes that occur sequentially after the barrier in program order until all translations and register changes are completed before program order, allowing speculative operations to continue.
Benefits of technology
It improves processor performance, avoids address translation errors, reduces the waste of speculative operations, and ensures the correct execution of the program sequence.
✦ Generated by Eureka AI based on patent content.
Smart Images
Figure CN122374736A_ABST
Abstract
An apparatus can include a processor circuit that can be configured to execute a translation barrier instruction. To execute the translation barrier instruction, the processor circuit can be configured to block address translations of instructions that occur in program order after the translation barrier instruction after the translation barrier instruction completes. The processor circuit can also be configured to complete the translation barrier instruction based on completing all address translations of instructions that occur in program order before the translation barrier instruction.
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