Laser array emitting light through a substrate and method of manufacturing a laser array
By designing multiple lasers on a VCSEL array substrate and employing a multilayer metal structure, the high manufacturing cost problem in the prior art is solved, realizing a low-cost laser array suitable for SMT, and improving mechanical stability and current path uniformity.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- VISHAY SEMICON GMBH
- Filing Date
- 2024-11-21
- Publication Date
- 2026-07-10
AI Technical Summary
Existing technologies make it difficult to cost-effectively manufacture bottom-emitting VCSEL arrays suitable for surface mount technology.
By designing multiple lasers on the substrate of the VCSEL array, using etching and oxidation processes to define the current aperture, and employing a multilayer metal layer structure for current separation and contact, a laser array suitable for SMT is formed.
It enables low-cost manufacturing of laser arrays, suitable for SMT, and improves mechanical stability and current path uniformity, making it suitable for SMD.
Smart Images
Figure CN122374943A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a laser array that emits light through a substrate. The invention also relates to a method for manufacturing such a laser array. Background Technology
[0002] Vertical-cavity surface-emitting semiconductor lasers (VCSELs) are used as radiation sources, for example, in sensing devices or communication technologies. VCSELs typically have a semiconductor layer structure, where semiconductor layers are epitaxially grown on a semiconductor substrate in a stacked manner. The semiconductor layer structure usually includes a first Bragg mirror, an active region, and a second Bragg mirror, which together form an optical resonator. The Bragg mirror is also commonly referred to as a DBR (Distributed Bragg Reflector).
[0003] VCSELs can be designed as so-called top emitters, where light is emitted from the side of the semiconductor layer structure facing away from the substrate. In contrast, in so-called bottom emitters, light is emitted from the substrate. Compared to top emitters, substrate-emitting VCSELs offer several advantages, such as the ability to directly structure optics onto the substrate surface. Furthermore, bottom-emitting VCSELs are suitable for surface mount technology, also known as SMT (Surface-Mounting Technology) or SMD (Surface-Mounted Device). SMD offers advantages such as miniaturization, smaller device size, and reduced cost. This invention specifically relates to a bottom-emitting VCSEL array.
[0004] DE 10 2021 129 874 A1 discloses a bottom-emitting semiconductor laser component designed as an SMD. US 10 826 278 B2 discloses a laser array that emits light from a substrate, the laser array having a first metal layer, a second metal layer, and an insulating layer between the first and second metal layers, wherein the second metal layer contacts the first metal layer through a portion of a perforation in the insulating layer. Summary of the Invention
[0005] One object of the present invention is to provide a laser array or VCSEL array that emits light through a substrate, which can be manufactured cost-effectively and in a simple manner and is particularly suitable for SMT.
[0006] Another object of the present invention is to provide a method for manufacturing such laser arrays.
[0007] The objective mentioned first is achieved by a laser array that emits light from a substrate of a laser array, as described in claim 1.
[0008] The laser array according to the present invention, which emits light through a substrate of a laser array, has multiple lasers on the substrate. Each laser is designed as a VCSEL. Each laser has a semiconductor layer structure having a first Bragg mirror, a second Bragg mirror, and an active region between the first and second Bragg mirrors. The first Bragg mirror is arranged on the side of the active region facing away from the substrate. The multiple lasers are grouped to form one or more spaced-apart subarrays of the laser array. For example, each VCSEL can be defined by etching multiple mesa, wherein each mesa defines one laser. After forming the mesa by etching, oxidation can be performed to define a current aperture. If the laser is not defined as a mesa, the current aperture can be defined by proton injection or locally defined tunneling diodes. The formation of VCSELs on the substrate is carried out in such a way that the multiple lasers are grouped into subarrays respectively. The lasers of the subarray are not necessarily formed as individual lasers or mesa, but the subarray can be a connected area where lasers are interconnected. Therefore, the term "laser" is generally also understood in this specification as a light-emitting location.
[0009] The laser array according to the invention has one or more first metal layers that contact one or more subarrays of lasers on the side of the active region of the laser facing away from the substrate. At least one first metal layer commonly contacts the lasers of a subarray. Therefore, the individual lasers of a subarray can be commonly addressed. If multiple subarrays exist, each subarray can be assigned a first metal layer, wherein these first metal layers are separated from each other. The first metal layers are used to contact the lasers of the subarray according to a first polarity (e.g., p-type polarity).
[0010] The laser array according to the invention has one or more second metal layers that are electrically or electrically isolated from one or more first metal layers. These one or more second metal layers contact one or more (e.g., adjacent) lasers of sub-arrays through at least one via in the semiconductor layer structure on the side of the active layer facing the substrate. The at least one via may extend to the substrate, into the substrate, or to a layer between the substrate and the active region. At least one second metal layer commonly contacts one or more lasers of the sub-arrays. The second metal layer contacts the lasers according to a polarity different from that of the lasers contacted through the first metal layer. When the first metal layer contacts a p-type laser, the second metal layer contacts an n-type laser. When the first metal layer contacts an n-type laser, the second metal layer contacts a p-type laser. The at least one via in the semiconductor layer structure can be easily achieved by etching the semiconductor layer structure. Depending on the number of sub-arrays, multiple second metal layers may be distributed on the array.
[0011] At least one first metal layer is disposed above a first Bragg reflector (i.e., the Bragg reflector located on the side of the active region facing away from the substrate). A second metal layer is disposed partially at a certain level below the active layer of the laser and partially (i.e., above) above the first Bragg reflector. A semiconductor layer may be present between the first Bragg reflector and the first and second metal layers. At least one first and second metal layers may each be multilayered. The first and second metal layers may each have a thin first metal layer and a thick second metal layer, the thin first metal layer being in direct contact with the laser, and the thick second metal layer being disposed on the first metal layer and in contact with or at least electrically connected to the first metal layer. One or more metals of the first metal layer may be different from one or more metals of the second metal layer.
[0012] The laser array according to the invention further comprises an insulating layer on at least one first and second metal layers. The insulating layer has a perforation at a defined region, i.e., at least one first and second metal layer is exposed in the perforation. A third metal layer is located above the insulating layer, contacting at least one first metal layer through a first perforation in the insulating layer and extending above the region of the first metal layer and the region of the second metal layer. In the region of the second metal layer, the third metal layer is current-disconnected from the second metal layer via the insulating layer. A fourth metal layer is located above the insulating layer, contacting the second metal layer through a second perforation in the insulating layer, current-disconnected from the third metal layer, and extending above the region of the first metal layer and the region of the second metal layer. Thus, the fourth metal layer contacts the second metal layer or the second metal layers, but does not contact the first metal layer or the first metal layers, although it also extends above the region of the first metal layer.
[0013] If there are multiple subarrays and therefore multiple first metal layers, they are collectively referred to as the first metal layer hereinafter. If there are multiple second metal layers, they are collectively referred to as the second metal layer.
[0014] The advantages of the laser array according to the invention are that the third and fourth metal layers can be formed over a large area while still being sufficiently spaced apart from each other, making them particularly suitable as pads for soldering electronic components. The first and second metal layers can have relatively thick metal layers, particularly strip-shaped metal layers, on their sides facing the third and fourth metal layers as described above. The third and fourth metal layers can also be designed as thick metal layers. Overall, the laser array according to the invention can be manufactured simply and cost-effectively.
[0015] The third metal layer is used to contact the laser via the first metal layer according to a first polarity (e.g., p-type polarity), while the fourth metal layer is used to contact the laser via the second metal layer according to a second polarity (e.g., n-type polarity). Therefore, the third and fourth metal layers can form the anode and cathode of the laser array.
[0016] The first metal layer extends over the lasers of the respective subarray. The second metal layer is preferably disposed in one or more regions outside one or more subarrays.
[0017] If the laser array has at least two subarrays spaced apart from each other, the second metal layer is preferably arranged in the middle region between the subarrays.
[0018] In this design, the laser is contacted on the side of the active region facing the substrate, thus taking place in a region of the array where no light is emitted. In the case of a strip-shaped rectangular subarray, this has the advantage that the current paths to each laser in the subarray are equal.
[0019] In addition to or alternative to the design described above, a second metal layer may surround one or more subarrays. Advantageously, the subarrays may be arranged with a smaller distance between them, since the area between the subarrays is not, or only to a smaller extent, what is needed for contacting the laser via the second metal layer.
[0020] Preferably, at least one through hole in the semiconductor layer structure has an elongated shape with an aspect ratio greater than 10, optionally greater than 20, and further optionally greater than 40 in a direction parallel to the plane of the substrate.
[0021] The advantage in this case is that the through-hole, due to its elongated shape, maximizes the open area of the layer exposed (e.g., n-doped) when the through-hole is etched, while the transverse dimension of the through-hole to its longitudinal extension direction is small for, for example, applying a second metal layer to the exposed semiconductor layer (at substrate-side contact), thereby making the distance between the lasers at substrate-side contact advantageously shorter.
[0022] At least one via in the semiconductor layer structure may have an elongated shape in a direction parallel to the plane of the substrate, with the length of the short side being less than 20 µm, optionally less than 15 µm, and further optionally less than 10 µm.
[0023] Since at least one via in the semiconductor layer structure extends to a certain depth in the semiconductor layer structure, the very small size of the at least one via, which is transverse to its longitudinal extension direction, is advantageous for the deposition of the second metal layer, which contacts the laser on the substrate side of the active layer.
[0024] Preferably, one or more subarrays have a rectangular shape, wherein at least one side of the rectangle extends parallel to at least one through-hole in the semiconductor layer structure and preferably has a length substantially equal to that of the at least one through-hole. Advantageously, the distance from each laser in the subarray or these subarrays to its nearest substrate-side contact is substantially the same for all lasers. Thus, it is generally concluded that the current path lengths to the individual lasers in substrate-side contact are equal.
[0025] In particular, in conjunction with the above design scheme, according to the design scheme, a second metal layer surrounds the subarray or these subarrays on the periphery of one or more subarrays, and more preferably, at least one perforation in the semiconductor layer structure surrounds the subarray or these subarrays on the periphery of the subarray or these subarrays.
[0026] More preferably, the third and fourth metal layers have the same height level on the upper side, above the substrate. This is particularly advantageous for the applicability of laser arrays as SMDs.
[0027] Furthermore, preferably, the third and fourth metal layers have the same shape and / or area dimensions. This is also advantageous in terms of the suitability of the laser array as an SMD.
[0028] Preferably, the upper sides of the first and second metal layers have the same height level above the substrate. This is particularly advantageous for the manufacturing process of the laser array, as it facilitates the application of the insulating layer, the perforations in the insulating layer, and the application of the third and fourth metal layers.
[0029] Preferably, in relation to the suitability of the laser array according to the invention as an SMD, the distance between the third metal layer and the fourth metal layer is greater than 100 µm, optionally greater than 150 µm and less than 300 µm.
[0030] Furthermore, the present invention also provides a method for manufacturing a laser array emitting light from a substrate of a laser array, as described in claim 13. Advantages of the manufacturing method according to the invention can be derived from advantages of the laser array according to the invention. Similarly, preferred designs of the manufacturing method according to the invention can be derived from preferred designs of the laser array according to the invention.
[0031] In this manufacturing method, at least one through hole in the semiconductor layer structure is manufactured by etching the semiconductor layer structure until it reaches the substrate, or until it enters the substrate, or until it reaches the layer between the substrate and the active region.
[0032] Other advantages and features are derived from the following description and figures.
[0033] It is understood that, without departing from the scope of the invention, the features mentioned above and those set forth below can be used not only in combinations described separately, but also in other combinations or individually. Attached Figure Description
[0034] Embodiments of the invention are illustrated in the accompanying drawings, and these embodiments will be described in more detail below with reference to the drawings. In the drawings: Figure 1 A top-down view shows the laser array in the first stage of its manufacturing process; Figure 1A A cross-section of the resonant region of a single laser in the array is shown; Figure 2 A top-down view shows another stage of its manufacturing process. Figure 1 The laser array in; Figure 3 A top-down view shows another stage of its manufacturing process. Figure 2 The laser array in; Figure 3A It shows Figure 3 A cross-section of a portion of the laser array; Figure 4 A top-down view shows another stage of its manufacturing process. Figure 3 The laser array in; Figure 4A It shows Figure 4 A cross-section of a portion of the laser array; Figure 5 A top-down view shows another stage of its manufacturing process. Figure 4 The laser array in; Figure 5A It shows Figure 5 A cross-section of a portion of the laser array; Figure 6 A top-down view shows another stage of its manufacturing process. Figure 5 The laser array in; Figure 7 A top-down view shows the final stage of its manufacturing process. Figure 6 The laser array in; Figure 8 A modified design of a laser array at a certain stage of its manufacturing process is shown in a top view. Figure 9 A top-down view shows another stage of its manufacturing process. Figure 8 The laser array in; Figure 10 A top-down view shows another stage of its manufacturing process. Figure 9 The laser array in; and Figure 11 A top-down view shows the final stage of its manufacturing process. Figure 10 The laser array in the middle. Detailed Implementation
[0035] refer to Figures 1 to 7 A first embodiment of the laser array 10 will be described, wherein the laser array 10 is composed of a substrate 12 ( Figure 1A It emits light. Figures 1 to 7 The structure and various stages of manufacturing of the laser array 10 are shown.
[0036] The laser array 10 has a plurality of lasers 14, the positions of which are defined, for example, by etching a plurality of mesa. The mesa created by the etching are correspondingly separated from each other by trenches 16. Each laser has a semiconductor layer structure, which is schematically shown in… Figure 1A The diagram shows a first Bragg reflector 18, a second Bragg reflector 20, and an active region 22 between the first and second Bragg reflectors on a substrate 12. The first Bragg reflector 18 may be p-doped, while the second Bragg reflector 20 may be n-doped, or vice versa. Light emission through the substrate 12 is indicated by arrow 13. Multiple lasers 14 are grouped to form one or more subarrays 24, 26, and 28 spaced apart from each other. In the example shown, the laser array 10 has three subarrays. However, it is also possible to have more or fewer than three subarrays.
[0037] As shown, subarrays 24, 26, and 28 preferably have an elongated rectangular shape. Corresponding regions 30 and 32 between subarrays 24 and 26, or 26 and 28, also have an elongated rectangular shape. Regions 30 and 32 not occupied by lasers 14 serve as areas for contacting lasers 14 on the side of the active region 22 facing the substrate, as will be further described below. Therefore, the current path from these contacts to lasers 14 can be kept short and can be kept the same or at least similar for all lasers 14.
[0038] When a laser 14 is fabricated from a semiconductor layer structure that can be epitaxially grown by etching the mesa, oxidation can be performed after etching to create a current aperture. However, the current aperture can also be defined by proton injection or locally by tunneling transition, etc. Figure 1 The diagram illustrates three different possible designs for laser 14. In subarray 24, lasers 14 are generally formed as individual lasers 14. Subarray 26 is a connected region where lasers are joined together at diagonal connection points 34. This design offers the advantage of allowing for smaller distances between lasers and improved array mechanical stability. In subarray 28, the connection points 34 extend even into the non-laser peripheral region 36 of array 10, further enhancing mechanical stability.
[0039] It is understandable that the subarrays 24, 26 and 28 of the laser array can be identical to each other, that is, the laser array 10 can have a design scheme based on subarray 24, based on subarray 26 or based on subarray 28 in all subarrays 24, 26 and 28.
[0040] exist Figure 1 Another example is shown in the diagram, which can also be used to contact the laser on the side of the active region 22 facing the substrate 12, and is isolated from the laser region, for example by etching or proton injection.
[0041] based on Figure 1 , Figure 2Another stage in the manufacturing process of the laser array 10 is shown. In this stage, a contact 40A is formed on the laser 14, specifically on the side of the active region 22 facing away from the substrate 12. The contact 40A can be, for example, a p-contact. However, this is not mandatory, and the contact 40A can also be an n-contact. In the embodiment further described below, the contact 40A is formed as a p-contact. The contact 40A is a metal layer of the corresponding first metal layer 40 above the first Bragg reflector 18. Preferably, a passivation layer is applied around the mesa (laser 14) before or after metallization to form the contact 40A. Since the array 10 in the illustrated example has three subarrays 24, 26, and 28, there are three first metal layers 40, one on each of the subarrays 24, 26, and 28. However, hereinafter, they are collectively referred to as the first metal layer 40.
[0042] based on Figure 2 , Figure 3 and Figure 3A The laser array 10 is shown in another stage of its fabrication. In this stage, deep, slot-shaped vias or apertures 42 are etched into the semiconductor layer structure in isolated regions 30, 32 (i.e., between subarrays 24, 26, and 28). The vias 42 have an elongated shape and extend parallel to the long sides of subarrays 24, 26, and 28. The length of the via is equal to or substantially equal to the length of the long sides of subarrays 24, 26, and 28.
[0043] Elongated perforation 42 Figure 3A The image is shown in cross-section. The perforation 42 may extend all the way into the substrate 12, or all the way into the contact layer between the substrate 12 and the second Bragg reflector 20, or only all the way into the second Bragg reflector 20. In this embodiment, the perforation or via 42 has an elongated shape, thus maximizing the open area of the exposed (n-doped) contact layer, while the dimensions of each perforation or via 42 in the direction perpendicular to its longitudinal extension direction are advantageously kept small for the subsequent two steps.
[0044] Preferably, the aspect ratio of the elongated shape of the through-hole 42 in the semiconductor layer structure in the direction parallel to the plane of the substrate 12 is greater than 10, optionally greater than 20, and further optionally greater than 40. Here, the length of the short side of the through-hole or via 42 can be less than 20 µm, optionally less than 15 µm, and further optionally less than 10 µm.
[0045] Perforated or through hole 42 (e.g.) Figure 3(As shown) Extends parallel to the long sides of subarrays 24, 26, and 28 and preferably has the same length as subarrays 24, 26, and 28 as described above. Thus, a current path substantially the same or at least very similar to that of the laser 14 contacting the substrate side is provided on the side of the active region 22 facing the substrate 12.
[0046] based on Figure 3 , Figure 4 The laser array 10 is shown at another stage of its manufacturing process. Compared to Figure 3 The illustration in the image, Figure 4 The illustration in the diagram has been rotated 90°. At this stage, a second metal layer 44 is applied above the first Bragg mirror 18 on regions 30 and 32 where the perforations 42 exist. This second metal layer 44 is electrically or electrically decoupled from the first metal layer 40 (i.e., contact 40A). The second metal layer 44 forms contacts 44A that penetrate the perforations 42 in the semiconductor layer structure to contact the laser 14 on the side of the active layer 22 facing the substrate 12. Here, the second metal layer 44 is deposited on the bottom of the perforations 42, as shown... Figure 4A As shown. Since it is impossible or difficult to achieve photolithographic structuring in deep and narrow vias 42, it is preferable that the defined region 46 is also covered by the metal of the second metal layer 44, as shown. Figure 4A As shown. More preferably, the sidewalls of the deep perforation 42 are also metallized (not shown), thereby making it easier to fill the perforation 42 in subsequent steps. Depending on the number of the three subarrays 24, 26, 28, there are two separate second metal layers 44 in the illustrated embodiment. However, they are collectively referred to as the second metal layer 44 in this specification.
[0047] based on Figure 4 , Figure 5 and Figure 5A The laser array 10 is shown at another stage of its manufacturing process. Figure 5 With Figure 4The same orientation. At this stage, a thick first metal layer 40B is applied to the subarrays 24, 26, and 28 containing lasers 14. More precisely, the metal layer 40B is applied to the contact portion 40A and thus completes the first metal layer 40. Therefore, the first metal layer 40 extends over all the lasers 14 in each of the subarrays 24, 26, and 28 and serves to contact the lasers 14 on the side of the active region 22 facing away from the substrate 12. Similarly, at this stage, a thick second metal layer 44B is applied to the intermediate regions 30 and 32 respectively, completing the second metal layer 44. Preferably, the thick first metal layer 40B and the second metal layer 44B are applied by electrodeless plating, which enables the thick metal layer. The thickness of the second metal layer 44B should be large enough to at least partially, and completely, fill the deep perforations 42 (e.g., the present invention) with metal. Figure 5A As shown), the method is to achieve electrical connection of the n-doped region's n-contact to the same extent as the p-contact (e.g., Figure 5A (As shown). The first metal layer 40 and the second metal layer 44 preferably have the same height level on the upper side, above the substrate 12. Furthermore, Figure 5A The passivation layer 47 on the Bragg reflector 18 and the barrier layer 49 on the thick metal layer 44B are shown.
[0048] based on Figure 5 , Figure 6 The laser array 10 is shown at another stage of its manufacturing process. Compared to Figure 5 The illustration in the image, Figure 6 It was rotated 90°, that is, it has the same... Figure 3 The same orientation. At this stage, an insulating or passivation layer 48 is applied to the first metal layer 40 and the second metal layer 44 (more precisely, to metal layers 40B and 44B), which passivates the surfaces of the metal layers 40 and 44. Through-holes or channels 51, 53 are introduced in the insulating layer 48, through which the metal layers 40 (40B) and 44 (44B) are partially exposed.
[0049] based on Figure 6 , Figure 7 The final stage of laser array 10 is shown. Figure 7 With Figure 6 The same orientation. At this stage, a third metal layer 50 and a fourth metal layer 52 have been applied over the insulating layer 48. Metal layers 50 and 52 are also formed as thick metal layers. The third metal layer 50 contacts the first metal layer 40 via a perforation 51 in the insulating layer 48. The third metal layer 50 extends over the region of the first metal layer 40 and over the region of the second metal layer 44 (e.g., from...). Figure 6 and Figure 7(It is known that), but it is isolated from the second metal layer 44 via the insulating layer 48. The fourth metal layer 52 above the insulating layer 48 contacts the second metal layer 44 through the second perforation 53 in the insulating layer 48. The fourth metal layer 52 is electrically separated from the third metal layer 50 via the insulating layer 48. The fourth metal layer 42 also extends above the region of the first metal layer 40 and the second metal layer 44, as... Figure 6 and Figure 7 As shown, it is isolated from the first metal layer 40 via the insulating layer 48.
[0050] In this embodiment, the third metal layer 50 is used as the anode of the laser array 10, while the fourth metal layer 52 is used as its cathode.
[0051] Therefore, the third metal layer 50 contacts the laser on the side of the active layer 22 away from the substrate 12, while the fourth metal layer 52 contacts the laser 14 on the side of the active layer 22 facing the substrate 12.
[0052] Thick metal layers 40 and 44 (on one hand), thick metal layers 50 and 52 (on the other hand), and an insulating layer 48 between metal layers 40 and 44 (on one hand) and metal layers 50 and 52 (on the other hand) decouple the solder terminal side of the array 10 from the contact side of the anode and cathode contacts of the laser 14. The laser array 10 is readily adaptable for reflow soldering with solder paste (as is used in SMT) because the solder surfaces (i.e., the upper sides of metal layers 50 and 52) can be large, and the distance between the solder surfaces on metal layers 50 and 52 can be sufficiently large, typically >100 µm, preferably >150 µm, while the arrangement of the contacts on the laser 14 and the substrate side can be optimized independently of each other. For the latter, a fine structure is provided in the laser array 10 that minimizes the distance from the contacts on the substrate side to the laser, and on the other hand, maximizes the chip area used for the laser. At the same time, the lasers can be distributed over most of the chip area, which results in better thermal management compared to chip designs where the same amount of lasers are concentrated in a part of the chip.
[0053] In particular, the upper sides of the third and fourth metal layers 50 and 52 can have the same height level above the substrate 12, which is beneficial for further processing of the laser array 10 into SMD.
[0054] In the illustrated embodiment, the third metal layer and the fourth metal layers 50 and 52 have the same shape and / or area dimensions, which is also advantageous.
[0055] In particular, the thick first metal layers 40A, 40B and second metal layers 44A, 44B used for contacting the laser on the anode and cathode sides reduce the number of processing steps required to manufacture the laser array. Because the thick metal layers additionally planarize the chip, the thin insulating layer 48, as well as the third and fourth metal layers 50 and 52, can be produced with simple processing steps and used to achieve larger solder contacts at the same height level, and both solder contact surfaces on metal layers 50 and 52 can extend over the thick first and second metal layers 40A, 40B and 44A, 44B.
[0056] refer to Figures 8 to 11 This describes a modified embodiment of laser array 10', wherein light is emitted from substrate 12 of laser array 10'. Only the differences between laser array 10' and laser array 10 are described. Components of laser array 10' that are the same, similar, or equivalent to those of laser array 10 are given the same reference numerals (supplemented only by superscript apostrophes).
[0057] Figure 8 It shows the stage and Figure 3 The laser array 10' corresponds to the laser array 10 in the laser array 10. The difference between the laser array 10 and the laser array 10 is that, although the subarrays 24', 26', and 28' with laser 14' are also formed as rectangles, the intermediate regions 30' and 32' between the subarrays 24', 26', and 28' are narrower than the intermediate regions 30 and 32 of the laser array 10. The outer region 36' and the region 37' between the subarrays 24', 26', and 28' are isolated by ion implantation. In the intermediate regions 30' and 32', there is only one deep through-hole 42' in each of the semiconductor layer structures, while another through-hole 80' in the semiconductor layer structure is arranged annularly around the outer periphery of the subarrays 24', 26', and 28' to contact the laser on the side of the active layer 22 facing the substrate 12. Therefore, the subarrays 24', 26', and 28' can be arranged with a small distance between them because the outer region around the subarrays is also used to contact the laser 14' on the substrate side.
[0058] Figure 9 The laser array 10' and Figure 5 This corresponds to the phase of the laser array 10. Here, the first metal layer 40' again covers the laser 14' so as to contact the laser 14' on the side of the active region 22' facing away from the substrate 12'. The second metal layer 44' is located between the subarrays 24', 26' and 28', and also (corresponding to the through hole 80') surrounds the outer periphery of the subarrays 24', 26' and 28' and is used to contact the laser 14' on the substrate side.
[0059] Figure 10 It shows its manufacturing stage and Figure 6The laser array 10' corresponds to the stage of the laser array 10 in the middle. Here, there are perforations 51' and 53' in the insulating layer or passivation layer 48', which expose the first metal layer 40' and the second metal layer 44'.
[0060] Figure 11 It shows the stage and Figure 7 The laser array 10' corresponds to the stage of the laser array 10 in the middle. Figure 11 In this process, a third metal layer 50' and a fourth metal layer 52' are applied on the insulating layer 48', wherein the third metal layer 50' forms the cathode of the laser array 10' and the fourth metal layer 52' forms its anode for contacting the laser 14'.
[0061] In this embodiment, when the laser 14' is not achieved through full trench etching or mesa etching, but rather by etching through-holes on only four or more sides of the semiconductor layer structure, the annular second metal layer 44' also forms a protective ring to protect the laser 14' from moisture. This ensures that although several lasers 14' are formed after oxidation, the lasers 14' are connected to their adjacent lasers via the complete semiconductor layer structure. Furthermore, ion implantation is used here to electrically isolate the laser 14' from regions where substrate-side contacts are formed within and around deep through-holes in the semiconductor layer structure.
Claims
1. A laser array that emits light through a substrate (12) of the laser array, wherein, The laser array has: - A plurality of lasers (14) on the substrate, each laser (14) being designed as a vertical cavity surface-emitting laser (VCSEL), wherein each laser (14) has a semiconductor layer structure including a first Bragg mirror (18), a second Bragg mirror (20) and an active region (22) between the first Bragg mirror (18) and the second Bragg mirror (20), wherein the plurality of lasers (14) are grouped to form one or more spaced subarrays (24, 26, 28) of the laser array. - At least one first metal layer (40) contacts the laser (14) of the one or more subarrays (24, 26, 28) on the side of the active region (22) of the laser (14) away from the substrate (12). - At least one second metal layer (44) is current-dissipated from the at least one first metal layer (40), and the at least one second metal layer (44) contacts the laser (14) of the one or more subarrays (24, 26, 28) through at least one through hole (42) in the semiconductor layer structure on the side of the active layer (22) facing the substrate (12), wherein the at least one through hole (42) extends to the substrate (12) or into the substrate (12) or to a layer between the substrate (12) and the active region (22); - An insulating layer (48) above the at least one first metal layer (40) and the at least one second metal layer (44). - A third metal layer (50) above the insulating layer (48), the third metal layer (50) contacting the at least one first metal layer (40) through a first perforation (51) in the insulating layer (48), and extending above the region of the at least one first metal layer (40) and the region of the at least one second metal layer (44); and - A fourth metal layer (52) above the insulating layer (48), the fourth metal layer (52) contacting the at least one second metal layer (44) through a second perforation (53) in the insulating layer (48), being electrically separated from the third metal layer (50), and extending above the regions of the at least one first metal layer (40) and the at least one second metal layer (44).
2. The laser array according to claim 1, wherein, The at least one second metal layer (44) is disposed in one or more regions outside the one or more subarrays (24, 26, 28).
3. The laser array according to claim 1 or 2, wherein, The laser array has at least two subarrays (24, 26, 28), wherein at least one second metal layer (44) is arranged in the intermediate region between adjacent subarrays (24, 26, 28).
4. The laser array according to any one of claims 1 to 3, wherein, The at least one second metal layer (44) surrounds the one or more subarrays (24, 26, 28) on the outer periphery of the one or more subarrays (24, 26, 28).
5. The laser array according to any one of claims 1 to 4, wherein, The at least one first metal layer (40) and the at least one second metal layer (44) each have thick metal layers (40B, 44B).
6. The laser array according to any one of claims 1 to 5, wherein, The aspect ratio of the elongated shape of the at least one perforation (42) in the semiconductor layer structure in a direction parallel to the plane of the substrate (12) is greater than 10, optionally greater than 20, and further optionally greater than 40.
7. The laser array according to any one of claims 1 to 6, wherein, The length of the short side of the elongated shape of the at least one perforation (42) in the semiconductor layer structure in a direction parallel to the plane of the substrate (12) is less than 20 µm, optionally less than 15 µm, and further optionally less than 10 µm.
8. The laser array according to claim 6 or 7, wherein, The one or more subarrays (24, 26, 28) have a rectangular shape, wherein at least one side of the rectangle extends parallel to the at least one via (42) in the semiconductor layer structure and preferably has a length substantially equal to that of the at least one via (42).
9. The laser array according to any one of claims 1 to 8, wherein, The at least one perforation (42) in the semiconductor layer structure surrounds the one or more subarrays (24, 26, 28) on the outer periphery of the one or more subarrays.
10. The laser array according to any one of claims 1 to 9, wherein, The upper sides of the third metal layer (50) and the fourth metal layer (52) have the same height level above the substrate (12).
11. The laser array according to any one of claims 1 to 10, wherein, The third metal layer (50) and the fourth metal layer (52) have the same shape and / or area size.
12. The laser array according to any one of claims 1 to 11, wherein, The upper sides of the first metal layer (40) and the second metal layer (44) have the same height level above the substrate (12).
13. The laser array according to any one of claims 1 to 12, wherein, The lateral distance between the third metal layer (50) and the fourth metal layer (52) is greater than 100 µm, optionally greater than 150 µm, and less than 300 µm.
14. A method for manufacturing a laser array, the laser array emitting light through a substrate (12) of the laser array, the method comprising the steps of: - A plurality of lasers (14) are fabricated on the substrate (12), each of the lasers (14) being designed as a vertical cavity surface-emitting laser (VCSEL), wherein the plurality of lasers (14) are grouped to form one or more spaced subarrays (24, 26, 28) of the laser array; wherein each of the lasers (14) has a semiconductor layer structure having a first Bragg mirror (18), a second Bragg mirror (20), and an active region (22) between the first Bragg mirror (18) and the second Bragg mirror (20). - Apply at least one first metal layer (40) over the first Bragg reflector (18), the at least one first metal layer (40) contacting the laser (14) of the one or more subarrays (24, 26, 28) on the side of the active region (18) of the laser (14) away from the substrate (12). - At least one second metal layer (44) is applied over the first Bragg reflector (18), the at least one second metal layer (44) being current-dissipated from the at least one first metal layer (40), and the at least one second metal layer (44) contacts the lasers (14) of the one or more subarrays (24, 26, 28) through at least one perforation (42) in the semiconductor layer structure on the side of the active layer (22) facing the substrate (12), wherein the at least one perforation (42) extends to the substrate (12) or extends into the substrate (12) or extends to the layer between the substrate (12) and the active region (22); - An insulating layer (48) is applied over the at least one first metal layer (40) and the at least one second metal layer (44). - A third metal layer (50) is applied over the insulating layer (48), the third metal layer (50) contacting the first metal layer (40) through a first perforation (51) in the insulating layer (48), and extending over the regions of the at least one first metal layer (40) and the at least one second metal layer (44); and - A fourth metal layer (52) is applied over the insulating layer (48), the fourth metal layer (52) contacting the at least one second metal layer (44) through a second perforation (53) in the insulating layer (48), being current-separated from the third metal layer (50), and extending over the regions of the at least one first metal layer (40) and the at least one second metal layer (44).
15. The method according to claim 14, wherein, The at least one via (42) in the semiconductor layer structure is made by etching the semiconductor layer structure until it reaches the substrate (12), or until it enters the substrate (12), or until it reaches the layer between the substrate (12) and the active region (22).