Power amplification circuit and power amplification device

Abstract

The power amplifier circuit includes: a first carrier amplifier that amplifies a first branch signal branching from a first signal that is one of the balanced signals, and outputs a first amplified signal from a first output terminal; a first peak amplifier that amplifies a second branch signal branching from the first signal and having a phase different from that of the first branch signal, and outputs a second amplified signal from a second output terminal; a second carrier amplifier that amplifies a third branch signal branching from the second signal that is the other of the balanced signal, and outputs a third amplified signal from a third output terminal; a second peak amplifier that amplifies a fourth branch signal branching from the second signal and having a phase different from that of the third branch signal, and outputs a fourth amplified signal from a fourth output terminal; a first wiring; a second wiring; and a third wiring that is electromagnetically coupled to the first wiring and the second wiring respectively, and connected to ground, wherein the first wiring is disposed closer to the third wiring than to the second wiring, and the second wiring is disposed closer to the third wiring than to the first wiring.

Description

Technical Field

[0001] This invention relates to a power amplifier circuit and a power amplifier device. Background Technology

[0002] There is a power amplifier circuit in which the Dougherty amplifier is composed of a differential structure and an impedance conversion transformer is connected to the differential output terminal (for example, see Patent Document 1).

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2022-90557 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] In the power amplifier circuit described in Patent Document 1, the output characteristics sometimes change depending on the wiring layout.

[0008] The present invention was made in view of the following circumstances, and its object is to provide a power amplifier circuit and a power amplifier device that can achieve good output characteristics.

[0009] Solution for solving the problem

[0010] One aspect of the present invention relates to a power amplifier circuit comprising: a first carrier amplifier that amplifies a first branch signal branching from a first signal that is one of the balanced signals, and outputs a first amplified signal from a first output terminal; a first peak amplifier that amplifies a second branch signal branching from the first signal and having a phase different from that of the first branch signal, and outputs a second amplified signal from a second output terminal; a second carrier amplifier that amplifies a third branch signal branching from the second signal that is the other of the balanced signal, and outputs a third amplified signal from a third output terminal; a second peak amplifier that amplifies a fourth branch signal branching from the second signal and having a phase different from that of the third branch signal, and outputs a fourth amplified signal from a fourth output terminal; and a first capacitor having a first peak amplifier ... The device comprises: an output terminal connected to one end and an output terminal connected to the third output terminal; a second capacitor having an output terminal connected to the second output terminal and an output terminal connected to the fourth output terminal; a first wiring having an output terminal connected to the first output terminal and an output terminal connected to the second output terminal; a second wiring having an output terminal connected to the third output terminal and an output terminal connected to the fourth output terminal; a balun connected between the first wiring and the second wiring; and a third wiring electromagnetically coupled to the first wiring and the second wiring respectively, and connected to ground, wherein the first wiring is located closer to the third wiring than to the second wiring, and the second wiring is located closer to the third wiring than to the first wiring.

[0011] One aspect of the present invention relates to a power amplifier device having the aforementioned power amplifier circuit, the power amplifier device comprising: a semiconductor chip having a first carrier amplifier, a first peak amplifier, a second carrier amplifier, and a second peak amplifier formed thereon; and a substrate having a first wiring, a second wiring, the balun, and the third wiring formed thereon, and having the semiconductor chip disposed thereon.

[0012] The effects of the invention

[0013] According to the present invention, a power amplifier circuit and a power amplifier device capable of achieving good output characteristics can be provided. Attached Figure Description

[0014] Figure 1 This is the circuit diagram of power amplifier circuit 101.

[0015] Figure 2 This is a schematic diagram showing the cross sections of the power amplifier device 11, which has a power amplifier circuit 101, parallel to the xy plane.

[0016] Figure 3 This is a schematic perspective view of the power amplifier device 11.

[0017] Figure 4 This is the circuit diagram of power amplifier circuit 102.

[0018] Figure 5 This is a schematic diagram showing the cross sections of the power amplifier device 12, which has a power amplifier circuit 102, parallel to the xy plane.

[0019] Figure 6 This is a schematic diagram showing a cross-section of a power amplifier device 13 having a power amplifier circuit 101 or 102 formed, parallel to the zx plane.

[0020] Figure 7 This is a schematic diagram showing a cross-section of the power amplifier device 14, which has power amplifier circuits 101 or 102, parallel to the zx plane.

[0021] Figure 8 This is a schematic diagram showing a cross-section of a power amplifier device 15 having a power amplifier circuit 101 or 102 formed, parallel to the zx plane. Detailed Implementation

[0022] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings. Furthermore, the same reference numerals will be used to label the same elements, and repetitive descriptions will be omitted as much as possible.

[0023] [First Implementation]

[0024] The power amplifier circuit 101 according to the first embodiment will be described. Figure 1 This is the circuit diagram of power amplifier circuit 101. (For example...) Figure 1 As shown, the power amplifier circuit 101 includes a first wiring 21, a second wiring 22, a third wiring 23, a balun 61, a differential pair 141, capacitors 201 (first capacitor), 202 (second capacitor) and 205, and harmonic notch filters 301, 302, 303 and 304.

[0025] The differential pair 141 includes Dougherty amplifiers 151 and 153. Dougherty amplifier 151 includes a carrier amplifier 51 (first carrier amplifier) ​​and a peak amplifier 52 (first peak amplifier). Dougherty amplifier 153 includes a carrier amplifier 53 (second carrier amplifier) ​​and a peak amplifier 54 (second peak amplifier).

[0026] The power amplifier circuit 101 uses Dougherty amplifiers 151 and 153, which constitute a differential pair 141, to amplify one side (hereinafter, sometimes referred to as the first signal) and the other side (hereinafter, sometimes referred to as the second signal) of the balanced signal respectively, and outputs an output signal RFout as a single-ended signal.

[0027] In detail, the first and second signals are generated, for example, by an input signal distributed as a single-ended signal by a balun (not shown). The input signal is, for example, a radio frequency (RF) signal.

[0028] The phase of the first signal is different from the phase of the second signal. In this embodiment, the phase difference between the first signal and the second signal is approximately 180°. However, sometimes due to imbalances in the wiring length of the circuit, the phase difference between the first signal and the second signal may be much different from 180°.

[0029] The carrier amplifier 51 of the Dougherty amplifier 151 in the differential pair 141 amplifies the branch signal RF1 (first branch signal) branched from the first signal and outputs the amplified signal RF5 (first amplified signal) from the output terminal 51a (first output terminal).

[0030] Peak amplifier 52 amplifies branch signal RF2 (second branch signal) which branches out from the first signal and whose phase is different from that of branch signal RF1, and outputs amplified signal RF6 (second amplified signal) from output terminal 52a (second output terminal).

[0031] Branch signals RF1 and RF2 are generated, for example, by distributing a first signal through a distributor (not shown). The phase of branch signal RF1 just output from the distributor is, for example, the phase of branch signal RF2.

[0032] Branch signal RF2 is provided to peak amplifier 52, for example, via a quarter-wavelength line (not shown), while branch signal RF1 is provided directly to carrier amplifier 51. Therefore, the phase of branch signal RF2 provided to peak amplifier 52 lags by approximately 90 degrees compared to the phase of branch signal RF1 provided to carrier amplifier 51.

[0033] The carrier amplifier 53 of the Dougherty amplifier 153 in the differential pair 141 amplifies the branch signal RF3 (third branch signal) branched from the second signal and outputs the amplified signal RF7 (third amplified signal) from the output terminal 53a (third output terminal).

[0034] Peak amplifier 54 amplifies branch signal RF4 (fourth branch signal) which branches out from the second signal and has a phase different from that of branch signal RF3, and outputs amplified signal RF8 (fourth amplified signal) from output terminal 54a (fourth output terminal).

[0035] Branch signals RF3 and RF4 are generated, for example, by distributing a second signal through a distributor (not shown). The phase of branch signal RF3, which is just output from the distributor, is, for example, in sync with the phase of branch signal RF4.

[0036] Branch signal RF4 is provided to peak amplifier 54, for example, via a quarter-wavelength line (not shown), while branch signal RF3 is provided directly to carrier amplifier 53. Therefore, the phase of branch signal RF4 provided to peak amplifier 54 lags by approximately 90 degrees compared to the phase of branch signal RF3 provided to carrier amplifier 53.

[0037] Capacitor 201 has one end connected to the output terminal 51a of carrier amplifier 51 and the other end connected to the output terminal 53a of carrier amplifier 53. Capacitor 202 has one end connected to the output terminal 52a of peak amplifier 52 and the other end connected to the output terminal 54a of peak amplifier 54.

[0038] The first wiring 21, the second wiring 22, and the third wiring 23 are each processed as distributed parameter circuits. That is, each wiring has an inductance per unit length in its extension direction. In addition, there is a capacitance per unit length in the extension direction of the wiring between the wirings.

[0039] The first wiring 21 has a first end connected to the output terminal 51a of the carrier amplifier 51 and a second end connected to the output terminal 52a of the peak amplifier 52. In this embodiment, the first wiring 21 includes wirings 211, 212, and 213. A node N1 (first node) is provided on the first wiring 21 between the first end and the second end, and a node N2 (second node) is provided between the first end and node N1. Wirings 211, 212, and 213 are, for example, electrodes or vias.

[0040] Wiring 211 has one end connected to the output terminal 51a of the carrier amplifier 51, i.e., the first end, and the other end connected to node N2. Wiring 212 has one end connected to node N2 and the other end connected to node N1. Wiring 213 has one end connected to node N1 and the other end connected to the output terminal 52a of the peak amplifier 52, i.e., the second end.

[0041] In this embodiment, the inductance of wiring 211 is approximately the same as that of wiring 212. The inductance of wiring 213 is smaller than that of both wiring 211 and wiring 212.

[0042] The second wiring 22 has a third terminal connected to the output terminal 53a of the carrier amplifier 53 and a fourth terminal connected to the output terminal 54a of the peak amplifier 54. In this embodiment, the second wiring 22 includes wirings 221, 222, and 223. A node N3 (third node) is provided between the third terminal and the fourth terminal, and a node N4 (fourth node) is provided between the third terminal and node N3. Wirings 221, 222, and 223 are, for example, electrodes or vias.

[0043] Wiring 221 has one end connected to the output terminal 53a of the carrier amplifier 53, i.e., the third end, and the other end connected to node N4. Wiring 222 has one end connected to node N4 and the other end connected to node N3. Wiring 223 has one end connected to node N3 and the other end connected to the output terminal 54a of the peak amplifier 54, i.e., the fourth end.

[0044] In this embodiment, the inductance of wiring 221 is approximately the same as that of wiring 222. The inductance of wiring 223 is smaller than that of both wiring 221 and wiring 222.

[0045] The third wiring 23 is electromagnetically coupled to the first wiring 21 and the second wiring 22, respectively, and is connected to ground. In this embodiment, the third wiring 23 includes wirings 231 and 232. Wirings 231 and 232 are, for example, electrodes or vias.

[0046] Wiring 231 has an open end and an open end, and is electromagnetically coupled to wirings 211 and 221 respectively. Wiring 232 has an end connected to the other end of wiring 231 and an end connected to ground, and is electromagnetically coupled to wirings 212 and 222 respectively. That is, wiring 231 is electromagnetically coupled to wiring 211 and to wiring 221. Wiring 232 is electromagnetically coupled to wiring 212 and to wiring 222.

[0047] Furthermore, a structure in which the other end of wiring 232 is connected to ground has been described, but it is not limited to this. It could also be a structure in which one end of wiring 232 or between one end and the other end of wiring 232 is connected to ground. Alternatively, it could be a structure in which multiple parts of wiring 232 are connected to ground.

[0048] Furthermore, the structure in which wiring 231 and wiring 232 are electrically connected has been described, but it is not limited to this. Wiring 231 and wiring 232 may also be non-electrically connected, with each of them connected to two independent grounds. In this case, one end or the other end of wiring 231, or both ends of wiring 231, may be connected to a ground. Alternatively, multiple portions of wiring 231 may be connected to ground. Furthermore, wiring 231 and 232 may be formed from a single wiring.

[0049] The first wiring 21 is positioned closer to the third wiring 23 than to the second wiring 22. The second wiring 22 is positioned closer to the third wiring 23 than to the first wiring 21. Details regarding the configuration of the first wiring 21, the second wiring 22, and the third wiring 23 will be described later.

[0050] A balun 61 is connected between the first wiring 21 and the second wiring 22. In this embodiment, the balun 61 is connected between node N1 and node N3. Specifically, the balun 61 includes inductors 61a and 61b.

[0051] Inductor 61a has one end connected to node N1 and the other end connected to node N3. Inductor 61b has one end for outputting the output signal RFout and connected to output terminal 32, and the other end connected to ground. Inductor 61b is electromagnetically coupled to inductor 61a.

[0052] Harmonic notch filters 301, 302, 303 and 304 are respectively connected between the output terminal 51a of carrier amplifier 51, the output terminal 52a of peak amplifier 52, the output terminal 53a of carrier amplifier 53 and the output terminal 54a of peak amplifier 54 and the ground terminal.

[0053] Specifically, the harmonic notch filter 301 includes an inductor 301a and a capacitor 301b. The inductor 301a has one end connected to the output terminal 51a of the carrier amplifier 51 and the other end. The capacitor 301b has one end connected to the other end of the inductor 301a and the other end connected to ground.

[0054] The harmonic notch filter 302 includes an inductor 302a and a capacitor 302b. The inductor 302a has one end connected to the output terminal 52a of the peak amplifier 52 and the other end. The capacitor 302b has one end connected to the other end of the inductor 302a and the other end connected to ground.

[0055] The harmonic notch filter 303 includes an inductor 303a and a capacitor 303b. The inductor 303a has one end connected to the output terminal 53a of the carrier amplifier 53 and the other end. The capacitor 303b has one end connected to the other end of the inductor 303a and the other end connected to ground.

[0056] The harmonic notch filter 304 includes an inductor 304a and a capacitor 304b. The inductor 304a has one end connected to the output terminal 54a of the peak amplifier 54 and the other end. The capacitor 304b has one end connected to the other end of the inductor 304a and the other end connected to ground.

[0057] Capacitor 205 has one end connected to node N2 and the other end connected to node N4.

[0058] In the accompanying figures, the x-axis, y-axis, and z-axis are sometimes shown. The x-axis, y-axis, and z-axis form a right-handed three-dimensional orthogonal coordinate system. Hereinafter, the direction of the arrow on the x-axis is sometimes referred to as the x-axis + side, and the direction opposite to the arrow is sometimes referred to as the x-axis - side; the same applies to the other axes. Furthermore, the z-axis + side and z-axis - side are sometimes referred to as the "upper side" and "lower side," respectively. Additionally, the z-axis direction is sometimes referred to as the "layering direction." Furthermore, the plane orthogonal to the x-axis, y-axis, or z-axis is sometimes referred to as the yz plane, zx plane, or xy plane, respectively. Here, the direction of clockwise rotation when viewing the lower side from the upper side is defined as the clockwise direction cw. The direction of counterclockwise rotation when viewing the lower side from the upper side is defined as the counterclockwise direction ccw.

[0059] Figure 2 This is a schematic diagram showing the cross sections of the power amplifier device 11, which has a power amplifier circuit 101, parallel to the xy plane. Figure 3 This is a schematic perspective view of the power amplifier device 11.

[0060] like Figure 2 and Figure 3 As shown, the power amplifier device 11 includes a multilayer substrate 401 and a semiconductor chip 501. The multilayer substrate 401 includes conductive layers 411 (first conductive layer) and 412 (second conductive layer), and dielectric layers 421 and 422. The dielectric layers 421 and 422 are disposed sequentially from top to bottom.

[0061] Dielectric layers 421 and 422 each have a surface that is substantially parallel to the xy plane and faces upward (hereinafter, sometimes referred to as the upper surface), and a surface that is substantially parallel to the xy plane and faces downward (hereinafter, sometimes referred to as the lower surface). The upper surface of dielectric layer 422 faces the lower surface of dielectric layer 421, which is located above dielectric layer 422. The same applies to other dielectric layers. Furthermore, the upper and lower surfaces may also have manufacturing irregularities or recesses for setting wiring layers.

[0062] A conductive layer 411 is provided on the upper side of the dielectric layer 421. A conductive layer 412 is provided on the upper side of the dielectric layer 422.

[0063] A portion of the first wiring 21, a portion of the second wiring 22, and a portion of the third wiring 23 are disposed on the conductive layer 411. Another portion of the first wiring 21, another portion of the second wiring 22, and another portion of the third wiring 23 are disposed on the conductive layer 412.

[0064] In detail, the laminated substrate 401 has a first wiring 21, a second wiring 22, a third wiring 23, and a balun 61. The semiconductor chip 501 has a carrier amplifier 51, a peak amplifier 52, a carrier amplifier 53, and a peak amplifier 54 (not shown).

[0065] Electrodes 211E, 221E, 231E and 61aE are formed in conductive layer 411. Electrodes 212E, 222E and 232E are formed in conductive layer 412.

[0066] Through-holes 212Va, 212Vb, 222Va, 222Vb and 231V extending along the stacking direction are formed in dielectric layer 421. Through-hole 232V extending along the stacking direction is formed in dielectric layer 422.

[0067] The electrode 211E in the conductive layer 411 has an end 211Ef that is electrically connected to the output terminal 51a of the carrier amplifier 51, and an end 211Es that is connected to the upper end of the through hole 212Va.

[0068] Electrode 211E has a shape that extends from end 212Ef toward end 212Es while changing its extending direction when viewed from above (see reference). Figure 2 and Figure 3 ).

[0069] In this embodiment, when the xy plane is viewed with the directions of north, east, south, and west respectively towards the y-axis+ side, x-axis+ side, y-axis- side, and x-axis- side, electrode 212E extends from end 211Ef to end 211Es while changing its extension direction in the order of southwest and south. Electrode 211E functions as wiring 211 in the power amplifier circuit 101.

[0070] Electrode 221E has an end 221Ef that is electrically connected to the output terminal 53a of carrier amplifier 53, and an end 221Es that is connected to the upper end of through hole 222Va.

[0071] The ends 221Ef and 221Es of electrode 221E are respectively located on the x-axis+ side of the ends 211Ef and 211Es of electrode 211E.

[0072] Electrode 221E has a shape that extends from end 221Ef toward end 221Es while changing its extending direction when viewed from above (see reference). Figure 2 and Figure 3 ).

[0073] In this embodiment, electrode 221E extends from end 221Ef to end 221Es while changing its extension direction in the order of southwest and south. Electrode 221E functions as wiring 221 in power amplifier circuit 101.

[0074] A component 201D (see reference) is connected to the upper side of ends 211Ef and 221Ef, which functions as a capacitor 201 in the power amplifier circuit 101. Figure 2 ).

[0075] A component 205D (see reference) is connected to the upper side of ends 211Es and 221Es, which functions as a capacitor 205 in the power amplifier circuit 101. Figure 2 Components 201D and 205D are, for example, surface mount devices (SMDs).

[0076] End units 211Es and 221Es are nodes N2 and N4 in the power amplifier circuit 101, respectively.

[0077] Electrode 231E is disposed between electrode 211E and electrode 221E. Electrode 231E extends along the y-axis. Electrode 231E functions as wiring 231 in the power amplifier circuit 101.

[0078] The y-axis + side end 231Ef of electrode 231E is located on the y-axis - side compared to the ends 211Ef of electrode 211E and 221Ef of electrode 221E. The y-axis - side end 231Es of electrode 231E is located on the y-axis + side compared to the ends 211Es of electrode 211E and 221Es of electrode 221E. The length of electrode 231E is shorter than the lengths of electrode 211E and electrode 212E.

[0079] The ends 231Ef and 231Es of electrode 231E are respectively connected to the upper ends of the two through holes 231V.

[0080] Electrode 61aE is disposed on the x-axis+ side of electrode 221E and is wound in the plane extending from conductive layer 411. In detail, electrode 61aE has an x-axis-side end 61aEf and an x-axis+ side end 61aEs that are electrically connected to the output terminal 52a of peak amplifier 52 and the output terminal 54a of peak amplifier 54, respectively.

[0081] The end 61aEf of electrode 61aE is located on the x-axis+ side of the end 221Ef of electrode 221E and is connected to the upper end of the two through holes 212Vb.

[0082] The end 61aEs of electrode 61aE is located on the x-axis+ side of end 61aEf and is connected to the upper end of the two through holes 222Vb.

[0083] When the power amplifier device 11 is viewed from above, the electrode 61aE is wound in the xy plane in a counterclockwise direction ccw for more than 3 / 4 turns but less than 1 turn from end 61aEf to end 61aEs.

[0084] A component 202D (see reference) is connected to the upper side of ends 61aEf and 61aEs, which functions as a capacitor 202 in the power amplifier circuit 101. Figure 2 ). Component 202D is, for example, a surface mount device.

[0085] End units 61aEf and 61aEs are nodes N1 and N3 in the power amplifier circuit 101, respectively.

[0086] The electrode 212E in the conductive layer 412 has an end 212Ef connected to the lower end of the via 212Va, and an end 212Es connected to the lower ends of the two vias 212Vb. The electrode 212E, as well as the vias 212Va and 212Vb, function as wiring 212 in the power amplifier circuit 101.

[0087] Electrode 212E has the following shape, which is such that when the power amplifier device 11 is viewed from above, it extends from end 212Ef toward end 212Es while changing its extending direction (see reference). Figure 2 and Figure 3 ).

[0088] In this embodiment, electrode 212E extends from end 212Ef to end 212Es while changing its extension direction in the order of north, northeast and east.

[0089] Electrode 222E has an end 222Ef connected to the lower end of via 222Va, and an end 222Es connected to the lower ends of the two vias 222Vb. Electrode 222E, as well as vias 222Va and 222Vb, function as wiring 222 in power amplifier circuit 101.

[0090] Electrode 222E has the following shape, which is such that when the power amplifier device 11 is viewed from above, it extends from end 222Ef toward end 222Es while changing its extending direction (see reference). Figure 2 and Figure 3 ).

[0091] In this embodiment, electrode 222E extends from end 222Ef to end 222Es while changing its extension direction in the order of east and northeast.

[0092] Electrode 232E is disposed between electrode 212E and electrode 222E. End 232Ef of electrode 232E is located between end 212Ef of electrode 212E and end 222Ef of electrode 222E. Electrode 232E functions as wiring 232 in power amplifier circuit 101.

[0093] Electrode 232E has the following shape, which is such that when the power amplifier device 11 is viewed from above, it extends from end 232Ef toward end 232Es while changing its extending direction (see reference). Figure 2 and Figure 3 ).

[0094] In this embodiment, electrode 232E extends from end 232Ef to end 232Es while changing its extension direction in the order of north and east.

[0095] The upper surface of electrode 232E is connected to the lower end of two through holes 231V. The lower surface of electrode 232E is connected to ground through five through holes 232V.

[0096] (Effect)

[0097] Assuming that in the structure without the third wiring 23, the electromagnetic coupling between the first wiring 21 and the second wiring 22 is increased when the first wiring 21 and the second wiring 22 are positioned close to each other. Therefore, when the outputs of the Dougherty amplifier 151 and the Dougherty amplifier 153 in the differential pair 141 are transmitted to the first wiring 21 and the second wiring 22 respectively, the inductance of the first wiring 21 and the second wiring 22 decreases, and the impedances observed from the Dougherty amplifier 151 and the Dougherty amplifier 153 change. Consequently, the characteristics of the output signal change.

[0098] In contrast, in the power amplifier circuit 101, by positioning the first wiring 21 closer to the third wiring 23 than to the second wiring 22, positioning the second wiring 22 closer to the third wiring 23 than to the first wiring 21, and connecting the third wiring 23 to ground, electromagnetic coupling between the first wiring 21 and the second wiring 22 can be suppressed. This suppresses the reduction in inductance of the first wiring 21 and the second wiring 22, and suppresses variations in the output signal characteristics caused by impedance changes observed in the Dougherty amplifier 151 and Dougherty amplifier 153, respectively.

[0099] Furthermore, the structure in which the first wiring 21, the second wiring 22, and the third wiring 23 are each formed across two conductive layers 411 and 412 has been described, but it is not limited to this. The first wiring 21, the second wiring 22, and the third wiring 23 may each be formed on one conductive layer, or they may be formed across three or more conductive layers.

[0100] [Second Implementation]

[0101] The power amplifier circuit 102 according to the second embodiment will be described. In the second embodiment and subsequent embodiments, descriptions of matters common to the first embodiment will be omitted, and only the differences will be described. In particular, the same effects obtained by the same structure will not be mentioned in each embodiment.

[0102] Figure 4 This is the circuit diagram of power amplifier circuit 102. (For example...) Figure 4 As shown, the power amplifier circuit 102 differs from the power amplifier circuit 101 in the first embodiment in that it includes capacitors 203 and 204 to replace capacitor 205 and harmonic notch filters 301, 302, 303 and 304.

[0103] Capacitor 203 has one end connected to node N2 and the other end connected to ground. Capacitor 204 has one end connected to node N4 and the other end connected to ground.

[0104] In this embodiment, the inductance of wiring 211 is approximately the same as that of wiring 212. The inductance of wiring 221 is approximately the same as that of wiring 222.

[0105] Figure 5 This is a schematic diagram showing the cross sections of the power amplifier device 12, which has a power amplifier circuit 102, parallel to the xy plane.

[0106] like Figure 5 As shown, in the power amplifier 12, and Figure 2 and Figure 3 Compared to the conductive layer 411 shown, electrodes 203E and 204E are also formed on the conductive layer 411.

[0107] Electrode 203E, for example, is a pad, located on the y-axis side of end 211Es of electrode 211E. Electrode 203E is connected to ground via through-hole 203V.

[0108] A component 203D, which functions as a capacitor 203 in the power amplifier circuit 102, is connected to the upper side of the electrode 203E and the end 211Es. Component 203D is, for example, a surface mount device.

[0109] Electrode 204E, for example, is a pad, located on the y-axis side of end 221Es of electrode 221E and the x-axis side of electrode 203E. Electrode 204E is connected to ground via through-hole 204V.

[0110] A component 204D, which functions as a capacitor 204 in the power amplifier circuit 102, is connected to the upper side of electrode 204E and end 221Es. Component 204D is, for example, a surface mount device.

[0111] Electrode 231E has the following shape, which is such that when the power amplifier device 12 is viewed from above, it extends from end 231Ef toward end 231Es while changing the direction of extension.

[0112] In this embodiment, electrode 231E extends from end 231Ef to end 231Es while changing its extension direction in the order of southwest and south.

[0113] The electrode 232E in the conductive layer 412 has the following shape, which is such that when the power amplifier device 12 is viewed from above, it extends from end 232Ef toward end 232Es while changing the direction of extension.

[0114] In this embodiment, electrode 232E extends from end 232Ef to end 232Es while changing its extension direction in the order of north, northeast, east and northeast.

[0115] [Third Implementation]

[0116] The power amplifier device 13 according to the third embodiment will be described. Figure 6 This is a schematic diagram showing a cross-section of a power amplifier device 13 having a power amplifier circuit 101 or 102 formed, parallel to the zx plane.

[0117] In power amplifier devices 11 and 12, the structures in which electrodes 211E, 221E, and 231E are disposed on conductive layer 411, and the structures in which electrodes 212E, 222E, and 232E are disposed on conductive layer 412, have been described, but are not limited thereto. It is also possible for the first wiring 21, the second wiring 22, and the third wiring 23 to be disposed on different conductive layers.

[0118] In this embodiment, the stacked substrate 401 in the power amplifier device 13 includes conductive layers 411, 412, and 413 (third conductive layers) and dielectric layers 421, 422, and 423. The dielectric layers 421, 422, and 423 are disposed sequentially from top to bottom.

[0119] The conductive layer 413 is located between the conductive layers 411 and 412. Specifically, the conductive layer 411 is disposed on the upper surface of the dielectric layer 421. The conductive layer 413 is disposed on the upper surface of the dielectric layer 422. The conductive layer 412 is disposed on the upper surface of the dielectric layer 423.

[0120] The first wiring 21, the second wiring 22 and the third wiring 23 are respectively disposed on the conductive layer 411a, the conductive layer 411b and the conductive layer 411c.

[0121] Specifically, conductive layer 411 includes an electrode 22E that functions as a second wiring 22. Conductive layer 412 includes an electrode 21E that functions as a first wiring 21. Conductive layer 413 includes an electrode 23E that functions as a third wiring 23.

[0122] In the power amplifier device 13, when viewed from above, electrode 22E and electrode 21E do not overlap. Specifically, electrode 21E is located below electrode 22E and on the x-axis + side. Electrode 23E is located between electrode 22E and electrode 21E.

[0123] [Fourth Implementation]

[0124] The power amplifier device 14 according to the fourth embodiment will be described. Figure 7 This is a schematic diagram showing a cross-section of the power amplifier device 14, which has power amplifier circuits 101 or 102, parallel to the zx plane.

[0125] like Figure 7As shown, the power amplifier device 14 according to the fourth embodiment differs from the power amplifier device 13 according to the third embodiment in that, when the power amplifier device 14 is viewed from above, the electrodes 22E and 21E overlap.

[0126] Specifically, electrode 21E is located below electrode 22E. Electrode 23E is located between electrode 22E and electrode 21E.

[0127] [Fifth Implementation]

[0128] The power amplifier device 15 according to the fifth embodiment will be described. Figure 8 This is a schematic diagram showing a cross-section of a power amplifier device 15 having a power amplifier circuit 101 or 102 formed, parallel to the zx plane.

[0129] like Figure 8 As shown, the power amplifier device 15 according to the fifth embodiment differs from the power amplifier device 13 according to the third embodiment and the power amplifier device 14 according to the fourth embodiment in that the electrode 23E is not disposed between the electrode 21E and the electrode 22E.

[0130] In the power amplifier device 15, electrode 21E is positioned closer to electrode 23E than to electrode 22E. That is, the distance between electrode 21E and electrode 23E is smaller than the distance between electrode 21E and electrode 22E.

[0131] Electrode 22E is positioned closer to electrode 23E than to electrode 21E. That is, the distance between electrode 22E and electrode 23E is smaller than the distance between electrode 22E and electrode 21E.

[0132] Specifically, electrode 22E is disposed on the upper side of dielectric layer 421. Electrode 23E is located below electrode 22E on the x-axis + side, embedded in dielectric layer 421 at a position lower than the upper side. Electrode 21E is located above electrode 23E on the x-axis + side, disposed on the upper side of dielectric layer 421.

[0133] Furthermore, in this embodiment, a structure in which a third wiring 23 is not provided between wiring 213 and wiring 223 has been described, but it is not limited to this. A structure in which a third wiring 23 is provided between wiring 213 and wiring 223 is also possible.

[0134] In addition, preferred options include Figure 2 As shown in electrode 232E, the third wiring 23 is positioned at the position closest to the first wiring 21 and the second wiring 22.

[0135] The exemplary embodiments of the present invention have been described above. In power amplifier circuits 101 and 102, carrier amplifier 51 amplifies a branch signal RF1 branching from a first signal that is one of the balanced signals, and outputs an amplified signal RF5 from output terminal 51a. Peak amplifier 52 amplifies a branch signal RF2 branching from the first signal and having a phase different from that of branch signal RF1, and outputs an amplified signal RF6 from output terminal 52a. Carrier amplifier 53 amplifies a branch signal RF3 branching from a second signal that is the other of the balanced signals, and outputs an amplified signal RF7 from output terminal 53a. Peak amplifier 54 amplifies a branch signal RF4 branching from the second signal and having a phase different from that of branch signal RF3, and outputs an amplified signal RF8 from output terminal 54a. Capacitor 201 has one end connected to output terminal 51a and the other end connected to output terminal 53a. Capacitor 202 has one end connected to output terminal 52a and the other end connected to output terminal 54a. The first wiring 21 has a first end connected to output terminal 51a and a second end connected to output terminal 52a. The second wiring 22 has a third end connected to output terminal 53a and a fourth end connected to output terminal 54a. A balun 61 is connected between the first wiring 21 and the second wiring 22. The third wiring 23 is electromagnetically coupled to both the first wiring 21 and the second wiring 22 and is connected to ground. The first wiring 21 is positioned closer to the third wiring 23 than to the second wiring 22. Furthermore, the second wiring 22 is positioned closer to the third wiring 23 than to the first wiring 21.

[0136] By positioning the first wiring 21 closer to the third wiring 23 than to the second wiring 22, positioning the second wiring 22 closer to the third wiring 23 than to the first wiring 21, and connecting the third wiring 23 to ground, electromagnetic coupling between the first wiring 21 and the second wiring 22 can be suppressed. This reduces the inductance of the first wiring 21 and the second wiring 22, thereby suppressing excessive current flowing in both wirings. Consequently, a power amplifier circuit capable of achieving good output characteristics can be provided.

[0137] Additionally, in the power amplifier circuit 102, a node N1 is provided on the first wiring 21 between the first and second ends, and a node N2 is provided between the first end and node N1. A node N3 is provided on the second wiring 22 between the third and fourth ends, and a node N4 is provided between the third end and node N3. A balun 61 is connected between nodes N1 and N3. A capacitor 203 has one end connected to node N2 and the other end connected to ground. A capacitor 204 has one end connected to node N4 and the other end connected to ground.

[0138] The structure of capacitor 201, inductor-connected wiring 211, capacitor 203, inductor-connected wiring 212, and capacitor 202 can function as a quarter-wavelength circuit for the fundamental frequency. Similarly, the structure of capacitor 201, inductor-connected wiring 221, capacitor 204, inductor-connected wiring 222, and capacitor 202 can function as a quarter-wavelength circuit for the fundamental frequency. Moreover, when viewed from the carrier amplifier 51 towards the peak amplifier 52, the structure of wiring 211 and capacitor 203 can function as a series resonant circuit of LC for the second harmonic, thus enabling the implementation of a second harmonic termination circuit similar to the harmonic trap 301 in the power amplifier circuit 101 with a small circuit size. The structure of wiring 221 and capacitor 204 also has the same effect as the structure of wiring 211 and capacitor 203. Furthermore, when observing the carrier amplifier 51 side from the peak amplifier 52, the structure of wiring 212 and capacitor 203 can function as a series resonant circuit of LC against the second harmonic, thus enabling the same second harmonic termination circuit as the harmonic notch filter 302 in the power amplifier circuit 101 to be implemented with a small circuit size. The structure of wiring 222 and capacitor 204 also has the same effect as the structure of wiring 212 and capacitor 203.

[0139] In addition, in power amplifier circuits 101 and 102, the third wiring 23 is disposed between the first wiring 21 and the second wiring 22.

[0140] With this structure, the third wiring 23 can be configured to block the line of sight from the first wiring 21 to the second wiring 22, thus effectively suppressing the electromagnetic coupling between the first wiring 21 and the second wiring 22.

[0141] Furthermore, in power amplifier circuits 101 and 102, a node N1 is provided on the first wiring 21 between the first end and the second end. A node N3 is provided on the second wiring 22 between the third end and the fourth end. A balun 61 is connected between nodes N1 and N3. A third wiring 23 is provided between at least a portion of the first wiring 21 from the first end to node N1 and at least a portion of the second wiring 22 from the third end to node N3.

[0142] The first wiring 21, extending from the first end to node N1, and the second wiring 22, extending from the third end to node N3, function as quarter-wavelength lines, and due to their long lengths, electromagnetic coupling between the first wiring 21 and the second wiring 22 is prone to increase. In contrast, by providing a third wiring 23 between at least a portion of the first wiring 21 extending from the first end to node N1 and at least a portion of the second wiring 22 extending from the third end to node N3, electromagnetic coupling between the first wiring 21 and the second wiring 22 can be effectively suppressed.

[0143] Furthermore, in the power amplification devices 11-15, the semiconductor chip 501 is formed with a carrier amplifier 51, a peak amplifier 52, a carrier amplifier 53, and a peak amplifier 54. Moreover, the laminated substrate 401 is formed with a first wiring 21, a second wiring 22, a third wiring 23, and a balun 61, and is provided with the semiconductor chip 501.

[0144] Thus, by forming the large-scale first wiring 21, second wiring 22, third wiring 23, and balun 61 on the laminated substrate 401, the degree of freedom in the layout of the first wiring 21, second wiring 22, third wiring 23, and balun 61 can be increased. Consequently, it is possible to easily achieve a configuration where the third wiring 23 effectively suppresses electromagnetic coupling between the first wiring 21 and the second wiring 22.

[0145] In addition, in the power amplifier devices 11 and 12, the laminated substrate 401 includes a conductive layer 411. Furthermore, at least a portion of the first wiring 21, at least a portion of the second wiring 22, and at least a portion of the third wiring 23 are disposed on the conductive layer 411.

[0146] With such a structure, for example, when the output terminals 51a of the carrier amplifier 51 and 53a of the carrier amplifier 53 are disposed on the same conductive layer and the first wiring 21 and the second wiring 22 are laid out on the wiring layer, the third wiring 23 can be configured, for example, to block the direct line of sight from the first wiring 21 to the second wiring 22 by the wiring arrangement.

[0147] Furthermore, in the power amplification devices 13 and 14, the stacked substrate 401 includes a conductive layer 411, a conductive layer 412, and a conductive layer 413 between the conductive layers 411 and 412. Moreover, the first wiring 21, the second wiring 22, and the third wiring 23 are respectively disposed on the conductive layers 411, 412, and 413.

[0148] With such a structure, for example, when the output terminals 51a of the carrier amplifier 51 and 53a of the carrier amplifier 53 are respectively provided on the conductive layers 411 and 412, and the first wiring 21 and the second wiring 22 are laid out on different wiring layers, the third wiring 23 can be configured, for example, to block the direct line of sight from the first wiring 21 to the second wiring 22 by the wiring arrangement.

[0149] Furthermore, the embodiments described above are intended to facilitate understanding of the present invention and are not intended to limit the scope of the invention. The present invention can be modified / improved without departing from its spirit, and the present invention also includes its equivalents. That is, embodiments obtained by those skilled in the art through appropriate design modifications to the embodiments, as long as they possess the features of the present invention, are also included within the scope of the present invention. For example, the elements, their configurations, materials, conditions, shapes, dimensions, etc., of each embodiment are not limited to the illustrated elements, their configurations, materials, conditions, shapes, dimensions, etc., and can be appropriately modified. In addition, the embodiments are illustrative, and it is self-evident that partial substitutions or combinations of the structures shown in different embodiments are possible; such substitutions or combinations, as long as they contain the features of the present invention, are also included within the scope of the present invention.

[0150] <1>

[0151] A power amplifier circuit, comprising:

[0152] A first carrier amplifier amplifies a first branch signal derived from a first signal that is a balanced signal, and outputs a first amplified signal from a first output terminal.

[0153] A first peak amplifier amplifies a second branch signal that branches off from the first signal and has a phase different from that of the first branch signal, and outputs a second amplified signal from a second output terminal.

[0154] The second carrier amplifier amplifies the third branch signal branched from the second signal, which is the other side of the balanced signal, and outputs the third amplified signal from the third output terminal;

[0155] The second peak amplifier amplifies the fourth branch signal, which branches out from the second signal and has a phase different from that of the third branch signal, and outputs the fourth amplified signal from the fourth output terminal.

[0156] A first capacitor has one end connected to the first output terminal and another end connected to the third output terminal;

[0157] The second capacitor has one end connected to the second output terminal and the other end connected to the fourth output terminal;

[0158] The first wiring has a first end connected to the first output terminal and a second end connected to the second output terminal;

[0159] The second wiring has a third end connected to the third output terminal and a fourth end connected to the fourth output terminal;

[0160] A balun-to-unbalance converter, connected between the first wiring and the second wiring; and

[0161] The third wiring is electromagnetically coupled to the first and second wirings respectively, and is connected to ground.

[0162] The first wiring is positioned closer to the third wiring than to the second wiring.

[0163] The second wiring is positioned closer to the third wiring than to the first wiring.

[0164] <2>

[0165] according to <1> The power amplifier circuit, wherein,

[0166] The first wiring configuration includes a first node located between the first end and the second end, and a second node located between the first end and the first node.

[0167] The second wiring includes a third node located between the third end and the fourth end, and a fourth node located between the third end and the third node.

[0168] The balun is connected between the first node and the third node.

[0169] The power amplifier circuit also includes:

[0170] The third capacitor has one end connected to the second node and the other end connected to ground; and

[0171] The fourth capacitor has one end connected to the fourth node and the other end connected to ground.

[0172] <3>

[0173] according to <1> or <2> The power amplifier circuit, wherein,

[0174] The third wiring is disposed between the first wiring and the second wiring.

[0175] <4>

[0176] according to <1> to <3> The power amplifier circuit described in any one of the above, wherein,

[0177] A first node is provided in the first wiring, located between the first end and the second end.

[0178] A third node is provided in the second wiring, located between the third end and the fourth end.

[0179] The balun is connected between the first node and the third node.

[0180] The third wiring is disposed between at least a portion of the first wiring from the first end to the first node and at least a portion of the second wiring from the third end to the third node.

[0181] <5>

[0182] A power amplifier device having, according to <1> to <4> The power amplifier circuit according to any one of the above, the power amplifier device comprising:

[0183] A semiconductor chip having a first carrier amplifier, a first peak amplifier, a second carrier amplifier, and a second peak amplifier; and

[0184] A substrate having the first wiring, the second wiring, the third wiring and the balun, and the semiconductor chip disposed thereon.

[0185] <6>

[0186] according to <5> The power amplifier circuit, wherein,

[0187] The substrate includes a first conductive layer.

[0188] At least a portion of the first wiring, at least a portion of the second wiring, and at least a portion of the third wiring are disposed on the first conductive layer.

[0189] <7>

[0190] according to <5> or <6> The power amplifier device, wherein,

[0191] The substrate includes a first conductive layer, a second conductive layer, and a third conductive layer between the first conductive layer and the second conductive layer.

[0192] The first wiring, the second wiring, and the third wiring are respectively disposed on the first conductive layer, the second conductive layer, and the third conductive layer.

[0193]

[0194] A power amplifier circuit, comprising:

[0195] A first carrier amplifier amplifies a first branch signal derived from a first signal that is a balanced signal, and outputs a first amplified signal from a first output terminal.

[0196] A first peak amplifier amplifies a second branch signal that branches off from the first signal and has a phase different from that of the first branch signal, and outputs a second amplified signal from a second output terminal.

[0197] The second carrier amplifier amplifies the third branch signal branched from the second signal, which is the other side of the balanced signal, and outputs the third amplified signal from the third output terminal;

[0198] The second peak amplifier amplifies the fourth branch signal, which branches out from the second signal and has a phase different from that of the third branch signal, and outputs the fourth amplified signal from the fourth output terminal.

[0199] A first capacitor has one end connected to the first output terminal and another end connected to the third output terminal;

[0200] The second capacitor has one end connected to the second output terminal and the other end connected to the fourth output terminal;

[0201] The first wiring has a first end connected to the first output terminal and a second end connected to the second output terminal;

[0202] The second wiring has a third end connected to the third output terminal and a fourth end connected to the fourth output terminal;

[0203] A balun-to-unbalance converter, connected between the first wiring and the second wiring; and

[0204] The third wiring is electromagnetically coupled to the first and second wirings respectively, and is connected to ground.

[0205] The first wiring includes a first node located between the first end and the second end, and a second node located between the first end and the first node.

[0206] The second wiring includes a third node located between the third end and the fourth end, and a fourth node located between the third end and the third node.

[0207] The balun is connected between the first node and the third node.

[0208] The power amplifier circuit also includes:

[0209] The third capacitor has one end connected to the second node and the other end connected to ground; and

[0210] The fourth capacitor has one end connected to the fourth node and the other end connected to ground.

[0211] Explanation of reference numerals in the attached figures

[0212] 11, 12, 13, 14, 15: Power amplifier; 21: First wiring; 211, 212, 213: Wiring; 21E, 211E: Electrodes; 212E: Electrodes; 212Va, 212Vb: Through holes; 22: Second wiring; 221, 222, 223: Wiring; 22E, 221E, 222E: Electrodes; 222Va, 222Vb: Through holes; 23: Third wiring; 231, 232: Wiring; 23E, 231E, 232E: Electrodes; 231V, 232V: Through holes; 32: Output terminal 32; 51, 53: Carrier amplifier; 52, 54: Peak amplifier; 51a, 52a, 53a, 54a: Output terminals ; 61: Balanced-to-unbalanced converter; 61a, 61b: Inductors; 61aE: Electrode; 101, 102: Power amplifier circuit; 141: Differential pair; 151, 153: Dougherty amplifier; 201, 202, 203, 204, 205: Capacitors; 201D, 202D, 203D, 204D, 205D: Components; 203E, 204E: Electrodes; 203V, 204V: Through-holes; 301, 302, 303, 304: Harmonic filter; 401: Multilayer substrate; 411, 412, 413: Conductive layers; 421, 422, 423: Dielectric layers; 501: Semiconductor chip; N1, N2, N3, N4: Nodes.

Claims

1. A power amplifier circuit, comprising: A first carrier amplifier amplifies a first branch signal derived from a first signal that is a balanced signal, and outputs a first amplified signal from a first output terminal. A first peak amplifier amplifies a second branch signal that branches off from the first signal and has a phase different from that of the first branch signal, and outputs a second amplified signal from a second output terminal. The second carrier amplifier amplifies the third branch signal branched from the second signal, which is the other side of the balanced signal, and outputs the third amplified signal from the third output terminal; The second peak amplifier amplifies the fourth branch signal, which branches out from the second signal and has a phase different from that of the third branch signal, and outputs the fourth amplified signal from the fourth output terminal. A first capacitor has one end connected to the first output terminal and another end connected to the third output terminal; The second capacitor has one end connected to the second output terminal and the other end connected to the fourth output terminal; The first wiring has a first end connected to the first output terminal and a second end connected to the second output terminal; The second wiring has a third end connected to the third output terminal and a fourth end connected to the fourth output terminal; A balun-to-unbalance converter, connected between the first wiring and the second wiring; and The third wiring is electromagnetically coupled to the first and second wirings respectively, and is connected to ground. The first wiring is positioned closer to the third wiring than to the second wiring. The second wiring is positioned closer to the third wiring than to the first wiring.

2. The power amplifier circuit according to claim 1, wherein, The first wiring configuration includes a first node located between the first end and the second end, and a second node located between the first end and the first node. The second wiring includes a third node located between the third end and the fourth end, and a fourth node located between the third end and the third node. The balun is connected between the first node and the third node. The power amplifier circuit also includes: The third capacitor has one end connected to the second node and the other end connected to ground; as well as The fourth capacitor has one end connected to the fourth node and the other end connected to ground.

3. The power amplifier circuit according to claim 1 or 2, wherein, The third wiring is disposed between the first wiring and the second wiring.

4. The power amplifier circuit according to any one of claims 1 to 3, wherein, A first node is provided in the first wiring, located between the first end and the second end. A third node is provided in the second wiring, located between the third end and the fourth end. The balun is connected between the first node and the third node. The third wiring is disposed between at least a portion of the first wiring from the first end to the first node and at least a portion of the second wiring from the third end to the third node.

5. A power amplifier device comprising a power amplifier circuit according to any one of claims 1 to 4, wherein the power amplifier device includes: A semiconductor chip having a first carrier amplifier, a first peak amplifier, a second carrier amplifier, and a second peak amplifier; and A substrate having the first wiring, the second wiring, the third wiring and the balun, and the semiconductor chip disposed thereon.

6. The power amplifier device according to claim 5, wherein, The substrate includes a first conductive layer. At least a portion of the first wiring, at least a portion of the second wiring, and at least a portion of the third wiring are disposed on the first conductive layer.

7. The power amplifier device according to claim 5 or 6, wherein, The substrate includes a first conductive layer, a second conductive layer, and a third conductive layer between the first conductive layer and the second conductive layer. The first wiring, the second wiring, and the third wiring are respectively disposed on the first conductive layer, the second conductive layer, and the third conductive layer.

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