Satellite electrical test resource scheduling method and system based on directed acyclic graph

Abstract

The application provides a satellite electric test resource scheduling method and system based on a directed acyclic graph, which comprises the following steps: a digital model of satellite test and assembly resources is established; for different types of satellites, unit cutting is performed on test items and assembly items, and the cutting is divided into independent units, which can complete a specific work; a directed acyclic graph is established by using the test items and the assembly items according to the sequence of the test items and the assembly items of the required developed satellite; a multi-level feedback queue scheduling algorithm is used to schedule and plan the resources of the satellite and the test process; and the resources of the satellite are dynamically adjusted according to the real-time process of the electric test, so as to ensure that the satellite electric test flow works at the maximum beat. The application can solve the problem that the satellite assembly and test segmentation cannot be considered as a whole in the past, solve the resource allocation and scheduling problem of different types of satellites, and has a certain significance for the resource scheduling management of satellite ground development.

Description

Technical Field

[0001] This invention relates to the field of satellite electrical test resource scheduling technology, and more specifically, to a satellite electrical test resource scheduling method and system based on directed acyclic graphs. Background Technology

[0002] In recent years, with the development of satellite constellations, more and more satellites require mass production, thus posing new demands on satellite assembly and testing. In the traditional satellite development model, satellite assembly and testing were treated as two separate processes, conducted through a process handover. As two independent entities, resource transfer and status transitions required documentation and physical samples, which was insufficient to meet the complex assembly and testing needs of mass-produced satellites. Furthermore, for large-scale satellites, completing the development task as quickly as possible under resource constraints is crucial. Therefore, researching integrated resource scheduling and management for satellite assembly and testing has significant engineering implications for improving efficiency, reducing resource consumption, and enhancing satellite development capabilities in mass production.

[0003] To address current batch satellite AIT (Autonomous In-Test) methods, patent 202011192021.X proposes a batch satellite AIT process generation method based on element relationships. This method, while meeting overall satellite project requirements, obtains a set of possible solutions for batch satellite development based on satellite manufacturing time and resource availability constraints. However, this method solves a single problem and is suitable for developing specific satellites under resource-constrained conditions, but not for expanding batch satellite development capabilities. Patent 202011065479.9 proposes a multi-layered architecture scheduling method for rapid batch satellite testing. This method divides different testing processes into different test islands and uses a genetic algorithm to schedule and manage the test islands. However, this method does not consider satellite assembly and testing in a unified manner. It is suitable for large-scale satellite testing but does not solve the problem of matching assembly and testing in the unified development process of different types of satellites. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the purpose of this invention is to provide a satellite electrical test resource scheduling method and system based on directed acyclic graphs.

[0005] The satellite electrical test resource scheduling method based on directed acyclic graph provided by the present invention includes:

[0006] Step S1: Establish a digital model of satellite testing and assembly resources, in which satellite assembly resources and testing resources are uniformly coded and represented; Step S2: For different types of satellites, the test items and assembly items are divided into units, and each unit completes its own preset work. Step S3: Based on the sequence of the test items and assembly items for the satellite to be developed, establish a directed acyclic graph using the test items and assembly items; Step S4: Use a multi-level feedback queue scheduling algorithm to plan resource scheduling for satellites and the testing process; Step S5: Dynamically adjust satellite resources based on the real-time electrical test process.

[0007] Preferably, step S2 includes: The satellite assembly and testing process is broken down into processes with a strict sequence and processes without a strict sequence. The projects with a strict sequence are carried out in that order. Each satellite entering the assembly and testing phase is designated as a workpiece. This workpiece includes test items, assembly work, required auxiliary materials, and markings for the requirements of each test item and assembly process. A marking is performed after each process is completed, when a single satellite assembly is completed, and when an auxiliary material or component is used.

[0008] Preferably, step S3 includes: Step S3.1: Import the process list, process sequence constraints, satellite type characteristic parameters, and digital model data of AIT resources for the entire satellite AIT process; Step S3.2: Map each independent assembly unit and each independent test unit after modularization in the satellite AIT process to a vertex of a DAG; at the same time, generate the DAG's entry node, end node, and anomaly handling node; Step S3.3: Extract the sequential dependencies between each assembly unit and test unit, generate directed edges of the DAG based on the dependencies, and extract the number of predecessor nodes to be verified and the verification criteria for each node according to the preset verification requirements, and associate them with the corresponding directed edges. Step S3.4: Perform topology verification on the generated DAG. Use topology sorting to traverse all nodes and directed edges to detect cyclic dependencies. Based on the satellite type characteristic parameters, verify whether each path can be extended from the entry node to the end node. Step S3.5: Optimize the verified DAG by grouping nodes with no dependencies and that can be executed in parallel to the same level, marking core nodes, binding each node with the required resources, and outputting a DAG that adapts to the current satellite type and AIT process.

[0009] Preferably, step S4 includes: The satellite queue scheduling priority is determined based on a multi-factor comprehensive score S:

[0010] Among them, the urgency of satellite delivery is quantified by the urgency level of the mission W, with W taking the value [0,1]; the stage of the mission is quantified by the percentage of total man-hours used U and the percentage of remaining mission R; and the degree of resource conflict is quantified by the resource idle rate I. As weight, and ; When calculating the scheduling priority for the first time, the target priority is rated as level 4 when S∈[0.6,1], level 2 when S∈[0.4,0.6), and level 0 when S∈[0,0.4]. When the statistical period When the time is up, recalculate S: When S∈[0.8,1], the target priority is assessed as the current priority +1, and does not exceed the highest priority level 5; When S∈[0.6,0.8), the target priority is assessed as the current priority +1, and does not exceed level 4; When S∈[0.4,0.6), the target priority remains unchanged at the current level; When S∈[0.2,0.4), the target priority is rated as the current priority -1, and not lower than level 1; When S∈[0,0.2), the target priority is rated as the current priority -1, and is not lower than the lowest priority level 0; When the allocated time slice of the satellite queue is exhausted, the currently executing directed acyclic graph node task is interrupted, and the interruption occurs after the sub-process of the current node is completed. The satellite status is recorded and stored on-site. When the satellite queue receives a time slice allocation again, the interrupted status data is retrieved and the unfinished sub-processes are continued.

[0011] Preferably, step S5 includes: Mark all nodes in the directed acyclic graph as core nodes and general nodes. Set core nodes to be addable only, and general nodes to be addable and deletable. Set the time and beat monitoring terminal, according to the statistical period. Perform data acquisition and calculate the actual beat of each layer according to the layer-by-layer beat formula. and rhythm deviation Filter out > The abnormal levels, among which This is the beat deviation threshold; For abnormal levels, when the level's tick rate is too fast... < × When the layer's cycle time is too slow, reduce the number of general nodes in that layer; when the layer's cycle time is too slow... > + × When this happens, the number of nodes in that layer is increased, where It is the maximum beat.

[0012] The satellite electrical test resource scheduling system based on directed acyclic graph provided by the present invention includes: Module M1: Establishes a digital model of satellite testing and assembly resources, in which satellite assembly resources and testing resources are uniformly coded and represented; Module M2: For different types of satellites, the test items and assembly items are divided into units, and each unit performs its own preset tasks. Module M3: Based on the sequence of test and assembly projects for the satellite to be developed, a directed acyclic graph is established using the test and assembly projects. Module M4: Uses a multi-level feedback queue scheduling algorithm to plan resource scheduling for satellites and the testing process; Module M5: Dynamically adjusts satellite resources based on the real-time electrical test process.

[0013] Preferably, the module M2 includes: The satellite assembly and testing process is broken down into processes with a strict sequence and processes without a strict sequence. The projects with a strict sequence are carried out in that order. Each satellite entering the assembly and testing phase is designated as a workpiece. This workpiece includes test items, assembly work, required auxiliary materials, and markings for the requirements of each test item and assembly process. A marking is performed after each process is completed, when a single satellite assembly is completed, and when an auxiliary material or component is used.

[0014] Preferably, the module M3 includes: Module M3.1: Imports the process list, process sequence constraints, satellite type characteristic parameters, and digital model data of AIT resources for the entire satellite AIT process; Module M3.2: Maps each independent assembly unit and each independent test unit after modularization in the satellite AIT process to a vertex of a DAG; at the same time, it generates the entry node, end node and anomaly handling node of the DAG; Module M3.3: Extracts the sequential dependencies between assembly units and test units, generates directed edges of the DAG based on the dependencies, and extracts the number of predecessor nodes to be verified and the verification criteria for each node according to the preset verification requirements, and associates them with the corresponding directed edges. Module M3.4: Performs topology verification on the generated DAG, uses topology sorting to traverse all nodes and directed edges to detect cyclic dependencies, and verifies whether each path can be extended from the entry node to the destination node based on satellite type characteristic parameters. Module M3.5: Optimizes the verified DAG, groups nodes with no dependencies and that can be executed in parallel to the same level, marks core nodes, binds each node to the required resources, and outputs a DAG that adapts to the current satellite type and AIT process.

[0015] Preferably, the module M4 includes: The satellite queue scheduling priority is determined based on a multi-factor comprehensive score S:

[0016] Among them, the urgency of satellite delivery is quantified by the urgency level of the mission W, with W taking the value [0,1]; the stage of the mission is quantified by the percentage of total man-hours used U and the percentage of remaining mission R; and the degree of resource conflict is quantified by the resource idle rate I. As weight, and ; When calculating the scheduling priority for the first time, the target priority is rated as level 4 when S∈[0.6,1], level 2 when S∈[0.4,0.6), and level 0 when S∈[0,0.4]. When the statistical period When the time is up, recalculate S: When S∈[0.8,1], the target priority is assessed as the current priority +1, and does not exceed the highest priority level 5; When S∈[0.6,0.8), the target priority is assessed as the current priority +1, and does not exceed level 4; When S∈[0.4,0.6), the target priority remains unchanged at the current level; When S∈[0.2,0.4), the target priority is rated as the current priority -1, and not lower than level 1; When S∈[0,0.2), the target priority is rated as the current priority -1, and is not lower than the lowest priority level 0; When the allocated time slice of the satellite queue is exhausted, the currently executing directed acyclic graph node task is interrupted, and the interruption occurs after the sub-process of the current node is completed. The satellite status is recorded and stored on-site. When the satellite queue receives a time slice allocation again, the interrupted status data is retrieved and the unfinished sub-processes are continued.

[0017] Preferably, the module M5 includes: Mark all nodes in the directed acyclic graph as core nodes and general nodes. Set core nodes to be addable only, and general nodes to be addable and deletable. Set the time and beat monitoring terminal, according to the statistical period. Perform data acquisition and calculate the actual beat of each layer according to the layer-by-layer beat formula. and rhythm deviation Filter out > The abnormal levels, among which This is the beat deviation threshold; For abnormal levels, when the level's tick rate is too fast... < × When the layer's cycle time is too slow, reduce the number of general nodes in that layer; when the layer's cycle time is too slow... > + × When this happens, the number of nodes in that layer is increased, where It is the maximum beat.

[0018] Compared with the prior art, the present invention has the following beneficial effects: (1) This invention establishes a digital model of satellite testing and assembly resources, and divides the testing and assembly projects into units, and manages satellite assembly and testing in a unified framework. This solves the problem of low efficiency in the past division of satellite assembly and testing and resource handover, and realizes integrated resource scheduling of satellite assembly and testing. (2) This invention constructs a directed acyclic graph to perform topological modeling of the entire satellite AIT process, and represents the sequential relationship between test items and assembly items of different types of satellites in the form of a directed graph, which solves the resource allocation and scheduling problem of different types of satellites, and realizes process visualization and path optimization in the mixed development scenario of multiple satellite models; (3) The present invention adopts a multi-level feedback queue scheduling algorithm to plan the resource scheduling of satellites and testing processes. Based on the comprehensive score of multiple factors such as the urgency of satellite delivery, the stage of the mission, and the degree of resource conflict, the priority and time slice are dynamically adjusted, which solves the problem of sorting and scheduling of batch satellite development tasks under resource constraints and improves the flexibility and balance of resource scheduling. (4) This invention uses a dynamic adjustment mechanism to add or delete nodes in a directed acyclic graph based on the real-time assembly and testing process, ensuring that the satellite assembly and testing flow works at the maximum pace. This solves the problem of process adaptation when personnel, equipment and resources are dynamically adjusted in actual production, and enhances the scheduling system's ability to adapt to changes on site. Attached Figure Description

[0019] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1 This is a flowchart of the satellite assembly and testing resource scheduling method based on directed acyclic graphs according to the present invention; Figure 2 The present invention provides a method for scheduling satellite assembly and testing resources based on directed acyclic graphs, which uses acyclic directed topology graphs. Figure 3 This is the flow graph of the multi-level feedback queue scheduling algorithm for the satellite assembly and testing resource scheduling method based on directed acyclic graphs in this invention. Detailed Implementation

[0020] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0021] Example 1 The purpose of this invention is to provide a satellite assembly and testing resource scheduling method based on directed acyclic graphs, which effectively solves the problem of efficient use of satellite batch assembly and testing resource scheduling, realizes resource management and project management in the process of mass satellite development, ensures the continuity and integrity of satellite completion under limited resource conditions, and dynamically adjusts the development process to address problems that arise.

[0022] Specifically, the satellite assembly and testing resource scheduling method based on directed acyclic graphs provided by this invention includes the following steps: Step S1: Establish a digital model of satellite testing and assembly resources; Step S2: For different types of satellites, the test items and assembly items are divided into units, each of which can perform a specific task. Step S3: Based on the sequence of testing and assembly projects for the satellite to be developed, establish a directed acyclic graph using the testing and assembly projects; Step S4: Use a multi-level feedback queue scheduling algorithm to plan resource scheduling for satellites and the testing process; Step S5: Dynamically adjust satellite resources based on the real-time assembly and testing process to ensure that the satellite assembly and testing flow operates at maximum pace.

[0023] Furthermore, in step S1, establishing a digital model of satellite testing and assembly resources requires digital modeling of resources during satellite development. For satellite assembly resources, these are typically divided into satellite tooling, satellite assembly materials, satellite components, factory facilities, and assembly personnel. These resources are uniformly coded and represented, and personnel skills are managed using a knowledge base. For testing resources, these are typically divided into testing sites, testing equipment, and testing personnel. The capabilities of the testing equipment are managed.

[0024] Specifically, the digitalization process consists of three elements: testing stations, assembly stations, and personnel.

[0025] Specifically, the testing stations are used to complete satellite testing, and their capabilities are marked as high, medium, and low. High-capacity testing stations are equipped with high-capacity testing equipment to meet the testing requirements of all satellites; medium-capacity testing stations are equipped with medium-capacity testing equipment, which can complete the testing of most satellites; and low-capacity testing stations are equipped with the simplest testing equipment, which can only complete a small number of testing tasks.

[0026] Specifically, the capabilities of each test station are described as follows: (1), t1~tn represent the test items that can be completed.

[0027] Specifically, the assembly station is used to complete the satellite assembly work, and its capabilities are marked as three types: cable assembly, single-unit assembly, and whole satellite assembly. The cable assembly station is equipped with the tooling and equipment necessary for cable assembly to meet the cable assembly requirements of the satellite; the single-unit assembly station is equipped with the tooling and equipment necessary for single-unit assembly, and can perform single-unit assembly work; the whole satellite assembly station is equipped with the lifting tools and other equipment necessary for whole satellite assembly to complete the whole satellite assembly work.

[0028] Specifically, the capability of each assembly station is described as follows: (2), a1~an represents the assembly work that can be completed, including the auxiliary materials and single machines required to complete the assembly work. Since each satellite single machine is uniquely determined, all single machines are marked as a subset of the satellite.

[0029] Specifically, the personnel are divided into testing personnel and assembly personnel, and the projects that each personnel can complete are categorized and represented.

[0030] Specifically, the capabilities of each person are described as follows: (3), a1~an represents the assembly items that the person can complete, and t1~tn represents the test items that the person can complete.

[0031] Furthermore, in step S2, the test items and assembly items are divided into units for different types of satellites. Generally, although different types of satellites have huge differences, their development processes are basically the same, which generally include whole satellite structure assembly, cable laying, single unit installation, testing of various systems, whole satellite testing, mechanical testing, magnetic testing, EMC testing, thermal vacuum testing, aging testing, etc.

[0032] Specifically, the above assembly process can be divided into independent assembly. For all satellite assembly processes, they can be decomposed into processes with a strict sequence and processes without a strict sequence. Among them, the items with a strict sequence must be carried out in the correct order, while the order of items without a strict sequence can be specified by the resource scheduling algorithm.

[0033] Specifically, each assembly process is described as follows: (4) an~at means that the assembly work must be carried out in the order from an to at, and the process is irreversible.

[0034] Specifically, the above testing process can also be divided into independent test items. For all satellite test items, they can be decomposed into processes with strict order and processes without strict order. Among them, the projects with strict order must be carried out in the correct order, while the order of projects without strict order can be specified by the resource scheduling algorithm.

[0035] Specifically, each test procedure is described as follows: (5), tn~tt means that the testing work must be carried out in the order from tn to tt, and the process is irreversible.

[0036] Specifically, the constraints for the entire testing and assembly process are as follows: (6), tn~ts means that the entire testing and assembly work must be carried out in the order of tn, am, ..., at, ts, and the process is irreversible.

[0037] Specifically, each satellite entering the assembly and testing phase is designated as a workpiece. This workpiece has certain attributes, including its required test items, assembly work, necessary auxiliary materials, and the requirements for each test item and assembly process. It is marked once after completing a process (testing, assembly), once upon completing the assembly of a single satellite, and once when an auxiliary material or component is used. The i-th satellite is represented as: (7), where tpi and ppi represent the capability of the test points required when executing ti, and api and ppi represent the capability of the assembly points required when executing ai.

[0038] Furthermore, in step S3, a directed acyclic graph is established using the test and assembly projects according to the sequential relationship between the test and assembly projects of the satellite to be developed.

[0039] Specifically, the following steps are taken to construct a directed acyclic graph: AIT process analysis and data import: Automatically import the process list (including assembly and testing items) and process sequence constraint rules of the entire satellite AIT process, and synchronously import the verification parameters of formula (3) to formula (6), the satellite type characteristic parameters of formula (7), and the digital model data of AIT resources (tooling, auxiliary materials, personnel, and equipment) to ensure that the generated DAG is deeply adapted to the AIT process, satellite characteristics, and resource status.

[0040] Process Unit-DAG Node Mapping: Each independent assembly unit and each independent test unit after unitization in the satellite AIT process is mapped to a vertex (node) of a DAG, realizing a "one-to-one correspondence between process units and nodes"; at the same time, the entry node (input node), end node (AIT process end node) and exception handling node of the DAG are automatically generated: the entry node is used to receive the satellite to be developed, the end node is used to identify that all AIT processes of a single satellite are completed, and the exception handling node is used to receive and handle satellites that fail verification or have process exceptions.

[0041] Dependency extraction and directed edge generation: Automatically extract the sequential dependencies between assembly units and test units, and generate directed edges of DAG based on the dependencies: If process A is a prerequisite for process B (process B can only be executed after verifying the completion of process A), then generate a directed edge (A, B) with the direction from A to B; at the same time, according to the verification requirements of formulas (3) to (6), extract the number of prerequisite nodes to be verified for each node and the verification standards, and associate them with the corresponding directed edges to ensure that the directed edges can support the prerequisite verification logic.

[0042] Topology verification and path optimization: The generated DAG is automatically verified. The core tasks are: ① Cycle-free verification: All nodes and directed edges are traversed by topological sorting. If a cycle dependency is detected (such as A→B, B→A), conflicting directed edges are automatically deleted and manual confirmation is prompted to ensure that the DAG is cycle-free; ② Path verification: According to the satellite type characteristic parameters in formula (7), each path is verified to be able to extend from the entry node to the end node. Invalid paths caused by "some nodes cannot complete specific procedures" are eliminated, and the "entry path calculation" is completed to ensure that the satellite can successfully complete all AIT procedures.

[0043] DAG Optimization and Output: Optimize the verified DAG by grouping nodes with no dependencies and capable of parallel execution into the same level to support asynchronous concurrent scheduling; mark core nodes (nodes that cannot form a valid path from the entry point to the destination after deletion) to ensure the stability of the DAG topology tree structure; bind each node to the required resources to support resource verification for subsequent local processing; after optimization, automatically output a DAG adapted to the current satellite type and AIT process, which can be directly connected to the scheduling system for use.

[0044] For core attributes, all nodes must be configured, including: 1. Unique Node Identifier (ID): The node is uniquely identifiable in the DAG of multiple satellite types by using a combination of “satellite type code-node type code-serial number” (e.g., XX model-assembly-001), which facilitates the positioning and status tracking of the scheduling system.

[0045] 2. Node Type: Clearly define the process type corresponding to each node, which is divided into entry node, assembly node, testing node, exception handling node, and end node.

[0046] 3. Dependency attributes: including a list of prerequisite dependency nodes, a prerequisite verification standard, and a verification formula association item: the list of prerequisite dependency nodes specifies all prerequisite nodes that need to be verified for this node; the prerequisite verification standard specifies the verification pass threshold; the verification formula association item specifies the specific formulas in formulas (3) to (6) that need to be called for the prerequisite verification of this node, to ensure that the verification logic can be implemented.

[0047] 4. Resource Requirements Attributes: Clearly define the tooling type and quantity, auxiliary material specifications and usage, personnel skill level and quantity, equipment parameters and status required for executing this node process, so as to provide data support for the resource verification of "local processing".

[0048] 5. Execution Status Attributes: Real-time updates of node execution status, including not started, waiting for verification, verification in progress, verification passed, process in progress, execution completed, and execution error.

[0049] 6. Flow attributes: Define the optional directed edges after a node is completed and the selection rules. The selection rules are specified by the scheduling algorithm.

[0050] Configure extended attributes as needed, including: 1. Assembly node extended attributes: assembly accuracy requirements, estimated assembly time, quality inspection standards, and unit association identifier (corresponding satellite unit number).

[0051] 2. Test node extended attributes: test parameter range, test time estimate, test data qualification threshold, test repetition count, and verification parameters associated with formulas (3) to (6).

[0052] 3. Extended attributes of exception handling nodes: exception type (verification failure, resource missing, process failure), exception handling process, exception recovery path (return to the original node or the previous node after processing).

[0053] 4. General extended attributes: Execution log (records startup time, number of verifications, resource consumption, and exception information), priority association identifier (associates the priority of multi-level feedback queues).

[0054] Combining multi-level queue definition and scheduling steps: 1. Queue construction logic: Multi-level queues correspond one-to-one with satellite types and individual satellites. That is, each satellite to be developed corresponds to an independent scheduling queue. When the queue is initialized, the DAG entry node, initial priority value, and initial time slice value of the corresponding satellite are associated, and the multi-level feedback queue scheduling system is connected. 2. Queue update logic: When a satellite completes all AIT processes (transfers to the DAG endpoint node), if there are still new satellites of the same type waiting to be developed, the new satellites will automatically replace the original satellites and enter the queue, continuing the queue's priority, time slice configuration and scheduling rules to ensure the continuity of scheduling for satellites of the same type. 3. Queue addition logic: When a new satellite type (characteristics specified by formula (7)) needs to enter the DAG entry node, the scheduling system automatically adds a scheduling queue corresponding to the satellite type, initializes its scheduling parameters, and synchronously associates the DAG of the satellite type to realize the rapid access of the new satellite type; 4. Queue deletion logic: When all satellites of a certain type have completed AIT development and there are no new satellites of the same type to be scheduled, the scheduling system automatically deletes all queues corresponding to that satellite type, releases scheduling resources, ensures lightweight operation of the scheduling system, and avoids resource waste.

[0055] The execution queue has 6 priority levels (0-5), with level 5 being the highest and level 0 the lowest. Levels 5 and 4 are high priority, levels 3 and 2 are medium priority, and levels 1 and 0 are low priority. Time slices have 12 types (1-12), with high priority corresponding to 12-9 time slices, medium priority to 8-5 time slices, and low priority to 4-1 time slices. Each time slice represents the number of nodes that can be executed. The physical meaning of a time slice (1-12 slices) is a task execution quota corresponding to a fixed time unit.

[0056] Specifically, the assessment of satellite queue scheduling priority is based on a multi-factor comprehensive score S: S=α W+β (1 U)+γ R+δ I Satellite delivery urgency: Quantified by the urgency level W (W is specified by the model before entering the scheduling algorithm of this invention according to the task situation, and takes the value [0,1]). The larger the value of W, the higher the delivery urgency. The priority assessment weight α=0.3. Task stage: Quantified by the percentage of total working hours used (U) and the percentage of remaining workload (R). The smaller the U value (the larger 1-U) and the larger the R value, the earlier the task stage and the greater the remaining workload. The priority assessment weights are β=0.2 and γ=0.25, respectively. Resource conflict level: quantified by resource idle rate I (I = idle time of the satellite’s available resources / statistical period). The higher the I value, the more serious the idleness of the available resources, the lower the risk of resource conflict, and the more suitable it is to prioritize resource allocation. The priority assessment weight δ = 0.25. Weight constraint: α+β+γ+δ=1, which can be flexibly adjusted according to the project priority, and the weight and constraint are still satisfied after adjustment.

[0057] When calculating the scheduling priority for the first time, if S∈[0.6,1], the target priority is rated as level 4; When S∈[0.4,0.6), the target priority is rated as level 2; When S∈[0,0.4), the target priority is rated as level 0.

[0058] To ensure seamless recovery after a task interruption when the time slice expires and to avoid redundancy and data loss, the following interruption and field saving mechanism is designed, taking into account the unique characteristics of satellite AIT assembly and testing procedures: Task interruption mechanism: When the allocated time slice of the satellite queue is exhausted, the currently executing directed acyclic graph node (process unit) task is immediately interrupted. The interruption execution follows the "process atomicity constraint" and is interrupted only after the subprocess of the current node is completed. Forced interruption during the execution of subprocess is prohibited (for example, if a node corresponds to the "single machine assembly" process, the interruption operation should be performed only after all assembly sub-steps of the single machine are completed). On-site preservation mechanism: The on-site preservation mechanism records the satellite's status and stores it in place, awaiting restart during the next mission. Due to the adoption of "process atomicity constraints," the current execution operation and the next mission execution do not interfere with each other. When the satellite queue receives a time slice allocation again, it retrieves the interruption status data and continues to execute unfinished sub-processes to ensure the continuity of task execution.

[0059] The priority evaluation criterion is based on the urgency of satellite delivery; the more urgent the delivery, the higher the priority.

[0060] Specifically, the execution process involves performing a satellite development process, which performs layered operations on the directed acyclic graph, generally divided into an input layer, an operation layer, a testing layer, and an output layer. This layering approach is more conducive to graph optimization.

[0061] Each satellite has a different priority and time slice size. Once a satellite enters its working time slice, it must execute at least one node's work. If there is still time remaining after completing one time slice, it can move on to the next node. When the time slice is exhausted, it exits the queue and waits for a time slice to be reallocated. When a higher-priority queue needs to execute, if its priority is 1 point higher than the currently executing satellite, it must complete its time slice before exiting. If its priority is 2 points higher than the currently executing satellite, it exits immediately after completing its current node's work, clears its time slice, and waits for a time slice to be reallocated.

[0062] Specifically, the feedback mechanism dynamically adjusts the priority and time slice by observing satellite behavior. The main principle is to ensure that satellites of the same priority pass through the same number of nodes within a unit time slice, and to ensure that satellites with higher priority execute first.

[0063] After a satellite enters the initial development phase, it is assigned priority levels (high, medium, and low) and time slots based on its development urgency, resulting in multiple satellite queues with different priorities. Initially, time slots are allocated according to the lowest priority level. After each satellite queue completes its time slot, the waiting time is recorded. The longer the waiting time, the longer the waiting time, the more time slots are allocated; the longer the waiting time, the more time slots are incremented by one for the next execution, and the shorter the waiting time, the less time slots are decremented by one. This process continues for a statistical period. (Adjust algorithm parameters after each calculation) When the time expires, recalculate S: When S∈[0.8,1], the target priority is assessed as the current priority +1, and does not exceed the highest priority level 5 (corresponding to extremely urgent delivery, large remaining task volume, and serious resource idleness, which are the highest priority). When S∈[0.6,0.8), the target priority is assessed as the current priority +1, and does not exceed level 4 (corresponding to urgent delivery, large remaining task volume, and serious resource idleness). When S∈[0.4,0.6), the target priority remains unchanged (corresponding to a medium level of delivery urgency, task stage, and resource conflict). When S∈[0.2,0.4), the target priority is rated as the current priority -1, and not lower than level 1 (corresponding to a more lenient delivery, a smaller amount of remaining tasks, and less idle resources). When S∈[0,0.2), the target priority is rated as the current priority-1, and is not lower than the lowest priority level 0 (corresponding to the most lenient delivery, the smallest remaining task volume, and the slightest resource idleness, which is the lowest priority).

[0064] Furthermore, in step S5, satellite resources are dynamically adjusted based on the real-time assembly and testing process to ensure that the satellite assembly and testing flow operates at maximum pace. Specifically, since there is a possibility of dynamic adjustments to personnel, equipment, and resources during actual production, the entire topology needs to be dynamically adjusted after establishing the above algorithm. All nodes in the directed acyclic graph are marked as core nodes and general nodes, because if a core node is removed, some paths in the graph will no longer be able to reach the destination from the starting point. During dynamic adjustment, core nodes cannot be deleted, only added, while general nodes can be added and deleted. The deletion principle is as follows: first, the node is marked as unavailable and no longer accepts new enqueue requests; after completing the current work, it is dequeued normally and immediately deleted from the directed acyclic graph. When adding a node, the directed acyclic graph is modified first, the node is added, and the node is ensured to work normally.

[0065] Specifically, construct the initial DAG topology: a. Analyze the entire process of satellite assembly and testing, and define the starting point (process start), ending point (process end) of the DAG, as well as the nodes of each process (such as mechanical assembly, electrical testing, functional calibration, etc.). b. Mark core nodes: Traverse the DAG using the "path connectivity verification method" and perform a "virtual deletion" operation on each node. If there is no valid path from the starting point to the ending point after deletion, mark the node as a core node and the rest as general nodes. c. Initialize node basic parameters: Based on historical production data, set the initial processing time t for each node. i Task queue length and availability status (available by default).

[0066] Set core control parameters: a. Maximum beat (7200s / batch) is the maximum cycle time for a single batch of satellites to complete the entire assembly and testing process, which is pre-set and determined by capacity requirements and resource limits. It is the core benchmark value for process efficiency. b. Beat deviation threshold (5%), the degree of deviation between the actual beat and the maximum beat of the lth layer; c. Statistical period (14400s); d. Adjust the step size of nodes (add / delete 1-2 general nodes at a time to avoid process oscillation); e. Maximum number of levels (set based on the actual satellite development process).

[0067] Real-time beat monitoring, startup time and beat monitoring terminal, according to statistical period Perform the following operations: Data Acquisition: Collect real-time operational data from nodes at each level, including: a. The processing time (ti) for a single task on each node, the current task queue length, and the available status; b. The number of tasks completed by each node within the statistical period; c. Total number of tasks at each level.

[0068] Beat Calculation: Calculate the actual beat of each level according to the level beat formula. (The average time taken for a process node at level l to complete all tasks at that level), calculate ; Anomaly marker: Filter out > The abnormal level is used to generate a beat monitoring report.

[0069] The dynamic adjustment strategy determines the direction and magnitude of adjustment based on the following rules for different levels of anomalies: The hierarchical pace is too fast (resource redundancy). < × Reduce the number of general nodes in this layer: Perform safe deletion of 1-2 general nodes to release redundant resources; The tiered cycle time is too slow (insufficient production capacity). > + × Increase the number of nodes in this layer: prioritize adding general nodes (according to the adjustment step size); if the target is still not met, add core nodes; if it is temporarily impossible to add nodes, maintain the status quo and continue to issue alarms.

[0070] Specifically, time and cycle monitoring terminals are set up to dynamically increase or delete the number of nodes in each layer based on the actual time consumption of each layer during operation, ensuring that the time consumption of each layer in the entire directed acyclic graph is consistent.

[0071] Example 2 This invention provides a method for scheduling satellite assembly and testing resources based on directed acyclic graphs, such as... Figure 1 As shown. The specific operating steps are as follows: The first step, satellite testing system and launch, is to establish a digital model of satellite testing and assembly resources; The second step is to divide the test and assembly projects into units for different types of satellites, each unit being able to perform a specific task. The third step is to establish a directed acyclic graph based on the sequence of testing and assembly projects for the satellite to be developed, using the testing and assembly projects. The fourth step is to use a multi-level feedback queue scheduling algorithm to plan resource scheduling for the satellite and the testing process; The fifth step is to dynamically adjust the satellite's resources based on the real-time assembly and testing process to ensure that the satellite assembly and testing workflow operates at maximum pace.

[0072] The satellite assembly and testing resource scheduling method based on directed acyclic graph of the present invention uses acyclic directed topology graphs as follows: Figure 2 As shown.

[0073] The topology of a directed acyclic graph includes multiple nodes and multiple directed edges. The nodes are managed in layers: input layer, output layer, test layer, and assembly layer. Each layer consists of test nodes with the same function. Each layer may have multiple nodes or only one node. The number of nodes in each layer is dynamically adjusted during actual operation. Two adjacent layers may also contain the same nodes. When the multi-level feedback queue scheduling algorithm cannot dynamically adjust the running time of each layer to be the same, an intermediate layer is added.

[0074] In addition, different layers can be connected by directed edges. When a satellite does not need to carry out a certain project, it can be connected across layers. Whether it can be connected across layers and the execution order are based on the markers in the satellite attributes.

[0075] When a project needs to be executed multiple times at different stages, it is represented by two different nodes in the graph, thus ensuring the acyclic property of the graph.

[0076] At the input layer, a path that can be executed to the output layer needs to be randomly assigned based on the satellite's attributes and process requirements.

[0077] At the output layer, satellites that have left the queue need to be tested and have their assembly coverage checked. Generally, all items should be completed after the diagram is completed. If there are any unfinished items, they should be added to the anomaly queue for individual manual intervention.

[0078] At the same time, if an exception occurs during the operation of each layer, it needs to be handled in the exception layer. During exception handling, the exception is removed from the queue. After the exception handling is completed, it is added back to the queue and returned to the queue for execution.

[0079] The exception handling layer is a special layer whose operation and management are not managed by the multi-level feedback queue scheduling algorithm, and its operation and management mainly rely on manual work.

[0080] Satellites that can continue production after passing through the anomaly handling layer can return to the operation layer. There are two scenarios for returning to the operation layer: returning to the source node or returning to a past node. The specific nodes to return to are decided manually. When returning to the original node, the satellite is re-added to the original execution queue. If returning to a past node, the operation attributes of the traced-back node to the current node need to be deleted before the satellite is re-added to the execution queue.

[0081] For satellites that cannot be repaired after anomaly handling or have major defects, they are directly returned to the input node to restart the development process.

[0082] The multi-level feedback queue scheduling algorithm flow graph of the satellite assembly and testing resource scheduling method based on directed acyclic graph of the present invention is as follows: Figure 3 As shown.

[0083] The algorithm mainly includes the allocation of two content resource nodes and the tasks of the resource nodes. There are three main types of resource allocation: single satellite task allocation, multi-satellite task allocation, and satellite task sorting.

[0084] A single satellite mission mainly involves a satellite with only one production run and only one satellite in the queue. Therefore, a new queue needs to be created and the satellite incorporated into the existing management map.

[0085] In multi-satellite missions, a single satellite needs to be produced in batches. Therefore, based on the characteristics of the satellites, there are multiple identical satellites in the queue. Thus, special attention must be paid to their adaptability during actual operation.

[0086] Once a task arrives, priority management needs to be implemented based on the overall development time, task deadline, personnel and resource constraints, and cost constraints, and existing tasks need to be sorted in advance.

[0087] In actual operation, priorities are dynamically adjusted based on existing resources and priority constraints.

[0088] During real-time operation, time slices are dynamically managed. The main principle is to ensure that satellites of the same priority traverse the same number of nodes within a unit time slice, ensuring that higher priority satellites execute first. If this principle cannot be met after a period of operation, directed acyclic loops are adjusted and regenerated. Existing test or assembly layers are generated into intermediate layers to ensure the entire graph operates in an optimal manner.

[0089] Specifically, the multi-level feedback queue scheduling algorithm is only used to guide the satellite development work. Some satellite assembly or locations may be multiple nodes in the algorithm, and a certain actual workstation may need to complete more than one task. The algorithm requires it to complete multiple tasks simultaneously, but the different tasks are completely independent and uncoupled.

[0090] Those skilled in the art will understand that, in addition to implementing the system, apparatus, and their modules provided by this invention in purely computer-readable program code, the same program can be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, the system, apparatus, and their modules provided by this invention can be considered a hardware component, and the modules included therein for implementing various programs can also be considered structures within the hardware component; alternatively, modules for implementing various functions can be considered both software programs implementing the method and structures within the hardware component.

[0091] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A satellite electrical test resource scheduling method based on directed acyclic graphs, characterized in that, include: Step S1: Establish a digital model of satellite testing and assembly resources, in which satellite assembly resources and testing resources are uniformly coded and represented; Step S2: For different types of satellites, the test items and assembly items are divided into units, and each unit completes its own preset work. Step S3: Based on the sequence of the test items and assembly items for the satellite to be developed, establish a directed acyclic graph using the test items and assembly items; Step S4: Use a multi-level feedback queue scheduling algorithm to plan resource scheduling for satellites and the testing process; Step S5: Dynamically adjust satellite resources based on the real-time electrical test process.

2. The satellite AIT resource scheduling method based on directed acyclic graphs according to claim 1, characterized in that, Step S2 includes: The satellite assembly and testing process is broken down into processes with a strict sequence and processes without a strict sequence. The projects with a strict sequence are carried out in that order. Each satellite entering the assembly and testing phase is designated as a workpiece. This workpiece includes test items, assembly work, required auxiliary materials, and markings for the requirements of each test item and assembly process. A marking is performed after each process is completed, when a single satellite assembly is completed, and when an auxiliary material or component is used.

3. The satellite AIT resource scheduling method based on directed acyclic graphs according to claim 1, characterized in that, Step S3 includes: Step S3.1: Import the process list, process sequence constraints, satellite type characteristic parameters, and digital model data of AIT resources for the entire satellite AIT process; Step S3.2: Map each independent assembly unit and each independent test unit after modularization in the satellite AIT process to a vertex of a DAG; at the same time, generate the DAG's entry node, end node, and anomaly handling node; Step S3.3: Extract the sequential dependencies between each assembly unit and test unit, generate directed edges of the DAG based on the dependencies, and extract the number of predecessor nodes to be verified and the verification criteria for each node according to the preset verification requirements, and associate them with the corresponding directed edges. Step S3.4: Perform topology verification on the generated DAG. Use topology sorting to traverse all nodes and directed edges to detect cyclic dependencies. Based on the satellite type characteristic parameters, verify whether each path can be extended from the entry node to the end node. Step S3.5: Optimize the verified DAG by grouping nodes with no dependencies and that can be executed in parallel to the same level, marking core nodes, binding each node with the required resources, and outputting a DAG that adapts to the current satellite type and AIT process.

4. The satellite AIT resource scheduling method based on directed acyclic graphs according to claim 1, characterized in that, Step S4 includes: The satellite queue scheduling priority is determined based on a multi-factor comprehensive score S: Among them, the urgency of satellite delivery is quantified by the urgency level of the mission W, with W taking the value [0,1]; the stage of the mission is quantified by the percentage of total man-hours used U and the percentage of remaining mission R; and the degree of resource conflict is quantified by the resource idle rate I. As weight, and ; When calculating the scheduling priority for the first time, the target priority is rated as level 4 when S∈[0.6,1], level 2 when S∈[0.4,0.6), and level 0 when S∈[0,0.4]. When the statistical period When the time is up, recalculate S: When S∈[0.8,1], the target priority is assessed as the current priority +1, and does not exceed the highest priority level 5; When S∈[0.6,0.8), the target priority is assessed as the current priority +1, and does not exceed level 4; When S∈[0.4,0.6), the target priority remains unchanged at the current level; When S∈[0.2,0.4), the target priority is rated as the current priority -1, and not lower than level 1; When S∈[0,0.2), the target priority is rated as the current priority -1, and is not lower than the lowest priority level 0; When the allocated time slice of the satellite queue is exhausted, the currently executing directed acyclic graph node task is interrupted, and the interruption occurs after the sub-process of the current node is completed. The satellite status is recorded and stored on-site. When the satellite queue receives a time slice allocation again, the interrupted status data is retrieved and the unfinished sub-processes are continued.

5. The satellite AIT resource scheduling method based on directed acyclic graphs according to claim 1, characterized in that, Step S5 includes: Mark all nodes in the directed acyclic graph as core nodes and general nodes. Set core nodes to be addable only, and general nodes to be addable and deletable. Set the time and beat monitoring terminal, according to the statistical period. Perform data acquisition and calculate the actual beat of each layer according to the layer-by-layer beat formula. and rhythm deviation Filter out > The abnormal levels, among which This is the beat deviation threshold; For abnormal levels, when the level's tick rate is too fast... < × When the layer's cycle time is too slow, reduce the number of general nodes in that layer; when the layer's cycle time is too slow... > + × When this happens, the number of nodes in that layer is increased, where It is the maximum beat.

6. A satellite electrical test resource scheduling system based on directed acyclic graphs, characterized in that, include: Module M1: Establishes a digital model of satellite testing and assembly resources, in which satellite assembly resources and testing resources are uniformly coded and represented; Module M2: For different types of satellites, the test items and assembly items are divided into units, and each unit performs its own preset tasks. Module M3: Based on the sequence of test and assembly projects for the satellite to be developed, a directed acyclic graph is established using the test and assembly projects. Module M4: Uses a multi-level feedback queue scheduling algorithm to plan resource scheduling for satellites and the testing process; Module M5: Dynamically adjusts satellite resources based on the real-time electrical test process.

7. The satellite AIT resource scheduling system based on directed acyclic graphs according to claim 6, characterized in that, The module M2 includes: The satellite assembly and testing process is broken down into processes with a strict sequence and processes without a strict sequence. The projects with a strict sequence are carried out in that order. Each satellite entering the assembly and testing phase is designated as a workpiece. This workpiece includes test items, assembly work, required auxiliary materials, and markings for the requirements of each test item and assembly process. A marking is performed after each process is completed, when a single satellite assembly is completed, and when an auxiliary material or component is used.

8. The satellite AIT resource scheduling system based on directed acyclic graphs according to claim 6, characterized in that, The module M3 includes: Module M3.1: Imports the process list, process sequence constraints, satellite type characteristic parameters, and digital model data of AIT resources for the entire satellite AIT process; Module M3.2: Maps each independent assembly unit and each independent test unit after modularization in the satellite AIT process to a vertex of a DAG; at the same time, it generates the entry node, end node and anomaly handling node of the DAG; Module M3.3: Extracts the sequential dependencies between assembly units and test units, generates directed edges of the DAG based on the dependencies, and extracts the number of predecessor nodes to be verified and the verification criteria for each node according to the preset verification requirements, and associates them with the corresponding directed edges. Module M3.4: Performs topology verification on the generated DAG, uses topology sorting to traverse all nodes and directed edges to detect cyclic dependencies, and verifies whether each path can be extended from the entry node to the destination node based on satellite type characteristic parameters. Module M3.5: Optimizes the verified DAG, groups nodes with no dependencies and that can be executed in parallel to the same level, marks core nodes, binds each node to the required resources, and outputs a DAG that adapts to the current satellite type and AIT process.

9. The satellite AIT resource scheduling system based on directed acyclic graphs according to claim 6, characterized in that, The module M4 includes: The satellite queue scheduling priority is determined based on a multi-factor comprehensive score S: Among them, the urgency of satellite delivery is quantified by the urgency level of the mission W, with W taking the value [0,1]; the stage of the mission is quantified by the percentage of total man-hours used U and the percentage of remaining mission R; and the degree of resource conflict is quantified by the resource idle rate I. As weight, and ; When calculating the scheduling priority for the first time, the target priority is rated as level 4 when S∈[0.6,1], level 2 when S∈[0.4,0.6), and level 0 when S∈[0,0.4]. When the statistical period When the time is up, recalculate S: When S∈[0.8,1], the target priority is assessed as the current priority +1, and does not exceed the highest priority level 5; When S∈[0.6,0.8), the target priority is assessed as the current priority +1, and does not exceed level 4; When S∈[0.4,0.6), the target priority remains unchanged at the current level; When S∈[0.2,0.4), the target priority is rated as the current priority -1, and not lower than level 1; When S∈[0,0.2), the target priority is rated as the current priority -1, and is not lower than the lowest priority level 0; When the allocated time slice of the satellite queue is exhausted, the currently executing directed acyclic graph node task is interrupted, and the interruption occurs after the sub-process of the current node is completed. The satellite status is recorded and stored on-site. When the satellite queue receives a time slice allocation again, the interrupted status data is retrieved and the unfinished sub-processes are continued.

10. The satellite AIT resource scheduling system based on directed acyclic graphs according to claim 6, characterized in that, The module M5 includes: Mark all nodes in the directed acyclic graph as core nodes and general nodes. Set core nodes to be addable only, and general nodes to be addable and deletable. Set the time and beat monitoring terminal, according to the statistical period. Perform data acquisition and calculate the actual beat of each layer according to the layer-by-layer beat formula. and rhythm deviation Filter out > The abnormal levels, among which This is the beat deviation threshold; For abnormal levels, when the level's tick rate is too fast... < × When the layer's cycle time is too slow, reduce the number of general nodes in that layer; when the layer's cycle time is too slow... > + × When this happens, the number of nodes in that layer is increased, where It is the maximum beat.

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