Display panel and display device comprising the same

Abstract

The present disclosure provides a display panel and a display device including the same. The display panel has a front area including a display area and a non-display area outside the display area, a back area below the front area, and a bendable area connected between the front area and the back area. The display panel is bent in the bendable area, and includes an organic insulating film disposed in the front area, the back area, and the bendable area, and having a curvature in the bendable area, and a signal line located on the organic insulating film in the bendable area. The organic insulating film can include a plurality of areas having different thicknesses in the bendable area.

Description

Technical Field

[0001] This disclosure relates to a device, and more specifically, for example, but not limited to, a display panel and a display apparatus including the same. Background Technology

[0002] Display devices are used in a variety of electronic devices such as televisions, smartphones, laptops, and tablets. Research is underway to develop thin, lightweight, and low-power display devices.

[0003] Examples of display devices include LCD (liquid crystal display) devices, FED (field light display) devices, and OLED (organic light emission display) devices.

[0004] The bezel area of ​​a display device can be the area surrounding the outer edge of the display area of ​​the display panel. The bezel area protects the edges of the display panel and internal electronic components from external impacts, pressure, or damage. The bezel area is visually identifiable by the user and may therefore be a factor that reduces the immersive experience of the image emitted from the display area.

[0005] Therefore, recently, there has been an increasing demand for display devices that achieve narrow bezels with reduced bezel areas on the screen where the display device is not displayed, or zero bezels that essentially have no bezel area.

[0006] The descriptions provided in the background section should not be assumed to be prior art simply because they are mentioned in or associated with that section. The background section may include information describing one or more aspects of the subject matter art, and the descriptions in that section do not limit this disclosure. Summary of the Invention

[0007] When a flexible substrate is applied to a display panel, the display panel may include a bendable region, wherein a portion of the display panel is bent so that the pad area is hidden beneath the display area. The bendable region may be positioned on the underside of the display panel in a plan view.

[0008] The flexible area can include multiple signal lines to transmit various signals to the pixels of the display area.

[0009] When a bendable area is bent to achieve a narrow or zero bezel beneath the display panel, stress can be applied to it. When stress is applied to the bendable area, cracks may appear in the signal lines located within it, potentially damaging them. Damaged signal lines make it difficult to transmit various signals or power to the display area, thus increasing the defect rate of the display device.

[0010] Therefore, through various experiments, the inventors of this disclosure have invented a display device that can prevent or suppress the occurrence of weak points where stress concentrates when a bendable region is bent.

[0011] The objective achieved by one or more embodiments of this disclosure is to provide a display device capable of preventing or protecting signal lines from damage caused by stress applied to a bendable area.

[0012] Another objective achieved according to one or more embodiments of this disclosure is to provide a display device capable of reducing the bezel area while enhancing the rigidity of the bendable area.

[0013] The purposes of the various embodiments according to this disclosure are not limited to those described above. Other purposes and advantages of this disclosure, not specifically mentioned, will be understood by those skilled in the art based on the following description, and may be more clearly understood based on exemplary embodiments according to this disclosure. Furthermore, the apparatus or combinations thereof shown in the claims can be used to understand or achieve the purposes and advantages of the various embodiments according to this disclosure.

[0014] To achieve these objectives and other advantages and in accordance with the purposes of this disclosure, as embodied and broadly described herein, a display panel according to one or more exemplary embodiments of this disclosure has a front region including a display area and a non-display area outside the display area, a back region below the front region, and a flexible region connecting the front region and the back region, the display panel being flexible in the flexible region and including: an organic insulating film disposed in the front region, the back region, and the flexible region and having curvature in the flexible region; and signal lines located on the organic insulating film in the flexible region, wherein the organic insulating film includes multiple regions with different thicknesses in the flexible region.

[0015] According to one or more embodiments of this disclosure, the organic insulating film disposed below the signal line and in the bendable region comprises a plurality of regions spaced apart from each other and arranged in the bendable region, wherein the plurality of regions of the organic insulating film have different thicknesses. In this respect, the organic insulating film may be a planarization layer or a substrate. This can prevent or reduce the occurrence of areas in the bendable region where stress is concentrated due to the asymmetric curvature of the substrate during bending operations.

[0016] It can enhance the rigidity of the flexible area of ​​the non-display region NDA of the substrate SUB, thereby preventing or suppressing defects such as cracks in the signal lines that extend from the display area across the flexible area to the pad area.

[0017] According to one or more embodiments of this disclosure, the organic insulating film disposed below the signal line and in the bendable region comprises a plurality of regions spaced apart from each other and arranged in the bendable region, wherein the plurality of regions of the organic insulating film have different thicknesses. In this respect, the organic insulating film may be a planarization layer or a substrate. Therefore, the curvature of the signal line can be adapted to prevent or suppress the occurrence of stress weaknesses.

[0018] This prevents or avoids damage to signal lines under stress during operation in the flexible area. It also enhances the rigidity of the flexible area while further reducing the visually identifiable border area from the outside.

[0019] According to exemplary embodiments of this disclosure, the defect rate of a display device due to damage to signal lines can be reduced, thereby reducing the production energy required for additional production of the display device and thus reducing greenhouse gas emissions.

[0020] The effects of this disclosure are not limited to those described above, and other effects not mentioned can be clearly understood by those skilled in the art from the following description.

[0021] In addition to the effects described above, the specific effects of this disclosure are described together with, or can be understood from, the specific details of the exemplary embodiments provided below for implementing this disclosure.

[0022] Other systems, methods, features, and advantages will be apparent or become apparent to those skilled in the art upon reading the following drawings and detailed description. It is intended that all such additional systems, methods, features, and advantages are included in this specification, fall within the scope of this disclosure, and are protected by the appended claims. Nothing in this section should be construed as limiting these claims. Further aspects and advantages will be discussed below in conjunction with embodiments of this disclosure. Attached Figure Description

[0023] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and form a part of this application. The drawings illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0024] Figure 1 and Figure 2 This is a diagram illustrating a display device according to an exemplary embodiment of the present disclosure.

[0025] Figure 3 It is along Figure 1 The cross-sectional view taken from line I-I' in the diagram.

[0026] Figure 4 It shows along Figure 2 The figure shows an example cross-sectional view of line II-II' in the diagram.

[0027] Figure 5 It is shown Figure 4 The diagram for region III.

[0028] Figure 6 and Figure 7 This is a diagram illustrating a display device according to another exemplary embodiment of the present disclosure.

[0029] Figure 8 This is a diagram illustrating a bendable region according to another exemplary embodiment of the present disclosure.

[0030] Figure 9 This is a diagram illustrating a bendable region according to another exemplary embodiment of the present disclosure.

[0031] Figure 10 and Figure 11 This is a diagram showing the stress during the bending operation.

[0032] Figure 12 This is a diagram illustrating a bendable region according to another exemplary embodiment of the present disclosure.

[0033] Throughout the accompanying drawings and detailed embodiments, unless otherwise stated, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustrative purposes, the relative dimensions and depictions of these elements may be exaggerated. Detailed Implementation

[0034] The advantages and features of this disclosure, as well as methods for achieving these advantages and features, will become clear from the following detailed description of exemplary embodiments in conjunction with the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed below, but can be implemented in various other forms. Therefore, these embodiments are described only to make this disclosure more complete and to more fully convey the scope of this disclosure to those skilled in the art. The scope of this disclosure may be defined by the scope of the claims and their equivalents.

[0035] For simplicity and clarity, the elements in the accompanying drawings are not necessarily drawn to scale. Unless otherwise stated, the same reference numerals in different drawings denote the same or similar elements and therefore perform similar functions. Furthermore, for the sake of simplicity, descriptions and details of well-known steps and elements may be omitted. In addition, numerous specific details may be set forth in the following detailed description of exemplary embodiments of this disclosure to provide a thorough understanding of this disclosure. However, it should be understood that this disclosure can be practiced without these specific details. In other instances, well-known methods, processes, components, and circuits may not be described in detail to avoid unnecessarily obscuring aspects of this disclosure. Examples of various embodiments are further shown and described below. It should be understood that the description herein is not intended to limit the claims to the specific embodiments described. Rather, it is intended to cover substitutions, modifications, and equivalents that may be included within the spirit and scope of this disclosure as defined by the appended claims and their equivalents.

[0036] The shapes, dimensions, ratios, angles, quantities, etc. disclosed in the accompanying drawings for illustrating exemplary embodiments of this disclosure are illustrative and this disclosure is not limited thereto.

[0037] The terminology used herein is for descriptive purposes only and is not intended to limit this disclosure. As used herein, the singular constructs “a” and “an” are intended to include the plural constructs as well, unless the context clearly indicates otherwise. It should also be understood that terms such as “comprising” and “including” as used herein specify the presence of the stated features, integers, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, operations, elements, components, and / or portions thereof. As used herein, the term “and / or” includes any and all combinations of one or more associated listed items. Expressions such as “at least one of…” may modify the entire list of elements, rather than individual elements within the list, preceding the list of elements. In the interpretation of numerical values, errors or tolerances may occur, even if not explicitly described.

[0038] Furthermore, it should be understood that when a first element or layer is referred to as existing "on" a second element or layer, the first element may be directly disposed on the second element or may be indirectly disposed on the second element, and a third element or layer may be disposed between the first element or layer and the second element or layer. It should be understood that when an element or layer is referred to as being "connected to" or "attached to" another element or layer, it may be directly connected to or attached to the other element or layer, or one or more intermediate elements or layers may exist therebetween. Furthermore, it should be understood that when an element or layer is referred to as being "between" two elements or layers, it may be the only element or layer between the two elements or layers, or one or more intermediate elements or layers may exist.

[0039] Furthermore, as used herein, when a layer, membrane, region, plate, etc., is described as being disposed "on" or "on top" of another layer, membrane, region, plate, etc., the former can directly contact the latter, or another layer, membrane, region, plate, etc., can be disposed between the former and the latter. As used herein, when a layer, membrane, region, plate, etc., is described as being "directly" disposed "on" or "on top" of another layer, membrane, region, plate, etc., the former directly contacts the latter, and another layer, membrane, region, plate, etc., is not disposed between the former and the latter. Furthermore, as used herein, when a layer, membrane, region, plate, etc., is described as being disposed "below" or "underneath" another layer, membrane, region, plate, etc., the former can directly contact the latter, or another layer, membrane, region, plate, etc., can be disposed between the former and the latter. As used herein, when a layer, membrane, region, plate, etc., is described as being "directly" disposed "below" or "underneath" another layer, membrane, region, plate, etc., the former directly contacts the latter, and another layer, membrane, region, plate, etc., is not disposed between the former and the latter.

[0040] In descriptions of temporal relationships, such as the chronological order between two events, such as “after,” “after,” “before,” etc., unless a more specific phrase is indicated, such as “directly after,” “directly after,” or “directly before,” another event may occur in between.

[0041] In cases where a particular implementation can be carried out in different ways, the functions or operations specified in a particular block may occur in a different order than those specified in the flowchart. For example, two blocks may actually be executed substantially simultaneously, or the two blocks may be executed in reverse order depending on the functions or operations involved.

[0042] It should be understood that although terms such as "first," "second," and "third" may be used herein to describe various elements, components, regions, layers, and / or time periods, these elements, components, regions, layers, and / or time periods should not be limited by these terms. These terms are used to refer to an element, component, region, layer, or time period that is separate from another element, component, region, layer, or time period. Therefore, without departing from the technical spirit and scope of this disclosure, a first element, component, region, layer, or time period as described herein may be referred to as a second element, component, region, layer, or time period, and vice versa.

[0043] Features of the various embodiments of this disclosure can be combined partially or completely with each other, and can be technically related to or operate together with each other. Embodiments can be implemented independently of each other, or they can be implemented together in an associated relationship.

[0044] When interpreting numerical values, unless otherwise stated, the value will be interpreted to include a range of error.

[0045] Unless otherwise defined, all terms used herein, including technical and scientific terms, shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It should also be understood that terms such as those defined in common dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the relevant field and shall not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0046] As used herein, terms such as “implementation,” “example,” “aspect,” etc., should not be construed as making any described implementation, example, aspect, or design superior to or better than other implementations, examples, aspects, or designs.

[0047] Furthermore, unless otherwise stated or clear from the context, the term "or" refers to "inclusive or" rather than "exclusive or". That is, unless otherwise stated or clear from the context, the statement "x uses a or b" refers to one of the natural inclusive permutations.

[0048] The terminology used in the following description has been chosen to be general and common in the relevant art. However, depending on the development and / or changes of the technology, conventions, the preferences of those skilled in the art, etc., there may be other equivalent, similar, or appropriate terms. Therefore, the terminology used in the following description should not be construed as limiting the technical concept, but should be understood as examples of terminology used to describe embodiments.

[0049] Furthermore, in certain circumstances, the terminology may be arbitrarily chosen by the applicant, and in such cases, its detailed meaning will be described in the corresponding descriptive period. Therefore, the terminology used in the following description should not be understood simply based on the name of the term, but rather on its meaning throughout the specific implementation.

[0050] In the description of signal flow, for example, where a signal is described as being delivered from node A to node B, this could include cases where a signal is transmitted from node A to node B via another node, unless more specific phrases such as “immediate transmission” or “direct transmission” are used.

[0051] Throughout this disclosure, if used, “A and / or B” means A, B or A and B, unless otherwise stated, and “C to D” means C (inclusive) to D (inclusive) unless otherwise stated.

[0052] "At least one" should be understood as any combination including one or more of the listed components. For example, at least one of the first, second, and third components includes not only the first, second, or third component alone, but also all combinations of two or more of the first, second, and third components.

[0053] In the following description, exemplary embodiments of the present disclosure will be illustrated with reference to the accompanying drawings. For ease of explanation, the scale of each component shown in the drawings may differ from its actual scale. Therefore, the present disclosure is not limited to the scales shown in the drawings.

[0054] As used herein, the first direction, the second direction, and the third direction, or the X-axis direction, the Y-axis direction, and the Z-axis direction, should not be interpreted merely as having a geometric relationship in which the first direction, the second direction, and the third direction are perpendicular to each other or the X-axis direction, the Y-axis direction, and the Z-axis direction are perpendicular to each other, but can be interpreted as having a geometric relationship in which the configuration of this disclosure can be functionally effective, wherein the first direction, the second direction, and the third direction intersect each other at an angle other than 90 degrees (°) or the X-axis direction, the Y-axis direction, and the Z-axis direction intersect each other at an angle other than 90 degrees (°).

[0055] In the following description, a display device according to an exemplary embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0056] Figure 1 and Figure 2 This is a diagram illustrating a display device according to an exemplary embodiment of the present disclosure. Figure 1 The example display device is shown in its unbent state, and Figure 2 An example is shown, displaying the bent state of the device.

[0057] like Figure 1 and Figure 2 As shown, the display device 1 according to the example embodiment of the present disclosure may include a display panel 200, a driving circuit chip 103, a printed circuit board 104, etc. The display panel 200 includes a display area AA and a non-display area NAA.

[0058] The display area AA is the area where an image is displayed, and multiple pixels P, data lines DL, and gate lines GL can be disposed within the display area AA. The non-display area NAA can be an area where no image is displayed. The non-display area NAA can be located in the peripheral area (or edge area) of the display panel 200. However, the embodiments of this disclosure are not limited thereto. For example, an area other than the light-emitting area that emits light outward in the display area AA can be referred to as the non-display area NAA. The bezel area of ​​the display device can be defined by the non-display area NAA. The bezel area or the non-display area NAA can surround the outside of the display area AA. The flexible area BDA and the pad area PDA can be disposed at the lower end of the non-display area NAA.

[0059] Lines for providing or receiving electrical signals to or from the display area AA can be provided in the non-display area NAA. For example, a gating driver for providing gate signals to multiple sub-pixels SP1, SP2, and SP3 of the display area AA can be provided in the non-display area NAA. The gating driver can be provided at each of the right and left edges of the non-display area NAA in a panel-in-panel (GIP) manner, but embodiments of this disclosure are not limited thereto. The gating driver can transmit gating signals via gating lines GL.

[0060] The non-display area NAA may include a driver circuit chip 103 in the pad area PDA, which has multiple pads. The driver circuit chip 103 can transmit data signals to multiple sub-pixels SP1, SP2, and SP3 via multiple data lines DL in the display area AA. For example, the driver circuit chip 103 may be a data driver circuit chip. However, the embodiments of this disclosure are not limited thereto.

[0061] In the plan view of the display device, the gate line GL can extend in the first direction X of the display panel 200, and the data line DL can intersect with the gate line GL and extend in the second direction Y of the display panel 200.

[0062] The data line DL in the display area AA can extend toward the flexible area BDA and can be electrically connected to the driver circuit chip 103. In the example, the signal line that electrically connects the data line DL and the driver circuit chip 103 to each other can extend from a portion of the non-display area NAA between the flexible area BDA and the display area AA to the flexible area BDA and the pad area PDA, so as to electrically connect to the printed circuit board 104. When the flexible area BDA is bent, the signal line extending to the flexible area BDA can bend along the shape of the flexible area BDA. This will be described later.

[0063] The flexible area BDA of the display panel 200 can be bent so that the printed circuit board 104 is positioned below the display area AA of the display panel 200. The printed circuit board 104 may include a control circuit chip for controlling the gating driver. Therefore, the non-display area NAA that is visible to the viewer in front of the display device 1 can be reduced, and a narrow bezel can be achieved.

[0064] The display area AA may include a plurality of pixels P and one or more holes H. Hole H may be an area in which electronic components for adding various functions to the display device 1 are disposed. For example, the electronic components may include a camera module for taking photographs or images, or may include various sensor devices for detecting external objects. The sensor devices may include at least one of a proximity sensor, a gesture sensor, a color sensor, a biometric sensor, and an infrared sensor. However, embodiments of this disclosure are not limited thereto.

[0065] A pixel P may include multiple subpixels SP1, SP2, and SP3. An image can be displayed in a display area AA using multiple subpixels SP1, SP2, and SP3. The multiple subpixels SP1, SP2, and SP3 can be arranged in an array in the display area AA. In the example, the multiple subpixels SP1, SP2, and SP3 can be arranged in a matrix and can be spaced apart from each other in a first direction and a second direction intersecting the first direction in the display area AA. The first direction can be a horizontal direction, an X-axis direction, or a row direction, and the second direction can be a vertical direction, a Y-axis direction, or a column direction. However, this disclosure is not limited thereto, and the arrangement shape, arrangement order, and arrangement direction of the subpixels SP1, SP2, and SP3 can be changed in various ways.

[0066] Subpixels SP1, SP2, and SP3 can be implemented to emit light of the same color, such as white light. Alternatively, subpixels SP1, SP2, and SP3 can be implemented to emit light of different colors, such as red, green, and blue.

[0067] Figure 3 It is along Figure 1 The cross-sectional view taken from line I-I' in the diagram. Figure 3 An example subpixel of a display device is schematically shown. In this disclosure, for ease of description, an example configuration of a subpixel is described. However, this disclosure is not limited thereto.

[0068] like Figure 3 As shown, the display panel 200 may include a driving array 1000 disposed on a substrate 201. A polarizing layer 300, an optical adhesive member 310, and a cover substrate 400 may be disposed on the driving array 1000.

[0069] The driving array 1000 may include a pixel driving circuit 1100, a light-emitting area 1200, and a touch area 1300. The pixel driving circuit 1100 may include a plurality of transistors 220 and 240 and a storage capacitor 230. The light-emitting area 1200 may include a light-emitting element 260, and the touch area 1300 may include a touch sensor 287.

[0070] A sub-pixel may include a light-emitting region 1200 and a pixel driving circuit 1100. The light-emitting region 1200 includes a light-emitting element 260, and the pixel driving circuit 1100 applies a driving current to the light-emitting element 260 of the light-emitting region 1200. The pixel driving circuit 1100 is disposed on the substrate 201, and the light-emitting region 1200 is disposed on the pixel driving circuit 1100. A touch region 1300 may be disposed on the light-emitting region 1200. However, embodiments of this disclosure are not limited thereto. The plurality of transistors 220 and 240 of the pixel driving circuit 1100 may include a first transistor 220 and a second transistor 240.

[0071] The substrate 201 may be a flexible plastic substrate. When the substrate 201 is formed as a plastic film, it may include multiple layers made of an insulating material. A first buffer layer 205 may be disposed on the substrate 201. The first buffer layer 205 may cover the surface of the substrate 201. The first buffer layer 205 may reduce or prevent moisture, oxygen, or impurities from penetrating the substrate 201. The first buffer layer 205 may be implemented as a single layer or multiple layers made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). The first buffer layer 205 may completely cover the surface of the substrate 201 in the display area AA. For example, the first buffer layer 205 may extend to the non-display area NAA surrounding the periphery of the display area AA.

[0072] A light-shielding layer 209 may be disposed on the first buffer layer 205. The light-shielding layer 209 can prevent or block external light from incident on the transistor. For this purpose, the light-shielding layer 209 may comprise an opaque metallic material. A second buffer layer 212 may be disposed on the light-shielding layer 209. The second buffer layer 212 can protect the transistor from moisture, oxygen, or impurities. The second buffer layer 212 may be implemented as a single layer or multiple layers made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). However, embodiments of this disclosure are not limited thereto. The second buffer layer 212 may completely cover the surface of the substrate 201 in the display area AA. For example, the second buffer layer 212 may extend to the non-display area NAA surrounding the periphery of the display area AA.

[0073] The first transistor 220 may be disposed on the second buffer layer 212. The first transistor 220 may include a first semiconductor layer 221, a first gate insulating layer 222, a first gate electrode 223, a first source electrode 224, and a first drain electrode 225. In the example, the first transistor 220 may be a switching transistor.

[0074] The first semiconductor layer 221 may include a channel region and a source / drain region. The region of the first semiconductor layer 221 that overlaps with the first gate electrode 223 in the vertical direction may be the channel region. The source / drain regions may be respectively disposed on opposite sides of the channel region. The first semiconductor layer 221 may include one of a polycrystalline silicon semiconductor layer and a low-temperature polycrystalline silicon semiconductor layer, or a combination thereof. In another example, the first semiconductor layer 221 may include an oxide semiconductor layer. For example, the first semiconductor layer 221 may include at least one oxide semiconductor material, such as IGZO (indium gallium zinc oxide) or IZO (indium zinc oxide).

[0075] When the first semiconductor layer 221 includes an oxide semiconductor layer, the first transistor 220 can be implemented as an oxide thin-film transistor. The first semiconductor layer 221 can be configured to overlap with the light-shielding layer 209 in the vertical direction. The light-shielding layer 209 can prevent or block external light from incident on the first semiconductor layer 221.

[0076] A first gate insulating layer 222 may be disposed between the first semiconductor layer 221 and the first gate electrode 223. The first gate insulating layer 222 may extend outwards while covering the first semiconductor layer 221. The first gate insulating layer 222 may be implemented as a single layer or multilayer stack made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). The first gate insulating layer 222 may completely cover the surface of the substrate 201 in the display area AA. For example, the first gate insulating layer 222 may extend to the non-display area NAA surrounding the periphery of the display area AA.

[0077] A first gate electrode 223 may be disposed on a first gate insulating layer 222. A first interlayer insulating layer 214 may be disposed on the first gate electrode 223. The first interlayer insulating layer 214 may be implemented as a single layer or a multilayer stack made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). In an example, the first interlayer insulating layer 214 may extend to a non-display area NAA surrounding the periphery of the display area AA.

[0078] The first source electrode 224 and the first drain electrode 225 can be electrically connected to the first semiconductor layer 221.

[0079] The storage capacitor 230 may include a first storage electrode 231 and a second storage electrode 232. For example, the first storage electrode 231 and the first gate electrode 223 may be formed on the same layer (e.g., a first gate insulating layer 222). For example, the first storage electrode 231 may be disposed on the first gate insulating layer 222 and at a position horizontally spaced from the first gate electrode 223. The first storage electrode 231 may be made of the same material as the first gate electrode 223. The second storage electrode 232 may be disposed on the first interlayer insulating layer 214 to overlap the first storage electrode 231 in the vertical direction.

[0080] Each of the first storage electrode 231 and the second storage electrode 232 may be implemented as a single-layer or multi-layer stack made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof. However, the embodiments of this disclosure are not limited thereto.

[0081] A second interlayer insulating layer 216 may be disposed on the second storage electrode 232. The second interlayer insulating layer 216 may be implemented as a single layer or multilayer stack made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). In the example, the second interlayer insulating layer 216 may extend to the non-display area NAA surrounding the display area AA.

[0082] The second transistor 240 may be disposed on the second interlayer insulating layer 216, spaced apart from the first transistor 220. The second transistor 240 may be electrically connected to the first transistor 220. For example, the second transistor 240 may include a second semiconductor layer 241, a second gate insulating layer 242, a second gate electrode 243, a second source electrode 245, and a second drain electrode 246. In this example, the second transistor 240 may be a driving transistor electrically connected to the light-emitting element 260.

[0083] The second semiconductor layer 241 may include a channel region and a source / drain region. The region of the second semiconductor layer 241 that overlaps with the second gate electrode 243 in the vertical direction may be the channel region. The source / drain regions may be disposed on opposite sides of the channel region. The second semiconductor layer 241 may include an oxide semiconductor layer. For example, the second semiconductor layer 241 may include an oxide semiconductor material, such as indium gallium zinc oxide (IGZO) or indium zinc oxide (IZO). In this example, the second semiconductor layer 241 may be configured to overlap with the storage capacitor 230 in the vertical direction. Therefore, the storage capacitor 230 can prevent or block external light entering through the substrate 201 from incident on the second semiconductor layer 241. This prevents or avoids changes in the characteristics of the second transistor 240 due to external light.

[0084] The second gate insulating layer 242 may be disposed between the second semiconductor layer 241 and the second gate electrode 243. The second gate insulating layer 242 may extend outward while covering the second semiconductor layer 241. For example, the second gate insulating layer 242 may extend to the non-display area NAA surrounding the periphery of the display area AA. The second gate insulating layer 242 may be implemented as a single layer or multilayer stack made of an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx).

[0085] Each of the first gate electrode 223 or the second gate electrode 243 may be implemented as a single-layer or multi-layer stack made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or an alloy thereof. However, examples of materials are not limited thereto.

[0086] A third interlayer insulating layer 218 may be disposed on the second gate electrode 243. The third interlayer insulating layer 218 may include an insulating material. For example, the third interlayer insulating layer 218 may include an inorganic insulating material, such as silicon oxide (Six), silicon nitride (SiNx), or silicon oxynitride (SiON), and may be implemented as a single layer or a multilayer stack. In this example, the third interlayer insulating layer 218 may extend to the non-display area NAA surrounding the display area AA.

[0087] The first source electrode 224, the first drain electrode 225, the second source electrode 245, and the second drain electrode 246 can be disposed on the third interlayer insulating layer 218.

[0088] The first source electrode 224 and the first drain electrode 225 can extend through the third interlayer insulating layer 218, the second gate insulating layer 242, the second interlayer insulating layer 216, the first interlayer insulating layer 214, and the first gate insulating layer 222, so as to directly contact and electrically connect with the source / drain regions of the first semiconductor layer 221, respectively.

[0089] The second source electrode 245 and the second drain electrode 246 may extend through the third interlayer insulating layer 218 and the second gate insulating layer 242 to directly contact and electrically connect to the source / drain regions of the second semiconductor layer 241, respectively. The second drain electrode 246 of the second transistor 240 may be electrically connected to the storage capacitor 230. For example, a portion of the second drain electrode 246 may extend through the third interlayer insulating layer 218, the second gate insulating layer 242, the second interlayer insulating layer 216, and the first interlayer insulating layer 214 to directly contact and electrically connect to the first storage electrode 231 of the storage capacitor 230.

[0090] Each of the first source electrode 224, the first drain electrode 225, the second source electrode 245, and the second drain electrode 246 may be implemented as a single-layer or multi-layer stack made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof. However, embodiments of this disclosure are not limited thereto.

[0091] In the example, each of the first source electrode 224 and the first drain electrode 225 may have a stacked structure of titanium / aluminum / titanium (Ti / Al / Ti).

[0092] Passivation layer 247 may be disposed on the first source electrode 224, the first drain electrode 225, the second source electrode 245, and / or the second drain electrode 246. Passivation layer 247 may comprise an inorganic insulating material, such as silicon oxide, silicon nitride, and silicon oxynitride, and may be implemented as a single layer or a multilayer stack. Passivation layer 247 may protect the pixel driving circuitry disposed beneath it. Passivation layer 247 may extend to the non-display area NAA surrounding the periphery of the display area AA.

[0093] Inorganic insulating layers 205, 212, 222, 214, 216, 242, 218, and 247 disposed on substrate 201 can be vertically stacked in the non-display area NAA to form an inorganic insulating structure MB (see also example...). Figure 5 For example, the inorganic insulating structure MB may include a first buffer layer 205, a second buffer layer 212, a first gate insulating layer 222, a first interlayer insulating layer 214, a second interlayer insulating layer 216, a second gate insulating layer 242, a third interlayer insulating layer 218, and a passivation layer 247. However, embodiments of this disclosure are not limited thereto.

[0094] Planarization layer 250 may be disposed on passivation layer 247. Planarization layer 250 may planarize one or more steps caused by the pixel driving circuitry beneath it. Planarization layer 250 may include a multilayer structure of first planarization layer 251 and second planarization layer 252. For example, planarization layer 250 may include a photoreactive organic insulating material, such as photosensitive polyimide resin, photosensitive acrylic resin, or photosensitive photoresist. In this example, each of the first planarization layer 251 and the second planarization layer 252 may extend to the non-display area NAA surrounding the periphery of display area AA.

[0095] Pixel contact electrode 255 may be disposed on the first planarization layer 251. Pixel contact electrode 255 may extend through the first planarization layer 251 and passivation layer 247 to directly contact the second drain electrode 246 of the second transistor 240.

[0096] The light-emitting element 260 can be formed on the planarization layer 250. For example, the light-emitting element 260 can be disposed on the second planarization layer 252. The light-emitting element 260 may include a first electrode 261, a light-emitting layer 263, a second electrode 265, and a capping layer 267.

[0097] The light-emitting element 260 can be electrically connected to the pixel driving circuit via a first electrode 261. For example, the first electrode 261 can extend through the second planarization layer 252 to directly contact the pixel contact electrode 255. Therefore, the first electrode 261 can be electrically connected to the second transistor 240 via the pixel contact electrode 255. The pixel contact electrode 255 can include a conductive material. For example, the pixel contact electrode 255 can include a metallic material such as aluminum (Al), chromium (Cr), copper (Cu), titanium (Ti), molybdenum (Mo), or tungsten (W). In this example, the pixel contact electrode 255 can have a multilayer structure of titanium / aluminum / titanium (Ti / Al / Ti).

[0098] The first electrode 261 may include a transparent conductive film. For example, the first electrode 261 may include ITO (indium tin oxide) or IZO (indium zinc oxide). Alternatively, the first electrode 261 may have a single-layer or multi-layer structure, including a reflective metal film made of one of silver (Ag), aluminum (Al), gold (Au), nickel (Ni), and chromium (Cr), or alloys thereof. The first electrode 261 may also be referred to as a pixel electrode or an anode electrode.

[0099] A dam 262 may be disposed on the first electrode 261. The dam 262 may be configured to cover the edge of the first electrode 261. A portion of the dam 262 may extend into the second planarization layer 252. The portion of the upper surface of the first electrode 261 not covered by the dam 262 but exposed through it may be a light-emitting area. The dam 262 may be made of an organic insulating material. The dam 262 may include, for example, photosensitive polyimide, photoacrylic acid, or benzocyclobutene (BCB).

[0100] Spacer 264 may be further disposed on the embankment 262. Spacer 264 may be configured to prevent or suppress damage to the embankment 262 and the first electrode 261 during manufacturing or fabrication. Spacer 264 may be made of the same material as the embankment 262. Embankment 262 and spacer 264 may be stacked vertically to form an organic insulating structure 266.

[0101] The light-emitting layer 263 may be disposed on the first electrode 261. The light-emitting layer 263 may include a hole transport layer HTL, an organic light-emitting layer EML, an electron transport layer ETL, a hole blocking layer HBL, a hole injection layer HIL, an electron blocking layer EBL, and an electron injection layer EIL. The light-emitting layer 263 may have a multi-stack structure in which two or more organic light-emitting layers EML are stacked.

[0102] The second electrode 265 can be disposed on the light-emitting layer 263. The second electrode 265 can be commonly connected to the light-emitting layer 263 formed in all pixels. Therefore, the second electrode 265 can also be referred to as a common electrode or a cathode electrode. The second electrode 265 may include a semi-transparent reflective conductive material. For example, the second or cathode electrode 265 can be made of a metallic material, such as magnesium (Mg), silver (Ag), or an alloy of silver (Ag) and magnesium (Mg) (Ag-Mg). In this example, the second electrode 265 may include a transparent conductive layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0103] A capping layer 267 can be disposed on the second electrode 265. The capping layer 267 can prevent light loss generated from the light-emitting layer 263, thereby improving the light extraction efficiency.

[0104] The package stack 270 can be disposed on the light-emitting element 260. The package stack 270 can protect the light-emitting element 260 from external oxygen or moisture. The package stack 270 can extend to the non-display area NAA outside the display area AA, while covering the display area AA.

[0105] The package stack 270 may include a multi-layer structure in which a first package layer 271, a second package layer 273, and a third package layer 275 are stacked. The second package layer 273 may be disposed between the first package layer 271 and the third package layer 275.

[0106] A first encapsulation layer 271 may be disposed on the cover layer 267. A second encapsulation layer 273 may be disposed on the first encapsulation layer 271. The second encapsulation layer 273 may cover the first encapsulation layer 271 and may have sufficient thickness to have a flat upper surface. The second encapsulation layer 273 may prevent or block foreign matter from penetrating into the light-emitting element 260. A third encapsulation layer 275 may be disposed on the second encapsulation layer 273. Each of the first encapsulation layer 271 and the third encapsulation layer 275 may extend to the non-display area NAA surrounding the periphery of the display area AA.

[0107] Each of the first encapsulation layer 271 and the third encapsulation layer 275 may include an inorganic insulating material, and the second encapsulation layer 273 may include an organic insulating material. For example, each of the first encapsulation layer 271 and the third encapsulation layer 275 may include at least one of silicon nitride (SiNx), silicon oxide (SiOx), and silicon oxynitride (SiON). The second encapsulation layer 273 may include at least one of epoxy resin, polyimide, polyethylene, and acrylate.

[0108] The touch area 1300 can be disposed on the package stack 270. The touch area 1300 may include a touch buffer layer 277, a touch sensor 287, a touch interlayer insulating layer 282, a first touch protection layer 290, and a second touch protection layer 295.

[0109] A touch buffer layer 277 may be disposed on the third encapsulation layer 275. The touch buffer layer 277 can reduce the stress between the layers of the encapsulation stack 270 and the touch sensor 287, thereby preventing or avoiding damage to the encapsulation stack 270 and the light-emitting element 260. The touch buffer layer 277 may include an inorganic insulating material. For example, the touch buffer layer 277 may include silicon nitride (SiNx).

[0110] Touch sensor 287 may include a plurality of touch electrodes 285 and bridge electrodes 281. The plurality of touch electrodes 285 and bridge electrodes 281 may be disposed in different layers. For example, bridge electrodes 281 may be disposed on touch buffer layer 277. The plurality of touch electrodes 285 may be disposed on touch interlayer insulating layer 282. The plurality of touch electrodes 285 may include first touch electrodes 283 and second touch electrodes 284. Bridge electrodes 281 may electrically connect adjacent first touch electrodes 283 to each other. For this purpose, first touch electrodes 283 may extend through touch interlayer insulating layer 282 to connect to bridge electrodes 281. Touch interlayer insulating layer 282 may include an inorganic insulating material. For example, touch interlayer insulating layer 282 may include silicon nitride (SiNx).

[0111] The first touch electrode 283, the second touch electrode 284, or the bridge electrode 281 may include a conductive material. The first touch electrode 283, the second touch electrode 284, or the bridge electrode 281 may include a single layer or multiple layers of a stack made of one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof.

[0112] Each of the touch buffer layer 277 and the touch interlayer insulating layer 282 may extend toward the non-display area NAA. The touch buffer layer 277 and the touch interlayer insulating layer 282 may contact each other in the vertical direction in the non-display area NAA to form a touch insulating structure 280.

[0113] A first touch protection layer 290 may be disposed on the touch sensor 287. The first touch protection layer 290 can prevent or suppress damage to the touch sensor 287 from external impacts and moisture. The first touch protection layer 290 may include an organic insulating material. For example, the first touch protection layer 290 may be made of a photosensitive acrylic-based or polyimide-based organic material.

[0114] A second touch protection layer 295 may be disposed on the first touch protection layer 290. The second touch protection layer 295 may also protect the touch sensor 287 from external impacts and moisture. Furthermore, the second touch protection layer 295 may flatten one or more steps caused by the pattern constituting the touch sensor 287 disposed beneath it. The second touch protection layer 295 may include an organic insulating material.

[0115] A polarizing layer 300 may be disposed on the second touch protective layer 295 of the touch area 1300. The polarizing layer 300 may be disposed on the touch area 1300 via a first adhesive member 305. The polarizing layer 300 may suppress the reflection of external light and may alter the polarization state of light emitted from the light-emitting element 260 of the light-emitting area 1200. For example, the first adhesive member 305 may include a pressure-sensitive adhesive (PSA).

[0116] The cover substrate 400 can be disposed on the polarizing layer 300. The cover substrate 400 can protect the pixel driving circuit 1100, the light-emitting area 1200 and the touch area 1300. The cover substrate 400 can be referred to as a cover window, a window cover or a cover glass.

[0117] The cover substrate 400 may include a glass substrate. An optical adhesive member 310 may be disposed between the polarizing layer 300 and the cover substrate 400. For example, the optical adhesive member 310 may include an optically clear adhesive (OCA) film.

[0118] Figure 4 It shows along Figure 2 The figure shows an example cross-section taken from line II-II'. Figure 5 It is shown Figure 4 The diagram for region III.

[0119] like Figure 4 and Figure 5 As shown, the substrate 201 of the display panel 200 may include a front area FA for displaying an image, a back area BA disposed facing the rear surface of the front area FA, and a flexible area BDA disposed between the front area FA and the back area BA. The front area FA may include a display area AA and a non-display area NAA (i.e., the area other than the display area AA). The display area AA and the non-display area NAA can be applied equally to the cover substrate 400. The area of ​​the cover substrate 400 for displaying the image may be the display area AA.

[0120] The flexible region BDA can extend from one side of the front region FA of the display panel 200 (or substrate 201) and can be flexible. Since the flexible region BDA of the display panel 200 (or substrate 201) is bent, the printed circuit board 104 can be disposed in the back region BA and face away from the front region FA.

[0121] The first adhesive component 305, the polarizing layer 300, the optical adhesive component 310, and the cover plate 400 can be disposed on the display panel 200.

[0122] Plates 500 and 510 may be disposed on the lower surface of the substrate 201 of the display panel 200. Plates 500 and 510 may support the substrate 201, which is made of a flexible material, to maintain its shape. Plates 500 and 510 may include, for example, polyethylene terephthalate (PET). Plates 500 and 510 may include a first plate 500 and a second plate 510 spaced apart from each other. The first plate 500 and the second plate 510 may be disposed in a region other than the bendable region BDA, so that the bendable region BDA of the display panel 200 can be easily bent. For example, the region between the first plate 500 and the second plate 510 may be the bendable region BDA.

[0123] For example, the end of the first plate 500 may be the boundary of one side of the flexible region BDA, and the end of the second plate 510 facing the first plate 500 may be the boundary of the other side of the flexible region BDA. The first plate 500 may support the portion of the display region AA and the non-display region NA adjacent to the display region AA, while the second plate 510 may support the portion of the substrate 201 of the display panel 200 on which the printed circuit board 104 is disposed. For example, since the first plate 500 is disposed in the region corresponding to and perpendicularly overlapping with the display region AA, the size of the first plate 500 may be larger than the size of the second plate 510 in the plan view of the display device.

[0124] The third plate 520 may be disposed below the first plate 500. In the example, the third plate 520 may include a heat dissipation layer. The heat dissipation layer is designed to provide heat dissipation to components that generate heat and may include a material with high thermal conductivity. For example, the third plate 520 may include a metallic material with high thermal conductivity.

[0125] The connecting member 530 may be disposed above the second plate 510. The connecting member 530 may secure the curved portion of the display panel 200 to maintain its curved shape. The connecting member 530 may include a pressure-sensitive adhesive, which includes an optically transparent adhesive capable of securing the third plate 520 and the second plate 510 in place.

[0126] A first adhesive layer 505 may be disposed between the first plate 500 and the substrate 201, and between the second plate 510 and the substrate 201, of the display panel 200 to fix each of the first plate 500 and the second plate 510 to the substrate 201. A second adhesive layer 525 may be disposed between the first plate 500 and the third plate 520 to fix the first plate 500 and the third plate 520 to each other. A third adhesive layer 515 and a fourth adhesive layer 535 are respectively disposed on the lower surface and the upper surface of the connecting member 530 to fix the curved portion of the display panel 200 to maintain its curved shape.

[0127] Signal line CNL can be disposed on the flexible region BDA of substrate 201. Signal line CNL can be electrically connected to the drive array 1000 in display region AA. Signal line CNL can be on and extend along the flexible region BDA in non-display region NAA, and is electrically connected to printed circuit board 104.

[0128] like Figure 5 As shown, the inorganic insulating structure MB can be disposed on a portion of the non-display area NAA between the display area AA and the flexible area BDA of the substrate 201. The inorganic insulating structure MB can be configured not to extend into the flexible area BDA. The inorganic insulating structure MB can be implemented as a multilayer insulating layer made of inorganic insulating material and extending from the display area AA (see example...). Figure 3 The link contact electrode LCT can be disposed on the inorganic insulating structure MB. The link contact electrode LCT can be made of the same material as the second source electrode 245 or the second drain electrode 246 of the display area AA, and can be formed in the same process as the second source electrode 245 or the second drain electrode 246 of the display area AA. The link contact electrode LCT can be electrically connected to a data link line connected to a plurality of pixels P of the display area AA via a connection electrode that extends through a stack of multiple insulating layers constituting the inorganic insulating structure MB.

[0129] The first planarization layer 251 covering the link contact electrode LCT can be disposed on the inorganic insulating structure MB. The first planarization layer 251 can extend from the display area AA to the flexible area BDA. For example, the first planarization layer 251 can be disposed on the flexible area BDA so as to directly contact the substrate 201. For example, the first planarization layer 251 can be configured to extend from the front area FA and then across the flexible area BDA to the back area BA. In this case, the first planarization layer 251 can have the same thickness over the entire flexible area BDA.

[0130] When removing the portion of the inorganic insulating structure MB that corresponds to and perpendicularly overlaps with the flexible region BDA of the display panel, the portion of the substrate 201 located below the inorganic insulating structure MB can also be removed to form a sloping surface. Depending on the process conditions, the sloping surface formed by removing a portion of the substrate 201 from the flexible region BDA can have a sharp angle or a steep slope. When the sloping surface of the substrate 201 has a steep slope, a defect may occur where a portion of the signal line CNL located on the steep sloping surface may be damaged or cut off. Therefore, a first planarization layer 251 can be formed on the substrate 201, and the signal line CNL can be located on the first planarization layer 251. This can prevent or suppress the potential defect of the signal line CNL being damaged due to the steep slope of the substrate 201 in the flexible region BDA.

[0131] The signal line CNL can be disposed on the first planarization layer 251. The signal line CNL can be disposed on the non-display area NAA and the flexible area BDA adjacent to the display area AA. The signal line CNL can extend through the first planarization layer 251 to contact and connect to the link contact electrode LCT. The area where the signal line CNL and the contact electrode LCT contact and connect to each other can be referred to as the connection area CTA.

[0132] The signal line CNL can be made of the same material as the pixel contact electrode 255 of the display area AA, and can be formed in the same process as the pixel contact electrode 255 of the display area AA.

[0133] A second planarization layer 252 may be disposed on the signal line CNL. The second planarization layer 252 may extend to the flexible region BDA while covering the signal line CNL. For example, the second planarization layer 252 may be disposed from and extending along the front region FA, then across and along the flexible region BDA, extending to and along the back region BA. An organic insulating structure 266 may be disposed on the second planarization layer 252. The organic insulating structure 266 may be made of the same material as each of the dike 262 and the spacer 264, and formed in the same process as each of the dike 262 and the spacer 264.

[0134] like Figure 4 and Figure 5As shown, the protective layer 560 can be disposed on the outer surface of the flexible region BDA of the display panel 200. The protective layer 560 can cover the portion of the signal line CNL disposed on the flexible region BDA, and can extend to be disposed on a portion of the front region FA and a portion of the rear region BA. On the front region FA, the protective layer 560 can cover the side surface of the polarizing layer 300. On the rear region BA, the protective layer 560 can cover a portion of the printed circuit board 104. In this example, the protective layer 560 can be thicker than the polarizing layer 300.

[0135] The protective layer 560 can protect the signal line CNL from external impacts and prevent or block moisture from penetrating into the signal line CNL. Furthermore, the protective layer 560 can enhance the rigidity of the substrate 201 of the display panel 200 in the flexible region BDA where the first plate 500 and the second plate 510 are not disposed. For example, the protective layer 560 may comprise a resin. However, embodiments of this disclosure are not limited thereto.

[0136] A small curvature bending process (tight bending process) can be further performed on the substrate 201 of the display panel 200 to reduce or minimize a portion (or bezel area) of the non-display area in the edge portion of the front area FA, which may be visible to a viewer in front of the front area FA. In the small curvature bending process (tight bending process), after the bendable area BDA has been bent, it can be as follows... Figure 4 The portion of the substrate 201 with the second plate 510 shown is pulled in the horizontal direction F to make the bendable area have a smaller radius of curvature, thereby minimizing or further reducing the portion of the non-display area (or border area) in the edge portion of the front area FA that may be visible to the viewer in front of the front area FA.

[0137] Before performing the small curvature bending process (tight bending process), in the bending process where the back area BA of the display panel 200 is located below the front area FA when bending the bendable region BDA, the bendable region BDA can have the same radius of curvature across the entire bendable region BDA. However, by further performing the small curvature bending process (tight bending process) to minimize or further reduce the bezel area visible to the viewer in front of the front area FA, the shape of the substrate 201 can be changed, potentially resulting in an asymmetrical curvature.

[0138] For example, when a portion of the substrate 201 located in the back region BA is pulled in the horizontal direction F, the end of the second plate 510 moves in the horizontal direction F, so that the end of the first plate 500 can protrude beyond the end of the second plate 510 (e.g., further outward than the end of the second plate 510). Therefore, the curvature of the portion of the signal line CNL disposed on the bendable region BDA may be non-uniform. For example, the curvature of the signal line CNL may be asymmetrical, so that its radii of curvature R1, R2, and R3 at different locations corresponding to different positions in the bendable region BDA may be different from each other. The radius of curvature indicates the degree of curvature of the curve. The radius of curvature at a point on the curve is the radius of the circle that is closest to the curve at that point. It can be considered a measure of how much the curve deviates from a straight line at a particular location. The smaller the radius of curvature, the more abrupt or tighter the curvature. As the radius of curvature decreases, the degree of curvature of the curve may increase.

[0139] For example, a portion of the signal line CNL located in the curved region BDA near the front region FA may have a first radius of curvature R1 relative to the trajectory around the end of the first plate 500. Similarly, a portion of the signal line CNL located at the most protruding part (e.g., the outermost part) of the curved region BDA may have a second radius of curvature R2 relative to the trajectory around the end of the third plate 520. Furthermore, a portion of the signal line CNL located in the curved region BDA near the back region BA may have a third radius of curvature R3 relative to the trajectory around the end of the third plate 520. Among the first radius of curvature R1, the second radius of curvature R2, and the third radius of curvature R3, the first radius of curvature R1 may be the smallest, and the third radius of curvature R3 may be the largest. Therefore, the first curvature between the first radius of curvature R1 and the second radius of curvature R2 may be smaller than the second curvature between the second radius of curvature R2 and the third radius of curvature R3.

[0140] When the curvature of the signal line CNL at different locations corresponding to different positions of the bendable region BDA differs from each other, stress can be concentrated on a specific portion of the bendable region BDA. The stress can be a force acting on a unit area. For example, the specific area where stress is concentrated in the bendable region BDA could be a portion of the bendable region BDA closer to the frontal region FA. This specific area of ​​stress concentration could be a crack initiation critical point S, at which a crack is more likely to occur in the signal line CNL compared to other points. The crack initiation critical point S could be a location with a first radius of curvature R1, which has a minimum radius of curvature and defines a first angle θ relative to the end (e.g., side surface) of the first plate 500. The first angle θ could be approximately 45 degrees.

[0141] Therefore, in another exemplary embodiment of this disclosure, a configuration capable of preventing or suppressing the occurrence of a critical point of cracking due to stress concentration at a specific location in the bendable region BDA can be proposed.

[0142] Figure 6 and Figure 7 This is a diagram illustrating a display device according to another exemplary embodiment of the present disclosure. Figure 6 and Figure 7 In, with Figure 4 and Figure 5 In the example embodiments, the same components may be referred to by the same reference numerals. Therefore, redundant descriptions may be omitted or briefly stated, and the differences between them will be described primarily.

[0143] exist Figure 6 and Figure 7 For ease of explanation, only the substrate 201, inorganic insulating structure MB, link contact electrode LCT, signal line CNL, first planarization layer 251, second planarization layer 252, and organic insulating structure 266 among the components of the display panel 200 are shown. In this respect, each of the second planarization layer 252 and the organic insulating structure 266 is made of organic insulating material and is shown as a single layer. However, the embodiments of this disclosure are not limited thereto. For example, each of the second planarization layer 252 and the organic insulating structure 266 may consist of multiple layers.

[0144] like Figure 6 and Figure 7 As shown, the substrate 201 of the display panel may include a front area FA for displaying images, a back area BA disposed facing the rear surface of the front area FA, and a flexible area BDA disposed between the front area FA and the back area BA. The flexible area BDA can extend from one side of the front area FA of the display panel and bend downwards. When the flexible area BDA of the substrate 201 is bent, the printed circuit board 104 can be disposed on the back area BA and facing away from the front area FA.

[0145] The inorganic insulating structure MB can be disposed on a portion of the non-display area NAA between the display area AA and the flexible area BDA on the substrate 201. The link contact electrode LCT can be disposed on the inorganic insulating structure MB.

[0146] The first planarization layer 251 covering the link contact electrode LCT can be disposed on the inorganic insulating structure MB. The first planarization layer 251 can extend from the front region FA and on and along the front region FA, then extend across the flexible region BDA and on and along the flexible region BDA to the back region BA and along the back region BA.

[0147] The first planarization layer 251 can have different thicknesses at different locations A, B, C, D, E, F, G, and H corresponding to the flexible region BDA. For example, the first planarization layer 251 can have different thicknesses at different locations corresponding to the first location A, the second location B, the third location C, the fourth location D, the fifth location E, the seventh location F, the eighth location G, and the ninth location H. For example, the first location A can be the starting location of the flexible region BDA, and the ninth location H can be the ending location of the flexible region BDA. The second locations B to the eighth locations G can be locations within the flexible region BDA.

[0148] After the bending operation of the bendable area BDA has been performed, a small curvature bending process (tight bending process) can be further performed on the substrate 201 to further reduce the border area. The small curvature bending process (tight bending process) can be performed in the horizontal direction F (see...). Figure 4 The process involves pulling the end of the second plate 510 inwards by a predetermined distance d compared to the end of the first plate 500. Therefore, the substrate 201 can be bent so that the portion of the front area FA visible to a viewer in front of it has a smaller radius of curvature and is thus reduced. Therefore, an asymmetric curvature can be formed, and greater stress can be concentrated on the portion with the smaller radius of curvature. Thus, stress can be concentrated on the portion of the substrate 201 in the front area FA that is bent to have a smaller radius of curvature. For example, stress can be concentrated at a position corresponding to a position defined at a 45-degree angle relative to the end of the first plate 500. For example, the position defined at a 45-degree angle relative to the end of the first plate 500 could be the position of the bendable region BDA corresponding to the position between the first position A and the seventh position F closest to the front area FA.

[0149] Therefore, when the substrate 201 is bent to have an asymmetrical curvature, the first planarization layer 251 can be patterned such that the thickness of the first planarization layer 251 varies as it extends from the front region FA across the bendable region BDA to the back region BA. Utilizing this varying thickness, the first planarization layer 251 can have an outer surface with a uniform radius of curvature as it extends from the front region FA across the bendable region BDA to the back region BA. Therefore, the radius of curvature of the signal line CNL disposed on the first planarization layer 251 can be uniform along the entire bendable region BDA. For example, the thickness of the first planarization layer 251 in the region between the first position A and the seventh position F (where the substrate 201 is bent to have a smaller radius of curvature) can be relatively smaller than the thickness at other positions F, G, and H. Furthermore, the signal line CNL can extend conformally along the contour of the first planarization layer 251 on and along the first planarization layer 251. Then, as... Figure 7 As shown, the first radius of curvature R1, the second radius of curvature R2, and the third radius of curvature R3 can be equal to each other. Therefore, the first curvature between the first radius of curvature R1 and the second radius of curvature R2, and the second curvature between the second radius of curvature R2 and the third radius of curvature R3, can be equal to each other.

[0150] However, this disclosure is not limited to example configurations where the first radius of curvature R1, the second radius of curvature R2, and the third radius of curvature R3 are the same. For example, even though the first radius of curvature R1, the second radius of curvature R2, and the third radius of curvature R3 are not the same, the first planarization layer 251 can be patterned such that the thickness of the first planarization layer 251 is conformally changed to the asymmetric curvature shape of the substrate 201. For example, the first planarization layer 251 can be patterned such that when the substrate 201 has a smaller curvature, the thickness of the first planarization layer 251 can be smaller, thereby compensating for the curvature of the portion of the substrate 201 with a smaller curvature.

[0151] Furthermore, the substrate 201 may have a neutral plane NS defined therein. The neutral plane NS is a plane in which compressive stress and tensile stress cancel each other out during bending operations, resulting in a net stress of zero. As the location moves closer to the neutral plane NS, the stress applied thereto can be reduced.

[0152] Since the first planarization layer 251 is configured to have different thicknesses at different locations corresponding to different positions of the flexible region BDA, the distances between the neutral plane NS of the substrate 201 with asymmetric curvature and the outer surface of the first planarization layer 251 at different locations corresponding to different positions of the flexible region BDA can be different from each other.

[0153] The signal line CNL can extend conformally along the contour of the outer surface of the first planarization layer 251 with different thicknesses at different locations corresponding to different positions of the flexible region BDA. Therefore, the distance between the neutral plane NS of the substrate 201 with asymmetric curvature and the signal line CNL at different locations corresponding to different positions of the flexible region BDA can be different from each other.

[0154] For example, the location of the flexible region BDA between the first position A and the seventh position F, which is closest to the front region FA, can be a region where stress concentrates. Therefore, the thickness of the first planarization layer 251 at the location corresponding to this position in the flexible region BDA can be less than the thickness at the locations corresponding to other positions in the flexible region BDA besides the locations from the first position A to the seventh position F. Therefore, the portion of the signal line CNL disposed on the portion of the first planarization layer 251 corresponding to the region from the first position A to the seventh position F can be closer to the neutral plane NS.

[0155] Therefore, the portion of the signal line CNL located on the first planarization layer 251 corresponding to the region from the first position A to the seventh position F can be closer to the neutral plane NS, thereby preventing or suppressing potential damage such as cracks from occurring therein.

[0156] This prevents or suppresses stress concentration at specific points in the substrate 201 with asymmetrical curvature, thereby preventing or suppressing potential defects such as cracks in the signal line CNL. Therefore, the signal provided to the display area AA can be transmitted more stably via the signal line CNL, thereby reducing the defect rate of the display device. This, in turn, reduces the defect rate of the display device due to damage to the signal line, and thus reduces the production energy required for additional production of the display device, thereby reducing greenhouse gas emissions.

[0157] Figure 8 This is a diagram illustrating a bendable region according to another exemplary embodiment of the present disclosure. Figure 8 The display device is shown in its unbent state. Figure 8 In, with Figure 4 and Figure 5 In the example embodiments, the same components may be referred to by the same reference numerals. Therefore, redundant descriptions may be omitted or briefly stated, and the differences between them will be described primarily.

[0158] like Figure 8As shown, the inorganic insulating structure MB can be disposed on a portion of the non-display area NAA between the display area AA and the flexible area BDA of the substrate 201. Link contact electrodes LCT can be disposed on the inorganic insulating structure MB. The link contact electrodes LCT can be electrically connected via stacked connection electrodes extending through the multiple insulating layers constituting the inorganic insulating structure MB to lines that provide signals or voltages to multiple pixels P in the display area AA.

[0159] The first planarization layer 251 covering the link contact electrode LCT can be disposed on the inorganic insulating structure MB. The first planarization layer 251 can extend from and along the front region FA, then across and along the flexible region BDA, and extend to and along the back region BA. For example, the first planarization layer 251 can be disposed in the flexible region BDA to directly contact the substrate 201.

[0160] The first planarization layer 251 can be configured to have different thicknesses (or heights) at different locations corresponding to different positions in the bendable region BDA. It can be patterned by irradiating different locations of the first planarization layer 251 with light of different exposure levels in a halftone masking process. The halftone mask can include, for example, a stepped sheet mask or a multitone mask. For example, the first region Z1, the second region Z2, the third region Z3, and the fourth region Z4 of the first planarization layer 251 can have different thicknesses. The first region Z1 of the first planarization layer 251 can be a location corresponding to and perpendicularly overlapping the front region FA. The second region Z2 can be a region designed to have a relatively minimum radius of curvature in the bendable region BDA in a small curvature bending process (tight bending process) following the main bending operation. For example, the second region Z2 can be a region where stress is concentrated and can be positioned at a location defining a first angle θ relative to the end (or side surface) of the first plate 500. The third region Z3 can be closer to the back region BA than the second region Z2. The fourth region Z4 can be adjacent to the back region BA.

[0161] Among the first to fourth regions Z1, Z2, Z3, and Z4, the thickness of the first planarization layer 251 may be minimal in the second region Z2, which is a region where stress concentrates. For example, the thickness of the first planarization layer 251 may gradually increase as it extends from the second region Z2 toward the first region Z1 and / or from the second region Z2 toward the third region Z3. For example, the thickness of the first planarization layer 251 may be maximum in the fourth region Z4.

[0162] The signal line CNL can be disposed on the upper surface of the first planarization layer 251. The signal line CNL can be electrically connected to the link contact electrode LCT via a connection electrode extending through a portion of the first planarization layer 251 on the front region FA. The signal line CNL can extend from and along the front region FA, then across and along the flexible region BDA, and extend to and along the back region BA.

[0163] The signal line CNL can extend conformally along the contour of the upper surface of the first planarization layer 251, which has different thicknesses at different locations corresponding to different positions in the bendable region BDA. Therefore, the distances between the signal line CNL at different locations corresponding to different positions in the bendable region BDA and the neutral plane NS can be different from each other. The portion of the signal line CNL disposed in the region where stress is concentrated can be positioned closer to the neutral plane NS. For example, the thickness of the first planarization layer 251 can be minimum in the second region Z2, which is the region where stress is concentrated. Furthermore, the portion of the signal line CNL disposed in the second region Z2 of the first planarization layer 251 can be at the minimum distance from the neutral plane NS. In other words, the portion of the signal line CNL disposed in the second region Z2 of the first planarization layer 251 can be closer to the neutral plane NS than other portions of the signal line CNL disposed in other regions Z1, Z3, and Z4 of the first planarization layer 251, respectively.

[0164] The neutral plane NS is a plane in which compressive and tensile stresses cancel each other out during bending operations, resulting in no stress or a net stress of zero. When a portion of the signal line CNL is positioned closer to the neutral plane NS, the mechanical stress applied to it is reduced, thereby suppressing potential damage to the signal line CNL, such as cracks in the signal line.

[0165] Therefore, the signal line CNL disposed on the first planarization layer 251 in the bendable region BDA can be positioned at the neutral plane NS closest to the second region Z2 of the first planarization layer 251. Thus, even when a small curvature bending process (tight bending process) is further performed after the main bending operation, potential damage such as cracks in this portion of the signal line CNL can be prevented or suppressed.

[0166] Furthermore, the first planarization layer 251 can be patterned such that the curvature of its outer surface in the bent state (i.e., the upper surface on which the signal line CNL is disposed before the bending process) can vary along the bendable region BDA in a manner conformally to the curvature of the substrate 201, which varies along the bendable region BDA. For example, the substrate 201 may have an asymmetric curvature in the bendable region BDA. In this respect, the signal line CNL may have the same radius of curvature throughout the entire region of the bendable region BDA. Therefore, areas where stress concentration occurs on the signal line CNL due to the asymmetric curvature of the substrate 201 can be prevented or suppressed, thereby preventing or suppressing potential damage such as cracks in the signal line CNL.

[0167] The second planarization layer 252 and the organic insulating structure 266 can be stacked vertically on the signal line CNL.

[0168] The first adhesive member 305 and the polarizing layer 300 can be vertically stacked on the substrate 201 in the front area FA of the display panel. The protective layer 560 can be disposed on the outer surface of the display panel 200 in the flexible area BDA in a bent state. Figure 8 In the flat state shown, the protective layer 560 can be disposed on a portion of the organic insulating structure 266 on the flexible region BDA of the substrate 201. The protective layer 560 can extend from and along a portion of the front region FA, and extend to and along a portion of the back region BA. In the front region FA, the protective layer 560 can cover the side surface of the polarizing layer 300. In this example, the protective layer 560 can be thicker than the polarizing layer 300.

[0169] Figure 9 This is a view showing a bendable region according to another exemplary embodiment of this disclosure. Figure 9 The display device is shown in its unbent state (i.e., in a flat state). Figure 10 and Figure 11 This is a graph showing the stress during the bending operation. Figure 9 In, with Figure 8 The components of the example embodiments may use the same reference numerals. Therefore, redundant descriptions may be omitted or briefly described, and the differences between them will be mainly described.

[0170] like Figure 9 As shown, the inorganic insulating structure MB and the link contact electrode LCT can be disposed on the substrate 201. The first planarization layer 251 covering the link contact electrode LCT can be disposed on the inorganic insulating structure MB.

[0171] The first planarization layer 251 can be configured with a stepped structure having steps due to its varying thickness at different locations along the bendable region BDA. For example, the first planarization layer 251 may include a first region Z1, a second region Z2, a third region Z3, and a fourth region Z4. The first region Z1 of the first planarization layer 251 may be a location corresponding to and perpendicularly overlapping the front region FA. The second region Z2 may be a region in the bendable region BDA with the minimum radius of curvature in a small curvature bending process (tight bending process) after the main bending operation of the substrate 201. For example, the second region Z2 may be a region where stress is concentrated and may be positioned at a location defining a first angle θ relative to the end of the first plate 500 (see [reference]). Figure 4 The third region Z3 can be closer to the back region BA than the second region Z2. The fourth region Z4 can be adjacent to the back region BA.

[0172] In the first to fourth regions Z1, Z2, Z3, and Z4, the thickness of the first planarization layer 251 can be minimal in the second region Z2, which is a region where stress can concentrate. A first stepped structure with multiple steps due to different thicknesses can be formed in the region from the second region Z2 toward the first region Z1. A second stepped structure with multiple steps due to different thicknesses can be formed in the region from the second region Z2 toward the third region Z3. In the first and second stepped structures, the steps with the minimum thickness in the first and second stepped structures can be connected to each other integrally. The thickness of the first planarization layer 251 can be maximum in each of the first region Z1 and the fourth region Z4.

[0173] The first stepped structure, including the first planarization layer 251, may include a first surface 251a extending in a first direction parallel to the upper surface of the substrate 201 (e.g., in a flat state), a second surface 251b extending in the first direction parallel to the upper surface of the substrate 201 and disposed at a position higher or lower than the first surface 251a, and a side surface 251c extending in a direction perpendicular to the upper surface of the substrate 201 and connecting the first surface 251a and the second surface 251b to each other. For example, the step of the first stepped structure may consist of the first surface 251a, the second surface 251b, and the side surface 251c connecting the first surface 251a and the second surface 251b, wherein the first surface 251a and the second surface 251b are arranged in the first direction and connected to each other. For example, the first direction may be from the second region Z2 toward the first region Z1.

[0174] The second stepped structure, including the first planarization layer 251 with a stepped structure, may include a first surface 251a extending in a second direction parallel to the upper surface of the substrate 201 (e.g., in a flat state), a second surface 251b extending in the second direction parallel to the upper surface of the substrate 201 and disposed at a position higher or lower than the first surface 251a, and a side surface 251c extending in a direction perpendicular to the upper surface of the substrate 201 and connecting the first surface 251a and the second surface 251b to each other. For example, the step of the second stepped structure may consist of the first surface 251a, the second surface 251b, and the side surface 251c connecting the first surface 251a and the second surface 251b, wherein the first surface 251a and the second surface 251b are arranged in the second direction and connected to each other. For example, the second direction may be from the second region Z2 toward the third region Z3.

[0175] The stepped structure of the first planarization layer 251 can be formed by shining light of different exposure levels onto different positions in a halftone mask process.

[0176] The signal line CNL can be disposed on the first planarization layer 251. The signal line CNL can extend conformally along the contour of the stepped upper surface of the first planarization layer 251, which includes a stepped structure. For example, the signal line CNL can be disposed on the first surface 251a, the second surface 251b, and the side surface 251c of the first planarization layer 251. Therefore, the signal line CNL can be configured to have a stepped structure conformally to the stepped structure of the first planarization layer 251.

[0177] The distances from different locations of the signal line CNL with its stepped structure to the neutral plane NS in the flexible region BDA can vary in a stepped manner. For example, the thickness of the first planarization layer 251 can be minimal in the second region Z2, which is a region where stress can concentrate. Therefore, the signal line CNL can be at its minimum distance from the neutral plane NS at the portion of the signal line CNL disposed on the second region Z2 of the first planarization layer 251. In other words, the portion of the signal line CNL disposed on the second region Z2 of the first planarization layer 251 can be closer to the neutral plane NS than other portions of the signal line CNL disposed on other regions Z1, Z3, and Z4 of the first planarization layer 251, respectively.

[0178] like Figure 10As shown, when the bendable region BDA of the substrate 201 is bent during a bending operation, the distance between the portion of the signal line CNL disposed on the second region Z2 of the first planarization layer 251 and the neutral plane NS decreases, thereby reducing the tensile stress applied to the portion of the signal line CNL. Therefore, potential damage such as cracks can be prevented or suppressed in the portion of the signal line CNL disposed on the second region Z2 of the first planarization layer 251.

[0179] Furthermore, the shape of the signal line CNL, constructed with a stepped structure, enhances its durability against tensile stress. For example, since stress can be distributed across the stepped portions extending between the first surface 251a and the side surface 251c and between the side surface 251c and the second surface 251b of the stepped structure, its durability against tensile stress applied during bending operations is enhanced.

[0180] For example, such as Figure 11 As shown, in example case (a) of a signal line CNL constructed with a flat structure, the direction of stress dispersion is limited to the horizontal direction of the signal line CNL, as indicated by the arrow. Therefore, stress can concentrate in the vertical direction, potentially leading to crack CK in the signal line CNL. However, in example case (b) of a signal line CNL constructed with a stepped structure, stress can be dispersed not only horizontally but also within the stepped structure, thus preventing or suppressing stress concentration. This prevents or suppresses potential cracks due to stress concentration.

[0181] Figure 12 This is a diagram illustrating a bendable region according to another exemplary embodiment of the present disclosure. Figure 12 The display device is shown in its unbent state (i.e., in a flat state). Figure 12 In, with Figure 9 The components of the example embodiments may use the same reference numerals. Therefore, redundant descriptions may be omitted or briefly described, and the differences between them will be mainly described.

[0182] like Figure 12 As shown, the inorganic insulating structure MB and the link contact electrode LCT can be disposed on the substrate 201. A first planarization layer 251 covering the link contact electrode LCT can be disposed on the inorganic insulating structure MB. The first planarization layer 251 can be disposed on the front surface region FA of the display panel. For example, the first planarization layer 251 may not be disposed on the flexible region BDA of the substrate 201.

[0183] The substrate 201 can be configured to have different thicknesses at different locations corresponding to different positions within the flexible region BDA. For example, the thickness of the substrate 201 within the flexible region BDA can refer to the thickness in a vertical direction from the bottom, back, or rear surface of the substrate 201 to the top or front surface (e.g., in a flat state). The substrate 201 may include an organic insulating material, including polyimide (PI). Therefore, a halftone mask can be disposed on the substrate 201, and light can be incident on the substrate, such that different exposure levels of light are incident on different locations of the substrate 201 within the flexible region BDA. The halftone mask may include, for example, a stepped sheet mask or a multitone mask.

[0184] The bendable region BDA of substrate 201 can be constructed in a stepped structure, wherein the steps, caused by different thicknesses, gradually change and are continuously arranged as the substrate extends along the bendable region BDA. For example, the bendable region BDA of substrate 201 may include a first region Z1, a second region Z2, a third region Z3, and a fourth region Z4. The first region Z1 may be adjacent to the front region FA. The second region Z2 may be the region with the minimum radius of curvature in the bendable region BDA during a small curvature bending process (tight bending process) after the main bending operation. For example, the second region Z2 may be the region where stress is concentrated and may be positioned at a location defining a first angle θ relative to the end of the first plate 500 (see [reference]). Figure 4 The third region Z3 can be located on either side of the second region Z2, and can be closer to the front region FA and the back region BA than the second region Z2. The fourth region Z4 can be adjacent to the back region BA.

[0185] Among the first to fourth regions Z1, Z2, Z3, and Z4, the thickness of substrate 201 can be minimal in the second region Z2, which is a region where stress can concentrate. For example, the thickness of substrate 201 can gradually increase as substrate 210 extends from the second region Z2 across the third region Z3 toward the first region Z1 or from the second region Z2 across the third region Z3 toward the fourth region Z4. For example, the thickness of substrate 201 can be maximum in the first region Z1 or the fourth region Z4.

[0186] The signal line CNL can be disposed on the first planarization layer 251 on the front region FA. The signal line CNL can be electrically connected to the link contact electrode LCT via a connection electrode extending through the portion of the first planarization layer 251 on the front region FA. The signal line CNL can extend from and along the front region FA, then across and along the flexible region BDA, and extend to and along the back region BA. The signal line CNL can be directly disposed on the substrate 201 in the flexible region BDA. The signal line CNL can be in direct contact with the substrate 201 in the flexible region BDA. Therefore, the signal line CNL can be configured as a stepped structure conforming to the stepped structure of the upper surface of the substrate 201 in the flexible region BDA.

[0187] In a stepped structure, the distances between different locations of the signal line CNL and the neutral plane in the bendable region BDA of the substrate 201 can vary. For example, the thickness of the substrate 201 can be minimal in the second region Z2, where stress can concentrate. Therefore, the signal line CNL can be closest to the neutral plane at the portion of the signal line CNL located in the second region Z2 of the substrate 201, thereby preventing or suppressing stress concentration during bending operations and thus preventing or suppressing potential cracks in the signal line CNL. This prevents or avoids damage to the signal line CNL.

[0188] The display panel and the display device including the display panel can be described as follows according to various aspects and embodiments of the present disclosure.

[0189] In one or more aspects of this disclosure, a display panel has a front area including a display area and a non-display area outside the display area, a back area below the front area, and a flexible area connecting the front area and the back area. The display panel is flexible in the flexible area and includes: an organic insulating film disposed in the front area, the back area, and the flexible area and having curvature in the flexible area; and signal lines located on the organic insulating film in the flexible area, wherein the organic insulating film includes multiple areas with different thicknesses in the flexible area.

[0190] According to some embodiments, the display panel may further include: a substrate in a front region, a back region, and a flexible region; and a first planarization layer located above the substrate at least in the display region, wherein the organic insulating film may be one of the substrate and the first planarization layer.

[0191] According to some embodiments, the display panel may also include a second planarization layer located on an organic insulating film and covering the signal lines.

[0192] According to some embodiments, the substrate may have an asymmetrical curvature in the bendable region, a first portion of the substrate in the bendable region adjacent to the front region may have a first radius of curvature, a second portion of the substrate in the bendable region may have a second radius of curvature, the second portion being disposed between the first portion of the substrate and the back region, a third portion of the substrate in the bendable region may have a third radius of curvature, the third portion being disposed between the second portion of the substrate and the back region, and the first radius of curvature may be smaller than each of the second radius of curvature and the third radius of curvature.

[0193] According to some embodiments, the organic insulating film may be a first planarization layer, which may include a first region corresponding to a first portion of the substrate, a second region corresponding to a second portion of the substrate, and a third region corresponding to a third portion of the substrate. The first region of the first planarization layer may have a first thickness, the second region of the first planarization layer may have a second thickness, and the third region of the first planarization layer may have a third thickness. The second thickness may be less than at least one of the first thickness and the third thickness. Signal lines may be disposed on the outer surface of the first planarization layer in a flexible region.

[0194] According to some embodiments, the substrate may have a neutral plane defined therein, and the distance between the portion of the signal line disposed on the first region of the first planarization layer and the neutral plane of the substrate may be greater than the distance between the portion of the signal line disposed on the second region of the first planarization layer and the neutral plane of the substrate.

[0195] According to some implementations, the outer surface of the first planarization layer may have the same radius of curvature in the first region, the second region, and the third region, and the signal line may have a uniform radius of curvature above the first region, the second region, and the third region of the first planarization layer.

[0196] According to some embodiments, the organic insulating film may be a first planarization layer, and the multiple regions of the organic insulating film may include a first region, a second region, and a third region of the first planarization layer sequentially disposed between a front region and a back region, with the second region located between the first and third regions. The substrate may have an asymmetrical curvature in the flexible region, and the outer surface of the first planarization layer may have a stepped structure comprising multiple steps arranged along the flexible region at different distances from the substrate.

[0197] According to some embodiments, the stepped structure of the first planarization layer may include: a first stepped structure comprising a plurality of steps arranged from a second region toward a first region adjacent to the front region, having an increased height; and a second stepped structure comprising a plurality of steps comprising other steps arranged from the second region toward a third region, having an increased height. The step in the second region may have the minimum height.

[0198] According to some embodiments, one of the plurality of steps may include: a first surface extending in a first direction toward a frontal region; a second surface extending in a second direction toward a rearal region and disposed at a different vertical level from the first surface; and a side surface connecting the first surface and the second surface.

[0199] According to some implementations, signal lines may be disposed along a first surface, a second surface, and a side surface.

[0200] According to some embodiments, the organic insulating film may be a substrate, and the multiple regions of the organic insulating film may include a first portion, a second portion, and a third portion of the substrate arranged sequentially between the front region and the back region.

[0201] According to some embodiments, the display panel may further include a second planarization layer located on the signal lines in the flexible region. The first planarization layer may also be disposed above the substrate in a non-display area of ​​the front surface region and does not extend into the flexible region. The signal lines may be located directly on the substrate in the flexible region.

[0202] According to some embodiments, the substrate may have an asymmetric curvature in the bendable region. A first portion of the substrate in the bendable region may be adjacent to the front region and have a first radius of curvature. A second portion of the substrate in the bendable region may have a second radius of curvature and is disposed between the first portion of the substrate and the back region. A third portion of the substrate in the bendable region may have a third radius of curvature and is disposed between the second portion of the substrate and the back region. The first radius of curvature may be smaller than each of the second and third radii of curvature. The first portion of the substrate may have a first thickness, the second portion of the substrate may have a second thickness, and the third portion of the substrate may have a third thickness. The second thickness may be smaller than at least one of the first and third thicknesses.

[0203] According to some embodiments, the substrate may have a neutral plane defined therein, and the distance between the portion of the signal line disposed on a first portion of the substrate and the neutral plane of the substrate may be greater than the distance between the portion of the signal line disposed on a second portion of the substrate and the neutral plane of the substrate.

[0204] According to some implementations, the signal line can extend from the front area across the flexible area to the back area.

[0205] According to some embodiments, the display panel may further include: a substrate in a front region, a back region, and a flexible region; a first planarization layer located on the substrate, at least in the display region; a pixel driving circuit including at least one transistor on the substrate and located below the first planarization layer in the display region; a light-emitting element located on the pixel driving circuit; a pixel contact electrode electrically connected to the pixel driving circuit and the light-emitting element; and a touch sensor located on the light-emitting element. The at least one transistor may include a semiconductor layer, a gate electrode overlapping the semiconductor layer, a gate insulating layer between the semiconductor layer and the gate electrode, and source and drain electrodes electrically connected to opposite sides of the semiconductor layer, respectively.

[0206] According to some embodiments, the display panel may also include link contact electrodes located below the signal lines in the front area and electrically connected to the signal lines, wherein the link contact electrodes may include the same material as the material included in at least one of the source electrode and the drain electrode.

[0207] According to some implementations, the signal line may include the same material as that included in the pixel contact electrode.

[0208] In one or more other aspects of this disclosure, a display device includes: a display panel according to any of the above-described exemplary embodiments of this disclosure; a printed circuit board located on a rear region of the display panel; a polarizing layer located on a front region of the display panel; a cover member located on the polarizing layer; and a protective layer located on an outer surface of the display panel in a flexible region and extending to the front and rear regions of the display panel.

[0209] Although some exemplary embodiments of this disclosure have been described above with reference to the accompanying drawings, this disclosure is not limited to those exemplary embodiments and can be implemented in various different forms. Those skilled in the art to which this disclosure pertains will understand that this disclosure can be implemented in other specific forms without altering or departing from the technical concept or features of this disclosure. Therefore, it should be understood that the exemplary embodiments described above are not limiting but illustrative in all respects.

Claims

1. A display panel having a front region, a back region below the front region, and a flexible region connecting the front region and the back region, the front region including a display region and a non-display region outside the display region, the display panel being flexible in the flexible region, and the display panel comprising: An organic insulating film is disposed in the front region, the back region, and the flexible region, and has curvature in the flexible region; as well as The signal line is located on the organic insulating film in the flexible region. The organic insulating film comprises multiple regions with different thicknesses in the flexible region.

2. The display panel according to claim 1, further comprising: A substrate located in the front region, the back region, and the flexible region; as well as A first planarization layer is located above the substrate, at least in the display area. The organic insulating film is one of the substrate and the first planarization layer.

3. The display panel according to claim 2, further comprising: A second planarization layer is located on the organic insulating film and covers the signal line.

4. The display panel according to claim 2, wherein, The substrate has an asymmetric curvature in the flexible region; The first portion of the substrate in the flexible region adjacent to the front surface region has a first radius of curvature; The second portion of the substrate in the flexible region has a second radius of curvature, and the second portion is disposed between the first portion of the substrate and the back surface region. The substrate has a third radius of curvature in a third portion of the flexible region, the third portion being disposed between the second portion of the substrate and the back surface region; and The first radius of curvature is smaller than each of the second radius of curvature and the third radius of curvature.

5. The display panel according to claim 4, wherein, The organic insulating film is the first planarization layer; The first planarization layer includes a first region corresponding to the first portion of the substrate, a second region corresponding to the second portion of the substrate, and a third region corresponding to the third portion of the substrate. The first region of the first planarization layer has a first thickness, the second region of the first planarization layer has a second thickness, and the third region of the first planarization layer has a third thickness; The second thickness is less than at least one of the first thickness and the third thickness; and The signal line is disposed on the outer surface of the first planarization layer in the flexible region.

6. The display panel according to claim 5, wherein, The substrate includes a neutral plane; and The distance between the portion of the signal line disposed on the first region of the first planarization layer and the neutral plane of the substrate is greater than the distance between the portion of the signal line disposed on the second region of the first planarization layer and the neutral plane of the substrate.

7. The display panel according to claim 5, wherein, The outer surface of the first planarization layer has the same radius of curvature in the first region, the second region, and the third region of the first planarization layer; and The signal line has a uniform radius of curvature above the first region, the second region, and the third region of the first planarization layer.

8. The display panel according to claim 2, wherein, The organic insulating film is the first planarization layer; The plurality of regions of the organic insulating film include a first region, a second region, and a third region of the first planarization layer sequentially disposed between the front region and the back region, wherein the second region is located between the first region and the third region; The substrate has an asymmetric curvature in the flexible region; and The outer surface of the first planarization layer has a stepped structure, which includes multiple steps arranged at different distances from the substrate along the flexible region.

9. The display panel according to claim 8, wherein, The stepped structure of the first planarization layer includes: A first stepped structure, comprising a connected step of increasing height arranged from the second region toward the first region adjacent to the front region among the plurality of steps; and The second stepped structure includes additional steps of increased height arranged from the second region toward the third region among the plurality of steps. Among the plurality of steps, the step in the second region has the minimum height.

10. The display panel according to claim 8, wherein, One of the multiple steps includes: A first surface, the first surface extending in a first direction toward the frontal region; A second surface, the second surface extending in a second direction toward the rear surface region and disposed at a different vertical level from the first surface; and A side surface that connects the first surface and the second surface.

11. The display panel according to claim 10, wherein, The signal lines are disposed along the first surface, the second surface, and the side surface.

12. The display panel according to claim 2, wherein, The organic insulating film is the substrate; and The plurality of regions of the organic insulating film include a first portion, a second portion, and a third portion of the substrate arranged sequentially between the front region and the back region.

13. The display panel according to claim 12, further comprising: A second planarization layer is located on the signal line in the flexible region. The first planarization layer is also disposed above the substrate in the non-display area of ​​the front surface region, and does not extend into the flexible area. The signal line is located directly on the substrate in the flexible region.

14. The display panel according to claim 12, wherein, The substrate has an asymmetric curvature in the flexible region; The first portion of the substrate in the flexible region is adjacent to the front surface region and has a first radius of curvature. The second portion of the substrate in the flexible region has a second radius of curvature, and the second portion is disposed between the first portion of the substrate and the back surface region. The third portion of the substrate in the flexible region has a third radius of curvature, and the third portion is disposed between the second portion of the substrate and the back surface region. The first radius of curvature is smaller than each of the second radius of curvature and the third radius of curvature; The first portion of the substrate has a first thickness, the second portion of the substrate has a second thickness, and the third portion of the substrate has a third thickness; and The second thickness is less than at least one of the first thickness and the third thickness.

15. The display panel according to claim 14, wherein, The substrate includes a neutral plane; and The distance between the portion of the signal line disposed on the first part of the substrate and the neutral plane of the substrate is greater than the distance between the portion of the signal line disposed on the second part of the substrate and the neutral plane of the substrate.

16. The display panel according to claim 1, wherein, The signal line extends from the front area across the flexible area to the back area.

17. The display panel according to claim 1, further comprising: A substrate located in the front region, the back region, and the flexible region; A first planarization layer is located on the substrate at least in the display area; A pixel driving circuit, the pixel driving circuit including at least one transistor on the substrate and located below the first planarization layer in the display area; A light-emitting element, wherein the light-emitting element is located on the pixel driving circuit; A pixel contact electrode, wherein the pixel contact electrode is electrically connected to the pixel driving circuit and the light-emitting element; as well as A touch sensor, located on the light-emitting element, The at least one transistor includes a semiconductor layer, a gate electrode overlapping the semiconductor layer, a gate insulating layer between the semiconductor layer and the gate electrode, and a source electrode and a drain electrode electrically connected to opposite sides of the semiconductor layer, respectively.

18. The display panel according to claim 17, further comprising: Link contact electrode, wherein the link contact electrode is located below the signal line in the front area and is electrically connected to the signal line. The link contact electrode comprises the same material as that included in at least one of the source electrode and the drain electrode.

19. The display panel according to claim 17, wherein, The signal line comprises the same material as that included in the pixel contact electrode.

20. A display device, the display device comprising: The display panel according to claim 1; A printed circuit board located on the back surface area of ​​the display panel; A polarizing layer, the polarizing layer being located on the front area of ​​the display panel; A cover member, the cover member being located on the polarizing layer; as well as A protective layer is located on the outer surface of the display panel in the flexible region and extends to the front and back regions of the display panel.

Images