Display device

Abstract

Disclosed is a display device including: a substrate including an active area including a sensor unit and a non-active area surrounding the active area; a sensor disposed below the substrate corresponding to the sensor unit; a light emitting device disposed in the active area, the light emitting device including a plurality of first electrodes, an intermediate layer including a light emitting layer, and a second electrode; a transistor disposed between the substrate and the light emitting device; and a light-transmitting hydrogen collection pattern disposed on the substrate to overlap with the sensor.

Description

Technical Field

[0001] This disclosure relates to an apparatus, and in particular, but not limited to, a display apparatus, and more specifically, a display apparatus with improved reliability. Background Technology

[0002] Display devices used to display images on televisions, monitors, smartphones, tablets, and laptops are used in a variety of ways and forms.

[0003] The display device includes a plurality of pixels configured to display an image and a transistor configured to control the operation of each pixel.

[0004] In display devices, display devices with light-emitting devices in the display panel without a separate light source are considered competitive applications for the sake of compactness and clear color display.

[0005] The descriptions provided in the background section should not be construed as prior art simply because they are mentioned in or associated with that section. The background section may include information describing one or more aspects of the subject matter art, and the descriptions in that section do not limit this disclosure. Summary of the Invention

[0006] Display devices include sensors for various purposes. As the integration of display devices increases, sensors may be positioned to overlap with or be adjacent to the effective area. The inventors of this disclosure have recognized that, in such cases, the degradation of the characteristics of components surrounding the sensor becomes a problem.

[0007] Embodiments of this disclosure provide a display device configured to maintain the light-receiving capability of a sensor unit disposed in an effective area and stabilize the characteristics of transistors surrounding the sensor unit.

[0008] Embodiments of this disclosure provide a display device configured to improve the reliability of transistors including oxide semiconductors.

[0009] Embodiments of this disclosure provide a display device configured to improve the reliability of transistors surrounding a light-receiving sensor unit.

[0010] Embodiments of this disclosure provide a display device configured to receive light by collecting residual hydrogen in a sensor unit region that does not overlap with the shielding metal, thereby improving the reliability of the device.

[0011] A display device according to an embodiment of the present disclosure includes: a substrate having an effective region having a sensor unit and an ineffective region surrounding the effective region; a sensor disposed below the substrate in a manner corresponding to the sensor unit; a light-emitting device disposed in the effective region, the light-emitting device including a plurality of first electrodes, an intermediate layer including a light-emitting layer, and a second electrode; a transistor disposed between the substrate and the light-emitting device; and a light-transmitting hydrogen collection pattern disposed on the substrate overlapping the sensor.

[0012] It should be understood that the foregoing general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0013] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the disclosure and, together with the description, serve to illustrate the principles of the disclosure. In the drawings:

[0014] Figure 1 This is a schematic plan view showing a display device according to an embodiment of the present disclosure;

[0015] Figure 2 This is a circuit diagram illustrating a sub-pixel according to an embodiment of the present disclosure;

[0016] Figure 3 It is shown Figure 1 A plan view of region B;

[0017] Figure 4 It is along Figure 3 A cross-sectional view taken from line I-I';

[0018] Figure 5 and Figure 6 This is a cross-sectional view showing a display device according to another embodiment of the present disclosure; and

[0019] Figure 7A and Figure 7B The diagram shows the IV diagrams of the surrounding transistors when no hydrogen collection pattern is applied and when a hydrogen collection pattern is applied. Detailed Implementation

[0020] The advantages and features of this disclosure, as well as its implementation methods, will be illustrated by the following embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. Furthermore, this disclosure is limited only by the category of the claims.

[0021] The same reference numerals denote the same constituent elements. To effectively describe the technical content, the thickness, proportions, and dimensions of the constituent elements may be exaggerated in the drawings. Furthermore, for ease of description, the dimensions and proportions of the constituent elements shown in the drawings differ from the actual dimensions and proportions; therefore, the dimensional proportions of the constituent elements are not limited to those shown in the drawings.

[0022] It should be understood that when a component (or area, layer, part, etc.) is referred to as "set on another component", "connected to", or "attached to" another component, a component may be directly connected to / attached to another component, or a third component may be set between the two components.

[0023] The term "and / or" is used to include one or more combinations of related configurations.

[0024] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element referred to in the following description may mean a second element. Similarly, a second element may mean a first element. Unless explicitly used otherwise, singular expressions include plural meanings.

[0025] Terms such as “below,” “lower,” “above,” and “upper” are used to describe the relationships between the components shown in the accompanying drawings. These terms are relative concepts and are described based on the directions indicated in the drawings. For example, one or more other components may be positioned between two components unless “directly” or “exactly” is used. As shown in the drawings, spatially relative terms such as “below,” “below,” “lower,” “above,” and “upper” can be used to readily describe the relationship between one device or component and other devices or components. In addition to the directions shown in the drawings, these spatially relative terms should be understood to include different orientations of the device during use or operation. For example, if a device in one of the drawings is flipped, a component described as “below” or “under” other elements will be oriented as “above” other elements. Thus, the exemplary term “below” can encompass both downward and upward directions.

[0026] In this specification, it should be understood that terms such as “comprising” or “having” are intended to indicate the presence of the features, figures, steps, operations, elements, parts or combinations thereof described in the specification, and do not preclude the possibility of the presence or addition of one or more other features, figures, steps, operations, elements, parts or combinations thereof.

[0027] As will be fully understood by those skilled in the art, the features of the various embodiments of this disclosure may be joined or combined in part or in whole, and may interoperate and be technology-driven in various ways. Embodiments of this disclosure may be performed independently of each other, or may be performed together in an interdependent relationship.

[0028] Any implementation described as an "example" in this article is not necessarily to be interpreted as preferred or superior to other implementations.

[0029] Furthermore, when referring to any size, relative size, etc., the numerical values ​​or corresponding information of a component or feature (e.g., level, range, etc.) should be considered to include tolerances or error ranges that may be caused by various factors (e.g., process factors, internal or external influences, noise, etc.), even if no relevant description is specified. Additionally, the term "may" fully encompasses all the meanings of the term "able to".

[0030] When describing temporal relationships, discontinuous cases may be included if the temporal order is described as such as “after,” “following,” “next,” and “before,” unless more restrictive terms such as “just,” “immediately,” or “directly” are used.

[0031] The term “at least one” should be understood to include any and all combinations of one or more of the associated listed items. For example, “at least one of the first element, the second element, and the third element” means a combination of all three listed elements, a combination of any two of the three elements, and each individual element: the first element, the second element, or the third element.

[0032] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the example embodiments pertain. It should also be understood that terms (such as those defined in common dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant field and should not be interpreted in an idealized or overly formal sense unless explicitly defined herein. For example, the terms “part” or “unit” can be applied to, for example, a single circuit or structure, an integrated circuit, a computational block of a circuit arrangement, or any structure configured to perform the functions described herein that would be understood by one of ordinary skill in the art.

[0033] In the following, a detailed description of a display device according to embodiments of the present disclosure will be given with reference to the accompanying drawings.

[0034] Figure 1 This is a schematic plan view showing a display device according to an embodiment of the present disclosure. Figure 2 This is a circuit diagram illustrating a sub-pixel according to an embodiment of the present disclosure. Figure 3 It means Figure 1Plan view of region B. Figure 4 It is along Figure 3 A cross-sectional view taken from the I-I' line.

[0035] Reference Figure 1 According to an embodiment of the present disclosure, the display device 100 includes a display panel 110 and a cover member 20 disposed on the display panel 110. The display panel 110 includes an effective area AA and an ineffective area NA.

[0036] The cover member 20 can be disposed on the display panel 110 to cover the front surface of the display panel 110 and protect the display panel 110 from external impacts. The edge portion of the cover member 20 can have a curved portion or curved surface that bends in the direction (-Z-axis direction) toward the rear surface of the display device 100. As a result, the cover member 20 can be disposed to cover the side surface area of ​​the display panel 110 disposed on the rear surface, thereby protecting the display panel 110 from external impacts not only on the front surface of the display device 100 but also on the side surfaces of the display device 100.

[0037] The effective area AA of the display device 100 can be an area used to display images, and the area other than the effective area AA can be referred to as the ineffective area NA. The effective area AA is also referred to as the display area, and the ineffective area NA is also referred to as the non-display area. The effective area AA and the ineffective area NA of the display device 100 can be equally applied to the display panel 110.

[0038] The display device 100 includes a substrate 111 having both an effective area AA and an ineffective area NA (see...). Figure 6 (and subsequent figures). Multiple data lines DL extending in a first direction (e.g., the Y-axis direction) and multiple gate lines GL extending in a second direction (e.g., the X-axis direction) intersecting the first direction can be disposed in an effective area AA on the substrate.

[0039] The area defined by the intersection of the data line DL and the gate line GL can each constitute a sub-pixel SP. A sub-pixel SP can be defined as an area in which a light-emitting part is provided. However, in embodiments of this disclosure, the light-emitting part is not necessarily limited to the area defined by the intersection of the data line DL and the gate line GL. That is, at least a portion of the light-emitting part can intersect with the data line DL and / or the gate line GL.

[0040] For example, such as Figure 2 As shown, Figure 3 As shown, the sub-pixel SP can be disposed between the intersecting gate line GL and data line DL, and the sub-pixel SP can include a first transistor T1, a second transistor T2, a storage capacitor Cst, a compensation circuit CC, and a light-emitting device ED.

[0041] For example, the first transistor T1 can be a switching transistor, and the second transistor T2 can be a driving transistor.

[0042] Each of the first transistor T1 and the second transistor T2 may include an active layer, a gate, and first and second source / drain electrodes. The active layer of at least one of the first transistor T1 and the second transistor T2 may include at least one of amorphous silicon, crystalline silicon, or an oxide semiconductor. The active layer of at least one of the first transistor T1 and the second transistor T2 may include an oxide semiconductor. For example, the oxide semiconductor may include an oxide semiconductor material such as indium gallium zinc oxide (IGZO).

[0043] The first transistor T1 is electrically connected to the data line DL and the first node N1. The gate of the first transistor T1 is electrically connected to the gate line GL. In response to the scan signal provided via the gate line GL, the first transistor T1 sends the data signal provided via the data line DL to the first node N1.

[0044] The storage capacitor Cst is electrically connected to the first node N1 to store the voltage applied to the first node N1.

[0045] The second transistor T2 receives a high-potential drive voltage EVDD and is electrically connected to the first electrode (e.g., the anode) of the light-emitting device ED. The second transistor T2 can control the amount of drive current flowing to the light-emitting device ED in response to the voltage applied to its gate. The high-potential drive voltage EVDD can be connected to the second transistor T2 via a first power supply voltage line VDDL.

[0046] The light-emitting device ED outputs light corresponding to the drive current supplied from the second transistor T2. The light-emitting device ED can output light corresponding to any one of red, green, blue, and white.

[0047] A light-emitting device (ED) may include a first electrode, an intermediate layer disposed on the first electrode, and a second electrode. The second electrode of the ED may be connected to a second power supply voltage line VSSL that provides a low-potential driving voltage EVSS. The second power supply voltage line VSSL is disposed in an inactive region NA and may be connected to the second electrode. In some cases, the second power supply voltage line VSSL may also be disposed in an active region AA to provide a low-potential driving voltage EVSS to each sub-pixel SP or multiple sub-pixels SP, and to consistently maintain the potential of the second electrode for each sub-pixel.

[0048] The intermediate layer includes a light-emitting layer and various functional layers, and can be configured to emit light of the same color, such as white light, on a per-pixel basis, or can be configured to emit light of different colors, such as red, green, or blue light, on a per-subpixel basis. The functional layers may include a hole injection layer, a hole transport layer, an electron transport layer, and a charge generation layer. The intermediate layer may include multiple stacks, wherein the multiple stacks may have charge generation layers between adjacent stacks to facilitate the supply of holes and electrons to the two stacks. Each of the multiple stacks may include at least one light-emitting layer, a hole transport layer, and an electron transport layer.

[0049] The first electrode of the light-emitting device ED can be used as the anode, and the second electrode can be used as the cathode. The light-emitting device ED is similar to the light-emitting device 160 described later (see reference). Figure 4 They are roughly the same.

[0050] A compensation circuit CC can be disposed in the sub-pixel SP to compensate for the threshold voltage of the second transistor T2. The compensation circuit CC may include one or more transistors. The compensation circuit CC may include one or more transistors and capacitors, and can be configured differently depending on the compensation method. The sub-pixel including the compensation circuit CC may include various structures such as 3T1C, 4T2C, 5T2C, 6T1C, 6T2C, 7T1C, and 7T2C. For example, multiple transistors may be electrically connected between the second transistor T2 and the light-emitting device ED.

[0051] Figure 2 The illustration shows a configuration in which the second transistor T2 and the light-emitting device ED are directly connected to each other, but embodiments of this disclosure are not limited thereto. Depending on the form of the compensation circuit CC, the light-emitting device ED may further include another transistor or a compensation capacitor between the light-emitting device ED and the second transistor T2 that generates the drive current.

[0052] Meanwhile, the display device 100 according to the embodiments of the present disclosure includes sensor units A and B disposed in the effective area AA.

[0053] The first sensor unit A may include multiple sensors A1 and A2. Examples of the multiple sensors A1 and A2 include an image sensor or camera that receives image information, an infrared sensor that senses infrared light, and a fingerprint recognition sensor that senses fingerprint information. Figure 1 In the diagram, sensors A1 and A2 are shown as circles, but this disclosure is not necessarily limited to this. The sensors may have polygonal or elliptical shapes. The light-receiving area of ​​each of sensors A1 and A2 may be a portion of the area occupied by each sensor.

[0054] Reference Figure 1 and Figure 3The second sensor unit B can be disposed adjacent to the first sensor unit A or disposed independently. The second sensor unit B may include an RGB sensor for detecting the color saturation of ambient light and / or an ambient light sensor for detecting the brightness of ambient light. The second sensor unit B can be used to automatically adjust the brightness and color of the display device 100 by detecting the color saturation and brightness of ambient light. In the second sensor unit B, the sensor may also be disposed below the substrate, but only the wiring or masking pattern of the light receiving portion SST of the sensor is omitted, so that the sub-pixel density of the remaining area excluding the light receiving portion SST is the same as the sub-pixel density of the surrounding effective area. That is, the second sensor unit B may have the same wiring or transistor configuration density in the area excluding the light receiving portion SST.

[0055] Here, the light receiving section SST of the second sensor unit B is the area where the sensor SS actually receives light from above, such as... Figure 3 and Figure 4 As shown, the overlap area between the sensor SS and the substrate 111 can be much narrower.

[0056] Each of the first sensor unit A and the second sensor unit B may be disposed below the display panel 110 so as to overlap with a portion of the effective area AA of the display panel 110.

[0057] like Figure 3 and Figure 4 As shown, the display device 1000 according to an embodiment of the present disclosure includes a substrate 111, which includes an effective region AA and an ineffective region NA surrounding the effective region AA. The effective region AA includes sensor units A and B. Figure 1 Sensors A1, A2, and SS are disposed below substrate 111 to correspond to sensor units A and B; a light-emitting device 160 is disposed in the effective area AA, and the light-emitting device 160 includes a plurality of first electrodes 161, an intermediate layer 162, and a second electrode 163; transistors T1 and T2 are disposed between substrate 111 and light-emitting device 160; and a light-transmitting hydrogen collection pattern HG (HG1, HG2, HG3, HG4, and HG5) is disposed on substrate 111 to overlap with sensor SS.

[0058] The transparent hydrogen collection patterns HG (HG1, HG2, HG3, HG4 and HG5) can be disposed on the same layer as the active layer or the electrodes constituting transistors T1 and T2 and the storage capacitor Cst.

[0059] Here, the light-transmitting hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5) can also be provided in the light-receiving section SST of the sensor SS. The hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5) are provided in areas where the shielding metal pattern is omitted for the sensor SS to receive light. Each of the hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5) can include a transparent metal or a transparent semiconductor material, which is capable of transmitting light in the visible spectrum and has hydrogen collection capabilities. Therefore, light entering from above can be sensed by the sensor SS below the substrate 111 through the area overlapping with the light-transmitting hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5) on the light-receiving section SST.

[0060] The light-transmitting hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5) transmit light in the visible spectrum. Therefore, when the sensor SS, which overlaps with the light-transmitting hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5), senses external light, it can capture hydrogen remaining in the insulating layers 121, 122, 123, 124, 125, 126, 127, and 128 adjacent to the light-transmitting hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5), and can prevent or reduce the degradation of transistors T1 and T2, which are located in the region adjacent to the light-receiving section SST of the sensor unit, due to residual hydrogen.

[0061] Figure 4 An example is shown of a multi-layered overlapping configuration of transparent hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5), but in some cases, only one of them may be configured. Alternatively, they may be configured selectively. Figure 4 Two, three, or four of the light-transmitting hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5) shown can also be configured. Figure 4 All of the transparent hydrogen collection patterns HG (HG1, HG2, HG3, HG4 and HG5) shown.

[0062] Meanwhile, when each of the transistors T1 and T2 disposed on the substrate 111 comprises an oxide semiconductor, the hydrogen harvesting pattern HG can be formed using the oxide semiconductor material in the same process. The oxide semiconductor material may include at least one of indium, gallium, zinc, and tungsten.

[0063] The transparent hydrogen collection patterns HG1, HG2, HG3, HG4 and HG5 may include semiconductors or metals with a band gap of 3.2 eV or greater, enabling the capture of hydrogen in an electrically floating state.

[0064] For example, when the second transistor T2 includes an active layer 117 made of oxide semiconductor, the first hydrogen collection pattern HG4 can be disposed on the same layer as the active layer 117.

[0065] In addition to the first hydrogen collection pattern HG4 disposed on the same layer as the active layer 117 of the second transistor T2, it may also include hydrogen collection patterns HG1, HG2, HG3 and HG5 disposed on other layers.

[0066] like Figure 4 As shown, multiple hydrogen collection patterns HG1, HG2, HG3, HG4 and HG5 can be disposed on the insulating layer of each of the transistors T1 and T2, which are adjacent to or overlap with the sensor SS, to effectively capture hydrogen remaining in each insulating layer of the substrate, thereby preventing a decrease in device reliability.

[0067] If the display device does not have a hydrogen collection pattern, hydrogen contained in the insulating layer of the substrate may flow into transistors T1 and T2, particularly transistors comprising oxide semiconductors. In this case, hydrogen may affect the conductivity of the active layer of the oxide semiconductor, thereby reducing the channel area, increasing the threshold voltage dispersion range of the transistor, or shifting the threshold voltage in the negative direction, thus reducing the reliability of the transistor's cutoff characteristics.

[0068] In the display device according to the embodiments of the present disclosure, the threshold voltage fluctuation of the transistor is reduced by setting a light-transmitting hydrogen collection pattern HG (HG1, HG2, HG3, HG4 and HG5), thereby reducing the threshold voltage dispersion range and improving the reliability of the transistor.

[0069] Multiple transparent hydrogen collection patterns HG1, HG2, HG3, HG4, and HG5 may overlap each other. In some cases, a portion of at least one of the transparent hydrogen collection patterns HG1, HG2, HG3, HG4, and HG5 may overlap with the light-receiving section SST, and the remaining portion may extend outside the light-receiving section SST. Some transparent hydrogen collection patterns may include areas that do not overlap with other transparent hydrogen collection patterns.

[0070] In some cases, hydrogen collection patterns HG1, HG2, HG3, and HG5 can not only be formed in the active layer 117 made of oxide semiconductor, but also in the same metal layer as other electrode layers forming transistors. Hydrogen generated during the process can be captured by hydrogen collection patterns HG1, HG2, HG3, and HG5, and the metal hydrogen collection patterns HG1, HG2, HG3, and HG5 can be removed after the formation of transistors T1 and T2 is completed.

[0071] Metals with hydrogen harvesting capabilities can be, for example, titanium (Ti), titanium alloys, or Ti / Al / Ti stacked structures.

[0072] In some cases, hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5) can be provided as patterns during the process and then removed together with the patterning process of the metal layer. In this case, since the pattern of the metal layer is removed, the light receiving capacity of the light receiving section SST of the sensor unit that senses the light can be maintained.

[0073] Figure 4 An example is shown in which multiple transparent hydrogen collection patterns (HGs) (HG1, HG2, HG3, HG4, and HG5) are stacked. When these patterns remain in the display device 1000, each of the pattern layers HG1, HG2, HG3, HG4, and HG5 may include an oxide semiconductor, allowing light to pass through the light receiver SST. In this case, each of the pattern layers HG1, HG2, HG3, HG4, and HG5 may be made of a different material than the active layers included in transistors T1 and T2. Each of the transparent hydrogen collection patterns HGs (HG1, HG2, HG3, HG4, and HG5) remaining in the display device 1000 is an oxide semiconductor layer, which may include at least one of oxygen, indium, gallium, zinc, and tungsten.

[0074] Alternatively, each of the transparent hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5) may include a metal that is transparent in the visible spectrum.

[0075] Alternatively, each of the light-transmitting hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5) may comprise a semiconductor or metal with a band gap of 3.2 eV or greater. This characteristic is necessary for the sensor SS, positioned below the substrate 111, to receive light from above.

[0076] The following description, with reference to the accompanying drawings, describes the structure surrounding the light-transmitting hydrogen collection patterns HG (HG1, HG2, HG3, HG4, and HG5).

[0077] like Figure 3 As shown, the second sensor unit B is a region that includes an RGB sensor for detecting the color saturation of ambient light and / or an ambient light sensor for detecting the brightness of ambient light.

[0078] like Figure 3 As shown, the second sensor unit B detects the ambient light in the area where the sensor SS is located, and does not directly display the image in this area. Therefore, the light-emitting parts EMA, EMB, EMC, as well as the first wiring L1 and the second wiring L2 can be regularly arranged around the light receiving part SST of the sensor SS.

[0079] refer to Figure 4 Sensors SS (such as RGB sensors or ambient light sensors) can be disposed below substrate 111.

[0080] The sensor SS may have an opening of a size corresponding to the light receiving part SST of the sensor SS in the light-shielding part 170 on the substrate 111, which has openings for the light-emitting parts EMA, EMB and EMC, in order to increase the transmittance of ambient light.

[0081] exist Figure 3 In the diagram, the light-receiving portion SST of the sensor unit is shown as circular, but the embodiments of this disclosure are not limited thereto. The light-receiving portion SST can be elliptical or a polygon including straight lines and curves. The size and shape of the light-receiving portion SST can be adjusted according to the light-receiving area and light-receiving sensitivity of the sensor SS.

[0082] like Figure 3 and Figure 4 As shown, the end line 170E of the light-shielding section 170 is adjacent to the light-receiving section SST of the sensor, and the light-shielding section 170 is removed from the light-receiving section SST of the sensor. The light-receiving section SST of the sensor retains the light-transmitting layer that constitutes the substrate 111 and the upper part of the substrate 111, thereby enabling the sensing of ambient light entering from above below the substrate 111 without limiting the transmittance.

[0083] At the same time, such as Figure 3 As shown, the optical receiver SST can be configured not to overlap with the wiring, thereby improving the sensing sensitivity of the sensor SS.

[0084] In the example, Figure 3 An example is shown where a high-potential voltage line VDDL is arranged around the light receiver SST. The high-potential voltage line VDDL can also be arranged outside the light receiver SST in the Y-axis direction.

[0085] This is an example, and other power supply voltage lines (such as low potential voltage line VSSL), data lines DL, or strobe lines GL or light emission control lines can be further arranged around the optical receiver SST.

[0086] Reference Figure 4 Multiple sub-pixels SP can be disposed in the effective area AA of the substrate 111, and multiple sub-pixels SP can also be included in the second sensor unit B.

[0087] The substrate 111 may be made of a flexible material and may include a first organic layer 1111 and a second organic layer 1112 overlapping each other, with an inorganic interlayer insulating layer 1113 between the first organic layer 1111 and the second organic layer 1112. The inorganic interlayer insulating layer 1113 may function to prevent the transfer of moisture or impurities between the first organic layer 1111 and the second organic layer 1112. The inorganic interlayer insulating layer 1113 may be formed on the first organic layer 1111 and may be partially patterned. The inorganic interlayer insulating layer 1113 may include at least one of a silicon nitride layer, a silicon oxide layer, and a silicon oxynitride layer.

[0088] The first organic layer 1111 and the second organic layer 1112 may include, for example, polyimide. In addition to polyimide, the first organic layer 1111 and the second organic layer 1112 may include different organic layers.

[0089] The substrate 111 may include a first organic layer 1111 and a second organic layer 1112, one of which is polyethylene terephthalate (PET) and the other is polyimide.

[0090] In another example, substrate 111 may comprise a flexible, thin glass material.

[0091] The substrate 111 is used to support and protect the components of the display device mounted thereon.

[0092] In the effective area AA and the ineffective area NA of the substrate 111, a plurality of stacked insulating layers 120 (121, 122, 123, 124, 125, 126, 127 and 128) and planarization layers PLN (151 and 152) are provided.

[0093] The shielding patterns 112 and 116 of transistors T1 and T2 are insulated from each other by the active layers 113 and 117, the active layers 113 and 117 are insulated from each other by the gates 114 and 118, and the gates 114 and 118 are insulated from each other by the source and drain electrodes 141, 142, 143 and 144.

[0094] The fifth insulating layer 125 can be disposed between the first storage electrode 115 and the second storage electrode 116 to form a storage capacitor Cst.

[0095] The first storage electrode 115 and the second storage electrode 116 can be used as the shielding pattern for the second transistor T2.

[0096] The first shielding pattern 112 is disposed below the first transistor T1 to prevent or reduce the influence of light from the underside of the substrate 111 toward the first active layer 113.

[0097] In the example, the first transistor T1 includes a first active layer 113, a first gate 114, and a first source-drain 141 and a second source-drain 142. As shown, a first shielding pattern 112 can be connected to one side of the first active layer 113 via the second source-drain 142. In some cases, the first gate 114 of the first transistor T1 can be connected to the first shielding pattern 112 via another connection electrode, thereby allowing the first shielding pattern 112 and the first gate 114 to function as a dual-gate configuration. In the dual-gate configuration, the same gate voltage can be applied to both the first shielding pattern 112 and the first gate 114.

[0098] The insulating layer 125 can be inserted between the overlapping first storage electrode 115 and the second storage electrode 116 to form a storage capacitor Cst.

[0099] In the example, the second transistor T2 includes a second active layer 117, a second gate 118, a third source-drain 143, and a fourth source-drain 144. The first storage electrode 115 and the second storage electrode 116 can be used as a shielding pattern for the second transistor T2.

[0100] The second transistor T2 can be connected to the first electrode 161 of the light-emitting device ED (160) via the connection electrode 151.

[0101] Meanwhile, the circuit configuration of the sub-pixels in the second sensor unit B shown is an example, and the configuration of transistors and capacitors can be modified or added.

[0102] In the display device according to embodiments of the present disclosure, a sensor unit B (see [link to relevant documentation]) may be used. Figure 3 The light receiving section SST is provided with a light-transmitting collection pattern HG so that the light-shielding pattern used for light receiving is reserved empty.

[0103] The insulating layer 120 disposed on the substrate 111 may include, for example, a first insulating layer 121, a second insulating layer 122, a third insulating layer 123, a fourth insulating layer 124, a fifth insulating layer 125, a sixth insulating layer 126, a seventh insulating layer 127, and an eighth insulating layer 128. The insulating layer 120 may include an inorganic insulating material.

[0104] A first insulating layer 121 is disposed in the effective region AA and the ineffective region NA of the substrate 111. The first insulating layer 121 may be referred to as a buffer layer and may perform the same function as buffer layers known in the art. The first insulating layer 121 may be disposed on the substrate 111 to protect the structure located on the substrate 111 from moisture penetration through the substrate 111 and to planarize the surface of the substrate 111. The first insulating layer 121 may include a plurality of inorganic insulating layers.

[0105] The first insulating layer 121 may extend to the edge of the non-effective region NA of the substrate 111 to prevent or reduce moisture penetration from the edge of the substrate 111. The first insulating layer 121 may consist of a single inorganic layer or multiple inorganic layers stacked alternately.

[0106] For example, the first insulating layer 121 may include at least one of a silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, and a silicon oxynitride (SiOxNy) layer, or a multilayer formed by stacking inorganic layers.

[0107] For example, the first shielding pattern 112 may be disposed on the first insulating layer 121. For example, the first shielding pattern 112 may be made of a conductive metal material. Specifically, the conductive metal material may include at least one of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, copper-based metals such as copper (Cu) or copper alloys, molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti).

[0108] The second transparent hydrogen collection pattern HG1 can be placed on the same layer as the first shielding pattern 112.

[0109] A second insulating layer 122 may be disposed on the first insulating layer 121. The second insulating layer 122 may serve as, for example, a second buffer layer. As a transistor disposed on the substrate 111, a polysilicon-type transistor having an active layer made of crystalline silicon may be included. In this case, the second insulating layer 122 may stabilize and planarize the formation surface of the active layer including crystalline silicon. The second insulating layer 122 may include an inorganic layer, such as a silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, or multiple layers thereof.

[0110] A third insulating layer 123, which serves as a buffer layer for the first active layer 113, may be further disposed on the second insulating layer 122. The third insulating layer 123 may include an inorganic layer, such as a silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, or multiple thereof.

[0111] A first active layer 113 comprising crystalline silicon may be disposed on the third insulating layer 123. The first active layer 113 may be formed, for example, by first forming amorphous silicon on the entire surface of the third insulating layer 123 and then crystallizing it by a laser irradiation process to form crystalline silicon.

[0112] A fourth insulating layer 124 may be disposed on the third insulating layer 123 to cover the first active layer 113. The fourth insulating layer 124 may be used as the gate insulating layer of the first transistor T1, which includes crystalline silicon as the first active layer 113.

[0113] The first gate 114 of the first transistor T1 and the first storage electrode 115 of the storage capacitor Cst can be disposed on the fourth insulating layer 124. A third transparent hydrogen collection pattern HG2 can be provided on the same layer.

[0114] Each of the first gate 114 and the first storage electrode 115 may be made of, for example, a shielding conductive metal material. Specifically, the shielding conductive metal material may include at least one of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, copper-based metals such as copper (Cu) or copper alloys, molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti).

[0115] A fifth insulating layer 125 may be disposed on the fourth insulating layer 124 to cover the first gate 114 and the first storage electrode 115. The fifth insulating layer 125 may serve as an insulator between the first storage electrode 115 and the second storage electrode 116, and may also serve as an interlayer insulating layer for the first transistor T1, which includes polysilicon as the first active layer 113.

[0116] The fifth insulating layer 125 may include an inorganic material. The inorganic material may include, for example, a silicon nitride (SiNx) layer or a silicon oxide (SiOx) layer.

[0117] A second storage electrode 116, made of a conductive metal material, can be formed on the fifth insulating layer 125 to overlap with the first storage electrode 115. Specifically, the conductive metal material may include at least one of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, copper-based metals such as copper (Cu) or copper alloys, molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti). A fourth transparent hydrogen collection pattern HG3 may be disposed on the same layer as the second storage electrode 116.

[0118] Each of the first storage electrode 115 and the second storage electrode 116 may be a single layer, or may have a structure in which multiple different metallic materials are stacked.

[0119] The sixth insulating layer 126 may be disposed on the fifth insulating layer 125 on which the second storage electrode 116 is disposed. The inorganic insulating material of the sixth insulating layer 126 may be used to planarize the formation surface of the second transistor T2. The sixth insulating layer 126 may comprise a single layer of inorganic insulating material containing a silicon oxide (SiOx) layer, or multiple layers in which the silicon oxide layer and other inorganic insulating layers are stacked.

[0120] The sixth insulating layer 126 is located below the second active layer 117 and serves as a buffer layer, and also planarizes the formation surface of the second active layer 117. Since the sixth insulating layer 126 does not release hydrogen particles during heat treatment, the reliability of the second active layer 117, which is an oxide semiconductor layer disposed adjacent to the sixth insulating layer 126, can be prevented from being reduced due to hydrogen particles.

[0121] The second active layer 117 of the second transistor T2 can be disposed on the sixth insulating layer 126. The second active layer 117 may include, for example, an oxide semiconductor material. The oxide semiconductor material may include a combination of at least one of zinc (Zn), indium (In), gallium (Ga), tin (Sn), and titanium (Ti) with an oxide. In some cases, a highly conductive metal such as iron (Fe) may be further included in the oxide semiconductor material to increase mobility. The first transparent hydrogen collection pattern HG4 made of the same oxide semiconductor material may be disposed on the same layer as the second active layer 117.

[0122] More specifically, the oxide semiconductor material constituting the second active layer 117 may be, for example, zinc oxide (ZnO), zinc tin oxide (ZTO), zinc indium oxide (ZIO), indium oxide (InO), titanium oxide (TiO), indium gallium zinc oxide (IGZO), indium zinc tin oxide (IZTO), or iron indium zinc oxide (FIZO).

[0123] The seventh insulating layer 127 can be configured to cover the second active layer 117. The seventh insulating layer 127 may include a silicon oxide layer or a silicon nitride layer. The seventh insulating layer 127 can be used as the gate insulating layer of the second transistor T2.

[0124] Conductive metal material is deposited on the seventh insulating layer 127 to form the second gate 118.

[0125] The conductive metal material forming the second gate 118 may include at least one of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, copper-based metals such as copper (Cu) or copper alloys, molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti).

[0126] The light-transmitting hydrogen collection pattern can be further disposed on the same layer as the seventh insulating layer 127 on which the second gate 118 is disposed.

[0127] The eighth insulating layer 128 is configured to cover the second gate 118.

[0128] For example, in the eighth insulating layer 128, multiple inorganic insulating layers can be stacked to maintain interlayer insulation between the second gate 118 and the third source / drain 143 and the fourth source / drain 144, and to planarize the formation surfaces of the third source / drain 143 and the fourth source / drain 144.

[0129] The fifth to eighth insulating layers 125, 126, 127, and 128 are selectively removed together from the upper portions of both sides of the first active layer 113 to expose holes in the upper portions of the first active layer 113 on both sides. Simultaneously, the seventh insulating layer 127 and the eighth insulating layer 128 are selectively removed together from the upper portions of both sides of the second active layer 117 to expose holes in the upper portions of both sides of the second active layer 117. In the same process, holes formed through the second to eighth insulating layers 122, 123, 124, 125, 126, 127, and 128 may also be provided to expose a predetermined area of ​​the first shielding pattern 112 that laterally protrudes beyond the first active layer 113.

[0130] Conductive metal material is deposited on the eighth insulating layer 128 to form the first source-drain 141 and second source-drain 142 of the first transistor T1, and the third source-drain 143 and fourth source-drain 144 of the second transistor. A photoresist is applied to the conductive metal material, and it is exposed and developed to selectively leave a photoresist pattern at the formation regions of the first to fourth source-drains 141, 142, 143, and 144. The conductive metal material is patterned using the photoresist pattern to form the first to fourth source-drains 141, 142, 143, and 144.

[0131] Here, the first source-drain 141 and the second source-drain 142 are connected to the upper part of the first active layer 113 on both sides via contact holes formed through the fifth to eighth insulating layers 125, 126, 127 and 128. The second source-drain 142 can extend to overlap with the first shielding pattern 112 that protrudes laterally beyond the first active layer 113, and can be connected to the first shielding pattern 112 via contact holes formed through the second to eighth insulating layers 122, 123, 124, 125, 126, 127 and 128, and can stabilize the potential of the first shielding pattern 112.

[0132] The third source drain 143 and the fourth source drain 144 are connected to the upper part of the second active layer 117 on both sides via contact holes formed through the seventh insulating layer 127 and the eighth insulating layer 128. The third source drain 143 is connected to the connection electrode 151 disposed thereon and may have a larger width than the fourth source drain 144.

[0133] Subsequently, a planarization layer PLN can be provided on the eighth insulating layer 128 to planarize the surface in which the light-emitting device 160 is formed.

[0134] For example, the planarization layer PLN may include a first planarization layer 131 and a second planarization layer 132.

[0135] Each of the first planarization layer 131 and the second planarization layer 132 may be made of an organic material. The organic material constituting the first planarization layer 131 and the second planarization layer 132 may include at least one selected from acrylic resin, phenolic resin, polyimide resin, unsaturated polyester resin, polyamide resin, benzocyclobutene, polyphenylene resin, and polyphenylene sulfide resin. Each of the first planarization layer 131 and the second planarization layer 132 is thicker than each of the first to eighth insulating layers 121, 122, 123, 124, 125, 126, 127, and 128, which facilitates planarization.

[0136] After the first planarization layer 131 is applied, a contact hole is formed to expose the third source-drain electrode 143 of the second transistor T2.

[0137] The connection electrode 151 disposed on the first planarization layer 131 can be connected to the third source drain 143 via a contact hole that exposes the third source drain 143.

[0138] In one example, the connecting electrode 151 may be made of any one of the following materials selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. However, embodiments of this disclosure are not limited thereto. In some cases, the connecting electrode 151 may be omitted.

[0139] When the connecting electrode 151 is omitted, the third source-drain electrode 143 can be directly connected to the first electrode 161 of the light-emitting device 160.

[0140] The light-emitting device 160 includes a first electrode 161, an intermediate layer 162, and a second electrode 163. The first electrode 161 is independently provided for each sub-pixel SP and can be separated from the first electrode of the adjacent sub-pixels.

[0141] In the example, the first electrode 161 may include a metallic material with high reflectivity or a transparent electrode. For example, the first electrode 161 may have a single layer of transparent conductive layer such as ITO (indium tin oxide), IZO (indium zinc oxide), TO (tin oxide), or ITZO (indium tin zinc oxide); it may have a multilayer structure of aluminum (Al) and titanium (Ti) (Ti / Al / Ti), a multilayer structure of aluminum (Al) and ITO (ITO / Al / ITO), an APC (Ag / Pd / Cu) alloy, a multilayer structure of APC alloy and ITO (ITO / APC / ITO), or a multilayer structure of silver (Ag) and molybdenum / titanium alloy (Ag / MoTi); or it may have a single layer of any one or more alloys selected from silver (Ag), aluminum (Al), molybdenum (Mo), gold (Au), magnesium (Mg), calcium (Ca), and barium (Ba). When the first electrode 161 has a single layer of transparent conductive layer, light emitted from the light-emitting device 160 can be emitted through the first electrode 161. When the first electrode 161 includes a reflective electrode, light can be emitted through the second electrode 163 opposite to the first electrode 161.

[0142] The first electrode 161 may include, for example, a reflective electrode, and may be used to prevent or reduce light incident on transistors T1 and T2 below the light-emitting device 160. The first electrode 161 may include, for example, a structure that stacks a first transparent electrode, a reflective electrode, and a second transparent electrode. The second transparent electrode, serving as the uppermost electrode of the first electrode 161, may be a dielectric, which can lower the hole injection barrier at the interface with the intermediate layer 162. Here, the first and second transparent electrodes may be transparent oxide electrodes such as ITO or IZO. The reflective electrode may include silver, silver alloys such as APC (Ag-Pd-Cu), aluminum, or aluminum alloys.

[0143] In a top-emitting type light-emitting display device, the second electrode 163 may include a transparent electrode or a thin transmissive reflective electrode that allows light to pass through it. The transparent electrode may be made of, for example, ITO or IZO, and the transmissive reflective electrode may be made of, for example, an alloy of any one or more of silver (Ag), aluminum (Al), molybdenum (Mo), gold (Au), magnesium (Mg), ytterbium (Yb), and strontium (Sr).

[0144] The intermediate layer 162 on the first electrode 161 may include a first common layer CML1 associated with holes, which includes a hole injection layer HIL, a hole transport layer HTL, a light emission layer EML, a hole blocking layer HBL, and a second common layer CML2 associated with electrons, which includes an electron transport layer ETL and an electron injection layer EIL.

[0145] A light-shielding dam 170 can be provided to cover the edge of the first electrode 161, and the opening in the light-shielding dam 170 on the first electrode 161 can be defined as a light-emitting portion. The light-shielding dam 170 may include a light-shielding organic insulating material to maintain a certain vertical thickness. The shielding organic insulating material of the light-shielding dam 170 may have a vertical thickness of, for example, 1 μm to 5 μm.

[0146] To protect the light-shielding barrier 170 and prevent or reduce the introduction of impurities, a transparent barrier 180 may also be provided on the light-shielding barrier 170. The transparent barrier 180 may be selectively provided on the light-shielding barrier 170 to serve as a spacer.

[0147] The spacer may be further provided on the light-shielding dam 170. The spacer may be provided partially on a portion of the upper surface of the light-shielding dam 170, rather than on the entire upper surface of the light-shielding dam 170, to prevent or reduce the collapse of the light-shielding dam 170 below or under the spacer when the deposition mask is applied to the substrate 111 during the deposition of the intermediate layer 162.

[0148] Intermediate layer 162 may include multiple functional layers together with the light-emitting layer. For example, intermediate layer 162 may include a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. Intermediate layer 162 may be formed in a series structure comprising multiple stacks, each stack including a hole transport layer, a light-emitting layer, and an electron transport layer, and a charge generation layer disposed between the stacks. The charge generation layer may include, for example, an n-type charge generation layer and a p-type charge generation layer.

[0149] Subpixels SP are colored individually by light-emitting devices 160, and a light-emitting layer can be patterned and set on each subpixel SP using a deposition mask that includes an opening corresponding to the light-emitting part for each subpixel.

[0150] Functional layers other than the light-emitting layer, such as the hole injection layer, hole transport layer, electron transport layer, electron injection layer, and charge generation layer, are collectively included in multiple sub-pixels. Furthermore, the second electrode 163 can also be collectively included in multiple sub-pixels.

[0151] The second electrode 163 can be formed by thinning a transmission electrode made of ITO or IZO or a reflective transmission electrode made of silver, silver alloy, magnesium, magnesium alloy, ytterbium (Yb) or ytterbium alloy.

[0152] A capping layer (not shown) may be further formed on the second electrode 163 to protect the second electrode 163 of the light-emitting device 160 and increase the light-emitting efficiency in the upward direction.

[0153] An encapsulation layer 190 may be provided on the second electrode 163 to prevent or reduce moisture penetration into the internal components and to protect the internal components from the influence of external air.

[0154] In one example, the encapsulation layer 190 may include a structure that stacks a first inorganic encapsulation layer 191, an organic encapsulation layer 192, and a second inorganic encapsulation layer 193.

[0155] Figure 5 and Figure 6 This is a cross-sectional view showing a display device according to another embodiment of the present disclosure.

[0156] Apart from Figure 4 In addition to the structure of the display device 1000, Figure 5 The display device 2000 also includes a touch sensor TS and a color filter array CFB.

[0157] The following is about Figure 4 The structures not included in the text will be explained.

[0158] like Figure 5 As shown, a touch sensor including a first touch electrode layer 212 and second touch electrode layers 214e and 214 (including the second touch electrode 214 and the second touch connection electrode 214e) is formed on the encapsulation layer 190.

[0159] A touch sensor can be disposed on the encapsulation layer 190 in the effective area AA to sense touch input. The touch sensor can detect external touch information using a user's finger or stylus. The touch sensor may include a touch buffer layer 211, a first touch electrode layer 212, a touch intermediate insulating layer 210, second touch electrode layers 214e and 214, and a touch protective layer 220.

[0160] Each of the touch buffer layer 211 and the touch intermediate insulating layer 210 may be made of an inorganic material such as silicon nitride (SiNx), silicon oxide (SiOx) or silicon oxynitride (SiONx), but embodiments of the present disclosure are not limited thereto.

[0161] In the touch sensor, the first touch electrode layer 212 and the second touch connection electrode 214e, located on different layers, can be connected to each other and used as the first touch sensor Tx. The second touch electrode layer 214, separated from the second touch connection electrode 214e, can be electrically separated from the first touch sensor Tx and used as the second touch sensor Rx. A touch sensing signal can be applied to one of the first touch sensor Tx and the second touch sensor Rx, and the other can be used to sense changes caused by touch.

[0162] The first touch sensor Tx and the second touch sensor Rx can be arranged overlapping the light-shielding portion 170. For example, the first touch sensor Tx can be arranged in the X-axis direction and the second touch sensor Rx can be arranged in the Y-axis direction. Alternatively, the first touch sensor Tx and the second touch sensor Rx can be arranged in both the Y-axis and X-axis directions.

[0163] Each of the first touch electrode layer 212 and the second touch electrode layers 214e and 214 may be made of a metallic material, but the embodiments disclosed herein are not limited thereto.

[0164] The color filter array CFB may also include a black background 221 overlapping with the light-shielding section 170 and color filters 222 overlapping with the openings of the light-shielding section 170.

[0165] A protective layer 223 may be provided, which is configured to protect the upper surface of the display device while covering the black background 221 and the color filter 222.

[0166] In the display device according to an embodiment of the present disclosure, the black background 221 and the color filter 222 allow the light-emitting portion of each sub-pixel of the light-emitting device to display a color, wherein the black background 221 has light absorption properties in the visible spectrum, and the color filter 222 can block light in a wavelength range other than the transmission wavelength of a predetermined color. Therefore, even if external light is incident through the protective layer 223, light can be blocked in the area where the black background 221 is provided, and other light outside the wavelength range with selective transmittance can be blocked in the area where the color filter 222 is provided, thereby reducing the amount of external light entering the light-emitting device side, thereby realizing the functions of color transmission and external light reflection. Therefore, in the case of providing a color filter array CFB, a separate polarizer can also be omitted.

[0167] In the display device according to an embodiment of the present disclosure, a light-shielding barrier 170 is disposed around the light-emitting device 160 to block external light incident in a diagonal direction, thereby more effectively preventing or reducing the visibility of external light reflection.

[0168] exist Figure 6 In the display device 3000, with Figure 5 Compared to the display device 2000, the light-transmitting hydrogen collection pattern HG4 is composed of the same layer as the second active layer 117, which is an oxide semiconductor layer.

[0169] exist Figure 6 In the display device 3000, with Figure 5Compared to the display device 2000, light transmission is possible, and moisture- and oxygen-resistant oxide semiconductor components are used. Furthermore, since there are no metal components other than the light-transmitting hydrogen collection pattern HG4 in the overlapping structure, there is no need to apply a process to remove the separated metals, thereby minimizing or reducing the number of processes and maintaining the high light-receiving efficiency of the light-receiving section SST of the sensor SS.

[0170] Figure 7A and Figure 7B The diagram shows the IV diagrams of the surrounding transistors when no hydrogen collection pattern is applied and when a hydrogen collection pattern is applied.

[0171] like Figure 7A As shown, without applying a hydrogen collection pattern, the discrete range of the transistor's IV characteristics becomes larger, with the threshold voltage ranging from -0.74 V to 1.64 V, exhibiting a severe negative shift in the threshold voltage. However, as... Figure 7B As shown, when a hydrogen collection pattern is applied, the dispersion range of the transistor's IV characteristics decreases, and the threshold voltage decreases to -0.11 to 0.67 V. This means that, as in the display device according to an embodiment of the present disclosure, the threshold voltage collection dispersion among the plurality of transistors disposed on the substrate is reduced, and the transistor characteristics are stabilized.

[0172] Meanwhile, when no hydrogen collection pattern is provided, the hydrogen component acts as conductive particles in the transistor, causing the channel to become conductive, which may lead to panel abnormalities such as bright spots and malfunctions.

[0173] In the display device according to the embodiments of the present disclosure, when a light-transmitting hydrogen collection pattern is applied, the light receiving capability of the sensor unit is not impaired, and the hydrogen collection characteristics are ensured, thereby stabilizing the characteristics of the transistors around the sensor.

[0174] In the display device according to the embodiments of the present disclosure, hydrogen remaining in the insulating layer or the like is collected by a light-transmitting hydrogen collection pattern, thereby the transistor is not affected by the hydrogen remaining in the insulating layer or the like, thus improving the reliability of the transistor.

[0175] In the display device according to the embodiments of this disclosure, by providing a light-transmitting hydrogen collection pattern that overlaps with the sensor unit, the light-receiving capability of the sensor unit in the effective area can be maintained, and the characteristics of the transistors around the sensor unit can be stabilized. Hydrogen is not transmitted to the transistors around the light-receiving part of the sensor unit, but is captured by the hydrogen collection pattern, thereby improving the reliability of the transistors around the sensor unit.

[0176] Based on the above description, the display device of this disclosure has the following effects.

[0177] The display device according to the embodiments of the present disclosure has a light-transmitting hydrogen collection pattern, thereby maintaining the light-receiving capability of the sensor unit disposed in the effective area and stabilizing the characteristics of the transistors around the sensor unit.

[0178] In the display device according to the embodiments of the present disclosure, hydrogen remaining in the insulating layer or the like is collected by a light-transmitting hydrogen collection pattern, thereby the transistor is not affected by the hydrogen remaining in the insulating layer or the like, thus improving the reliability of the transistor.

[0179] In the display device according to an embodiment of the present disclosure, a hydrogen collection pattern is disposed adjacent to a transistor in a region surrounding a light-receiving portion of a sensor unit, thereby preventing hydrogen from being transmitted to the transistor surrounding the light-receiving portion of the sensor unit, and the hydrogen collection pattern captures hydrogen, thereby improving the reliability of the transistor surrounding the sensor unit.

[0180] In the display device according to an embodiment of the present disclosure, a hydrogen collection pattern is provided in multiple pattern layers to prevent the influence of hydrogen remaining in each insulating layer.

[0181] In a display device according to an embodiment of the present disclosure, a portion of the hydrogen collection pattern is made of metal. After residual hydrogen is collected in a subsequent process, the hydrogen collection pattern overlapping with the sensor unit is removed in a subsequent metal etching process, thereby preserving the light-receiving characteristics of the sensor unit. A display device according to one embodiment of the present disclosure may include a substrate comprising an effective region and an ineffective region surrounding the effective region, the effective region including the sensor unit; a sensor corresponding to the sensor unit below the substrate; a light-emitting device at the effective region, the light-emitting device including a plurality of first electrodes, an intermediate layer including a light-emitting layer, and a second electrode; a transistor between the substrate and the light-emitting device; and a transparent hydrogen collection pattern overlapping the sensor on the substrate.

[0182] In a display device according to one embodiment of the present disclosure, the light-transmitting hydrogen collection pattern may include multiple pattern layers on different insulating layers.

[0183] In a display device according to one embodiment of the present disclosure, multiple pattern layers may overlap each other.

[0184] In a display device according to one embodiment of the present disclosure, the transistor may include an oxide semiconductor, and the light-transmitting hydrogen collection pattern may include a first pattern on the same layer as the oxide semiconductor.

[0185] In a display device according to one embodiment of the present disclosure, the light-transmitting hydrogen collection pattern may include a second pattern disposed on a layer different from the first pattern.

[0186] In a display device according to one embodiment of the present disclosure, the light-transmitting hydrogen collection pattern may include an oxide semiconductor.

[0187] In a display device according to one embodiment of the present disclosure, the oxide semiconductor may include at least one metal selected from indium, gallium, zinc and tungsten.

[0188] In a display device according to one embodiment of the present disclosure, the light-transmitting hydrogen collection pattern may include a metal that is transparent in the visible light wavelength range.

[0189] In a display device according to one embodiment of the present disclosure, the light-transmitting hydrogen collection pattern may include a semiconductor or metal having a band gap of 3.2 eV or greater.

[0190] The display device according to one embodiment of the present disclosure may further include a light-shielding dam configured to define a light-emitting portion of each of a plurality of first electrodes.

[0191] In a display device according to one embodiment of the present disclosure, at the sensor unit, the light-transmitting hydrogen collection pattern may not overlap with the light-shielding embankment.

[0192] In a display device according to one embodiment of the present disclosure, the light-transmitting hydrogen collection pattern may correspond to the opening of the light-shielding dam.

[0193] In a display device according to one embodiment of the present disclosure, a light-transmitting hydrogen collection pattern may overlap with the light-receiving portion of a sensor unit.

[0194] In a display device according to one embodiment of the present disclosure, the sensor unit may include an ambient light sensor.

[0195] In a display device according to one embodiment of the present disclosure, a first sub-pixel overlapping with a sensor unit and a second sub-pixel outside the sensor unit may have the same resolution.

[0196] In the display device according to embodiments of the present disclosure, reliability can be improved by maintaining the discrete range of transistor threshold voltages within a certain range, thereby improving device reliability and achieving operational stability. Therefore, continuous applicability is possible in the display device, thereby enabling the achievement of ESG (Environmental, Social, and Governance) objectives.

[0197] Cross-references to related applications

[0198] This application claims the benefit of Korean Patent Application No. 10-2025-0011985, filed on January 24, 2025, which is incorporated herein by reference as if fully set forth herein.

Claims

1. A display device, the display device comprising: A substrate, the substrate including an effective region and an ineffective region surrounding the effective region, the effective region including a sensor unit; A sensor, located below the substrate and corresponding to the sensor unit; A light-emitting device, wherein the light-emitting device is located in the effective region, the light-emitting device comprising a plurality of first electrodes, an intermediate layer including a light-emitting layer, and a second electrode; A transistor, the transistor being located between the substrate and the light-emitting device; as well as A light-transmitting hydrogen collection pattern is provided on the substrate to overlap with the sensor.

2. The display device according to claim 1, wherein, The light-transmitting hydrogen collection pattern comprises multiple pattern layers on different insulating layers.

3. The display device according to claim 2, wherein, The multiple pattern layers overlap each other.

4. The display device according to claim 1, wherein, The transistor comprises an oxide semiconductor, and The light-transmitting hydrogen collection pattern includes a first pattern located on the same layer as the oxide semiconductor.

5. The display device according to claim 4, wherein, The light-transmitting hydrogen collection pattern includes a second pattern disposed in a layer different from the first pattern.

6. The display device according to claim 1, wherein, The light-transmitting hydrogen collection pattern includes an oxide semiconductor.

7. The display device according to claim 6, wherein, The oxide semiconductor includes at least one metal selected from indium, gallium, zinc, and tungsten.

8. The display device according to claim 1, wherein, The transparent hydrogen collection pattern comprises a metal that is transparent in the visible light wavelength range.

9. The display device according to claim 1, wherein, The transparent hydrogen collection pattern comprises a semiconductor or metal having a band gap equal to or greater than 3.2 eV.

10. The display device according to claim 1, further comprising a light-shielding portion configured to define a light-emitting portion of each of the plurality of first electrodes.

11. The display device according to claim 10, wherein, At the sensor unit, the light-transmitting hydrogen collection pattern does not overlap with the light-shielding embankment.

12. The display device according to claim 10, wherein, The light-transmitting hydrogen collection pattern corresponds to the opening of the light-shielding embankment.

13. The display device according to claim 1, wherein, The light-transmitting hydrogen collection pattern overlaps with the light-receiving part of the sensor unit.

14. The display device according to claim 13, wherein, The sensor unit includes an ambient light sensor.

15. The display device according to claim 1, wherein, The first sub-pixel overlapping the sensor unit and the second sub-pixel outside the sensor unit have the same resolution.

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