Cache occupancy control method, device, system, equipment, medium and program product

Abstract

The present disclosure provides a cache occupation control method, device, system, equipment, medium and program product, which belongs to the field of communication. The stack port cache occupation control method comprises: obtaining a discard waterline corresponding to a stack port, the discard waterline being used to limit the occupation of shared cache resources by stack traffic forwarded through the stack port; counting the packet loss amount of in-board traffic in a current control period; comparing the packet loss amount of in-board traffic in the current control period with the packet loss amount of in-board traffic in a previous control period to determine the packet loss trend of in-board traffic; adjusting the discard waterline corresponding to the stack port based on the packet loss trend; and controlling the occupation of shared cache resources by stack traffic based on the adjusted discard waterline. The present disclosure can improve the allocation state of shared cache resources between in-board traffic and stack traffic without increasing the bandwidth of stack ports and the number of stack ports, and can balance the in-board traffic forwarding reliability and inter-board traffic forwarding capability.

Description

Technical Field

[0001] This disclosure belongs to the field of communication technology, specifically relating to a buffer occupancy control method, apparatus, system, device, medium, and program product. Background Technology

[0002] Switch stacking technology can logically virtualize multiple physical switches into a single device, and is commonly used in network scenarios such as enterprise networks and data center access layers. Multiple switches that make up a stacking system are usually interconnected through stacking ports, and each stack member device logically presents itself as a unified switching device to the outside world, thereby facilitating unified management of port, link, and forwarding table entry resources.

[0003] In a stacking system, packet forwarding typically includes intra-board forwarding and inter-board forwarding. Intra-board forwarding refers to the ingress and egress ports of a packet being located within the same stack member device, and the forwarding process is similar to that within a single switch. Inter-board forwarding refers to the forwarding of a packet from one stack member device to another, which usually requires transmission through stacking ports and includes a stack header for identification, scheduling, or synchronization between stack members.

[0004] In inter-board forwarding scenarios, stacking packet headers increases packet length. If the original packet length is large and the inbound traffic remains at a high rate, the actual traffic that the stacked port needs to carry outward will be higher than the original inbound traffic due to the additional overhead of the stacked packet header. If the bandwidth of the receiving port and the stacked output port are the same, and the receiving port continuously receives packets at near-line speed, the stacked output port is prone to untimely scheduling, increased packet queuing time, and outbound congestion. This type of congestion not only manifests as increased forwarding pressure on the stacked port itself, but also further affects the occupancy of the switch's internal buffer resources. Summary of the Invention

[0005] Switches typically go through processes such as buffer allocation, scheduling and forwarding, and buffer release when forwarding packets. After a packet enters the switch, it first requests buffer resources. Once the buffer is successfully allocated, it enters the corresponding queue to await scheduling. After the packet is forwarded from the outgoing port, the occupied buffer resources are released. Because the total amount of buffer resources on a switch is limited, multiple ports or multiple queues usually share the same type of buffer resources.

[0006] When a stacking port is congested for an extended period due to insufficient egress bandwidth, packets forwarded through the stacking port will remain stuck in the cache, causing stacking traffic to consume a significant amount of shared cache resources. In this situation, even if some intra-board traffic does not actually pass through the stacking port, it may still fail to obtain sufficient cache resources due to the large amount of shared cache resources being occupied by stacking traffic, leading to cache allocation failures and packet drops.

[0007] In existing deployments, to alleviate the forwarding pressure on stacked ports, higher bandwidth ports are typically selected as stacked ports, or multiple ports are configured as stacked port groups to distribute inter-board traffic. Using higher bandwidth ports requires the use of higher-specification optical modules and hardware designs, resulting in higher equipment costs and design complexity, and limiting product expansion flexibility.

[0008] Using multiple ports as a stacked port group will occupy physical ports that could originally be used for external data forwarding, reducing the number of external service ports of the entire machine. In the forwarding of the stacked port group, the traffic between boards may also be concentrated in some stacked ports due to uneven hash distribution, causing some stacked ports to become congested and lose packets, while other stacked ports remain in a relatively idle state, making it difficult to fully utilize the overall utilization rate of the port group.

[0009] Therefore, under conditions of limited stacking port speed, consistently high stacking traffic, or sudden bursts of intra-board traffic, the continuous occupation of shared cache resources by stacking ports can easily affect the normal cache allocation of intra-board traffic, leading to unnecessary packet loss. Existing methods that rely on increasing stacking port bandwidth or the number of stacking ports introduce problems such as hardware costs, port resource consumption, and uneven port group utilization, and still cannot simultaneously meet the needs of inter-board forwarding and ensure the cache guarantee of normal intra-board traffic.

[0010] To address the aforementioned technical problems, the purpose of this disclosure is to provide a method, apparatus, system, device, medium, and program product for controlling buffer occupancy, which can improve packet forwarding efficiency without increasing the stacking port rate and number.

[0011] To achieve the above objectives, the technical solution provided in this disclosure is as follows:

[0012] In a first aspect, this disclosure provides a method for controlling the occupancy of a stacking port buffer, applied to a stacking member device in a switch stacking system. The stacking member device includes shared buffer resources and at least one stacking port. The method includes: obtaining a drop waterline corresponding to the stacking port, the drop waterline being used to limit the occupancy of shared buffer resources by stacking traffic forwarded through the stacking port; calculating the packet loss amount of in-board traffic in the current control period; comparing the packet loss amount of in-board traffic in the current control period with the packet loss amount of in-board traffic in the previous control period to determine the packet loss trend of in-board traffic; adjusting the drop waterline corresponding to the stacking port based on the packet loss trend; and controlling the occupancy of shared buffer resources by the stacking traffic based on the adjusted drop waterline.

[0013] In one or more embodiments, adjusting the drop threshold corresponding to the stacked port based on the packet loss trend includes: lowering the drop threshold when the packet loss of the in-board traffic in the current control period is greater than the product of the packet loss of the in-board traffic in the previous control period and a first threshold; raising the drop threshold when the packet loss of the in-board traffic in the current control period is less than the product of the packet loss of the in-board traffic in the previous control period and a second threshold; and keeping the drop threshold unchanged when the packet loss of the in-board traffic in the current control period is neither greater than the product of the packet loss of the in-board traffic in the previous control period and the first threshold, nor less than the product of the packet loss of the in-board traffic in the previous control period and the second threshold; wherein the first threshold is greater than 1, and the second threshold is less than 1.

[0014] In one or more embodiments, adjusting the drop threshold corresponding to the stacked port based on the packet loss trend includes: lowering the drop threshold when Dcur > (1+alpha)×Dpre; raising the drop threshold when Dcur < (1-alpha)×Dpre; and keeping the drop threshold unchanged when (1-alpha)×Dpre ≤ Dcur ≤ (1+alpha)×Dpre; wherein Dcur is the packet loss amount of the in-board traffic in the current control cycle, Dpre is the packet loss amount of the in-board traffic in the previous control cycle, and alpha is a preset tolerance ratio.

[0015] In one or more embodiments, before obtaining the drop waterline corresponding to the stacked port, the method further includes: obtaining the total cache amount of the shared cache resources; determining the initial value of the drop waterline based on the total cache amount, wherein the initial value of the drop waterline is the product of the total cache amount and a preset ratio value, the preset ratio value being greater than 0 and less than 1.

[0016] In one or more embodiments, when adjusting the drop line corresponding to the stacking port, the adjusted drop line is positioned between a preset lower limit and a preset upper limit, wherein the preset lower limit and the preset upper limit are both determined based on the total cache size of the shared cache resource, the preset lower limit is greater than 0, and the preset upper limit is less than the total cache size of the shared cache resource.

[0017] In one or more embodiments, adjusting the drop threshold corresponding to the stacking port based on the packet loss trend includes: when the packet loss trend indicates an increase in packet loss, determining a new drop threshold based on the drop threshold before adjustment and the preset lower limit value, and updating the drop threshold before adjustment to the new preset upper limit value; when the packet loss trend indicates a decrease in packet loss, determining a new drop threshold based on the drop threshold before adjustment and the preset upper limit value, and updating the drop threshold before adjustment to the new preset lower limit value.

[0018] In one or more embodiments, determining a new discard line based on the previous discard line and the preset lower limit value includes: determining the average of the previous discard line and the preset lower limit value as the new discard line; and / or, determining a new discard line based on the previous discard line and the preset upper limit value includes: determining the average of the previous discard line and the preset upper limit value as the new discard line.

[0019] In one or more embodiments, the packet loss of onboard traffic within the current control period includes: within the current control period, counting the number of packets lost due to the failure of the shared cache resource allocation for the corresponding packets of onboard traffic; and using the number of lost packets as the packet loss of onboard traffic within the current control period.

[0020] In one or more embodiments, controlling the stack traffic's occupation of shared cache resources based on an adjusted drop waterline includes: upon receiving a packet to be forwarded through the stack port, determining the packet's cache requirement; obtaining the amount of shared cache already occupied by the stack traffic forwarded through the stack port; and restricting the packet's occupation of the shared cache resources when the sum of the occupied cache amount and the cache requirement is greater than the adjusted drop waterline, wherein restricting the packet's occupation of the shared cache resources includes discarding the packet or refusing to allocate cache for the packet.

[0021] In one or more embodiments, determining the cache requirement of the message includes: obtaining the message length and cache allocation unit size of the message; and, based on the message length and the cache allocation unit size, rounding down by the cache allocation unit to obtain the number of cache units required by the message.

[0022] Secondly, this disclosure provides a stacking port cache occupancy control device, which includes a waterline acquisition module, a packet loss statistics module, a trend determination module, a waterline adjustment module, and a cache control module. The waterline acquisition module is used to acquire the drop waterline corresponding to the stacking port, and the drop waterline is used to limit the occupancy of shared cache resources by stacking traffic forwarded through the stacking port. The packet loss statistics module is used to count the packet loss of on-board traffic in the current control period. The trend determination module is used to compare the packet loss of on-board traffic in the current control period with the packet loss of on-board traffic in the previous control period to determine the packet loss change trend of on-board traffic. The waterline adjustment module is used to adjust the drop waterline corresponding to the stacking port based on the packet loss change trend. The cache control module is used to control the occupancy of shared cache resources by the stacking traffic based on the adjusted drop waterline.

[0023] Thirdly, this disclosure provides a switch stacking system, which includes multiple stack member devices, at least two of the stack member devices being connected via stacking ports. The switch stacking system also includes a processor and shared cache resources, the processor being used for the stacking port cache occupancy control method.

[0024] Fourthly, this disclosure provides an electronic device including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the stacked port cache occupancy control method as described above.

[0025] Fifthly, this disclosure provides a computer-readable medium carrying computer-executable instructions, which, when executed by a processor, are used to implement the stacked port cache occupancy control method described above.

[0026] In a sixth aspect, this disclosure provides a computer program product including computer instructions that, when executed by a processor, implement the stacked port cache occupancy control method as described above.

[0027] The cache occupancy control method, apparatus, system, device, medium, and program products disclosed herein obtain the drop waterline corresponding to the stacking port and use the change relationship between the packet loss amount of the on-board traffic in the current control period and the packet loss amount of the on-board traffic in the previous control period as feedback basis to dynamically adjust the drop waterline corresponding to the stacking port, so that the stacking traffic forwarded through the stacking port can occupy shared cache resources according to the actual degree of impact on the on-board traffic.

[0028] When intra-board packet loss increases, the drop threshold can be lowered, reducing the upper limit of shared cache resources that stacked traffic can occupy. This reduces the continuous congestion of shared cache resources during stacked port congestion, reserving more cache allocation space for intra-board traffic and lowering the probability of packet loss due to cache allocation failure. Conversely, when intra-board packet loss decreases, the drop threshold can be raised, allowing stacked traffic to access more cache space and preventing excessive restrictions on inter-board forwarding.

[0029] Therefore, this disclosure can improve the allocation of shared cache resources between intra-board traffic and stacked traffic without increasing the stacked port bandwidth and the number of stacked ports, while taking into account both intra-board traffic forwarding reliability and inter-board traffic forwarding capability. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments recorded in this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a schematic diagram of a switch stacking system according to an embodiment of the present disclosure;

[0032] Figure 2 This is a flowchart of a stacked port cache occupancy control method in one embodiment of the present disclosure;

[0033] Figure 3 This is a schematic diagram illustrating the changes in the switch cache in one embodiment of this disclosure;

[0034] Figure 4 This is a schematic diagram of the adjustment logic for discarding water lines in one embodiment of this disclosure;

[0035] Figure 5 This is a schematic diagram of a stacked port buffer occupancy control device in one embodiment of the present disclosure;

[0036] Figure 6 This is a schematic diagram of an electronic device according to an embodiment of the present disclosure. Detailed Implementation

[0037] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0038] A switch stacking system connects multiple stack member devices through stacking ports, enabling multiple physical devices to work collaboratively logically. While analyzing the packet forwarding process of the stacking system, the inventors discovered that although inter-board traffic and intra-board traffic differ in their forwarding paths, both consume buffer resources within the device. Inter-board traffic needs to be forwarded through the stacking port. When stacking port bandwidth is limited, traffic is consistently high, or packet encapsulation overhead increases, continuous queuing can easily occur at the stacking port, causing stacked traffic to occupy buffer resources for extended periods. Since buffer resources are limited in total quantity, the continuous occupation of buffer space by stacked traffic will compress the buffer space available for other traffic, meaning that even intra-board traffic that does not pass through the stacking port may experience packet loss due to insufficient buffer resources.

[0039] Existing technologies typically mitigate these problems by improving the carrying capacity of stacked ports, such as increasing stacked port bandwidth or increasing the number of stacked ports. However, these methods rely on hardware resource expansion, which can easily increase equipment costs, occupy port resources that could originally be used for service forwarding, and may also be affected by uneven traffic distribution in multi-stacked port scenarios.

[0040] Based on the above understanding, this disclosure addresses the issue of cache resource contention and establishes a cache occupancy constraint scheme for stacked ports. This scheme treats the stacked traffic's ability to occupy cache resources as an adjustable parameter, appropriately constraining stacked traffic when cache resources are scarce. This prevents stacked ports from excessively consuming cache resources due to continuous congestion and reserves necessary cache space for onboard traffic.

[0041] Furthermore, fixed buffer occupancy constraints are difficult to adapt to changes in traffic conditions within a stacked system. If the constraints are too loose, stacked traffic may still consume excessive buffer resources. If the constraints are too tight, inter-board forwarding capabilities may be unnecessarily suppressed. Therefore, this disclosure uses the degree of impact on intra-board traffic as a feedback basis, allowing the buffer occupancy capacity of the stacked ports to adjust according to changes in system operating conditions. When intra-board traffic is more severely affected by buffer resource contention, the buffer occupancy capacity of the stacked traffic is tightened. When the impact on intra-board traffic lessens, the buffer occupancy capacity of the stacked traffic is appropriately released. When the system state is relatively stable, the current control state is maintained to avoid frequent fluctuations.

[0042] Through the above technical solution, this disclosure establishes a cache resource coordination mechanism based on operational feedback between stacked traffic and intra-board traffic. This mechanism can also dynamically adjust the cache resource occupancy boundary of stacked traffic according to the actual impact on intra-board traffic. Therefore, without relying on hardware expansion, it can mitigate the impact of continuous congestion on stacked ports on normal intra-board forwarding, reduce the probability of packet loss due to insufficient cache resources, and balance inter-board forwarding needs with intra-board traffic protection.

[0043] Please refer to Figure 1 As shown, the switch stacking system 100 is used to logically combine multiple stack member devices 101 into a switching device. The multiple stack member devices 101 can each carry different access ports or service ports, and at least two stack member devices 101 are connected through a stacking port 102, enabling inter-board packets to be transmitted between different stack member devices 101 via the stacking port 102. From the perspective of external network devices, the switch stacking system 100 can appear as a single logical switching device with unified management and forwarding.

[0044] Stack member devices 101 can be physical switches, switching boards, or network devices with switching capabilities. Each stack member device 101 may include service ports, stacking ports 102, processors, and shared buffer resources. Service ports are used to receive or send ordinary service packets. Stacking ports 102 are used to connect to other stack member devices 101 and handle inter-board traffic forwarding. Processors are used to run logic related to stack management, traffic statistics, drop-through adjustment, and buffer occupancy control. Shared buffer resources are used to provide temporary storage space for packets after they enter the stack member device 101, allowing packets to wait for scheduling and be sent out from the corresponding outgoing port.

[0045] In one use case, after a packet enters the switch stacking system 100 from the service port of a stacking member device 101, the switch stacking system 100 determines the location of the outgoing port based on the packet's destination information. When the outgoing port is located within the same stacking member device 101, the packet forms intra-board traffic, and the packet can complete buffer allocation, scheduling, forwarding, and buffer release within the local stacking member device 101. When the outgoing port is located in another stacking member device 101, the packet forms stacked traffic, and the packet needs to enter the stacking link via stacking port 102, and then be forwarded by the other stacking member device 101 to the corresponding outgoing port.

[0046] Shared cache resources can be used by both intra-board traffic and stacked traffic. When stacked traffic is continuously queued at stacking port 102, it will occupy a significant amount of cache space in the shared cache resources. If stacked traffic occupies the shared cache resources for an extended period, intra-board traffic may not be able to secure sufficient cache space upon entering the same stack member device 101, leading to packet loss. To address this, the processor can execute the stacking port cache occupancy control method provided in this disclosure to obtain the drop waterline corresponding to stacking port 102 and adjust the drop waterline based on the packet loss trend of intra-board traffic, thereby subjecting stacked traffic forwarded via stacking port 102 to cache occupancy constraints.

[0047] The processor can periodically count the packet loss of on-board traffic and compare the packet loss in the current control cycle with that in the previous control cycle. When on-board packet loss increases, the processor can lower the drop threshold corresponding to stack port 102 to reduce the stacked traffic's occupation of shared cache resources. When on-board packet loss decreases, the processor can raise the drop threshold corresponding to stack port 102 to allow stacked traffic to obtain more cache space. When the on-board packet loss changes are within a stable range, the processor can keep the current drop threshold unchanged, thereby avoiding frequent adjustments due to short-term fluctuations.

[0048] With the above architecture, the switch stacking system 100 can dynamically constrain the buffer usage capacity of stacked traffic when stacked traffic competes with intra-board traffic for shared buffer resources without increasing the number of stacking ports 102 or improving the hardware bandwidth of the stacking ports 102. This architecture can mitigate the collateral impact of continuous congestion of stacking ports 102 on intra-board traffic forwarding, reduce the probability of packet loss due to insufficient shared buffer resources, and enable stack member devices 101 to achieve a more reasonable buffer allocation state between inter-board forwarding capacity and intra-board traffic protection.

[0049] Please refer to Figure 2 The diagram shown is a flowchart of a method for controlling the occupancy of a superimposed port cache according to an embodiment of this disclosure. The method specifically includes the following steps:

[0050] S201: Obtain the drop waterline corresponding to the stack port, the drop waterline being used to limit the stack traffic forwarded through the stack port from occupying shared cache resources.

[0051] Obtaining the drop threshold corresponding to the stacking port can be understood as acquiring the cache occupancy threshold corresponding to the stacking port when a stack member device starts up, the stacking port is added to the stack, the cache management policy takes effect, or the control period begins. This drop threshold is used to limit the upper limit of shared cache resources that stack traffic forwarded through the stacking port can occupy, and it can be expressed in the form of the number of cache units, cache capacity ratio, or queue threshold.

[0052] Shared buffer resources typically consist of multiple buffer units. Both onboard traffic and stacked traffic can request these shared buffer resources to temporarily store packets awaiting forwarding. The drop waterline indicates the boundary that stacked traffic is allowed to occupy in the shared buffer resource. When the amount of buffer space occupied by stacked traffic reaches or exceeds this boundary, subsequent packets forwarded via the stacked port can be restricted from continuing to occupy the shared buffer resource, for example, by being dropped, delayed in reception, denied buffer allocation, or entering a restricted state according to a preset queue management policy.

[0053] Stacked traffic refers to packet traffic that needs to be transmitted between different stack member devices via stacking ports. Specifically, when a packet enters the switch stacking system from one stack member device, if the packet's egress port is located in another stack member device, the packet needs to be forwarded to the target stack member device through stacking ports and stacking links. Such packets form stacked traffic. Stacked traffic differs from intra-board traffic. Intra-board traffic has its ingress and egress ports located in the same stack member device and typically does not need to be transmitted across devices via stacking ports. When stacked traffic queues for a long time at the stacking ports, it continuously occupies shared buffer resources, thereby compressing the buffer space that intra-board traffic can allocate.

[0054] In one implementation, the drop threshold can be read by the processor from a local configuration file, stack management table, port attribute table, queue management table, or switch chip register. Stack member devices can configure an initial drop threshold for each stack port after the stack system is established. This initial drop threshold can be determined based on the total amount of shared cache resources. For example, if the total amount of shared cache resources is B, the initial drop threshold corresponding to the stack port can be set to a preset proportion of B. The preset proportion can be determined based on the device model, stack port bandwidth, number of service ports, historical traffic characteristics, or user configuration. The drop threshold may also not be a fixed value, but rather a value adjusted from the previous control cycle. At the beginning of the current control cycle, the processor reads the drop threshold saved in the previous control cycle and uses this drop threshold as the benchmark for stack traffic cache occupancy control in the current control cycle.

[0055] In another implementation, multiple stacked ports can each correspond to a different dropwater, or multiple stacked ports can form a stacked port group and share a single dropwater. If multiple stacked ports are connected to different stack member devices, the processor can obtain the corresponding dropwater based on the actual traffic, port rate, queue status, or congestion level of each stacked port. If multiple stacked ports act as the same stacked port group for inter-board forwarding, the processor can obtain the dropwater corresponding to the port group and use this dropwater to limit the total stacked traffic of the entire port group's consumption of shared cache resources. This design can adapt to both single-stacked port and multi-stacked port scenarios, avoiding limiting cache control logic to a single-port structure.

[0056] For example, a stack member device may have a total shared cache resource of 100,000 cells, and the drop waterline for the stack port may be 50,000 cells. If the stack traffic forwarded through the stack port has already occupied 48,000 cells, and the current packet to be forwarded requires 100 cells, then after the packet enters the cache, the total stack traffic usage will still not exceed the drop waterline, and the processor or switching chip can allow the allocation of shared cache resources for the packet. If the stack traffic has already occupied 49,980 cells, and the current packet to be forwarded requires 100 cells, then after the packet enters the cache, the total stack traffic usage will exceed 50,000 cells. In this case, the packet can be restricted from continuing to occupy shared cache resources. In this way, even if the stack port experiences continuous congestion, it is difficult for it to continue to occupy shared cache resources indefinitely, and the on-board traffic can still obtain relatively stable cache request space.

[0057] In one exemplary embodiment, before obtaining the drop waterline corresponding to the stacked port, the method further includes: obtaining the total cache amount of the shared cache resources; determining the initial value of the drop waterline based on the total cache amount, wherein the initial value of the drop waterline is the product of the total cache amount and a preset ratio value, the preset ratio value being greater than 0 and less than 1.

[0058] The total cache size of shared cache resources can be understood as the cache capacity available for packet forwarding in the stacked member devices. It can be expressed in terms of the number of cache units, byte capacity, or internal queue cache quota of the switching chip. Since switches typically allocate cache units rather than individual bytes when forwarding packets, the total cache size of shared cache resources can also be expressed in terms of the number of cells.

[0059] The initial value of the drop threshold is the initial threshold used when stack port buffer occupancy control begins. This initial value limits the range of shared buffer resources that stack traffic forwarded via the stack port can occupy in the initial state. If the initial value is too large, stack traffic may still occupy too much shared buffer resources in the early stages of control, squeezing the buffer allocation space for traffic within the board. If the initial value is too small, stack traffic will be restricted prematurely, unnecessarily suppressing inter-board forwarding capabilities. Setting the initial value of the drop threshold to the product of the total buffer capacity and a preset ratio allows the initial drop threshold to vary with the actual scale of the shared buffer resources, avoiding control deviations caused by using the same fixed value for stack member devices of different models and buffer capacities.

[0060] A preset ratio value greater than 0 and less than 1 indicates that the initial value of the drop waterline is between 0 and the total cache size. A preset ratio value greater than 0 prevents stacked traffic from being unable to occupy shared cache resources in the initial state. A preset ratio value less than 1 prevents stacked traffic from having the ability to fill all shared cache resources in the initial state. Through this restriction, the initial drop waterline will not fall into two extreme states: it will neither completely prohibit stacked traffic from entering the cache nor allow stacked traffic to occupy all shared cache resources without limit, thus leaving room for adjustment in subsequent dynamic settings.

[0061] In one implementation, the processor can read the total cache amount of the shared cache resource when a stack member device starts up, the stack system is established, the stack port is enabled, or a cache control policy is loaded. The total cache amount can come from switch chip registers, device hardware specifications, cache management modules, queue management configuration tables, or system configuration files. After obtaining the total cache amount, the processor can read a preset percentage value and multiply the total cache amount by the preset percentage value to obtain the initial value of the drop threshold. The processor can then write this initial value into the queue threshold table, port cache control table, or switch chip register corresponding to the stack port, so that subsequent stack traffic forwarded through the stack port is subject to cache occupancy limits according to this initial value.

[0062] In another implementation, the preset ratio value can be configured according to the service scenario of the stack member devices. If the stack member devices mainly handle inter-board traffic forwarding and the intra-board traffic pressure is relatively low, the preset ratio value can be set relatively high, allowing the stacked traffic to obtain a larger cache usage space in the initial stage. If the stack member devices need to carry more intra-board service ports and intra-board traffic is prone to bursts, the preset ratio value can be set relatively low, allowing the shared cache resources to reserve more space for intra-board traffic in the initial stage. The preset ratio value can also be provided by the device's default policy, for example, using the default ratio when no user configuration is received, and using the user-specified ratio after receiving user configuration.

[0063] For example, if a stack member device has a total shared cache resource of 100,000 cells and a preset ratio of 0.5, then the initial value of the drop threshold is 50,000 cells. This initial value means that when the control policy takes effect, stack traffic forwarded through the stack port is allowed to occupy a maximum of approximately 50,000 cells of shared cache resource. If another stack member device has a total shared cache resource of 200,000 cells and uses the same preset ratio of 0.5, then the initial value of the drop threshold is 100,000 cells. Thus, the drop threshold can change proportionally with the total cache resource, adapting to stack member devices with different cache specifications.

[0064] S202: Statistical analysis of packet loss in the current control cycle.

[0065] The current control cycle can be understood as a time window for collecting operational status data and triggering subsequent judgments. This time window can be divided by the processor according to a preset time length, or by the stack member devices according to the number of packets, scheduling rounds, or changes in buffer status. After a control cycle ends, the packet loss data of the on-board traffic collected during that cycle can serve as the data basis for subsequent judgments on packet loss trends, and can also be used in the next control cycle as the packet loss data of the on-board traffic in the previous control cycle. The length of the control cycle can be configured according to the forwarding rate, buffer capacity, number of ports, and control precision of the stack member devices.

[0066] Intra-board traffic refers to packet traffic where both the ingress and egress ports are located within the same stack member device. After a packet enters the switch stacking system, if the destination egress port of the packet still belongs to the stack member device receiving the packet, the packet does not need to be forwarded across devices via stack ports, and such packets can be classified as intra-board traffic. Intra-board traffic differs from stack traffic, which requires transmission between different stack member devices via stack ports. Although intra-board traffic does not pass through stack ports, it still needs to request shared buffer resources after entering a stack member device, wait for forwarding scheduling, and release the buffer after forwarding is completed. When stack traffic occupies shared buffer resources for an extended period, intra-board traffic may be unable to complete buffer allocation due to insufficient shared buffer resources.

[0067] Packet loss can be understood as the number of packets lost during the control period. Packet loss can be expressed as the number of packets, the number of cache units, or the number of drop events. To ensure that the statistical results accurately reflect the impact of shared cache resource contention on onboard traffic, the packet loss count is preferably based on the number of packets lost due to shared cache resource allocation failure, queue enqueue failure, insufficient cache space, or cache management policy rejection. Drops caused by port closure, link failure, packet verification errors, access control policy filtering, protocol anomalies, etc., can be excluded from this packet loss count to avoid non-cache contention factors affecting subsequent drop level adjustments.

[0068] The number of packet losses due to shared cache resource allocation failures in intra-board traffic can be understood as the number of packets dropped by intra-board traffic within a preset statistical time window because they cannot obtain shared cache resources. This packet loss count characterizes the degree to which intra-board traffic is affected by insufficient shared cache resources within the current control period. After intra-board traffic packets enter stack member devices, they still need to request shared cache resources for temporary storage and scheduling. If the shared cache resources are already heavily occupied by other traffic, especially stack traffic forwarded through stack ports, intra-board traffic packets may not be able to obtain sufficient cache space when requesting shared cache resources. In this case, the packet will be dropped due to shared cache resource allocation failure, and this dropping event can be counted in the intra-board traffic packet loss count.

[0069] Shared cache resource allocation failure refers to a situation where, when a packet corresponding to onboard traffic enters the forwarding process of a stack member device, the cache management module is unable to allocate a cache unit that meets its caching requirements. This can occur when the remaining capacity of the shared cache resource is insufficient, or when the available cache for the queue corresponding to the onboard traffic is insufficient, the shared cache resource reaches a preset protection threshold, or the cache management policy refuses to continue allocating cache. To ensure that the statistical results accurately reflect the cache resource contention status, packet loss caused by link failure, port closure, packet verification failure, access control policy filtering, or protocol anomalies is usually not included in this packet loss count. In this way, the packet loss volume of onboard traffic in the current control period can more accurately reflect the shared cache resource allocation status, rather than including drop reasons unrelated to cache contention.

[0070] In one implementation, the processor can read the initial value of the packet loss counter corresponding to the on-board traffic at the beginning of the current control cycle and read the ending value of the packet loss counter at the end of the current control cycle. The difference between the ending value and the initial value determines the packet loss amount of the on-board traffic during the current control cycle. This packet loss counter can be maintained by a switching chip, a queue management module, a cache management module, or a driver module. After a packet enters a stack member device, the switching chip can identify whether the packet belongs to on-board traffic based on the packet's ingress and egress port identifiers. If the packet belongs to on-board traffic and is discarded due to shared cache resource allocation failure, the switching chip can increment the packet loss counter corresponding to the on-board traffic. After reading this counter, the processor can obtain the packet loss amount of the on-board traffic during the current control cycle.

[0071] In another implementation, stack member devices can maintain an on-board traffic packet loss counter and a stack traffic packet loss counter, respectively. The on-board traffic packet loss counter records packet drop information for inbound and outbound ports located on the same stack member device. The stack traffic packet loss counter records packet drop information for packets forwarded via stack ports. Step S202 only reads or calculates the increment corresponding to the on-board traffic packet loss counter to subsequently determine whether stack traffic occupying shared buffer resources has affected on-board traffic. This method avoids mistaking the packet loss status of stack traffic itself as the degree of impact on on-board traffic, ensuring that the feedback object is consistent with the control objective.

[0072] For example, the current control cycle length of a certain stack member device is 1 second. At the start of this control cycle, the cumulative packet loss count due to shared cache resource allocation failures is 1000. At the end of this control cycle, the cumulative packet loss count is 1060. The processor can determine that the packet loss of the on-board traffic during the current control cycle is 60. If the packet loss of the on-board traffic is 120 after the next control cycle, it indicates that the packet loss of the on-board traffic has increased compared to the previous control cycle, which may indicate that the shared cache resources are being over-occupied by stack traffic. In this case, the drop threshold corresponding to the stack port needs to be tightened in subsequent steps. If the packet loss of the on-board traffic decreases to 20 in the next control cycle, it indicates that the cache pressure on the on-board traffic has been reduced, and the drop threshold corresponding to the stack port can be appropriately relaxed in subsequent steps.

[0073] S203: Compare the packet loss amount of the board flow in the current control cycle with the packet loss amount of the board flow in the previous control cycle to determine the trend of packet loss change of the board flow.

[0074] The packet loss rate of onboard traffic in the current control cycle reflects the extent to which onboard traffic is affected by insufficient shared cache resources within the current time window. The packet loss rate of onboard traffic in the previous control cycle reflects the extent to which onboard traffic was affected within the previous time window. By comparing the two, the processor can determine the trend of packet loss changes in onboard traffic, thus providing a basis for subsequent adjustments to the drop lines corresponding to the stacked ports.

[0075] In this disclosure, the packet loss trend of on-board traffic can include packet loss expansion, packet loss reduction, and packet loss stabilization. If the packet loss of on-board traffic in the current control period is greater than the packet loss of on-board traffic in the previous control period, or exceeds the floating threshold corresponding to the packet loss of on-board traffic in the previous control period, it can be considered that the packet loss of on-board traffic is expanding. This situation usually indicates that the competition for shared cache resources is intensifying, and stacked traffic may occupy too much shared cache resources, leading to an increased probability of on-board traffic failing to request cache.

[0076] If the packet loss volume of on-board traffic in the current control period is less than that in the previous control period, or lower than the corresponding downward threshold for the packet loss volume in the previous control period, it can be considered that the packet loss of on-board traffic is decreasing. This usually indicates that the pressure on the cache resources of on-board traffic is reduced. If the difference between the packet loss volume of on-board traffic in the current control period and that in the previous control period is small, it can be considered that the packet loss of on-board traffic is in a stable state.

[0077] In one implementation, the processor can record the packet loss amount of the on-board traffic in the current control cycle as Dcur, and the packet loss amount of the on-board traffic in the previous control cycle as Dpre, and compare Dcur and Dpre. When Dcur is greater than Dpre, the processor determines that the packet loss trend of the on-board traffic is increasing. When Dcur is less than Dpre, the processor determines that the packet loss trend of the on-board traffic is decreasing. When Dcur equals Dpre, the processor determines that the packet loss trend of the on-board traffic is stable. This method has simple calculation logic and is suitable for scenarios with small traffic fluctuations and relatively stable packet loss statistics.

[0078] In another implementation, the processor can introduce a preset tolerance ratio to avoid frequent adjustments to the dropout line caused by short-term traffic fluctuations. The processor compares the tolerance ranges corresponding to Dcur and Dpre. If Dcur is greater than the product of Dpre and the upward floating coefficient, the processor determines that the packet loss trend of the on-board traffic is increasing packet loss. If Dcur is less than the product of Dpre and the downward floating coefficient, the processor determines that the packet loss trend of the on-board traffic is decreasing packet loss. If Dcur is between the upward and downward floating thresholds, the processor determines that the packet loss trend of the on-board traffic is stable packet loss. The upward floating coefficient can be 1 plus the preset tolerance ratio, and the downward floating coefficient can be 1 minus the preset tolerance ratio. This method can filter out slight fluctuations, making the dropout line adjustment smoother.

[0079] In another implementation, the processor can also determine the packet loss trend of intra-board traffic by combining the absolute difference. For example, the packet loss trend of intra-board traffic is considered to have changed effectively only when the difference between Dcur and Dpre is greater than a preset difference threshold. If Dcur has only one or two more packet loss events than Dpre, and this difference is within the range of statistical error or natural fluctuations in service traffic, the processor can still determine the packet loss trend of intra-board traffic as stable. This method is suitable for scenarios where the packet loss is small and proportional judgment can easily amplify small differences.

[0080] When step S203 is executed for the first time, the packet loss data for the on-board traffic in the previous control cycle may not be available. In this case, the processor can either set the packet loss data for the on-board traffic in the previous control cycle to a preset initial value, or save the packet loss data for the on-board traffic in the current control cycle obtained from the initial statistics as a baseline value, and start performing trend comparison from the next control cycle. This processing method can avoid distortion of comparison results due to missing initial data.

[0081] S204: Adjust the dropout line corresponding to the stacking port based on the packet loss trend.

[0082] Understandably, a higher drop threshold allows stacked traffic forwarded through the stacking port to utilize more shared cache resources, resulting in greater cache space for stacked traffic queuing at the stacking port. Conversely, a lower drop threshold means less shared cache resources for stacked traffic, making subsequent stacked traffic more susceptible to drop, denial of cache allocation, or other cache limitations when the stacking port becomes congested.

[0083] When the packet loss trend of intra-board traffic indicates an increase in packet loss, it means that the impact of insufficient shared cache resources on intra-board traffic in the current control cycle is more significant than in the previous control cycle. This state typically indicates that stacked traffic has already occupied a large amount of shared cache resources, and the success rate of intra-board traffic requesting cache after entering stack member devices is reduced. At this time, the processor can lower the drop waterline corresponding to the stack port, reducing the upper limit of shared cache resources that stacked traffic can occupy. The lowered drop waterline will cause subsequent packets forwarded through the stack port to trigger the cache limit earlier, thereby reducing the ability of stacked traffic to continue occupying shared cache resources, freeing up or reserving more cache space for intra-board traffic.

[0084] When the packet loss trend of intra-board traffic indicates a decrease in packet loss, it means that the impact of insufficient shared buffer resources on intra-board traffic is lessening. In this state, the current drop threshold may be excessively restrictive of stacked traffic. Maintaining a low drop threshold could prematurely limit stacked traffic, impacting inter-board forwarding efficiency. In this case, the processor can increase the drop threshold corresponding to the stacking port, increasing the upper limit of shared buffer resources that stacked traffic can occupy. The increased drop threshold allows more packets forwarded via the stacking port to enter the buffer, reducing the probability of stacked traffic being dropped due to buffer limitations and allowing inter-board forwarding capabilities to recover appropriately.

[0085] When the packet loss trend of on-board traffic indicates stable packet loss, it means that the degree to which on-board traffic is affected by shared cache resource contention below the current drop threshold has neither significantly worsened nor significantly eased. In this case, the processor can maintain the drop threshold corresponding to the stacked port unchanged, keeping the cache occupancy state between stacked traffic and on-board traffic in a current balance. This approach avoids frequent changes in the drop threshold due to slight statistical fluctuations and reduces control oscillations caused by repeated tightening and loosening of stacked port cache limits.

[0086] In one implementation, the processor can pre-set the adjustment step size of the drop threshold. When the packet loss trend indicates an increase in packet loss, the processor lowers the drop threshold by the preset step size. When the packet loss trend indicates a decrease in packet loss, the processor raises the drop threshold by the preset step size. The preset step size can be a fixed number of cache units or a preset proportion of the current drop threshold or the total cache size of shared cache resources. A fixed step size is suitable for scenarios with relatively stable traffic changes. A proportional step size is suitable for stacked member devices with different cache capacities, allowing the adjustment range to vary with the device's cache size.

[0087] In another implementation, the processor can set a preset lower limit and a preset upper limit for the dropwater level. The adjusted dropwater level is maintained between the preset lower limit and the preset upper limit. The preset lower limit is used to prevent stack traffic from being excessively restricted, making it difficult for inter-board traffic to obtain cache space. The preset upper limit is used to prevent stack traffic from consuming too much shared cache resources, causing the cache allocation space for intra-board traffic to be squeezed. Through the preset lower limit and preset upper limit, the dynamic adjustment of the dropwater level can avoid two extreme states, ensuring that both stack traffic and intra-board traffic retain the necessary cache usage conditions.

[0088] In another implementation, the processor can adjust the drop threshold using a boundary convergence approach. When packet loss within the board increases, the processor determines a new drop threshold based on the current drop threshold before adjustment and a preset lower limit, and uses the current drop threshold before adjustment as the new preset upper limit. This approach indicates that the current drop threshold is too high, and a more suitable threshold needs to be found between the current drop threshold and the preset lower limit. When packet loss within the board decreases, the processor determines a new drop threshold based on the current drop threshold before adjustment and the preset upper limit, and uses the current drop threshold before adjustment as the new preset lower limit. This approach indicates that the current drop threshold is too low, and a more suitable threshold can be found between the current drop threshold and the preset upper limit. The new drop threshold can be the midpoint between the two values, or it can be a value calculated based on a preset weight between the two values.

[0089] In one exemplary embodiment, the drop threshold corresponding to the stacking port is adjusted based on the packet loss trend. Specifically, this includes lowering the drop threshold when the packet loss of the in-board traffic in the current control cycle is greater than the product of the packet loss of the in-board traffic in the previous control cycle and a first threshold; raising the drop threshold when the packet loss of the in-board traffic in the current control cycle is less than the product of the packet loss of the in-board traffic in the previous control cycle and a second threshold; and keeping the drop threshold unchanged when the packet loss of the in-board traffic in the current control cycle is neither greater than the product of the packet loss of the in-board traffic in the previous control cycle and the first threshold, nor less than the product of the packet loss of the in-board traffic in the previous control cycle and the second threshold; wherein the first threshold is greater than 1, and the second threshold is less than 1.

[0090] Multiplying the packet loss amount of the on-board traffic in the previous control cycle by the first threshold yields an upward judgment value. Only when the packet loss amount of the on-board traffic in the current control cycle exceeds this upward judgment value is it considered that the packet loss of the on-board traffic has exceeded the allowable fluctuation range and is showing an increasing trend. At this time, the number of packets dropped by the on-board traffic in the current control cycle due to insufficient shared buffer resources increases significantly, indicating that the stacked traffic may be occupying too much shared buffer resources. The processor lowers the drop waterline corresponding to the stack port, reducing the upper limit of shared buffer resources that the stacked traffic forwarded through the stack port can occupy, thereby reducing the ability of the stacked traffic to continue to crowd out shared buffer resources.

[0091] Multiplying the packet loss amount of in-board traffic in the previous control cycle by the second threshold yields a downward adjustment value. Only when the packet loss amount of in-board traffic in the current control cycle is less than this downward adjustment value is it considered that packet loss of in-board traffic has significantly decreased. At this point, the impact of insufficient shared cache resources on in-board traffic is reduced, and the current drop threshold may be too tight on stacked traffic. The processor increases the drop threshold corresponding to the stacked ports, increasing the upper limit of shared cache resources that stacked traffic can occupy, thereby restoring some of the inter-board forwarding cache capacity when the pressure on in-board traffic eases.

[0092] If the packet loss volume of the on-board traffic in the current control cycle is not greater than the product of the packet loss volume of the on-board traffic in the previous control cycle and the first threshold, and is not less than the product of the packet loss volume of the on-board traffic in the previous control cycle and the second threshold, it indicates that the current packet loss volume is between the upward and downward judgment values. This range can be understood as a stable range or a tolerable range. Although the packet loss volume of the on-board traffic may vary slightly, this variation has not reached the point where the drop threshold needs to be adjusted. Keeping the processor's drop threshold constant can avoid frequent rises and falls in the drop threshold due to short-term traffic fluctuations, statistical errors, or occasional packet loss, thus keeping the stacked port cache occupancy control stable.

[0093] In one implementation, the first threshold and the second threshold can be determined by the same tolerance ratio. For example, the first threshold is 1.1 and the second threshold is 0.9. This configuration indicates that when the packet loss of the onboard traffic in the current control cycle increases by more than 10% compared to the previous control cycle, the processor lowers the drop threshold. When the packet loss of the onboard traffic in the current control cycle decreases by more than 10% compared to the previous control cycle, the processor raises the drop threshold. If the change does not exceed 10%, the processor keeps the drop threshold unchanged. This method can maintain the current control state when the packet loss fluctuates slightly and trigger adjustments when the packet loss changes significantly.

[0094] In another implementation, the first and second thresholds can be set separately according to the business scenario. If the stack member devices prioritize ensuring in-board traffic, the first threshold can be set closer to 1, so that the drop threshold is lowered when in-board traffic packet loss increases slightly. If the stack member devices need to avoid frequently limiting stack traffic, the first threshold can be set higher, so that the system only tightens the drop threshold when in-board traffic packet loss increases significantly. The second threshold can also be set in a similar manner. The closer the second threshold is to 1, the easier it is to raise the drop threshold. The smaller the second threshold, the higher the drop threshold is raised only when in-board traffic packet loss decreases significantly.

[0095] For example, the packet loss rate of on-board traffic in the previous control cycle was 100, the first threshold was 1.2, and the second threshold was 0.8. The product of the packet loss rate and the first threshold in the previous control cycle was 120, and the product of the packet loss rate and the second threshold in the previous control cycle was 80. If the packet loss rate of on-board traffic in the current control cycle is 150, then the packet loss rate is greater than 120, the processor determines that the on-board traffic packet loss has increased, and lowers the drop threshold corresponding to the stacking port. If the packet loss rate of on-board traffic in the current control cycle is 60, then the packet loss rate is less than 80, the processor determines that the on-board traffic packet loss has decreased, and raises the drop threshold corresponding to the stacking port. If the packet loss rate of on-board traffic in the current control cycle is 95, then the packet loss rate is between 80 and 120, and the processor keeps the drop threshold unchanged.

[0096] The aforementioned scheme adjusts the drop threshold not only based on the current packet loss rate itself, but also on the magnitude of the change in the current packet loss rate relative to the previous control period. This allows for the identification of trends in the impact of shared cache resource contention on onboard traffic and the selection of appropriate adjustment directions based on these trends. Lowering the drop threshold when packet loss increases can prevent stacked traffic from consuming excessive shared cache resources. Raising the drop threshold when packet loss decreases can reduce excessive restriction on stacked traffic. Maintaining the drop threshold unchanged when packet loss changes are within a stable range can avoid ineffective adjustments.

[0097] A feedback adjustment mechanism with tolerance range is provided for stack port buffer occupancy control. The first and second thresholds form upper and lower judgment boundaries, preventing the drop waterline from changing frequently due to slight fluctuations within a single control cycle. This mechanism reduces control oscillations, enabling stack member devices to maintain a more stable resource allocation state between intra-board traffic protection and stack traffic forwarding.

[0098] In an exemplary embodiment, adjusting the drop threshold corresponding to the stacked port based on the packet loss trend includes: lowering the drop threshold when Dcur > (1+alpha)×Dpre; raising the drop threshold when Dcur < (1-alpha)×Dpre; and keeping the drop threshold unchanged when (1-alpha)×Dpre ≤ Dcur ≤ (1+alpha)×Dpre; wherein Dcur is the packet loss amount of the in-board traffic in the current control cycle, Dpre is the packet loss amount of the in-board traffic in the previous control cycle, and alpha is a preset tolerance ratio.

[0099] When adjusting the drop waterline corresponding to the stacked ports based on packet loss trends, the packet loss amount of on-board traffic in the current control cycle can be denoted as Dcur, and the packet loss amount of on-board traffic in the previous control cycle can be denoted as Dpre. A stable range fluctuating around Dpre is established using a preset tolerance ratio alpha. The upper boundary of this stable range is (1+alpha)×Dpre, and the lower boundary is (1-alpha)×Dpre. Dcur is used to characterize the degree of impact on on-board traffic due to shared cache resource contention in the current control cycle, and Dpre is used to characterize the degree of impact on on-board traffic in the previous control cycle. alpha is used to limit the allowable fluctuation range so that the drop waterline is not frequently adjusted due to slight changes in packet loss.

[0100] When Dcur > (1 + alpha) × Dpre, it indicates that the packet loss of on-board traffic in the current control cycle has exceeded the allowable upper limit of packet loss in the previous control cycle. At this time, the packet loss of on-board traffic shows an increasing trend, indicating that the shared cache resources' ability to guarantee on-board traffic is decreasing, and stacked traffic forwarded via the stacking port may be occupying too much shared cache resource. The processor can lower the drop waterline corresponding to the stacking port, reducing the upper limit of shared cache resource that stacked traffic can occupy. The lowered drop waterline allows subsequent stacked traffic to trigger cache limits earlier, thereby reducing the ability of stacked traffic to continue crowding out shared cache resources and reserving more cache allocation space for on-board traffic.

[0101] When Dcur < (1-alpha) × Dpre, it indicates that the packet loss rate of intra-board traffic in the current control cycle is lower than the allowable range for packet loss in the previous control cycle. At this time, the packet loss rate of intra-board traffic shows a decreasing trend, indicating that the impact of insufficient shared buffer resources on intra-board traffic is lessened. The current drop waterline may be too tight on stacked traffic. The processor can increase the drop waterline corresponding to the stacking port, thereby increasing the upper limit of shared buffer resources that stacked traffic can occupy. The increased drop waterline allows more packets forwarded through the stacking port to enter the shared buffer resources, reducing the probability of stacked traffic being dropped due to buffer limitations and allowing inter-board forwarding capabilities to be appropriately restored.

[0102] When (1-alpha)×Dpre≤Dcur≤(1+alpha)×Dpre, it indicates that the packet loss of on-board traffic in the current control cycle is within the tolerance range formed by the packet loss of the previous control cycle. In this state, although the packet loss of on-board traffic may increase or decrease slightly, this change is still within the allowable fluctuation range and is insufficient to indicate a significant change in the shared cache resource contention state. The processor can maintain the drop waterline corresponding to the stacked ports unchanged, keeping the cache resource allocation state between stacked traffic and on-board traffic at the current level. This processing method can reduce erroneous adjustments caused by short-term bursts, statistical jitter, or occasional packet loss.

[0103] The preset tolerance ratio alpha can be set based on device cache capacity, port speed, service traffic characteristics, and control sensitivity. alpha is generally set within 0.1, such as 0.05 or 0.1. A smaller alpha results in a narrower stability range, making the processor more sensitive to changes in packet loss within the board, and the drop threshold is easier to adjust. A larger alpha results in a wider stability range, higher tolerance for short-term fluctuations, and a lower frequency of drop threshold adjustments. In practical applications, an appropriate alpha can be selected based on the requirements of stack member devices for ensuring in-board traffic. When in-board services are sensitive to packet loss, a smaller alpha can be used to allow the drop threshold to respond more quickly to increased packet loss. When stack traffic fluctuates frequently, a relatively larger alpha can be used to reduce repeated changes in the drop threshold.

[0104] In one implementation, the processor can read Dcur at the end of each control cycle and read Dpre from the historical record, then calculate (1+alpha)×Dpre and (1-alpha)×Dpre based on alpha. The processor compares Dcur with the two boundary values ​​to determine whether to lower the drop threshold, raise the drop threshold, or keep the drop threshold unchanged. After making the determination, the processor can save the packet loss amount of the on-board flow in the current control cycle as a new Dpre for use in the next control cycle. This method allows each control cycle to use the actual packet loss state of the previous control cycle as a benchmark, forming a continuous feedback adjustment process.

[0105] In one exemplary embodiment, when adjusting the drop line corresponding to the stacking port, the adjusted drop line is positioned between a preset lower limit and a preset upper limit. The preset lower limit and the preset upper limit are both determined based on the total cache size of the shared cache resource. The preset lower limit is greater than 0, and the preset upper limit is less than the total cache size of the shared cache resource.

[0106] The drop waterline is used to limit the shared cache resources consumed by stacked traffic forwarded through the stacking port. If the drop waterline is set too low, there will be too few shared cache resources available for stacked traffic, and inter-board packets may be dropped prematurely at the stacking port or fail to be cached. If the drop waterline is set too high, stacked traffic may still consume too many shared cache resources, and intra-board traffic may still experience packet loss when requesting cache due to insufficient shared cache resources. By setting preset lower and upper limits, the drop waterline can be kept within a reasonable range, preventing the adjustment result from falling into extreme states.

[0107] The preset lower limit is used to define the lowest boundary to which the drop threshold can drop. A preset lower limit greater than 0 indicates that even if packet loss within the board increases, the drop threshold corresponding to the stacking port will not be reduced to 0 or close to a state that completely prohibits stacked traffic from using shared buffer resources. This allows stacked traffic forwarded through the stacking port to retain basic buffer usage capabilities, preventing complete blockage of inter-board forwarding.

[0108] The preset upper limit is used to limit the highest boundary that the drop threshold can rise to. The preset upper limit is less than the total cache size of the shared cache resources, meaning that even if packet loss within the board decreases, the drop threshold corresponding to the stacked port will not be raised to a state equal to or close to the full capacity of the shared cache resources. This reserves some shared cache resources for within the board, preventing stacked traffic from filling up all shared cache resources during subsequent sudden or sustained congestion.

[0109] Both the preset lower and upper limits are determined based on the total cache size of the shared cache resources, allowing the boundary values ​​to vary with the actual cache size of the stack member devices. Different stack member devices may have different shared cache resources. If fixed values ​​are used as the upper and lower limits, devices with smaller cache capacities may lose in-board traffic protection due to an excessively high upper limit, while devices with larger cache capacities may have limited inter-board forwarding capabilities due to an excessively low lower or upper limit. Determining the preset lower and upper limits based on the total cache size of the shared cache resources ensures that the upper and lower limits are proportionally matched to the device's cache capacity, improving compatibility between different device models.

[0110] Specifically, adjusting the drop threshold corresponding to the stacking port based on the packet loss trend includes: when the packet loss trend indicates an increase in packet loss, determining a new drop threshold based on the drop threshold before adjustment and the preset lower limit value, and updating the drop threshold before adjustment to the new preset upper limit value; when the packet loss trend indicates a decrease in packet loss, determining a new drop threshold based on the drop threshold before adjustment and the preset upper limit value, and updating the drop threshold before adjustment to the new preset lower limit value.

[0111] When the packet loss trend indicates an increase in packet loss, it means that the packet loss volume of onboard traffic in the current control period has increased compared to the previous control period, and the impact of insufficient shared buffer resources on onboard traffic is becoming more severe. At this time, the drop waterline before adjustment is usually too high, and stacked traffic forwarded through the stacking port is still allowed to occupy a significant amount of shared buffer resources. To reduce the continued occupation of shared buffer resources by stacked traffic, a new drop waterline can be determined based on the drop waterline before adjustment and a preset lower limit. This new drop waterline should be lower than the drop waterline before adjustment and higher than or equal to the preset lower limit. In this way, the upper limit of shared buffer resources that stacked traffic can occupy is tightened, and subsequent packets forwarded through the stacking port are subject to buffer occupancy limits earlier, allowing onboard traffic to obtain more buffer allocation space.

[0112] During this adjustment process, the pre-adjustment drop threshold is used as the new preset upper limit, which can be understood as a re-convergence of the subsequent adjustment range. Since the current assessment indicates that the pre-adjustment drop threshold is too high, allowing it to return above this value could again lead to excessive shared cache resource consumption by stacked traffic. Therefore, the pre-adjustment drop threshold can be used as the new upper boundary, allowing subsequent new drop thresholds to continue searching between the preset lower limit and this upper boundary. This method can gradually narrow the adjustable range of the drop threshold, causing the control process to converge towards reducing packet loss within the board.

[0113] When the packet loss trend indicates a decrease in packet loss, it means that the packet loss of intra-board traffic in the current control cycle is lower than in the previous control cycle, and the impact of insufficient shared cache resources on intra-board traffic is lessening. At this time, the drop waterline before adjustment may be too low, stacking traffic is strongly restricted, and inter-board forwarding may not be able to fully utilize shared cache resources. To reduce excessive suppression of stacking traffic, a new drop waterline can be determined based on the drop waterline before adjustment and the preset upper limit value. The new drop waterline should be higher than the drop waterline before adjustment and lower than or equal to the preset upper limit value. In this way, the upper limit of shared cache resources that stacking traffic can occupy is appropriately relaxed, and stacking ports can obtain more cache capacity in subsequent control cycles.

[0114] During this adjustment process, the pre-adjustment dropout threshold is used as the new preset lower limit, which can be understood as a re-convergence of the subsequent adjustment range. Since the current assessment indicates that the pre-adjustment dropout threshold is too low, allowing it to fall below this value further could excessively restrict stacking traffic. Therefore, the pre-adjustment dropout threshold can be used as the new lower boundary, allowing subsequent new dropout thresholds to continue searching between this lower boundary and the preset upper limit. This method gradually narrows the adjustable range of the dropout threshold, adjusting the control process towards a balance between ensuring intra-board traffic flow and inter-board traffic forwarding.

[0115] In one implementation, the processor can perform a boundary update and drop threshold update after each control cycle, based on the packet loss trend of the on-board traffic. If packet loss increases, the processor first saves the drop threshold before adjustment, then calculates a new drop threshold based on the previous drop threshold and the current preset lower limit, and uses the saved drop threshold as the new preset upper limit. If packet loss decreases, the processor first saves the drop threshold before adjustment, then calculates a new drop threshold based on the previous drop threshold and the current preset upper limit, and uses the saved drop threshold as the new preset lower limit. The new drop threshold can be written to the port cache control table, queue threshold table, cache management module, or switching chip register, so that subsequent stacked traffic is subject to cache occupancy control according to the updated drop threshold.

[0116] In one exemplary embodiment, determining a new discard line based on the previous discard line and the preset lower limit value includes: determining the average of the previous discard line and the preset lower limit value as the new discard line; and / or, determining a new discard line based on the previous discard line and the preset upper limit value includes: determining the average of the previous discard line and the preset upper limit value as the new discard line.

[0117] The new drop waterline is determined by averaging the original drop waterline and the preset lower limit. This can be understood as lowering the upper limit of cache usage for stacked ports when intra-board traffic packet loss increases. The original drop waterline represents the upper limit of shared cache resources that stacked traffic was originally allowed to occupy during the current control cycle. The preset lower limit represents the lowest boundary to which the drop waterline can be reduced. When intra-board traffic packet loss increases, it indicates that the original drop waterline may be too high, and the ability of stacked traffic to occupy shared cache resources needs to be reduced. In this case, instead of directly reducing the drop waterline to the preset lower limit, the new drop waterline is taken by averaging the original drop waterline and the preset lower limit. This allows the upper limit of cache usage for stacked traffic to be appropriately reduced, avoiding an excessive one-time reduction that could overly affect inter-board forwarding.

[0118] For example, the total cache size of the shared cache resources for stacked member devices is 100,000 cells, with a preset lower limit of 10,000 cells. The original drop waterline was 50,000 cells. When the packet loss trend of the on-board traffic indicates an increase in packet loss, the average of 50,000 cells and 10,000 cells, 30,000 cells, can be determined as the new drop waterline. This new drop waterline is lower than the original drop waterline, ensuring that subsequent stacked traffic forwarded via the stacking port can only occupy shared cache resources at a maximum boundary of 30,000 cells. This adjustment can compress the cache space occupied by stacked traffic and free up more cache allocation space for on-board traffic.

[0119] The new drop threshold is determined by averaging the previous drop threshold and the preset upper limit. This can be understood as converging the upper limit of cache usage for stacked ports towards a higher level when intra-board traffic packet loss decreases. The preset upper limit represents the highest boundary that the drop threshold can be raised to. When intra-board traffic packet loss decreases, it indicates that the impact of insufficient shared cache resources on intra-board traffic is lessened, and the previous drop threshold may have been too restrictive on stacked traffic. In this case, instead of directly raising the drop threshold to the preset upper limit, the average of the previous drop threshold and the preset upper limit is used as the new drop threshold. This allows for the gradual release of cache usage capacity for stacked traffic, avoiding a large one-time increase that would further squeeze the intra-board traffic cache space.

[0120] For example, the preset upper limit is 50,000 cells, and the previous drop threshold was 30,000 cells. When the packet loss trend of intra-board traffic indicates a decrease in packet loss, the average of 30,000 cells and 50,000 cells, 40,000 cells, can be determined as the new drop threshold. The new drop threshold is higher than the previous drop threshold, allowing stacked traffic forwarded through stacked ports to occupy more shared buffer resources. This adjustment can restore the buffer capacity of inter-board traffic when intra-board traffic pressure decreases, reducing the possibility of stacked traffic being prematurely limited due to an excessively low threshold.

[0121] In one implementation, the processor can first save the drop threshold before adjustment, and then select the corresponding boundary value based on the packet loss trend of the on-board traffic. If packet loss increases, the processor reads a preset lower limit value and calculates the average of the drop threshold before adjustment and the preset lower limit value, using this average value as the new drop threshold. If packet loss decreases, the processor reads a preset upper limit value and calculates the average of the drop threshold before adjustment and the preset upper limit value, using this average value as the new drop threshold. The new drop threshold can be written to the port cache control table, queue threshold table, cache management module, or switching chip register, so that subsequent stacked traffic is controlled according to the new cache occupancy boundary.

[0122] S205: Based on the adjusted drop-off waterline, control the stacked traffic's usage of shared cache resources.

[0123] The adjusted drop threshold can be understood as the upper limit of stacked traffic buffer usage determined at the end of the current control cycle. When stacked traffic needs to request shared buffer resources in subsequent forwarding, stack member devices can compare the buffer amount already occupied by the stacked traffic, the buffer amount required by the current packet, and the adjusted drop threshold, and decide whether to allow the current packet to continue occupying shared buffer resources based on the comparison result. In this way, the aforementioned dynamic adjustment result can be translated into actual packet buffer control actions.

[0124] In one implementation, the processor can write the adjusted drop threshold into the port cache control table, queue threshold table, cache management module, or switch chip register corresponding to the stack port. When the switch chip receives a packet to be forwarded through the stack port, it identifies whether the packet belongs to stack traffic. If the packet needs to be forwarded to other stack member devices through the stack port, the switch chip obtains the shared cache resources currently occupied by the stack traffic and calculates the cache requirement corresponding to the packet. If the sum of the cache currently occupied by the stack traffic and the cache requirement corresponding to the packet does not exceed the adjusted drop threshold, shared cache resources can be allocated to the packet, allowing the packet to enter the corresponding queue for scheduling. If the sum exceeds the adjusted drop threshold, the packet can be restricted from continuing to occupy shared cache resources.

[0125] Limiting the consumption of shared cache resources by stacked traffic can be achieved in several ways. Stack member devices can directly drop stacked traffic packets exceeding the adjusted drop waterline, or refuse to allocate shared cache resources to such packets, preventing them from entering the cache queue corresponding to the stacked port. Stack member devices can also implement differentiated restrictions based on packet priority, service type, or queue category. For example, ordinary priority stacked traffic exceeding the adjusted drop waterline is preferentially dropped, while high-priority control packets can be processed according to higher-priority queues or retention cache policies. This allows for limiting the overall cache consumption of stacked traffic while also meeting the necessary forwarding requirements of control packets.

[0126] In another implementation, stack member devices can control shared buffer resource usage for individual stack ports or for a group of stack ports. For a single stack port, the adjusted drop waterline corresponds to the stack traffic buffer usage limit for that port. For a group of stack ports, the adjusted drop waterline can correspond to the overall stack traffic buffer usage limit for the entire group. Multiple stack ports in a group can share this limit, or sub-waterlines can be allocated within this limit based on port bandwidth, historical traffic, or queue load. This approach is adaptable to both single-link and multi-link stacking scenarios.

[0127] In one exemplary embodiment, controlling the stack traffic's occupation of shared cache resources based on an adjusted drop waterline includes: upon receiving a packet to be forwarded through the stack port, determining the packet's cache requirement; obtaining the amount of shared cache already occupied by the stack traffic forwarded through the stack port; and restricting the packet's occupation of the shared cache resources when the sum of the occupied cache amount and the cache requirement is greater than the adjusted drop waterline, wherein restricting the packet's occupation of the shared cache resources includes discarding the packet or refusing to allocate cache for the packet.

[0128] Packets awaiting forwarding via stacking ports refer to packets that, after entering a stack member device, are determined by forwarding table entries, outgoing port information, or destination member device information to require transmission to other stack member devices via the stacking port. These packets differ from intra-board traffic packets. Intra-board traffic packets have ingress and egress ports located within the same stack member device and do not require cross-stack member device transmission. Packets awaiting forwarding via stacking ports require shared buffer resources and await scheduling in the queue corresponding to the stacking port. If congestion occurs in the outgoing direction of the stacking port, these packets may remain in the shared buffer resources for an extended period, resulting in continuous occupation of shared buffer resources by stacked traffic.

[0129] Determining the cache requirement for a packet refers to determining how much shared cache resource a packet awaiting forwarding through the stacking port will occupy after entering the cache. The cache requirement can be determined based on factors such as packet length, cache allocation unit size, packet encapsulation length, and queue management rules. Since switches typically allocate cache in cache units, the cache requirement can be expressed as a number of cache units. For example, if the cache allocation unit size is 256 bytes, and a packet awaiting forwarding through the stacking port has a length of 1500 bytes after appending the stacking header, then this packet may require 6 cache units. If the hardware uses a round-up allocation method, any portion less than one cache unit will be counted as one cache unit.

[0130] Obtaining the amount of shared buffer space already occupied by stacked traffic forwarded via the stacking port refers to obtaining the amount of shared buffer resources currently occupied by stacked traffic. This shared buffer amount can be maintained by the switching chip, buffer management module, or queue management module, or it can be obtained by the processor reading the corresponding counter or register. This shared buffer amount represents the scale of buffer space already occupied by stacked port-related packets in the shared buffer resources. If this value is high, it indicates that stacked traffic has already occupied a significant amount of shared buffer resources. Continuing to allocate buffer space for new stacked traffic packets may further compress the available buffer space for traffic on the board.

[0131] When the sum of the occupied cache space and the cache demand exceeds the adjusted drop threshold, it indicates that if the current packet continues to enter the shared cache resource, the total cache usage of the stack traffic will exceed the current allowed boundary. At this time, stack member devices can limit the packet's use of shared cache resources. Limitation methods can include dropping the packet or refusing to allocate cache for the packet. Dropping the packet can be understood as discarding the packet directly before cache allocation or before enqueueing. Refusing to allocate cache for the packet can be understood as the cache management module no longer allocating cache units for the packet, preventing the packet from entering the queue corresponding to the stack port. Both methods can prevent the packet from further increasing the stack traffic's usage of shared cache resources.

[0132] In one implementation, upon receiving a packet, the switching chip identifies whether the packet belongs to the category of packets to be forwarded through the stacking port based on the packet's ingress port, egress port, and destination member device. If it belongs to this category, the switching chip calculates the packet's buffer requirement and reads the currently occupied shared buffer amount in the corresponding queue of the stacking port or the stacking traffic category. The switching chip adds the occupied buffer amount to the buffer requirement and compares the calculation result with the adjusted drop threshold. If the calculation result does not exceed the adjusted drop threshold, the switching chip allocates shared buffer resources for the packet and sends the packet to the queue corresponding to the stacking port. If the calculation result exceeds the adjusted drop threshold, the switching chip refuses to allocate buffer resources for the packet or discards the packet according to a preset drop policy.

[0133] In another implementation, the processor can write the adjusted drop threshold to the queue threshold table or port cache control table corresponding to the stacked port. When the cache management module receives a cache request for a stacked traffic packet, it directly reads the queue threshold table or port cache control table and determines whether to allow cache allocation based on the adjusted drop threshold. This method reduces the burden on the processor to participate in the judgment on a packet-by-packet basis, allowing the cache limiting logic to be completed within the switching chip or hardware queue management unit, making it more suitable for high-speed forwarding scenarios.

[0134] For example, a stack member device has an adjusted drop waterline of 30,000 cells. Currently, stack traffic forwarded via the stacking port has occupied 29,500 cells, and a packet awaiting forwarding via the stacking port requires 200 cells. Since the sum of 29,500 cells and 200 cells is 29,700 cells, which does not exceed 30,000 cells, the stack member device can allocate shared buffer resources for this packet. If stack traffic has already occupied 29,900 cells, and the current packet requires 200 cells, the sum is 30,100 cells, exceeding the adjusted drop waterline. The stack member device can either drop the packet or refuse to allocate shared buffer resources for it. Through this process, the shared buffer resource usage of stack traffic is controlled to be near the adjusted drop waterline.

[0135] For example, after the in-board traffic packet loss increases, step S204 reduces the drop threshold corresponding to the stacking port from 50,000 cells to 30,000 cells. After step S205 writes 30,000 cells into the cache control logic, the upper limit of shared cache resources that the stacking port can subsequently occupy is reduced. When stacked traffic continues to queue at the stacking port, the portion exceeding 30,000 cells will be restricted, freeing up or reserving more space in the shared cache resources for in-board traffic to request. If the in-board traffic packet loss decreases subsequently, the drop threshold can be increased, and step S205 then allows stacked traffic to obtain more cache space according to the increased drop threshold.

[0136] In a switch scenario, each packet undergoes a sequential process of buffer allocation, scheduled forwarding, and buffer release as it passes through the switch. Upon entering the switch, the switch first requests buffer resources for the packet. After successful buffer allocation, the packet enters the corresponding queue based on its priority, and the scheduler retrieves it from the queue and forwards it according to preset scheduling rules. After packet forwarding is complete, the switch releases the buffer resources occupied by the packet, allowing subsequent packets to utilize the released buffer resources.

[0137] To illustrate the process of cache resource occupancy, we can denote the entire switch cache as B (unit: cell); the total cache currently occupied by the switch as Bc (unit: cell); the cache allocation unit size as C; and the packet memory size as n (unit: byte). The cache allocation unit size C represents the smallest granularity at which the switch allocates cache resources. Switches typically do not allocate cache resources to packets per byte, but rather divide cache resources into multiple cache units and allocate cache resources to packets using these units as the basic unit. Based on the packet memory size n and the cache allocation unit size C, the amount of cache required for the packet can be determined; for example, the cache usage for the packet can be determined as (n / C+1).

[0138] During the buffer allocation phase, after receiving a packet, the switch first determines the packet's memory size *n* and then determines the corresponding buffer usage based on the buffer allocation unit size *C*. The switch then retrieves all currently used buffers *Bc* and adds *Bc* to the buffer usage corresponding to the packet. If the sum is less than the switch's total buffer *B*, the buffer allocation is successful, and the currently used buffer *Bc* is increased by the buffer usage corresponding to the packet. If the sum is not less than the switch's total buffer *B*, the buffer allocation fails, and the packet may be discarded.

[0139] During the scheduling and forwarding phase, packets successfully allocated to the buffer can enter a specific queue according to packet priority, service type, egress port, or queue attributes. The scheduler can periodically schedule packets according to round-robin scheduling, priority scheduling, weighted scheduling, or other queue scheduling rules, ensuring that packets are sent from the corresponding egress port. During the buffer release phase, after a packet is forwarded from the egress port, the switch releases the buffer resources corresponding to that packet, reducing the buffer usage of the packet by the total buffer Bc currently occupied by the switch. The released buffer resources then become available for allocation again, ready for subsequent packets to request from the switch.

[0140] In switching devices, packet buffer resources for multiple outgoing ports are typically shared. The longer port congestion lasts, the longer packets corresponding to the congested port remain in the queue, and the more buffer resources are occupied by the traffic on that port. Furthermore, the occupied buffer resources are difficult to release in time before the packets are forwarded. In switch stacking systems, when inter-board traffic is high, stacked traffic forwarded through stacking ports can easily queue at those ports. If the buffer capacity of stacking ports is not limited, prolonged congestion can lead to stacked traffic continuously consuming a large amount of buffer resources. In this case, normal intra-board traffic entering the switch may also fail to complete buffer allocation due to the already heavily occupied buffer resources, resulting in packet dropping and forwarding anomalies.

[0141] Please refer to Figure 3 As shown, to control the stacking port's ability to utilize cache resources, a drop threshold Bd can be set for the stacking port. The drop threshold Bd represents the upper limit of cache resources that the stacking traffic corresponding to the stacking port can occupy, and the unit can be a cell. The entire switch cache is still denoted as B, and the entire cache currently occupied by the switch is still denoted as Bc. If the drop threshold Bd is configured to B, in extreme cases, the stacking traffic corresponding to the stacking port may occupy all cache resources, making it difficult for intra-board traffic to obtain cache resources and potentially preventing normal forwarding. If the drop threshold Bd is configured to 0, inter-board traffic forwarded through the stacking port will have difficulty obtaining cache resources. Although intra-board traffic can exclusively utilize cache resources, inter-board forwarding capabilities will be excessively limited. The drop threshold Bd should ideally vary between 0 and B, constraining the stacking traffic's cache occupancy while ensuring that intra-board traffic retains necessary cache request space.

[0142] In some embodiments, please refer to Figure 4 As shown, to prevent the drop threshold Bd from entering extreme states of being too low or too high, a dynamic lower limit and a dynamic upper limit can be set for the drop threshold Bd. The current dynamic upper limit of the drop threshold is denoted as Bdmax, and the current dynamic lower limit is denoted as Bdmin. Bdmin can be determined based on the total buffer B of the switch and is greater than 0. Bdmax can also be determined based on the total buffer B of the switch and is less than B. For example, Bdmin can be set to 0.1B, and Bdmax can be set to 0.9B. This configuration causes the drop threshold Bd to vary between 0.1B and 0.9B, thereby preventing stacked traffic from being completely unable to utilize buffer resources, and also preventing stacked traffic from having the ability to fully utilize all buffer resources.

[0143] When dynamically adjusting the drop threshold Bd, the on-board traffic packet loss statistics for the current control period can be recorded as Dcur, the on-board traffic packet loss statistics for the previous control period as Dpre, the control period for adjusting the drop threshold Bd as ΔT, and the preset tolerance ratio as alpha. The preset tolerance ratio alpha is used to provide an allowable fluctuation range for the on-board traffic packet loss statistics, avoiding frequent adjustments to the drop threshold Bd due to small statistical fluctuations. alpha can be configured according to the business scenario, and is generally set within 0.1. The initial value of the drop threshold Bd can be determined based on the total buffer B of the switch, for example, it can be set to 0.5B, so that the initial drop threshold is between the dynamic lower limit and the dynamic upper limit.

[0144] Within each control cycle ΔT, the switch device can statistically analyze the packet loss of on-board traffic during that control cycle and use the statistical result as Dcur. The processor or cache management module can compare Dcur with Dpre. When Dcur is greater than (1+alpha)×Dpre, it indicates that the packet loss of on-board traffic in the current control cycle exceeds the allowable floating range of the previous control cycle, and the packet loss of on-board traffic is showing an increasing trend. In this case, the drop threshold Bd corresponding to the stacking port can be reduced, thereby reducing the upper limit of cache resources that stacking traffic can occupy. When using the binary adjustment method, if the current Bd is 0.5B and Bdmin is 0.1B, then the new Bd can be determined as (0.1B+0.5B) / 2, i.e., 0.3B, and the previous 0.5B can be updated to the new dynamic upper limit Bdmax.

[0145] When Dcur is less than (1-alpha)×Dpre, it indicates that the packet loss of the onboard traffic in the current control cycle is lower than the allowable lower limit of the previous control cycle, and the packet loss of the onboard traffic shows a decreasing trend. In this case, the drop threshold Bd corresponding to the stacked port can be increased, thereby increasing the upper limit of the cache resources that the stacked traffic can occupy. When using the binary adjustment method, if the current Bd is 0.5B and Bdmax is 0.9B, then the new Bd can be determined as (0.5B+0.9B) / 2, that is, 0.7B, and the previous 0.5B can be updated to the new dynamic lower limit Bdmin.

[0146] When Dcur is between (1-alpha)×Dpre and (1+alpha)×Dpre, it indicates that the packet loss rate of the in-board flow within the current control cycle is within the allowable fluctuation range, and the packet loss trend of the in-board flow is relatively stable. In this case, the current drop threshold Bd can be kept unchanged to avoid frequent changes in the drop threshold Bd due to short-term flow fluctuations or statistical errors. After the current control cycle ends, Dcur can be updated to Dpre corresponding to the next control cycle, and a new Dcur can be obtained after the next control cycle ΔT. By periodically repeating the above comparison and adjustment process, the drop threshold Bd can dynamically converge to a range more suitable for the current flow state according to the packet loss trend of the in-board flow.

[0147] Based on the above mechanism, the switch stacking system can dynamically adjust the drop threshold (Bd) of the stacking ports using in-board traffic packet loss statistics as feedback. When in-board traffic packet loss increases, decreasing the drop threshold (Bd) can tighten the upper limit of stacked traffic's occupation of cache resources, reducing the crowding of shared cache resources caused by long-term congestion of stacking ports. When in-board traffic packet loss decreases, increasing the drop threshold (Bd) can appropriately release the cache space occupied by stacked traffic, reducing excessive restrictions on inter-board forwarding capabilities. When in-board traffic packet loss is within a stable range, keeping the drop threshold (Bd) unchanged can maintain the current cache allocation state.

[0148] By adopting this approach, the switch stacking system does not need to increase the total bandwidth of the stacked ports, nor does it need to alleviate cache contention issues by increasing port bandwidth or the number of stacked ports. By dynamically controlling the cache utilization capacity of the stacked ports, the impact of long-term stacked traffic occupying cache resources on the onboard traffic can be reduced, the probability of packet loss due to cache allocation failure caused by sudden onboard traffic can be reduced, and the rationality of the allocation of shared cache resources between onboard traffic and stacked traffic can be improved.

[0149] Please refer to Figure 5 As shown, based on the same inventive concept as the aforementioned stacked port cache occupancy control method, this disclosure provides a stacked port cache occupancy control device 500, which includes a waterline acquisition module 501, a packet loss statistics module 502, a trend determination module 503, a waterline adjustment module 504, and a cache control module 505.

[0150] The system includes: a waterline acquisition module 501 for acquiring the drop waterline corresponding to the stacking port, wherein the drop waterline is used to limit the stacking traffic forwarded through the stacking port from occupying shared cache resources; a packet loss statistics module 502 for counting the packet loss of onboard traffic in the current control period; a trend determination module 503 for comparing the packet loss of onboard traffic in the current control period with the packet loss of onboard traffic in the previous control period to determine the packet loss trend of onboard traffic; a waterline adjustment module 504 for adjusting the drop waterline corresponding to the stacking port based on the packet loss trend; and a cache control module 505 for controlling the stacking traffic from occupying shared cache resources based on the adjusted drop waterline.

[0151] Please refer to Figure 6 As shown, this disclosure also provides an electronic device 600, which includes at least one processor 601, a memory 602 (e.g., non-volatile memory), a main memory 603, and a communication interface 604, and the at least one processor 601, memory 602, main memory 603, and communication interface 604 are connected together via an internal bus 605. The at least one processor 601 is configured to invoke at least one program instruction stored or encoded in the memory 602 to cause the at least one processor 601 to perform various operations and functions of the stacked port cache occupancy control method described in various embodiments of this specification.

[0152] In the embodiments of this specification, electronic device 600 may include, but is not limited to: personal computer, server computer, workstation, desktop computer, laptop computer, notebook computer, mobile electronic device, smartphone, tablet computer, cellular phone, personal digital assistant (PDA), handheld device, messaging device, wearable electronic device, consumer electronic device, etc.

[0153] This disclosure also provides a computer-readable medium carrying computer-executable instructions, which, when executed by a processor, can be used to implement various operations and functions of the stacked port cache occupancy control method described in the various embodiments of this specification.

[0154] The computer-readable medium in this disclosure can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this disclosure, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0155] In this disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which can transmit, propagate, or transfer a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium may be transmitted using any suitable medium, including but not limited to: wireless, wireline, optical fiber, RF, etc., or any suitable combination thereof.

[0156] This disclosure also provides a computer program product, which includes computer instructions that, when executed by a processor, can implement the above-described stacked port cache occupancy control method.

[0157] The computer program product can be single-chip, meaning it can execute on a single hardware platform. Alternatively, the computer program product can adopt a modular design, containing multiple subroutines that can execute on independent hardware platforms. These subroutines are interconnected via at least one communication data link and interact to provide the functionality of the claimed computer program product. The computer program product can be stored persistently on a storage device, such as a USB flash drive, hard disk, or optical disc.

[0158] Those skilled in the art will understand that embodiments of this disclosure can be provided as methods, systems, or computer program products. Therefore, this disclosure can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this disclosure can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0159] This disclosure is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus, systems, and computer program products according to embodiments of this disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0160] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this disclosure. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0161] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for controlling the occupancy of a stacked port cache, applied to stacking member devices in a switch stacking system, wherein the stacking member device includes shared cache resources and at least one stacking port, characterized in that, include: Obtain the drop waterline corresponding to the stacking port. The drop waterline is used to limit the stacking traffic forwarded through the stacking port from occupying shared cache resources. Calculate the packet loss volume of the board's internal flow during the current control cycle; Compare the packet loss amount of the in-board flow in the current control cycle with the packet loss amount of the in-board flow in the previous control cycle to determine the packet loss trend of the in-board flow. Adjust the dropout waterline corresponding to the stacking port based on the packet loss trend; Based on the adjusted drop-off waterline, the stacked traffic's usage of shared cache resources is controlled.

2. The stacked port cache occupancy control method according to claim 1, characterized in that, Adjusting the drop threshold corresponding to the stacking port based on the packet loss trend includes: If the packet loss of the in-board flow in the current control cycle is greater than the product of the packet loss of the in-board flow in the previous control cycle and the first threshold, the drop-off water line is reduced. When the packet loss of the in-board flow in the current control cycle is less than the product of the packet loss of the in-board flow in the previous control cycle and the second threshold, the drop-off water line is increased. The dropout rate remains unchanged when the packet loss amount of the in-board flow in the current control cycle is not greater than the product of the packet loss amount of the in-board flow in the previous control cycle and the first threshold, and is not less than the product of the packet loss amount of the in-board flow in the previous control cycle and the second threshold; wherein, the first threshold is greater than 1 and the second threshold is less than 1.

3. The stacked port buffer occupancy control method according to claim 2, characterized in that, Adjusting the drop threshold corresponding to the stacking port based on the packet loss trend includes: When Dcur > (1 + alpha) × Dpre, the discard line is lowered; When Dcur < (1-alpha) × Dpre, the discard line is raised; When (1-alpha)×Dpre≤Dcur≤(1+alpha)×Dpre, the discarded waterline remains unchanged; Where Dcur is the packet loss amount of the board's internal traffic in the current control cycle, Dpre is the packet loss amount of the board's internal traffic in the previous control cycle, and alpha is the preset tolerance ratio.

4. The stacked port buffer occupancy control method according to claim 1, characterized in that, Before obtaining the discard waterline corresponding to the stacked port, the process also includes: Get the total cached amount of shared cache resources; The initial value of the discard line is determined based on the total cache size, wherein the initial value of the discard line is the product of the total cache size and a preset ratio value, and the preset ratio value is greater than 0 and less than 1.

5. The stacked port buffer occupancy control method according to claim 1, characterized in that, When adjusting the drop line corresponding to the stacking port, the adjusted drop line is positioned between a preset lower limit and a preset upper limit. The preset lower limit and the preset upper limit are both determined based on the total cache size of the shared cache resource. The preset lower limit is greater than 0, and the preset upper limit is less than the total cache size of the shared cache resource.

6. The stacked port buffer occupancy control method according to claim 5, characterized in that, Adjusting the drop threshold corresponding to the stacking port based on the packet loss trend includes: When the packet loss trend indicates an increase in packet loss, a new drop line is determined based on the drop line before adjustment and the preset lower limit value, and the drop line before adjustment is updated to the new preset upper limit value. When the packet loss trend indicates a decrease in packet loss, a new dropout line is determined based on the dropout line before adjustment and the preset upper limit value, and the dropout line before adjustment is updated to the new preset lower limit value.

7. The stacked port cache occupancy control method according to claim 6, characterized in that, Determining a new discard line based on the previous discard line and the preset lower limit value includes: determining the average of the previous discard line and the preset lower limit value as the new discard line; and / or, Determining a new discard line based on the previous discard line and the preset upper limit value includes: determining the average of the previous discard line and the preset upper limit value as the new discard line.

8. The stacked port buffer occupancy control method according to claim 1, characterized in that, Statistically calculate the packet loss volume of the board's internal traffic during the current control cycle, including: Within the current control period, the number of packets lost due to the failure to allocate the shared cache resources in the traffic corresponding to the statistics board; The number of lost packets is used as the packet loss amount of the board flow in the current control cycle.

9. The stacked port buffer occupancy control method according to claim 1, characterized in that, Based on the adjusted drop-off waterline, the stacked traffic's consumption of shared cache resources is controlled, including: Upon receiving a message to be forwarded through the stacked port, determine the buffer requirement of the message; Obtain the amount of shared buffer space already occupied by stack traffic forwarded through the stacking port; When the sum of the occupied cache amount and the cache demand amount is greater than the adjusted drop threshold, the packet's occupation of the shared cache resource is restricted. Restricting the packet's occupation of the shared cache resource includes dropping the packet or refusing to allocate cache for the packet.

10. The stacked port buffer occupancy control method according to claim 9, characterized in that, Determining the buffer requirement of the message includes: Obtain the message length and buffer allocation unit size of the message; Based on the message length and the cache allocation unit size, the number of cache units required by the message is obtained by rounding down by the cache allocation unit.

11. A stacking port cache occupancy control device, applied to stacking member devices in a switch stacking system, the switch stacking system including shared cache resources and at least one stacking port, characterized in that, include: The waterline acquisition module is used to acquire the discard waterline corresponding to the stacking port. The discard waterline is used to limit the stacking traffic forwarded through the stacking port from occupying the shared cache resources. The packet loss statistics module is used to count the number of packet losses in the board's traffic during the current control cycle. The trend determination module is used to compare the packet loss of the onboard traffic in the current control cycle with the packet loss of the onboard traffic in the previous control cycle in order to determine the packet loss trend of the onboard traffic. The waterline adjustment module is used to adjust the drop waterline corresponding to the stacking port based on the packet loss trend. The cache control module is used to control the stacked traffic's occupation of shared cache resources based on the adjusted drop-off waterline.

12. A switch stacking system, characterized in that, The system includes multiple stack member devices, at least two of which are connected via stacking ports. The switch stacking system also includes a processor and shared cache resources, wherein the processor is used to execute the stacking port cache occupancy control method according to any one of claims 1 to 10.

13. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the stacked port cache occupancy control method as described in any one of claims 1 to 10.

14. A machine-readable medium / computer program product, characterized in that, The machine-readable medium carries executable instructions, which, when executed by a processor, are used to implement the stacked port cache occupancy control method as described in any one of claims 1 to 10; and / or, The computer program product includes computer instructions that, when executed by a processor, implement the stacked port cache occupancy control method according to any one of claims 1 to 10.

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