Server fan control circuit, double-control storage server fan control circuit and double-control storage server

By designing a fan control circuit for controlling chips and data selectors in the server, the difficulty of speed adjustment and resource occupation of CPLD during startup and failure is solved, and flexible adjustment and automatic adjustment of fan speed is achieved, reducing noise and power consumption .

CN222351005UActive Publication Date: 2025-01-14INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202420943329.0
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-04-30
Publication Date
2025-01-14
Estimated Expiration
2034-04-30

AI Technical Summary

Technical Problem

The existing server fan control method relies on CPLD during startup and failure, resulting in difficulty in speed adjustment, increased noise and power consumption, and excessive CPLD resource usage, which can easily cause timing disorder.

Method used

Design a fan control circuit including a control chip, a numeric keyboard and a data selector, allowing users to adjust the fan speed through digital encoding when the server is started, and monitor the BMC status through the heartbeat monitoring link and reset link to avoid direct control of CPLD , realizes intelligent speed regulation of dual-controlled storage server fans.

Benefits of technology

It avoids the resource occupation of CPLD during server startup and failure, reduces noise and power consumption, and realizes flexible and automatic adjustment of fan speed, reducing the energy consumption and cost of the entire machine.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model belongs to the field of servers, and provides a server fan control circuit, a double-control storage server fan control circuit and a double-control storage server, which are respectively provided with a numeric keyboard, a control chip, a control chip, a fan control chip and a control chip, the data selector comprises a first group of data inputs and a second group of data inputs; the control chip is connected with a second group of data input of the data selector; the fan is connected to the output end of the data selector; the control chip is used for controlling and outputting the corresponding fan duty ratio according to the digital coding to control the fan rotating speed; a heartbeat monitoring link is arranged between the control chip and the BMC; and the control chip is connected with the S pin of the data selector and is used for controlling the data selector to select the signal output of the first group of data input after monitoring the heartbeat signal. The CPLD control system is used for avoiding selection of the CPLD for fan control in the starting stage of the server and when the BMC breaks down, the resource burden of the CPLD is reduced, and overlarge resource occupation of the CPLD is avoided.
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Description

Technical Field

[0001] The utility model relates to the field of servers, in particular to a server fan control circuit, a dual-control storage server fan control circuit and a dual-control storage server. Background Art

[0002] The fan is an extremely important component of the server, and is responsible for the heat dissipation of the entire system. Once there is a problem with the rotation adjustment of the fan, it will have a fatal impact on the entire server system. The speed of the cooling fan is usually controlled by the BMC (Baseboard Management Controller).

[0003] However, during the server startup process, it takes a certain amount of time for the BMC to start up, and the BMC cannot control the rotation and adjustment of the fan during its startup process. The usual method is that during the BMC startup process, the cooling fan is first taken over by the CPLD (Complex Programmable Logic Device), and the CPLD outputs a default speed signal to control the fan operation, but the default speed output by the CPLD is a fixed value, and it can only be adjusted by rewriting the CPLD program. For example, the default fan speed in the CPLD program is 30%. If you want to change this default speed, you can only modify the CPLD code to achieve it, and the CPLD re-burning code requires the entire device to be powered on and off, which obviously has obvious defects. In addition, during the operation of the server, if the BMC fails, the CPLD is also required to take over the fan. However, because the CPLD does not have the speed adjustment conditions, once the BMC fails during the operation of the server, the CPLD can only blindly control the fan to run at full speed, which will not only increase the noise, but also increase the power consumption of the entire machine, which is not conducive to energy saving.

[0004] Moreover, the above method of controlling the fan speed through CPLD coordination will occupy more CPLD internal resources, and excessive CPLD resource occupation can easily cause timing confusion, which can easily lead to serious problems. However, in general, in order to solve the problem of excessive resource occupation of other devices, CPLDs with more resources have to be selected. Utility Model Content

[0005] The technical problem to be solved by the utility model is to provide a server fan control circuit, a dual-control storage server fan control circuit and a dual-control storage server to solve at least one of the above problems.

[0006] In a first aspect, the utility model provides a server fan control circuit, the circuit includes a cooling fan and a BMC of the server, the number of the BMC is one, and the circuit also includes a control chip, a numeric keyboard and a data selector;

[0007] The numeric keyboard is connected to the control chip and is used for the user to input a digital code for controlling the fan speed into the control chip during the server startup process;

[0008] The data selector includes two groups of data inputs, namely a first group of data inputs and a second group of data inputs;

[0009] The control chip is connected to the second group of data inputs of the data selector;

[0010] The cooling fan is connected to the output end of the data selector;

[0011] The control chip is used to control and output a corresponding number of corresponding fan duty cycles according to the digital code, and transmit the data to the cooling fan through the second group of data input of the data selector to control the speed of the cooling fan;

[0012] A heartbeat monitoring link is provided between the control chip and the BMC, and the control chip is used to monitor the heartbeat signal of the BMC through the heartbeat monitoring link during the server startup process;

[0013] The control chip is connected to the S pin of the data selector, and is used to send a low-level selection control signal to the data selector after detecting the heartbeat signal, so as to control the data selector to select the signal output of the first group of data input.

[0014] Furthermore, the BMC is connected to the first group of data inputs of the data selector through the fan control chip.

[0015] Furthermore, the circuit also includes temperature sensors used for fan control in the server, and each temperature sensor is connected to the BMC via an IIC Switch.

[0016] Furthermore, a number of numeric keys are provided on the numeric keypad, each numeric key is used to input a numeric code for controlling the speed of the fan, and each numeric code corresponds to a preset fan duty cycle for controlling the speed of the fan.

[0017] Furthermore, a LOCK key is provided on the numeric keypad, and the LOCK key is used to unlock the speed setting of the numeric keys on the numeric keypad.

[0018] Furthermore, the control chip is also used to monitor the heartbeat signal of the BMC through the heartbeat monitoring link after the server is started;

[0019] A reset link is also provided between the control chip and the BMC, which is used to control the BMC to reset through the reset link when the heartbeat signal of the BMC cannot be detected through the heartbeat monitoring link after the server is started.

[0020] Furthermore, a numeric keyboard is arranged at the server ear mounting position.

[0021] In a second aspect, the utility model provides a dual-control storage server fan control circuit. The dual-control storage server includes dual controllers, the dual controllers are a first controller and a second controller, and the first controller and the second controller are both equipped with the server fan control circuit described in the above aspects.

[0022] Further, the BMC of the first controller is a first BMC, the BMC of the second controller is a second BMC, the BMC in the fan control circuit provided by the first controller is the first BMC, the BMC in the fan control circuit provided by the second controller is the second BMC, the first BMC and the second BMC are connected via a GE network, and the first BMC and the second BMC obtain the working status of the control in real time via the GE network, including a heartbeat signal;

[0023] The fan control chip in the fan control circuit equipped with the first controller is a first fan control chip, and the fan control chip in the fan control circuit equipped with the second controller is a second fan control chip; the connection line between the first BMC and the first fan control chip is connected to the second BMC via a third IIC bus, and the connection line between the second BMC and the second fan control chip is connected to the first BMC via a fourth IIC bus;

[0024] When the fan control circuits provided in the first controller and the second controller are provided with an IIC Switch, the IIC Switch in the fan control circuit provided in the first controller is a first IIC Switch, the IIC Switch in the fan control circuit provided in the second controller is a second IIC Switch, the connection line between the first BMC and the first IIC Switch is connected to the second BMC via a first IIC bus, and the connection line between the second BMC and the second IIC Switch is connected to the first BMC via a second IIC bus;

[0025] The first IIC bus and the third IIC bus are reserved for taking over the speed control of the cooling fan under the first controller after the server is started and the second BMC fails to detect the heartbeat signal of the second BMC through the GE network; the second IIC bus and the fourth IIC bus are reserved for taking over the speed control of the cooling fan under the second controller after the server is started and the first BMC fails to detect the heartbeat signal of the first BMC through the GE network.

[0026] In a third aspect, the utility model provides a dual-controller storage server, wherein the two controllers thereof adopt the first controller and the second controller described in the above aspects.

[0027] Compared with the prior art, the advantages of the utility model are:

[0028] (1) The utility model helps to avoid the selection of CPLD for server fan control during the server startup phase, thereby helping to solve the problem that the CPLD can only adjust the fan speed by rewriting the CPLD program when the server is started, which is caused by the use of CPLD for related control of the server fan during the server startup phase;

[0029] (2) The utility model helps to avoid the selection of CPLD for server fan control when the server fails, and then helps to solve the problem that when the server fails, the use of CPLD for fan control can only blindly control the fan to run at full speed, resulting in increased noise and increased power consumption of the whole machine, which is not conducive to energy saving;

[0030] (3) The utility model can connect the temperature and fan speed control links of the two controllers to each other. When a fault occurs during the operation of the BMC of one controller after startup, the BMC of the other controller can take over its temperature and fan control authority. That is, the BMC of the controller that is not faulty can adjust the fan speed of the abnormal controller by obtaining the temperature information of the abnormal controller, further avoiding the power consumption and noise problems caused by the traditional method of controlling the fan at full speed through CPLD.

[0031] (4) The utility model helps to avoid the selection of CPLD for server fan control during the server startup phase and when the server fails. On the one hand, it helps to reduce the resource burden of the CPLD and avoid serious problems caused by timing confusion due to excessive CPLD resource usage. On the other hand, compared with selecting a CPLD with larger resources for server fan-related speed control, it has obvious cost advantages.

[0032] It can be seen that compared with the prior art, the utility model has substantial characteristics and progress, and the beneficial effects of its implementation are also obvious. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 This is a schematic circuit principle block diagram of an embodiment of the server fan control circuit of the utility model;

[0034] Figure 2 This is a schematic circuit principle block diagram of another embodiment of the server fan control circuit of the utility model.

[0035] Figure 3 The present invention is a schematic circuit diagram of an embodiment of a fan control circuit for a dual-control storage server. DETAILED DESCRIPTION

[0036] In order to make the technical solution and advantages of the utility model clearer, the technical solution of the utility model will be described clearly and completely in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments.

[0037] The following description of at least one exemplary embodiment is merely illustrative and is not intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0039] It should be noted that the present invention uses the words "first", "second" and the like to limit the corresponding parts only for the convenience of distinguishing the corresponding parts. If not otherwise stated, the above words have no special meaning and therefore cannot be understood as limiting the scope of protection of the present invention.

[0040] Figure 1 This is an embodiment of the server fan control circuit of the utility model. In this embodiment, the server is a single-control server.

[0041] Please refer to Figure 1 The server fan control circuit provided in this embodiment includes a cooling fan and a BMC of the server, and also includes a control chip, a numeric keyboard and a data selector.

[0042] In this embodiment, the server has only one BMC.

[0043] The above control chip is a control chip that can output PWM (Pulse Width Modulation) signals.

[0044] In this embodiment, the control chip adopts the UM8005 single chip microcomputer. In specific implementation, those skilled in the art can select a relevant control chip to replace the UM8005 single chip microcomputer according to actual conditions.

[0045] In this embodiment, the numeric keyboard is connected to the control chip, and is used for the user to input a digital code for controlling the fan speed to the control chip during the server startup process. The control chip is used to control and output a corresponding number of corresponding fan duty cycles according to the digital code, and transmit the data to the cooling fan through the second group of data input of the data selector to control the cooling fan speed.

[0046] like Figure 1 As shown, a heartbeat monitoring link is provided between the control chip and the BMC. The control chip is used to monitor the heartbeat signal of the BMC through the heartbeat monitoring link during the server startup process.

[0047] like Figure 1 As shown, the control chip is connected to the S pin of the data selector, and is used to send a low-level selection control signal to the data selector after detecting the heartbeat signal, so as to control the data selector to select the signal output of the first group of data input.

[0048] In this embodiment, the BMC is connected to the first group of data inputs of the data selector via a fan control chip.

[0049] It can be understood that, in this embodiment, after the control data selector selects the signal output of the first group of data input, the fan speed control authority is returned to the BMC.

[0050] In this embodiment, a number of numeric keys are provided on the numeric keypad, each numeric key is used to input a numeric code for controlling the fan speed, and each numeric code corresponds to a preset fan duty cycle for controlling the fan speed.

[0051] In this embodiment, the data selector includes two groups of data inputs, namely a first group of data inputs and a second group of data inputs.

[0052] It should be noted that the number of data input terminals in the first data input group and the number of data input terminals in the second data input group of the selected data selector are not less than the number of cooling fans controlled by the above-mentioned BMC.

[0053] In this embodiment, the number of the cooling fans is four, and the number of the data input terminals in the first group of data input terminals and the number of the data input terminals in the second group of data input terminals of the selected data selector are both four.

[0054] In this embodiment, the selected data selector has four output terminals, the control chip is connected to the second group of data inputs of the data selector, and the cooling fans are connected one-to-one to the output terminals of the data selector.

[0055] Exemplarily, the circuit further includes temperature sensors used for fan control in the server, and each temperature sensor is connected to the BMC via an IIC Switch.

[0056] like Figure 1As shown, the temperature sensors used for fan control in this embodiment include but are not limited to temperature sensors next to the CPU, inside the air inlet, inside the air outlet, and next to the IO card (input and output card) in the server. The temperature sensors next to the CPU, inside the air inlet, inside the air outlet, and next to the IO card (input and output card) in the server correspond to Figure 1 The CPU SENSOR, air inlet SENSOR, air outlet SENSOR and IO card SENSOR in it.

[0057] Optionally, the numeric keys on the numeric keypad are locked by default, and a LOCK key is also provided on the numeric keypad. The LOCK key is used to unlock the speed setting of the numeric keys on the numeric keypad. When in use, press and hold the LOCK key for more than five seconds, and the control chip controls the numeric keys on the numeric keypad to unlock. The numeric keys on the numeric keypad can only be used for speed setting after being unlocked. The use of the LOCK key can effectively prevent the numeric keys on the numeric keypad from being accidentally pressed and triggering the corresponding speed set in advance.

[0058] In specific implementation, the numeric keyboard can be set at the server ear mounting position for easy operation.

[0059] Exemplarily, the control chip is also used to monitor the heartbeat signal of the BMC in real time through the heartbeat monitoring link after the server is started. Figure 2 As shown, a reset link is also set between the control chip and the BMC (corresponding to Figure 2 BMC_RESET signal in the heartbeat monitoring link), which is used to control the BMC to reset through the reset link when the heartbeat signal of the BMC cannot be detected through the heartbeat monitoring link after the server is started.

[0060] The utility model also provides a dual-control storage server fan control circuit. The dual-control storage server has dual controllers, the dual controllers are a first controller and a second controller, and the first controller and the second controller are both equipped with the server fan control circuit described in any one of the above embodiments.

[0061] Figure 3 This is an embodiment of the fan control circuit of the dual-control storage server of the utility model. In this embodiment, Figure 3 As shown, in this embodiment, the BMC of the first controller is the first BMC, the BMC of the second controller is the second BMC, the BMC in the fan control circuit equipped with the first controller is the first BMC, the BMC in the fan control circuit equipped with the second controller is the second BMC, the first BMC and the second BMC are connected through a GE network, and the first BMC and the second BMC obtain the working status of the control in real time through the GE network, including the heartbeat signal.

[0062] Please refer to Figure 3 , Figure 3The first numeric keypad, the first control chip, the first fan control chip, the first IIC switch, the first fan control chip and the first data selector are the numeric keypad, the control chip, the fan control chip, the IIC switch, the fan control chip and the data selector in the fan control circuit equipped with the first controller. Figure 3 The second numeric keypad, second control chip, second fan control chip, second IIC Switch, second fan control chip and second data selector are the numeric keypad, control chip, fan control chip, IICSwitch, fan control chip and data selector in the fan control circuit equipped with the second controller.

[0063] In this embodiment, the IIC Switches involved all use PCA9548 switches, the fan control chips involved all use ADT7470 chips, and the data selectors involved all use 74HC257 data selectors. Among them, 74HC257 is a four-way 2-line to 1-line data selector with three-state outputs, which can select four bits of data from two sources under the control of a common selection input, and has four outputs (1Y to 4Y). Specifically, when the input S is low, the data input from data source 0 (1I0 to 4I0) is selected; when S is high, the data input from data source 1 (1|1 to 4|1) is selected. 1I0 to 4I0 constitute the first group of data inputs of 74HC257, and 1|1 to 4|1 constitute the second group of data inputs of 74HC257.

[0064] in, Figure 3 The connection relationship between the first controller corresponding to the fan, the temperature sensor, the first BMC, the first numeric keypad, the first control chip, the first fan control chip, the first IIC Switch, the first fan control chip and the first data selector (corresponding to the fan control circuit equipped with the first controller) can be referred to. Figure 1 The connection relationship between the fan, temperature sensor, BMC, numeric keypad, control chip, fan control chip, IIC Switch, fan control chip and data selector.

[0065] Specifically, the first numeric keypad is connected to the first control chip, and is used for the user to input a digital code for controlling the speed of the fan corresponding to the first controller during the server startup process; the first control chip is connected to the second group of data inputs of the first data selector; the fans corresponding to the first controller (there are four) are connected one-to-one to the output end of the data selector; the first control chip is used to control the output of the corresponding number of corresponding fan duty ratios according to the digital code input of the first numeric keypad, and transmit them to the fans through the second group of data inputs of the first data selector to control the fan speed; a heartbeat monitoring link is provided between the first control chip and the first BMC, and the first control chip is used to monitor the heartbeat signal of the first BMC through the heartbeat monitoring link during the server startup process; the first control chip is connected to the S pin of the first data selector, and is used to send a low-level selection control signal to the first data selector after monitoring the heartbeat signal of the first BMC, so as to control the first data selector to select the signal output of its first group of data input; the first BMC is connected to the first group of data inputs of the first data selector through the first fan control chip, and each temperature sensor corresponding to the first controller is connected to the first BMC through the first IIC Switch.

[0066] Figure 3 The connection relationship between the second controller corresponding to the fan, temperature sensor, second numeric keypad, second control chip, second fan control chip, second IIC Switch, second fan control chip and second data selector can refer to the connection relationship between the first controller corresponding to the fan, temperature sensor, first BMC, first numeric keypad, first control chip, first fan control chip, first IIC Switch, first fan control chip and first data selector (corresponding to the fan control circuit equipped with the second controller). Specifically:

[0067] The second numeric keypad is connected to the second control chip, and is used for the user to input a digital code for controlling the speed of the fan corresponding to the second controller during the server startup process; the second control chip is connected to the second group of data inputs of the second data selector; the fans corresponding to the second controller (there are four) are connected one-to-one to the output end of the data selector; the second control chip is used to control the output of the corresponding number of corresponding fan duty ratios according to the digital code input of the second numeric keypad, and transmit them to the fans through the second group of data inputs of the second data selector to control the fan speed; a heartbeat monitoring link is provided between the second control chip and the second BMC, and the second control chip is used to monitor the heartbeat signal of the second BMC through the heartbeat monitoring link during the server startup process; the second control chip is connected to the S pin of the second data selector, and is used to send a low-level selection control signal to the second data selector after monitoring the heartbeat signal of the second BMC, so as to control the second data selector to select the signal output of its second group of data input; the second BMC is connected to the second group of data inputs of the second data selector through the second fan control chip, and each temperature sensor corresponding to the second controller is connected to the second BMC through the second IIC Switch.

[0068] like Figure 3 As shown, the temperature sensors for fan control corresponding to the first controller include but are not limited to the temperature sensors beside the CPU, in the air inlet, in the air outlet, and beside the IO card (input and output card) of the first controller. The temperature sensors beside the CPU, in the air inlet, in the air outlet, and beside the IO card (input and output card) of the first controller correspond to Figure 3 The CPU SENSOR, air inlet SENSOR, air outlet SENSOR and IO card SENSOR in the box of the first controller are shown in FIG. Figure 3 The temperature sensors used for fan control correspond to the second controller.

[0069] In this embodiment, Figure 3 As shown, the connection line between the first BMC and the first fan control chip is connected to the second BMC via the third IIC bus, and the connection line between the second BMC and the second fan control chip is connected to the first BMC via the fourth IIC bus.

[0070] like Figure 3 As shown, in this embodiment, the fan control circuits provided in the first controller and the second controller have IIC switches, the connection line between the first BMC and the first IIC Switch is connected to the second BMC via a first IIC bus, and the connection line between the second BMC and the second IIC Switch is connected to the first BMC via a second IIC bus.

[0071] The first IIC bus and the third IIC bus are reserved for taking over the speed control of the cooling fan under the first controller after the second BMC fails to detect the heartbeat signal of the first BMC through the GE network after the server is started. The second IIC bus and the fourth IIC bus are reserved for taking over the speed control of the cooling fan under the second controller after the first BMC fails to detect the heartbeat signal of the second BMC through the GE network after the server is started.

[0072] After taking over the speed control of the cooling fan, the second BMC takes over the speed control of the cooling fan under the first controller from the first BMC through the first IIC bus and the third IIC bus according to the automatic speed adjustment strategy preset therein.

[0073] After taking over the speed control of the cooling fan, the first BMC takes over the speed control of the cooling fan under the second controller from the second BMC through the second IIC bus and the fourth IIC bus according to the automatic speed adjustment strategy preset therein.

[0074] By default, when the second BMC can monitor the heartbeat signal of the first BMC through the GE network, and the first BMC can also monitor the heartbeat signal of the second BMC through the GE network, the IIC bus for obtaining the detection information of the local temperature sensor and controlling the fan speed of the local control does not work.

[0075] In this embodiment, the corresponding relationship between the numeric keys on the numeric keypad and the rotation speed is shown in Table 1.

[0076] Table 1 Correspondence between the number keys on the numeric keypad and the speed

[0077] Number keys PWM Duty Cycle 1 20% 2 30% 3 40% 4 50% 5 60% 6 70% 7 80% 8 100%

[0078] In this embodiment, the numeric keypad is provided with eight numeric keys, the eight numeric keys correspond to the numbers 1 to 8, and the LOCK key and the eight numeric keys are arranged in an array of 3 rows and 3 columns. The eight numeric keys "1", "2", ..., "8" on the numeric keypad are located in row 1, column 1, row 2, row 1, column 3, row 2, column 2, row 3, row 3, column 1, and row 2 of the array, respectively. The LOCK key is located in row 3, column 3 of the array.

[0079] When in use, the server is powered on. At this time, the first BMC and the second BMC of the server have not been configured yet. Take the case where the speed of the fan under the first controller needs to be adjusted as an example:

[0080] ① During the server startup process, the user can enter the digital code of the fan speed to be controlled through the first numeric keypad. For example, if the fan speed needs to be controlled to 50%, the user can press the numeric keypad "4" to enter the digital code "4";

[0081] ② Afterwards, after receiving the digital code input above, the first control chip inputs a high level to the S pin of the first data selector (that is, the PWM_SELECT signal is high at this time), and then outputs four fan speed control signals of corresponding sizes through the second group of data input of the first data selector according to the digital code input by the user through the numeric keypad (if the user presses the number key "4" on the numeric keypad, the fan speed control signal here is the PWM duty cycle "50%"), controls the four fans connected to the four output ends of the first data selector to rotate at the corresponding speed, and monitors the heartbeat signal sent by the first BMC on the other hand. When the heartbeat signal is detected (the first BMC has been configured at this time), the first control chip sets the control signal PWM_SELECT to a low level. At this time, the first data selector selects the first group of data input to be turned on, and the relevant fans are controlled by the first BMC.

[0082] ③ The above-mentioned first BMC control includes: the first BMC polls the temperatures collected by the air inlet, air outlet, CPU, and IO card sensors of the first controller through the first IIC Switch, and then calculates the fan speed through the PID algorithm (i.e., the automatic speed regulation strategy pre-set in the first BMC) according to the acquired temperature information, and then outputs a PWM signal of a corresponding frequency to the first fan control chip, and then the first fan control chip controls the fan to run at a corresponding speed through the first group of data inputs conducted by the first data selector.

[0083] ④ The dual-control BMCs (i.e., the first BMC and the second BMC) synchronize their status information with each other in real time through the GE signal. If the opposite control detects that the local control BMC is abnormal, the opposite control BMC obtains the temperature information collected by all relevant temperature sensors of the opposite control through the SENSOR_IIC signal connected to the opposite control IIC Switch. Then, according to the obtained temperature information, the PID algorithm (i.e., the automatic speed regulation strategy pre-set in the opposite control BMC) is used to control the fan control chip of the opposite control to output a PWM signal of a corresponding frequency through the FAN_IIC signal connected to the opposite control (i.e., the opposite control). The fan is controlled to run at a corresponding speed through the first group of data inputs turned on by the first data selector, and then the opposite control realizes automatic speed regulation of the local control fan through the obtained temperature information of the local control.

[0084] It should be noted that if this control detects an abnormality in the controlled BMC, the current control obtains the temperature information of the controlled BMC to realize automatic speed regulation of the controlled fan. Among them, the method for this control to obtain the temperature information of the controlled BMC to realize automatic speed regulation of the controlled fan can refer to the above method for the control to realize automatic speed regulation of the controlled fan by obtaining the temperature information of the controlled BMC.

[0085] ⑤ When the local control BMC is stuck, the heartbeat link between the dual control BMCs is abnormal, and the opposite control BMC sends a reset signal to the local control to reset the local control BMC. If the state information of the local BMC is normal after the reset, the control right of the fan is returned to the local BMC. The control includes: the local BMC (the first BMC and the second BMC are mutually controlled, that is, if the first BMC is the control, the second BMC is the control; if the second BMC is the control, the first BMC is the control) polls the temperature collected by the sensors of the relevant air outlets, air outlets, CPU, and IO cards under the local control through the local IIC Switch, and then calculates the speed of the fan through the PID algorithm (that is, the pre-set automatic speed regulation strategy) according to the acquired temperature information, and then outputs a PWM signal of a corresponding frequency to the local fan control chip, and then the local fan control chip controls the fan to run at a corresponding speed through the first group of data inputs conducted by the local data selector; if the control still detects that the local state is abnormal after the reset (that is, the control still cannot detect the heartbeat data packet of the control), then the automatic speed regulation of the local fan by the control in the above process ④ is executed, and the fan is still controlled by the control BMC. In specific implementation, an abnormal alarm can also be generated to notify the maintenance personnel.

[0086] In addition, the utility model further provides a dual-control storage server, wherein the dual controllers thereof adopt the first controller and the second controller in any embodiment of the above dual-control storage server fan control circuit.

[0087] The same and similar parts between the various embodiments in this specification can be referenced to each other.

[0088] The BMC involved in the utility model can poll the relevant temperatures through its corresponding IIC Switch for the execution of the automatic speed control strategy. The startup time of the domestic single-chip microcomputer UM8005 is much shorter than that of the BMC. During the server startup process, the utility model controls the fan operation by the single-chip microcomputer UM8005. When the BMC fails during the operation of the server, the fan speed setting in the utility model is set according to the temperature of the computer room. This process does not require the equipment to be powered off and on again, and does not affect the normal operation of the equipment.

[0089] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A server fan control circuit, the circuit includes a cooling fan and a BMC of the server, the number of the BMC is one, and the characteristics are: The circuit also includes a control chip, a numeric keyboard and a data selector; The numeric keyboard is connected to the control chip and is used for the user to input a numeric code for controlling the fan speed during the server startup process; The data selector includes two groups of data inputs, namely a first group of data inputs and a second group of data inputs; The control chip is connected to the second group of data inputs of the data selector; The cooling fan is connected to the output end of the data selector; The control chip is used to control and output a corresponding number of corresponding fan duty cycles according to the digital code, and transmit the data to the cooling fan through the second group of data input of the data selector to control the speed of the cooling fan; A heartbeat monitoring link is provided between the control chip and the BMC, and the control chip is used to monitor the heartbeat signal of the BMC through the heartbeat monitoring link during the server startup process; The control chip is connected to the S pin of the data selector, and is used to send a low-level selection control signal to the data selector after detecting the heartbeat signal, so as to control the data selector to select the signal output of the first group of data input.

2. The server fan control circuit according to claim 1, characterized in that: The BMC is connected to the first set of data inputs of the data selector through the fan control chip.

3. The server fan control circuit according to claim 2, characterized in that: The circuit also includes temperature sensors for fan control in the server, and each temperature sensor is connected to the BMC via an IIC Switch.

4. The server fan control circuit according to claim 1, characterized in that: The numeric keypad is provided with a plurality of numeric keys, each of which is used to input a numeric code for controlling the speed of the fan, and each numeric code corresponds to a preset fan duty cycle for controlling the speed of the fan.

5. The server fan control circuit according to claim 4, characterized in that: There is also a LOCK key on the numeric keypad, which is used to unlock the speed setting of the numeric keys on the numeric keypad.

6. The server fan control circuit according to claim 1, characterized in that: The control chip is also used to monitor the heartbeat signal of the BMC through the heartbeat monitoring link after the server is started; A reset link is also provided between the control chip and the BMC, which is used to control the BMC to reset through the reset link when the heartbeat signal of the BMC cannot be detected through the heartbeat monitoring link after the server is started.

7. The server fan control circuit according to claim 1, characterized in that: The numeric keyboard is set on the server mounting ear.

8. A fan control circuit for a dual-control storage server, the dual-control storage server comprising dual controllers, the dual controllers being a first controller and a second controller, characterized in that: The first controller and the second controller are both equipped with the server fan control circuit described in any one of claims 1-7.

9. The dual-control storage server fan control circuit according to claim 8, characterized in that: The BMC of the first controller is the first BMC, the BMC of the second controller is the second BMC, the BMC in the fan control circuit equipped with the first controller is the first BMC, the BMC in the fan control circuit equipped with the second controller is the second BMC, the first BMC and the second BMC are connected via a GE network, and the first BMC and the second BMC obtain the working status of the control in real time via the GE network, including a heartbeat signal; The fan control chip in the fan control circuit equipped with the first controller is a first fan control chip, and the fan control chip in the fan control circuit equipped with the second controller is a second fan control chip; the connection line between the first BMC and the first fan control chip is connected to the second BMC via a third IIC bus, and the connection line between the second BMC and the second fan control chip is connected to the first BMC via a fourth IIC bus; When the fan control circuits provided in the first controller and the second controller are provided with an IIC Switch, the IIC Switch in the fan control circuit provided in the first controller is a first IIC Switch, the IIC Switch in the fan control circuit provided in the second controller is a second IIC Switch, the connection line between the first BMC and the first IIC Switch is connected to the second BMC via a first IIC bus, and the connection line between the second BMC and the second IIC Switch is connected to the first BMC via a second IIC bus; The first IIC bus and the third IIC bus are reserved for taking over the speed control of the cooling fan under the first controller after the server is started and the second BMC fails to detect the heartbeat signal of the second BMC through the GE network; The second IIC bus and the fourth IIC bus are reserved for after the server is started, for the first BMC to take over the speed control of the cooling fan under the second controller after failing to detect the heartbeat signal of the first BMC through the GE network.

10. A dual-control storage server, characterized in that: The dual controller adopts the first controller and the second controller described in any one of claims 8-9.