Josephson junction, quantum circuit, quantum chip and quantum computer
By forming overlapping superconducting plates and superconducting bands connected to both sides of the quantum chip substrate, the problem of Josephson's junction area changes affecting the transmission line width is solved, and a more flexible junction area design and smaller wiring space occupation are achieved.
Patent Information
- Application Number
- CN202420241450.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-01-31
- Publication Date
- 2025-03-14
- Estimated Expiration
- 2034-01-31
AI Technical Summary
In the prior art, changing the area of the Josephson junction will affect the width of the transmission line, resulting in excessive wiring space of the quantum chip.
By forming at least partially overlapping first and second superconducting plates on the substrate, a junction region is formed, and the first and second superconducting bands are connected to both sides of the superconducting plate, avoiding the junction region, so that the area of the junction region is determined by the overlapping portion of the superconducting plate, independent of the width of the superconducting band.
The correlation between the area of the Josephson junction and the superconducting bandwidth has been abolished, making the junction area design of the Josephson junction more flexible, not affected by the superconducting bandwidth, and is suitable for highly integrated quantum chips.
Smart Images
Figure CN222621549U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of quantum information technology, in particular to a Josephson junction, a quantum circuit, a quantum chip and a quantum computer. Background Art
[0002] In superconducting quantum chips, the Josephson junction is formed by the overlap of two superconducting tapes, with a very thin barrier layer sandwiched between the overlapping areas. The area of the Josephson junction is the overlapping area of the two superconducting tapes. Therefore, if the thickness of the barrier layer remains unchanged, if the area of the Josephson junction is to be expanded, the width of the superconducting tape should be increased. However, only a part of the superconducting tape is used to form the Josephson junction, and the other part is used as a transmission line. When the width of the superconducting tape increases, the width of the transmission line also increases. For quantum chips with highly integrated requirements, the increase in the transmission line means that a larger wiring space is required. Utility Model Content
[0003] The purpose of the utility model is to provide a Josephson junction, a quantum circuit, a quantum chip and a quantum computer to solve the problem in the prior art that changing the area of the Josephson junction will affect the width of the transmission line, and to cancel the correlation between the area of the Josephson junction and the width of the superconducting tape.
[0004] In order to solve the above technical problems, the utility model provides a Josephson junction formed on a substrate, wherein the substrate has a first region and a second region and a third region located on both sides of the first region, and the Josephson junction includes:
[0005] a first superconducting plate extending from the second region to the first region and a second superconducting plate extending from the third region to the first region, wherein the first superconducting plate and the second superconducting plate at least partially overlap in the first region to form a first junction region, and a barrier layer is interposed in the first junction region;
[0006] A first superconducting tape connected to the first superconducting plate in the second region and a second superconducting tape connected to the second superconducting plate in the third region, wherein both the first superconducting tape and the second superconducting tape avoid the first region.
[0007] Preferably, the area of the first junction region is larger than the product of the line widths of the first superconducting tape and the second superconducting tape.
[0008] Preferably, a boundary line between the first region and the second region is parallel to a boundary line between the first region and the third region.
[0009] Preferably, the first superconducting tape is parallel to a boundary line between the first region and the second region.
[0010] Preferably, the second superconducting tape is parallel to a boundary line between the first region and the second region.
[0011] Preferably, the second superconducting tape is perpendicular to a boundary line between the first region and the third region.
[0012] Preferably, the first superconducting plate is located above the second superconducting plate, and the thickness of the first superconducting plate is greater than the thickness of the second superconducting plate.
[0013] In order to solve the above technical problems, the utility model also provides a quantum circuit, comprising any of the aforementioned Josephson junctions and a third superconducting tape, wherein the third superconducting tape overlaps with the first superconducting tape to form a second junction region, and the second junction region is provided with a barrier layer, and the area of the second junction region is smaller than the area of the first junction region.
[0014] In order to solve the above technical problems, the utility model also provides a quantum chip, including any one of the aforementioned Josephson junctions, or the aforementioned quantum circuits.
[0015] In order to solve the above technical problems, the utility model also provides a quantum computer, including the above-mentioned quantum chip.
[0016] Different from the prior art, the Josephson junction provided by the utility model includes a first superconducting plate and a second superconducting plate which at least partially overlap to form a junction area, and a first superconducting tape and a second superconducting tape respectively connect the first superconducting plate and the second superconducting plate, and both avoid the junction area. Since the widths of the first superconducting tape and the second superconducting tape do not affect the area of the junction area, the area of the junction area is only determined by the first superconducting plate and the second superconducting plate, thereby eliminating the correlation between the area of the Josephson junction and the width of the superconducting tape, making the design of the junction area of the Josephson junction more flexible, without considering the influence of the width of the superconducting tape.
[0017] The quantum circuit, quantum chip and quantum computer provided by the utility model include the aforementioned Josephson junction, and belong to the same inventive concept as the aforementioned Josephson junction, and therefore have the same technical effects, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 A schematic top view of a Josephson junction provided in an embodiment of the utility model.
[0019] Figure 2 A schematic top view of another Josephson junction provided in an embodiment of the utility model.
[0020] Figure 3 A schematic top view of a quantum circuit provided in an embodiment of the utility model. DETAILED DESCRIPTION
[0021] The specific implementation of the utility model will be described in more detail below in conjunction with the schematic diagram. The advantages and features of the utility model will become clearer according to the following description and claims. It should be noted that the drawings are all in a very simplified form and are not in precise proportions, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the utility model.
[0022] In the description of the present invention, it should be understood that the terms "center", "up", "down", "left", "right", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.
[0023] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0024] Please refer to Figure 1 , the embodiment of the utility model provides a Josephson junction. The Josephson junction is formed on a substrate 1, the substrate 1 has a first region A and a second region B and a third region B located on both sides of the first region A, and the Josephson junction includes a first superconducting plate 21, a second superconducting plate 22, a first superconducting tape 23 and a second superconducting tape 24. It should be noted that the dotted lines in the figure are only used to mark the boundaries of the first region A, the second region B and the third region C, and do not represent any actual structure.
[0025] The first superconducting plate 21 extends from the second region B to the first region A, and the second superconducting plate 22 extends from the third region C to the first region A, that is, a portion of the first superconducting plate 21 is located in the second region B and a portion is located in the first region A. Similarly, a portion of the second superconducting plate 22 is located in the third region C and a portion is located in the first region A. The first superconducting plate 21 and the second superconducting plate 22 at least partially overlap in the first region A to form a first junction region JJ1 (shown in the shaded portion in the figure), and a barrier layer (not shown in the figure) is sandwiched in the first junction region JJ1. The first junction region JJ1 is a region where a superconducting tunnel effect occurs. In the first junction region JJ1, the first superconducting plate 21 and the second superconducting plate 22 are usually made of superconducting metal (such as aluminum), so the barrier layer can be an oxide on the surface of the first superconducting plate 21 or the second superconducting plate 22.
[0026] The first superconducting plate 21 and the second superconducting plate 22 are preferably rectangular, and the corresponding side lines are parallel, so that the shape of the first junction region JJ1 is also rectangular, which makes it easier to calculate the area.
[0027] The first superconducting tape 23 is connected to the first superconducting plate 21 in the second region B, and the second superconducting tape 24 is connected to the second superconducting plate 22 in the third region C. The first superconducting tape 23 and the second superconducting tape 24 both avoid the first region A. The first superconducting tape 23 will not enter the first region A from the second region B, and similarly, the second superconducting tape 24 will not enter the first region A from the third region C. The first superconducting tape 23 and the second superconducting tape 24 are both in the shape of lines, and their lengths and widths can be set according to actual needs. The first superconducting tape 23 and the second superconducting tape 24 can be made of the same material as the first superconducting plate 21 and the second superconducting plate 22, and the first superconducting tape 23 can be integrally formed with the first superconducting plate 21, and the second superconducting plate 22 can also be integrally formed with the second superconducting plate 22.
[0028] Since neither the first superconducting tape 23 nor the second superconducting tape 24 will enter the first region A, the area of the first junction region JJ1 will not be affected. In other words, the length and width of the first superconducting tape 23 and the second superconducting tape 24 will not affect the area of the first junction region JJ1. The area of the first junction region JJ1 is only determined by the overlapping portion of the first superconducting plate 21 and the second superconducting plate 22. The first superconducting tape 23 and the second superconducting tape 24 only play the role of transmitting signals, that is, only serve as transmission lines. In this embodiment, the area of the first junction region JJ1 is greater than the product of the line widths of the first superconducting tape 23 and the second superconducting tape 24. In order to facilitate process preparation, the line widths of the first superconducting tape 23 and the second superconducting tape 24 can be the same.
[0029] In this embodiment, the first region A borders the second region B and the third region C respectively, and a borderline between the first region A and the second region B is parallel to a borderline between the first region A and the third region C.
[0030] Furthermore, the first superconducting tape 23 is parallel to the boundary line between the first region A and the second region B, and the second superconducting tape 24 may be parallel to the boundary line between the first region A and the third region C, or may be perpendicular to the boundary line between the first region A and the third region C.
[0031] like Figure 1As shown, the first superconducting tape 23 is parallel to the boundary line between the first region A and the second region B, and the second superconducting tape 24 is parallel to the boundary line between the first region A and the third region C. Since the first superconducting plate 21 is only located in the first region A and the second region B, the first superconducting tape 23 is located in the second region B. Similarly, the second superconducting plate 22 is only located in the first region A and the third region C, so the second superconducting tape 24 is located in the third region C. If the first superconducting plate 21 extends in a direction away from the first region A to the outside of the second region B, and the second superconducting plate 22 extends in a direction away from the first region A to the outside of the third region C, then the first superconducting tape 23 can be located outside the second region B, and the second superconducting tape 24 can be located outside the third region C.
[0032] For example Figure 2 As shown, the first superconducting tape 23 is parallel to the boundary line between the first region A and the second region B, and the second superconducting tape 24 is perpendicular to the boundary line between the first region A and the third region C.
[0033] In the first junction region JJ1, the first superconducting plate 21 may be located below the second superconducting plate 22 or above the second superconducting plate 22. In this embodiment, the first superconducting plate 21 is located above the second superconducting plate 22, and the thickness of the first superconducting plate 21 is greater than the thickness of the second superconducting plate 22. Since the portion of the first superconducting plate 21 located on the substrate 1 and the portion located on the second superconducting plate 22 need to be connected as one, so that the first junction region JJ1 can be electrically connected to the first superconducting tape 23, therefore, when the thickness of the first superconducting plate 21 is greater than the thickness of the second superconducting plate 22, the portion of the first superconducting plate 21 located on the substrate 1 can exceed the second superconducting plate 22, thereby being connected to the portion of the first superconducting plate 21 located on the second superconducting plate 22, ensuring that the first junction region JJ1 can be electrically connected to the first superconducting tape 23.
[0034] In the above manner, the Josephson junction provided by the utility model includes a first superconducting plate and a second superconducting plate which at least partially overlap to form a junction region, and a first superconducting tape and a second superconducting tape respectively connect the first superconducting plate and the second superconducting plate, and both avoid the junction region. Since the widths of the first superconducting tape and the second superconducting tape do not affect the area of the junction region, the area of the junction region is only determined by the first superconducting plate and the second superconducting plate, thereby canceling the correlation between the area of the Josephson junction and the width of the superconducting tape, making the design of the junction region area of the Josephson junction more flexible, without considering the influence of the width of the superconducting tape.
[0035] Please refer to Figure 3The embodiment of the utility model also provides a quantum circuit, which includes the aforementioned Josephson junction and a third superconducting tape 25, wherein the third superconducting tape 25 overlaps with the first superconducting tape 21 to form a second junction region JJ2 (shown by the shaded portion in the figure), and the second junction region JJ2 is sandwiched with a barrier layer, and the area of the second junction region JJ2 is smaller than the area of the first junction region JJ1. In this embodiment, the third superconducting tape 25 is perpendicular to the first superconducting tape 23, parallel to the second superconducting tape 24, and has the same line width as the first superconducting tape 21 and the second superconducting tape 24.
[0036] Since the areas of the second junction region JJ2 and the first junction region JJ1 are different, and the junction area is inversely proportional to the junction resistance, the resistance of the second junction region JJ2 and the first junction region JJ1 are also different. In this way, when the two junction regions of the quantum circuit are connected in parallel, for example, the end of the second superconducting tape 24 away from the first junction region JJ1 is electrically connected to the end of the third superconducting tape 25 away from the second junction region JJ2, a superconducting quantum interference device with asymmetric resistance is formed.
[0037] For a quantum bit using a superconducting quantum interference device, the position with the highest frequency is called the sweet spot, also known as the degeneracy point. A quantum bit working at the degeneracy point usually has a higher decoherence time, but once the degeneracy point is offset, the decoherence time will drop significantly. However, due to various factors, the operating frequency of the quantum bit is usually not at the degeneracy point. The bit frequency of the non-degenerate point is related to the asymmetry of the superconducting quantum interference device. The smaller the asymmetry of the superconducting quantum interference device, the lower the bit frequency of the non-degenerate point. The greater the asymmetry of the superconducting quantum interference device, the higher the bit frequency of the non-degenerate point. The use of the superconducting quantum interference device with asymmetric resistance of the present embodiment can increase the frequency of the quantum bit non-degenerate point, improve the decoherence time, and help achieve stronger quantum information processing capabilities.
[0038] An embodiment of the utility model further provides a quantum chip, which includes the Josephson junction of the aforementioned embodiment, or the quantum circuit of the aforementioned embodiment.
[0039] Furthermore, an embodiment of the utility model also provides a quantum computer, which includes the quantum chip of the aforementioned embodiment.
[0040] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example" or "specific example" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.
[0041] The above are only preferred embodiments of the present invention and do not limit the present invention in any way. Any technician in the relevant technical field, without departing from the scope of the technical solution of the present invention, may make any equivalent replacement or modification to the technical solution and technical content disclosed in the present invention, which shall be deemed as the content of the technical solution of the present invention and still fall within the protection scope of the present invention.
Claims
1. A Josephson junction formed on a substrate, characterized in that: The substrate comprises a first region and a second region and a third region located on both sides of the first region, and the Josephson junction comprises: a first superconducting plate extending from the second region to the first region and a second superconducting plate extending from the third region to the first region, wherein the first superconducting plate and the second superconducting plate at least partially overlap in the first region to form a first junction region, and a barrier layer is interposed in the first junction region; A first superconducting tape connected to the first superconducting plate in the second region and a second superconducting tape connected to the second superconducting plate in the third region, wherein both the first superconducting tape and the second superconducting tape avoid the first region.
2. The Josephson junction according to claim 1, characterized in that: An area of the first junction region is larger than a product of line widths of the first superconducting tape and the second superconducting tape.
3. The Josephson junction according to claim 1, characterized in that: A boundary line between the first region and the second region is parallel to a boundary line between the first region and the third region.
4. The Josephson junction according to claim 3, characterized in that: The first superconducting tape is parallel to a boundary line between the first region and the second region.
5. The Josephson junction according to claim 4, characterized in that: The second superconducting tape is parallel to a boundary line between the first region and the second region.
6. The Josephson junction according to claim 4, characterized in that: The second superconducting tape is perpendicular to a boundary line between the first region and the third region.
7. The Josephson junction according to claim 1, characterized in that: The first superconducting plate is located above the second superconducting plate, and a thickness of the first superconducting plate is greater than a thickness of the second superconducting plate.
8. A quantum circuit, characterized in that: It comprises the Josephson junction as claimed in any one of claims 1 to 7 and a third superconducting tape, wherein the third superconducting tape overlaps with the first superconducting tape to form a second junction region, and the second junction region is provided with a barrier layer, and the area of the second junction region is smaller than that of the first junction region.
9. A quantum chip, characterized in that: It comprises the Josephson junction as described in any one of claims 1 to 7, or the quantum circuit as described in claim 8.
10. A quantum computer, characterized in that: Comprising the quantum chip as described in claim 9.