ETHERCAT master station control board based on F28377

Abstract

The utility model belongs to the technical field of ETHERCAT, and particularly relates to an ETHERCAT master station control board based on F28377. According to the utility model, high-speed and real-time communication in an ETHERCAT network can be realized, the expansibility and the high-speed performance of the ETHERCAT improve the communication capability and the control efficiency, and through the expanded 28-path DI and 28-path DO interfaces, the ETHERCAT system can flexibly interact with a plurality of external devices, adapt to complex industrial control requirements, improve the flexibility and the processing capability, and can be widely applied to the field of industrial control. Various interfaces and communication modules are integrated on one control panel, so that the design is simpler, the complexity of external expansion is reduced, the highly integrated design can improve the stability, reduce the possibility of communication delay and interface faults, conveniently control and debug an ETHERCAT slave station controller in a servo control system, and improve the reliability of the system. And a TWINCAT system based on a PC system does not need to be adopted.

Description

Technical Field

[0001] The utility model belongs to the technical field of ETHERCAT, and in particular relates to an ETHERCAT master station control board based on F28377. Background Art

[0002] In the field of industrial automation and servo control, real-time performance and data communication reliability are key factors to ensure efficient and stable operation of the system. Although traditional industrial Ethernet provides extensive connectivity and flexibility, it is insufficient in real-time performance and is difficult to meet the strict requirements of high-precision servo control systems. ETHERCAT (Ethernet for ControlAutomation Technology), as an Ethernet-based fieldbus system, greatly improves the real-time performance and efficiency of data transmission through its unique slave data processing mechanism and high-speed communication protocol, and has become the preferred solution in the field of servo industrial control.

[0003] However, the current application of ETHERCAT technology mainly relies on master debugging software such as TWINCAT based on the PC platform, which not only increases the cost of the system, but also makes the debugging process complicated and inflexible. Although the TWINCAT system is powerful, its dependence on hardware and high price limit its wide application in miniaturized and embedded control systems. At the same time, most of the existing ETHERCAT servo controllers exist as slave devices and lack controllers with integrated master functions, which to a certain extent limits the autonomy of the system and the convenience of debugging. Utility Model Content

[0004] The utility model aims to provide an ETHERCAT master station control board based on F28377, which can conveniently control and debug the ETHERCAT slave station controller in the servo control system without adopting a TWINCAT system based on a PC system.

[0005] The technical solution adopted by the utility model is as follows:

[0006] An ETHERCAT master station control board based on F28377, comprising:

[0007] The main CPU chip is used to execute control logic and data processing;

[0008] ECM-XF ETHERCAT master chip, ECM-XF ETHERCAT master chip is connected to the main CPU chip through the SPI bus to expand the ETHERCAT master function;

[0009] Digital DI interface, including at least 8 DI interfaces extended by ECM-XF ETHERCAT master chip and at least 20 DI interfaces directly derived from the main CPU chip, totaling at least 28 DI interfaces, for receiving external digital signals;

[0010] Digital DO interface, including at least 8 DO interfaces extended by ECM-XF ETHERCAT master chip and at least 20 DO interfaces directly derived from the main CPU chip, totaling at least 28 DO interfaces, used to output control signals;

[0011] W5300 Ethernet controller, which is connected to the main CPU chip via the SPI bus and is used to expand at least two LAN interfaces;

[0012] CTM1051A CAN controller, which is connected to the ECAN module of the main CPU chip to expand at least two CAN communication interfaces;

[0013] DAC interface, the DAC interface is connected to the main CPU chip via the SPI bus and is used to provide at least two DAC interfaces;

[0014] QEP interface: The QEP interface is brought out through the EQEP module of the main CPU chip and is used to provide at least two QEP interfaces.

[0015] In a preferred solution, the main CPU chip includes any one of TMS320F28377D and TMS320F28379D.

[0016] In a preferred solution, an ETHERCAT interface is further included, and the ETHERCAT interface is expanded through an ECM-XF ETHERCAT master chip for connecting to an ETHERCAT network.

[0017] In a preferred solution, a USB interface is also included, and the USB interface is extended through an ECM-XF ETHERCAT master chip to provide connection with a USB device.

[0018] In a preferred solution, it also includes an RS485 interface, which is led out through the SCI interface of the main CPU chip to support RS485 serial communication.

[0019] The technical effects achieved by the utility model are:

[0020] The utility model, in which the ECM-XF ETHERCAT master chip cooperates with the main CPU chip, can realize high-speed and real-time communication in the ETHERCAT network, and is particularly suitable for application scenarios such as industrial automation and motion control that require low latency and high-precision synchronization. The scalability and high-speed performance of ETHERCAT improve communication capabilities and control efficiency. Through the expanded 28-channel DI and 28-channel DO interfaces, it can flexibly interact with multiple external devices to adapt to complex industrial control needs. The rich IO interfaces jointly provided by the main CPU chip and the ETHERCAT master chip have high scalability, support multi-device parallel operation, and improve flexibility and processing capabilities. By integrating multiple interfaces and communication modules on a control board, the design is simpler and the complexity of external expansion is reduced. The highly integrated design can improve stability, reduce the possibility of communication delays and interface failures, and facilitate the control and debugging of the ETHERCAT slave controller in the servo control system, without the need to adopt a TWINCAT system based on a PC system. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a system module diagram provided by the utility model. DETAILED DESCRIPTION

[0022] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the accompanying drawings.

[0023] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.

[0024] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure or characteristic that may be included in at least one implementation of the present invention. The phrase "in a preferred embodiment" that appears in different places in this specification does not refer to the same embodiment, nor is it a separate or selective embodiment that is mutually exclusive with other embodiments.

[0025] Secondly, the present invention is described in detail with reference to the schematic diagrams. When describing the embodiments of the present invention in detail, for the sake of convenience, the schematic diagrams are only examples and should not limit the scope of protection of the present invention.

[0026] Please see attached Figure 1 As shown, an ETHERCAT master station control board based on F28377 is provided, including:

[0027] The main CPU chip is used to execute control logic and data processing;

[0028] ECM-XF ETHERCAT master chip, ECM-XF ETHERCAT master chip is connected to the main CPU chip through the SPI bus to expand the ETHERCAT master function;

[0029] Digital DI interface, including at least 8 DI interfaces extended by ECM-XF ETHERCAT master chip and at least 20 DI interfaces directly derived from the main CPU chip, totaling at least 28 DI interfaces, for receiving external digital signals;

[0030] Digital DO interface, including at least 8 DO interfaces extended by ECM-XF ETHERCAT master chip and at least 20 DO interfaces directly derived from the main CPU chip, totaling at least 28 DO interfaces, used to output control signals;

[0031] W5300 Ethernet controller, which is connected to the main CPU chip via the SPI bus and is used to expand at least two LAN interfaces;

[0032] CTM1051A CAN controller, which is connected to the ECAN module of the main CPU chip to expand at least two CAN communication interfaces;

[0033] DAC interface, the DAC interface is connected to the main CPU chip via the SPI bus and is used to provide at least two DAC interfaces;

[0034] QEP interface: The QEP interface is brought out through the EQEP module of the main CPU chip and is used to provide at least two QEP interfaces.

[0035] As mentioned above, the main CPU chip is responsible for executing the main control logic and data processing tasks. The ECM-XF ETHERCAT master chip is connected to the main CPU chip through the SPI bus to expand the ETHERCAT master function. ETHERCAT is a high-performance real-time Ethernet communication protocol. The ECM-XF ETHERCAT master chip is responsible for communicating with the slave devices in the ETHERCAT network to achieve high-speed, real-time data exchange. The main CPU chip transmits instructions and interacts with the ECM-XF ETHERCAT master chip through the SPI bus to manage data transmission and control commands on the ETHERCAT bus. The digital DI interface (for receiving external digital signals) and the digital DO interface (for outputting control signals) are jointly led by the main CPU chip and the ECM-XF ETHERCAT master chip, respectively. The ETHERCAT master chip provides at least 8 DI and 8 DO interfaces through its expansion capability, while the main CPU chip provides at least 20 DI and 20 DO interfaces through its directly derived IO ports, ensuring sufficient input and output channels for communication with external devices. These interfaces are managed by the main CPU chip, which collects the status information of external devices in real time and performs corresponding control operations. The W5300 Ethernet controller is connected to the main CPU chip through the SPI bus, and expands at least two LAN interfaces for communication with the local area network or other network devices. The main CPU chip controls the W5300 to perform network data transmission through the SPI bus, realizing the bridging or data exchange function of ETHERCAT and other networks. The M1051A CAN controller is connected through the ECAN module of the main CPU chip, and expands at least two CAN communication interfaces for communicating with other CAN bus devices. The CTM1051A is responsible for transmitting CAN bus data to the main CPU chip for processing and sending control instructions to the CAN device. The DAC interface is connected to the main CPU chip through the SPI bus, providing at least two DAC interfaces for digital-to-analog conversion, and can output analog signals according to application requirements. The QEP interface is led out through the EQEP module of the main CPU chip, providing at least two interfaces for high-precision encoders to achieve accurate position signals and speed feedback, which are used for servo motors or other rotating equipment in the control system. ECM-XF The ETHERCAT master chip can achieve high-speed, real-time communication in the ETHERCAT network by working in conjunction with the main CPU chip. It is particularly suitable for industrial automation, motion control and other application scenarios that require low latency and high-precision synchronization. The scalability and high-speed performance of ETHERCAT improve communication capabilities and control efficiency. Through the expanded 28-channel DI and 28-channel DO interfaces, it can flexibly interact with multiple external devices to adapt to complex industrial control requirements. It has high scalability and supports parallel operation of multiple devices.Improve flexibility and processing power. By integrating multiple interfaces and communication modules on one control board, the design is simpler and the complexity of external expansion is reduced. The highly integrated design can improve stability, reduce the possibility of communication delays and interface failures, and facilitate the control and debugging of the ETHERCAT slave controller in the servo control system. There is no need to use the PC-based TWINCAT system.

[0036] It should be noted that the main CPU chip includes any one of TMS320F28377D and TMS320F28379D. Any one of TMS320F28377D or TMS320F28379D can be used as the main CPU chip, which has high-performance floating-point processing capabilities and digital signal processing functions, supports complex control algorithms and real-time data processing, and can efficiently collaborate with external interfaces and communication modules through hardware peripherals (such as SPI, EQEP, ECAN, etc.) to achieve precise control and rapid response.

[0037] It is worth mentioning that the main CPU chip is also connected to a startup circuit, a power supply circuit, a JTAG circuit, a crystal oscillator circuit and a reset circuit, but the startup circuit, the power supply circuit, the JTAG circuit, the crystal oscillator circuit and the reset circuit are conventional existing technologies and will not be elaborated on here.

[0038] In a preferred embodiment, it also includes an ETHERCAT interface, which is expanded through an ECM-XFETHERCAT master station chip and is used to connect to an ETHERCAT network.

[0039] As mentioned above, the ETHERCAT interface is expanded through the ECM-XF ETHERCAT master chip, which is responsible for connecting the main CPU chip (TMS320F28377D or TMS320F28379D) to the ETHERCAT network for communication. The ECM-XFETHERCAT master chip communicates with the main CPU chip through the SPI bus. The main CPU chip sends and receives data through the SPI interface. The ECM-XF ETHERCAT master chip converts these data into a format that complies with the ETHERCAT protocol and transmits them through the ETHERCAT interface. ETHERCAT is a real-time industrial Ethernet protocol that can provide high-speed, low-latency data transmission. The ETHERCAT interface is used to connect to the ETHERCAT network and exchange high-speed data with other devices (such as sensors, actuators, PLCs, etc.). Through the control of the main CPU chip, the ECM-XF ETHERCAT chip can quickly respond to data requests from the ETHERCAT network and transmit control signals to other devices in the network in real time.

[0040] In a preferred embodiment, it also includes a USB interface, which is extended by an ECM-XF ETHERCAT master chip to provide connection with a USB device.

[0041] As mentioned above, while processing ETHERCAT communication, the ECM-XF ETHERCAT master chip can expand the USB interface through the integrated USB control module to achieve connection with the USB device. The main CPU chip (such as TMS320F28377D or TMS320F28379D) communicates with the ECM-XF ETHERCAT master chip through the SPI bus. The main CPU chip controls the operation of the USB device through the SPI interface and processes the data transmitted by the USB device. Through the USB interface, it can connect a variety of USB devices, such as storage devices (U disk), keyboards, mice, communication modules, cameras, etc.

[0042] In a preferred embodiment, it also includes an RS485 interface, which is led out through the SCI interface of the main CPU chip to support RS485 serial communication.

[0043] As mentioned above, the RS485 interface is brought out through the SCI (serial communication interface) module of the main CPU chip to realize serial communication. The main CPU chip (such as TMS320F28377D or TMS320F28379D) controls the data transmission of the RS485 interface through its built-in SCI module. The SCI module is responsible for converting the parallel data of the main CPU chip into serial data and sending it out through the RS485 interface. At the same time, it receives serial data from external devices and converts it into parallel data that can be processed by the main CPU chip. RS485 is a half-duplex communication protocol used in long distance and noisy environments, and can perform stable two-way data communication in a bus network of multiple devices.

[0044] The above is only a preferred embodiment of the present invention. It should be noted that, for ordinary technicians in the technical field, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be regarded as the protection scope of the present invention. The structures, devices and operating methods not specifically described and explained in the present invention shall be implemented according to the conventional means in the field unless otherwise specified and limited.

Claims

1. An ETHERCAT master station control board based on F28377, characterized in that: include: The main CPU chip is used to execute control logic and data processing; ECM-XF ETHERCAT master chip, ECM-XF ETHERCAT master chip is connected to the main CPU chip through the SPI bus to expand the ETHERCAT master function; Digital DI interface, including at least 8 DI interfaces extended by ECM-XF ETHERCAT master chip and at least 20 DI interfaces directly derived from the main CPU chip, totaling at least 28 DI interfaces, for receiving external digital signals; Digital DO interface, including at least 8 DO interfaces extended by ECM-XF ETHERCAT master chip and at least 20 DO interfaces directly derived from the main CPU chip, totaling at least 28 DO interfaces, used to output control signals; W5300 Ethernet controller, which is connected to the main CPU chip via the SPI bus and is used to expand at least two LAN interfaces; CTM1051A CAN controller, which is connected to the ECAN module of the main CPU chip to expand at least two CAN communication interfaces; DAC interface, the DAC interface is connected to the main CPU chip via the SPI bus and is used to provide at least two DAC interfaces; QEP interface: The QEP interface is brought out through the EQEP module of the main CPU chip and is used to provide at least two QEP interfaces.

2. The ETHERCAT master station control board based on F28377 according to claim 1, characterized in that: The main CPU chip includes any one of TMS320F28377D and TMS320F28379D.

3. The ETHERCAT master station control board based on F28377 according to claim 1, characterized in that: It also includes an ETHERCAT interface, which is extended via the ECM-XF ETHERCAT master chip for connecting to an ETHERCAT network.

4. The ETHERCAT master station control board based on F28377 according to claim 1, characterized in that: It also includes a USB interface, which is expanded through an ECM-XF ETHERCAT master chip to provide connection with USB devices.

5. The ETHERCAT master station control board based on F28377 according to claim 1, characterized in that: It also includes an RS485 interface, which is led out through the SCI interface of the main CPU chip to support RS485 serial communication.

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