Underground communication circuit and underground communication system
By designing downhole communication circuits and using MOS tubes and buffers to realize single bus communication, the problems of complexity and high failure rate of existing downhole operating equipment are solved, and reliable communication and low-cost operation of downhole equipment are achieved.
Patent Information
- Application Number
- CN202422346136.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-25
- Publication Date
- 2025-07-22
- Estimated Expiration
- 2034-09-25
AI Technical Summary
The 485/232 half-duplex communication circuit of the existing underground operation equipment has complex topology, many connection lines and high failure rate, making it difficult to ensure the reliable operation of underground operation equipment.
The downhole communication circuit design is adopted, including a first switching unit, a second switching unit, a third switching unit and a resistor unit, communication between downhole equipment is realized through a single bus connection, and a MOS tube and a buffer are used to ensure reliable data transmission.
It realizes simple and convenient communication of underground operation equipment, reduces costs, and improves the reliability of communication and the reliability of equipment underground operation.
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Figure CN223142049U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technologies, and particularly to an underground communication circuit and an underground communication system. Background Art
[0002] During underground operations such as in oil and coal mines, underground operation equipment (such as measurement-while-drilling instruments) usually adopts a 485 / 232 half-duplex communication circuit to transmit underground environmental parameter information, equipment operation information, personnel location information, etc. to an underground monitoring sub-station and a ground dispatching center, so as to provide an important safety guarantee for the safe production of oil mines, coal mines, etc. However, the 485 / 232 half-duplex communication circuit has problems such as complex topology, many connection lines, and high failure rate, making it difficult to ensure the reliable operation of underground operation equipment underground. Utility Model Content
[0003] This application aims to at least solve one of the technical problems in the related technologies to some extent. For this purpose, the objective of this application is to propose an underground communication circuit and an underground communication system to achieve simple and convenient communication underground, thereby ensuring the reliable operation of underground operation equipment underground.
[0004] In a first aspect, this application proposes an underground communication circuit, including: a first switch unit, a second switch unit, a third switch unit, and a resistor unit; wherein, a first end of the first switch unit is used to be connected to a first communication end through a bus and is respectively connected to a first end of the second switch unit and a first end of the resistor unit, a second end of the first switch unit is used to be respectively connected to a data sending end and a data receiving end of a second communication end and is connected to a second end of the second switch unit, a control end of the first switch unit is connected to a preset power supply, a control end of the second switch unit is respectively connected to a second end of the resistor unit and a first end of the third switch unit, a second end of the third switch unit is grounded, and a control end of the third switch unit is connected to the preset power supply.
[0005] In some examples, the circuit further includes: a first buffer and a second buffer; wherein, a first end of the first buffer is used to be connected to the data sending end of the second communication end, a second end of the first buffer is respectively connected to a second end of the first switch unit and a second end of the second switch unit, a first end of the second buffer is used to be connected to the data receiving end of the second communication end, a second end of the second buffer is respectively connected to a second end of the first switch unit and a second end of the second switch unit, and an enable end of the first buffer and an enable end of the second buffer are both used to be connected to an enable signal output end of the second communication end.
[0006] In some examples, the first switching unit includes a first NMOS transistor. The drain of the first NMOS transistor serves as the first end of the first switching unit, the source of the first NMOS transistor serves as the second end of the first switching unit, and the gate of the first NMOS transistor serves as the control end of the first switching unit.
[0007] In some examples, the second switching unit includes a PMOS transistor. The source of the PMOS transistor serves as the first end of the second switching unit, the drain of the PMOS transistor serves as the second end of the second switching unit, and the gate of the PMOS transistor serves as the control end of the second switching unit.
[0008] In some examples, the third switching unit includes a second NMOS transistor. The drain of the second NMOS transistor serves as the first end of the third switching unit, the source of the second NMOS transistor serves as the second end of the third switching unit, and the gate of the second NMOS transistor serves as the control end of the third switching unit.
[0009] In some examples, the circuit further includes: a first capacitor and a second capacitor. The first end of the first capacitor is grounded, the second end of the first capacitor is connected to the control end of the third switching unit, the first end of the second capacitor is grounded, and the second end of the second capacitor is connected to the control end of the first switching unit.
[0010] In some examples, the second end of the first buffer is connected to the second end of the first switching unit and the second end of the second switching unit respectively through a first resistor, and the second end of the second buffer is connected to the second end of the first switching unit and the second end of the second switching unit respectively through a second resistor.
[0011] In some examples, the preset power supply is connected to the control end of the third switching unit through a fourth resistor and a third resistor in sequence, and the preset power supply is also connected to the control end of the first switching unit through the fourth resistor and a fifth resistor in sequence.
[0012] In some examples, the preset power supply is a +5V power supply.
[0013] In a second aspect, the present application provides an underground communication system, including: a first communication end, a second communication end, and the underground communication circuit described in the first aspect above.
[0014] With the underground communication circuit and the underground communication system of the present application, through the settings of the first switching unit, the second switching unit, the third switching unit, and the resistor unit, one or two paths can exist between the first communication end and the second communication end, so that single-bus communication can be realized, meeting the communication requirements of underground operation equipment during underground work, making the communication convenient, and reducing the cost at the same time. Description of the Drawings
[0015] Figure 1 is a schematic structural diagram of an underground communication circuit according to an example of the present application;
[0016] Figure 2 is a schematic structural diagram of an underground communication circuit according to another embodiment of the present application;
[0017] Figure 3 is a topology diagram of an underground communication circuit according to the first specific embodiment of the present application;
[0018] Figure 4 is a topology diagram of an underground communication circuit according to the second specific embodiment of the present application;
[0019] Figure 5 is a topology diagram of an underground communication circuit according to the third specific embodiment of the present application;
[0020] Figure 6 is a topology diagram of an underground communication circuit according to the fourth specific embodiment of the present application;
[0021] Figure 7 is a structural block diagram of an underground communication system according to an embodiment of the present application.
[0022] Description of the Reference Numerals:
[0023] Underground communication system 1000;
[0024] Underground communication circuit 100, first communication end 200, second communication end 300;
[0025] First switch unit 10, second switch unit 20, third switch unit 30, resistor unit 40, first buffer U1, second buffer U2, first NMOS transistor Q1, PMOS transistor Q2, second NMOS transistor Q3, first capacitor C1, second capacitor C2, first resistor R1, second resistor R2, third resistor R3, fourth resistor R4, fifth resistor R5, sixth resistor R6;
[0026] Data transmission end TX, data reception end RX, preset power supply VCC, ground GND. Detailed Description of the Embodiments
[0027] The embodiments of the present application will be described in detail below. Examples of the embodiments are shown in the drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the drawings are exemplary and are intended to explain the present application and should not be construed as limiting the present application.
[0028] Due to the spatial requirements of the mechanical connection structure between the components of downhole operation equipment and the limitations of mechanical installation, the single bus has great operational and reliability advantages in electrical and mechanical structure design. In this bus structure, signals and power supply are multiplexed, that is, the power supply current and communication signals are transmitted simultaneously in the same wire. Based on this, the present application proposes a downhole communication circuit and a downhole communication system to ensure convenient communication and effectively reduce costs.
[0029] The downhole communication circuit and the downhole communication system according to the embodiments of the present application will be described below with reference to the accompanying drawings.
[0030] Figure 1 It is a schematic structural diagram of a downhole communication circuit according to an embodiment of the present application.
[0031] As Figure 1 shown, the downhole communication circuit 100 includes: a first switch unit 10, a second switch unit 20, a third switch unit 30, and a resistor unit 40.
[0032] Among them, the first end of the first switch unit 10 is used to be connected to the first communication end 200 (such as a host computer, the number can be one or more) through a bus, and is respectively connected to the first end of the second switch unit 20 and the first end of the resistor unit 40. The second end of the first switch unit 10 is used to be respectively connected to the data sending end TX and the data receiving end RX of the second communication end 300 (such as a microprocessor, which can be set in the downhole operation equipment and can communicate with one or more first communication ends 200 through a bus), and is connected to the second end of the second switch unit 20. The control end of the first switch unit 10 is connected to a preset power supply VCC (such as a +5V power supply). The control end of the second switch unit 20 is respectively connected to the second end of the resistor unit 40 and the first end of the third switch unit 30. The second end of the third switch unit 30 is grounded to GND, and the control end of the third switch unit 30 is connected to the preset power supply VCC.
[0033] In this embodiment, referring to Figure 1 , the first switch unit 10 can be constantly turned on under the action of the preset power supply VCC, so that there is at least one path between the first communication end 200 and the second communication end 300. While meeting the communication requirements, the implementation method is simple. The third switch unit 30 can be constantly turned on under the action of the preset power supply VCC, so that the second switch unit 20 can be selectively turned on under the action of the level on the bus and the resistor unit 40. When the second switch unit 20 is turned on, there are at least two paths between the first communication end 200 and the second communication end 300, improving the reliability of communication.
[0034] Thus, the downhole communication circuit 100 can realize single-bus communication, meet the communication requirements of downhole operation equipment during downhole work, and can make communication convenient and reduce costs at the same time.
[0035] In some embodiments of the present application, as Figure 2 shown, the downhole communication circuit 100 further includes: a first buffer U1 and a second buffer U2.
[0036] Among them, the first end of the first buffer U1 is used to connect the data sending end TX of the second communication end 300, the second end of the first buffer U1 is respectively connected to the second end of the first switch unit 10 and the second end of the second switch unit 20, the first end of the second buffer U2 is used to connect the data receiving end RX of the second communication end 300, the second end of the second buffer U2 is respectively connected to the second end of the first switch unit 10 and the second end of the second switch unit 20, and the enable ends ENB1 of the first buffer U1 and ENB2 of the second buffer U2 are both used to connect the enable signal output end ENABLE of the second communication end 300.
[0037] See Figure 2 . The second communication end 300 controls the data transmission interface and the transmission enable signal. When the enable signal is pulled low (i.e., at a low level) by the second communication end 300, the outputs of the first buffer U1 and the second buffer U2 are reversed with respect to the inputs, that is, the inputs become outputs and the outputs become inputs. Among them, the functions of the first buffer U1 and the second buffer U2 are to ensure synchronous data sending and receiving. When the enable signal is pulled high (i.e., at a high level) by the second communication end 300, the outputs of the first buffer U1 and the second buffer U2 are in a high-impedance state, and the first buffer U1 and the second buffer U2 are in the transceiver state to ensure data relay transmission without affecting the logic of the data.
[0038] In some embodiments of the present application, as Figure 3 shown, the first switch unit 10 includes a first NMOS transistor Q1. The drain of the first NMOS transistor Q1 serves as the first end of the first switch unit 10, the source of the first NMOS transistor Q1 serves as the second end of the first switch unit 10, and the gate of the first NMOS transistor Q1 serves as the control end of the first switch unit 10. The second switch unit 20 includes a PMOS transistor Q2. The source of the PMOS transistor Q2 serves as the first end of the second switch unit 20, the drain of the PMOS transistor Q2 serves as the second end of the second switch unit 20, and the gate of the PMOS transistor Q2 serves as the control end of the second switch unit 20. The third switch unit 30 includes a second NMOS transistor Q3. The drain of the second NMOS transistor Q3 serves as the first end of the third switch unit 30, the source of the second NMOS transistor Q3 serves as the second end of the third switch unit 30, and the gate of the second NMOS transistor Q3 serves as the control end of the third switch unit 30.
[0039] See Figure 3, this application uses the downhole communication circuit 100 built with MOS transistors. In this embodiment, the communication process between the first communication terminal 200 and the second communication terminal 300 is as follows:
[0040] When the second communication terminal 300 transmits a high-level enable signal, both the first buffer U1 and the second buffer U2 are in a high-impedance state, and the second communication terminal 300 transmits data through the data transmission terminal TX. If the transmitted data is high level, since the gate of the first NMOS transistor Q1 is pulled high, the first NMOS transistor Q1 is turned on, and the high level is transmitted to the bus through the first NMOS transistor Q1. At this time, the high level of the bus causes the PMOS transistor Q2 to turn off. If the transmitted data is low level, since the gate of the first NMOS transistor Q1 is pulled high, the first NMOS transistor Q1 is turned on, and the low level is transmitted to the bus through the first NMOS transistor Q1; at the same time, since the gate of the PMOS transistor Q2 is grounded through the second NMOS transistor Q3 and connected to the low level of the bus and the source of the PMOS transistor Q2 through the resistor unit 40, the PMOS transistor Q2 is turned on, and the low level is also transmitted to the bus through the PMOS transistor Q2.
[0041] When the second communication terminal 300 transmits a low-level enable signal, the outputs of the first buffer U1 and the second buffer U2 are inverted with respect to the inputs, and the second communication terminal 300 receives data through the data reception terminal RX. If the first communication terminal 200 transmits a high level through the bus, since the gate of the first NMOS transistor Q1 is pulled high, the first NMOS transistor Q1 is turned on, and the low level is transmitted to the data reception terminal RX of the second communication terminal 300 through the first NMOS transistor Q1. If the first communication terminal 200 transmits a low level through the bus, since the gate of the first NMOS transistor Q1 is pulled high, the first NMOS transistor Q1 is turned on, and the low level is transmitted to the data reception terminal RX of the second communication terminal 300 through the first NMOS transistor Q1; at the same time, since the gate of the PMOS transistor Q2 is grounded through the second NMOS transistor Q3 and connected to the low level of the bus and the source of the PMOS transistor Q2 through the resistor unit 40, the PMOS transistor Q2 is turned on, and the low level is also transmitted to the data reception terminal RX of the second communication terminal 300 through the PMOS transistor Q2.
[0042] Thus, the communication between the first communication terminal 200 and the second communication terminal 300 is realized, and due to the setting of the MOS transistors, the downhole communication circuit 100 in this application enables downhole operation equipment (such as a measurement-while-drilling instrument) to work normally and reliably under high-temperature conditions downhole.
[0043] In some embodiments of this application, such as Figure 4As shown, the downhole communication circuit 100 further includes: a first capacitor C1 and a second capacitor C2. The first end of the first capacitor C1 is grounded to GND, and the second end of the first capacitor C1 is connected to the control end of the third switch unit 30. The first end of the second capacitor C2 is grounded, and the second end of the second capacitor C2 is connected to the control end of the first switch unit 10.
[0044] The first capacitor C1 and the second capacitor C2 are used for energy storage. Through the settings of the first capacitor C1 and the second capacitor C2, the first NMOS transistor Q1 and the second NMOS transistor Q3 can be stably turned on, thereby realizing the reliability of communication between the first communication end 200 and the second communication end 300.
[0045] In some examples, as Figure 5 shown, the second end of the first buffer 50 is respectively connected to the second end of the first switch unit 10 and the second end of the second switch unit 20 through a first resistor R1, and the second end of the second buffer 60 is respectively connected to the second end of the first switch unit 10 and the second end of the second switch unit 20 through a second resistor R2.
[0046] Among them, the first resistor R1 and the second resistor R2 can be selected according to needs to achieve current limiting and prevent corresponding buffers, MOS transistors, etc. from being damaged due to overcurrent.
[0047] In some examples, the second end of the first buffer 50 can be respectively connected to the second end of the first switch unit 10 and the second end of the second switch unit 20 through a first overvoltage protection unit, and the second end of the second buffer 60 is respectively connected to the second end of the first switch unit 10 and the second end of the second switch unit 20 through a second overvoltage protection unit to achieve overvoltage protection of the circuit.
[0048] Among them, the first overvoltage protection unit and the second overvoltage protection unit have the same structure and both can include a zener diode. The cathode of the zener diode in the first overvoltage protection unit is connected to the second end of the first buffer 50, the anode is connected to the first node (the connection point of the second end of the first switch unit 10 and the second end of the second switch unit 20) in series with a resistor, and is grounded through a capacitor; the cathode of the zener diode in the second overvoltage protection unit is connected to the first node (the connection point of the second end of the first switch unit 10 and the second end of the second switch unit 20), the anode is connected to the second end of the second buffer 50 in series with a resistor, and is grounded through a capacitor.
[0049] In some examples, as Figure 6 shown, the preset power supply VCC is sequentially connected to the control end of the third switch unit 30 through a fourth resistor R4 and a third resistor R3, and the preset power supply VCC is also sequentially connected to the control end of the first switch unit 10 through a fourth resistor R4 and a fifth resistor R5.
[0050] Among them, the fourth resistor R4, the third resistor R3, and the fifth resistor R5 can be selected according to needs and used as a voltage divider to control the voltages provided to the gates of the first NMOS transistor Q1 and the second NMOS transistor Q3.
[0051] In some embodiments of the present application, the resistor unit 40 may include one or more resistors. When including one resistor, reference may be made to the sixth resistor R6 in Figure 6 . When including multiple resistors, the multiple resistors may be connected in series or in parallel.
[0052] Among them, the resistors in the resistor unit 40 can be selected according to needs to adjust the switching state of the PMOS transistor Q2.
[0053] Figure 7 is a structural block diagram of the downhole communication system according to the embodiments of the present application.
[0054] As shown in Figure 7 , the downhole communication system 1000 includes: a first communication end 200, a second communication end 300, and the downhole communication circuit 100 of the above embodiments.
[0055] In some examples, the downhole communication circuit 100 and the second communication end 300 may be integrally provided, such as being integrated in downhole operation equipment.
[0056] It should be understood that each part of the present application can be implemented by hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, any one or a combination of the following well-known technologies in the art can be used: discrete logic circuits with logic gate circuits for implementing logic functions on data signals, application-specific integrated circuits with appropriate combinational logic gate circuits, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.
[0057] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0058] In the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the present application.
[0059] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of such features. In the description of the present application, the meaning of "a plurality of" is at least two, such as two, three, etc., unless otherwise specifically and clearly defined.
[0060] In the present application, unless otherwise clearly specified and limited, the terms "mounted", "connected", "coupled", "fixed", etc. shall be construed in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral body; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.
[0061] In the present application, unless otherwise clearly specified and limited, the first feature being "on" or "under" the second feature may be that the first and second features are in direct contact, or the first and second features are indirectly in contact through an intermediate medium. Moreover, the first feature being "above", "over" and "on top of" the second feature may be that the first feature is directly above or obliquely above the second feature, or merely indicates that the first feature has a higher horizontal height than the second feature. The first feature being "under", "beneath" and "underneath" the second feature may be that the first feature is directly below or obliquely below the second feature, or merely indicates that the first feature has a lower horizontal height than the second feature.
[0062] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as a limitation on the present application. Those of ordinary skill in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present application.
Claims
1. An underground communication circuit, characterized in that, Comprising: A first switch unit, a second switch unit, a third switch unit, and a resistor unit; Wherein, the first end of the first switch unit is used to be connected to a first communication terminal through a bus, and is respectively connected to the first end of the second switch unit and the first end of the resistor unit. The second end of the first switch unit is used to be respectively connected to the data sending end and the data receiving end of a second communication terminal, and is connected to the second end of the second switch unit. The control end of the first switch unit is connected to a preset power supply. The control end of the second switch unit is respectively connected to the second end of the resistor unit and the first end of the third switch unit. The second end of the third switch unit is grounded. The control end of the third switch unit is connected to the preset power supply.
2. The downhole communication circuit according to claim 1, characterized in that, The circuit further comprises: a first buffer and a second buffer; Wherein, the first end of the first buffer is used to be connected to the data sending end of the second communication terminal. The second end of the first buffer is respectively connected to the second end of the first switch unit and the second end of the second switch unit. The first end of the second buffer is used to be connected to the data receiving end of the second communication terminal. The second end of the second buffer is respectively connected to the second end of the first switch unit and the second end of the second switch unit. The enable ends of the first buffer and the second buffer are both used to be connected to the enable signal output end of the second communication terminal.
3. The downhole communication circuit according to claim 1, characterized in that, The first switch unit includes a first NMOS transistor. The drain of the first NMOS transistor serves as the first end of the first switch unit. The source of the first NMOS transistor serves as the second end of the first switch unit. The gate of the first NMOS transistor serves as the control end of the first switch unit.
4. The downhole communication circuit according to claim 1, characterized in that, The second switch unit includes a PMOS transistor. The source of the PMOS transistor serves as the first end of the second switch unit. The drain of the PMOS transistor serves as the second end of the second switch unit. The gate of the PMOS transistor serves as the control end of the second switch unit.
5. The downhole communication circuit according to claim 1, wherein The third switch unit includes a second NMOS transistor. The drain of the second NMOS transistor serves as the first end of the third switch unit. The source of the second NMOS transistor serves as the second end of the third switch unit. The gate of the second NMOS transistor serves as the control end of the third switch unit.
6. The downhole communication circuit according to claim 1, wherein The circuit further comprises: a first capacitor and a second capacitor. The first end of the first capacitor is grounded. The second end of the first capacitor is connected to the control end of the third switch unit. The first end of the second capacitor is grounded. The second end of the second capacitor is connected to the control end of the first switch unit.
7. The downhole communication circuit according to claim 2, characterized in that, The second end of the first buffer is respectively connected to the second end of the first switch unit and the second end of the second switch unit through a first resistor. The second end of the second buffer is respectively connected to the second end of the first switch unit and the second end of the second switch unit through a second resistor.
8. The downhole communication circuit according to claim 1, wherein, The preset power supply is sequentially connected to the control end of the third switching unit through a fourth resistor and a third resistor, and the preset power supply is also sequentially connected to the control end of the first switching unit through the fourth resistor and a fifth resistor.
9. The downhole communication circuit according to claim 1, wherein The preset power supply is a +5V power supply.
10. An underground communication system, characterized in that, Comprising: A first communication terminal, a second communication terminal, and the downhole communication circuit according to any one of claims 1-9.