Microdisplay device

Abstract

The utility model discloses a micro display device, which belongs to the technical field of semiconductors and comprises a driving wafer and a display device layer arranged on the driving wafer. The display device layer is filled with an insulating layer; a sub-pixel is arranged in the insulating layer, and the top height of the sub-pixel is not lower than the top height of the insulating layer around the sub-pixel, so that the top of the sub-pixel is exposed; a metal fence is further arranged in the insulating layer, and the sub-pixels are surrounded by the metal fence. Based on the technical scheme, the height of the insulating layer in the display device layer is controlled, and the metal fence is additionally arranged in the insulating layer, so that the heat dissipation capability of the device is effectively improved, and the influence of a poor heat dissipation effect on the display performance of the micro display device is avoided.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductors, and particularly relates to a microdisplay device. Background Art

[0002] Micro LED (Micro Light Emitting Diode) is the core chip of devices such as AR (Augmented Reality) / VR (Virtual Reality). Due to the characteristics of small size, high integration, and self-luminescence of Micro LED chips, compared with technologies such as LCOS (Liquid Crystal on Silicon) and OLED (Organic Light Emitting Diode), Micro LED is regarded as the best solution because of its advantages such as high resolution, low power consumption, high brightness, and long lifespan.

[0003] However, as the chip size gradually shrinks, its surface area and heat dissipation capacity also decrease. The heat dissipation capacity of small-sized MicroLED chips is limited, and it is difficult to quickly and effectively dissipate heat, resulting in an increase in chip temperature. In a high-temperature environment, the current efficiency and luminous efficiency will significantly decrease, and even cause thermal failure problems.

[0004] Therefore, there is an urgent need for a new technical solution to avoid the influence of limited heat dissipation capacity on the display performance of microdisplay chips. Summary of the Utility Model

[0005] The purpose of the utility model is to provide a microdisplay device with better heat dissipation capacity.

[0006] To achieve the above-mentioned utility model purpose, the utility model proposes the following technical solutions:

[0007] A microdisplay device, the microdisplay device includes a driving wafer and a display device layer disposed on the driving wafer;

[0008] The display device layer is filled with an insulating layer;

[0009] Sub-pixels are disposed in the insulating layer, and the top height of the sub-pixels is not lower than the top height of the insulating layer around the sub-pixels to expose the top of the sub-pixels;

[0010] A metal fence is also disposed in the insulating layer, and the metal fence surrounds the sub-pixels.

[0011] In a possible implementation, the top height of the sub-pixels is flush with the top height of the insulating layer around the sub-pixels to expose the entire upper surface of the top of the sub-pixels.

[0012] In a possible implementation, the top height of the sub-pixels is higher than the top height of the insulating layer around the sub-pixels to expose the entire upper surface and part of the side walls of the top of the sub-pixels.

[0013] In a possible implementation, the sidewall portion exposed by the sub-pixel belongs to the first ohmic contact layer, and the height of the sidewall portion exposed by the sub-pixel is less than or equal to the height of the first ohmic contact layer.

[0014] In a possible implementation, the top height of the insulating layer between adjacent sub-pixels is lower than the top heights of the two adjacent sub-pixels on both sides.

[0015] In a possible implementation, the top height of at least part of the insulating layer between adjacent sub-pixels is higher than the top heights of the two adjacent sub-pixels on both sides.

[0016] In a possible implementation, the tops of multiple sub-pixels are connected in a common cathode manner through a transparent conductive layer, and the transparent conductive layer is disposed on top of the tops of the sub-pixels and the tops of the insulating layer exposed on the side of the display device layer away from the driving wafer.

[0017] In a possible implementation, the distance between the metal fence and the transparent conductive layer is not less than 30 nm.

[0018] In a possible implementation, the side of the sub-pixel close to the driving wafer is a metal layer;

[0019] The bottom of the metal fence is connected to the edge of the metal layer.

[0020] In a possible implementation, the metal fence at least includes: a first part of the fence, which is made of the same material as the metal layer and is formed by reverse sputtering of the metal layer.

[0021] In a possible implementation, the metal fence further includes: a second part of the fence, which is disposed above the first part of the fence or around the first part of the fence.

[0022] In a possible implementation, the metal layer includes: a metal bonding layer and / or a second ohmic contact layer.

[0023] In a possible implementation, between the metal bonding layer and the second ohmic contact layer, there are also disposed an Omni-Directional Reflector (ODR) metal layer and an ODR dielectric layer stacked in a direction away from the driving wafer.

[0024] In a possible implementation, at least one metal through-hole is formed in the ODR dielectric layer.

[0025] In a possible implementation, the height of the metal fence is not less than 0.1 um.

[0026] In a possible implementation, the angle at which the side wall of the metal fence inclines outward is not greater than 90 degrees.

[0027] Compared with the prior art, the present utility model has the following beneficial effects:

[0028] The microdisplay device includes a driving wafer and a display device layer disposed on the driving wafer. The display device layer is filled with an insulating layer, and sub-pixels are disposed in the insulating layer. The top height of the sub-pixels is not lower than the top height of the insulating layer around the sub-pixels to expose the tops of the sub-pixels. A metal fence is also disposed in the insulating layer, and the metal fence surrounds the sub-pixels. By controlling the height of the insulating layer in the display device layer and adding a metal fence in the insulating layer, the heat dissipation capacity of the device is effectively improved, and the influence of poor heat dissipation on the display performance of the microdisplay device is avoided.

[0029] Furthermore, the metal fence can be a first part of the fence formed by reverse sputtering of a metal layer on the bottom surface of the sub-pixel, thereby making full use of the fence structure that is inevitable in the process of ion beam etching due to physical properties, simplifying the overall process flow, greatly improving the process stability, production efficiency and production capacity. At the same time, the metal fence can also play the role of anti-crosstalk and improving the brightness of the microdisplay device.

[0030] Furthermore, the metal fence can further include a second part of the fence to flexibly control the height or thickness of the final metal fence.

[0031] It should be noted that the present utility model only needs to achieve at least one of the above technical effects. Description of the Drawings

[0032] Figure 1 is a schematic structural diagram of a microdisplay device provided in an embodiment of the present application;

[0033] Figure 2 is a schematic structural diagram of a microdisplay device provided in an embodiment of the present application;

[0034] Figure 3 is a schematic structural diagram of a microdisplay device provided in an embodiment of the present application;

[0035] Figure 4 is a schematic structural diagram of a microdisplay device provided in an embodiment of the present application;

[0036] Figure 5 is a schematic structural diagram of a microdisplay device provided in an embodiment of the present application.

[0037] Markings in the figure: 100 - driving wafer, 110 - anode contact, 200 - display device layer, 210 - sub - pixel, 220 - metal fence, 230 - insulating layer, 240 - transparent conductive layer, 250 - metal layer, 251 - metal bonding layer, 252 - ODR metal layer, 253 - ODR dielectric layer, 254 - second ohmic contact layer. Detailed implementation

[0038] To make the objectives, technical solutions and advantages of the present utility model clearer, the technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part rather than all of the embodiments of the present utility model. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present utility model without creative efforts shall fall within the protection scope of the present utility model.

[0039] In the description of the present utility model, it should be understood that the orientation or positional relationships indicated by the terms "vertical", "upper", "lower", "top", "side", "inner", "outer", etc. are based on the orientation or positional relationships shown in the drawings, and are only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present utility model. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present utility model, unless otherwise specified, the meaning of "plurality" is two or more.

[0040] In the description of the present utility model, it should be noted that unless otherwise clearly specified and limited, the terms "installed", "connected" and "coupled" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0041] To address the problem that the poor heat dissipation ability affects the display effect of the micro - display device, in the embodiments of the present application, a micro - display device with a thinner insulating layer and a metal fence is provided. Through the thinner insulating layer and the metal fence, the heat dissipation ability of the micro - display device is improved.

[0042] With reference to Figures 1 to 3, an embodiment of the present application provides a microdisplay device, which includes a driving wafer 100 and a display device layer 200 disposed on the driving wafer 100.

[0043] The display device layer 200 is filled with an insulating layer 230; sub-pixels 210 are disposed in the insulating layer 230, and the top height of the sub-pixels 210 is not lower than the top height of the insulating layer 230 around the sub-pixels 210 to expose the top of the sub-pixels 210; a metal fence 220 is also disposed in the insulating layer 230, and the metal fence 220 surrounds the sub-pixels 210.

[0044] For the microdisplay device, the heat dissipation performance of the insulating layer 230 structure is poor. The higher its height and the thicker its overall thickness, the worse the heat dissipation. Therefore, in an embodiment of the present application, on the one hand, the height of the insulating layer 230 in the display device layer 200 is controlled. Specifically, for this part of the insulating layer 230 around the sub-pixels 210, the top height of this part is designed to be not higher than the top height of the sub-pixels 210 so that the top of the sub-pixels 210 is exposed in the insulating layer 230; on the other hand, a metal fence 220 surrounds the sub-pixels 210, and the metal fence 220 is integrally embedded in the insulating layer 230, and its top is not exposed in the insulating layer 230, and the heat dissipation ability of the device is further improved through the metal fence 220.

[0045] It can be understood that the present application does not limit the number of display device layers on the driving wafer 100. It can be that multiple display device layers are stacked on the driving wafer 100, and at least one of the multiple display device layers adopts the above design, or the top of the sub-pixels in one of the display device layers is exposed in the insulating layer of the same layer, and the insulating layer in another display device layer is provided with a metal fence surrounding the sub-pixels of the same layer.

[0046] Among them, the driving wafer 100 can be an active design combined with one or more of thin film transistors (TFTs), low-temperature polysilicon (LTPS), CMOS integrated circuits, high electron mobility transistors (HEMTs), etc. Specifically, the driving wafer 100 is provided with a driving circuit, the driving circuit is provided with at least one anode contact 110, and the driving circuit can include an active, passive or semi-passive control circuit. All the anode contacts 110 included in the driving circuit can be linearly arranged or arrayed, and any anode contact 110 is located in the middle or on the edge of the driving wafer 100, and this embodiment does not limit this.

[0047] Among them, the insulating layer 230 includes materials such as silicon oxide, silicon nitride, SiC, SiCN, PSG, BPSG, polyimide, etc. The present application does not limit the specific material of the insulating layer 230, and it only needs to be used to achieve the insulating function.

[0048] Further, the tops of multiple sub-pixels 210 are connected to a common cathode through a transparent conductive layer 240. The transparent conductive layer 240 is disposed on top of the tops of the sub-pixels 210 and the top of the insulating layer 230 that are exposed on the side of the display device layer 200 away from the driving wafer 100. The top of the sub-pixel 210 is a first ohmic contact layer. To achieve electrical connection, the first ohmic contact layers of the sub-pixels 210 are connected to a common cathode through the transparent conductive layer 240. Since the insulating layer 230 is also filled between the sub-pixels 210, the transparent conductive layer 240 is also disposed on top of the insulating layer 230.

[0049] Among them, the transparent conductive layer 240 can be prepared by depositing a transparent conductive film through sputtering, evaporation, etc. Specifically, it can be one or a combination of ITO (Indium Tin Oxide) thin film, AZO (Antimony doped Zinc Oxide) thin film, ATO (Antimony doped Tin Oxide) thin film, FTO (Fluorine doped Tin Oxide) thin film, or annealing after plating thin Al, Au, Ag on the surface of ITO to form a single layer or stack of metal-doped ITO to enhance the current transmission ability of the transparent conductive layer 240.

[0050] Further, the distance between the metal fence 220 and the transparent conductive layer 240 is not less than 30 nm. To avoid the metal fence 220 and the transparent conductive layer 240 being connected to form a short circuit, the distance between the metal fence 220 and the transparent conductive layer 240 is controlled, and the two are not less than 30 nm apart. That is, the distance between the top of the metal fence 220 and the bottom of the transparent conductive layer 240 (corresponding to the top of the insulating layer 230) is not less than 30 nm.

[0051] Further, the height of the metal fence 220 is not less than 0.1 um. The higher the height of the metal fence 220, the greater the improvement in heat dissipation performance. Therefore, the height of the metal fence 220 is controlled to be not less than 0.1 um to ensure a certain heat dissipation capacity.

[0052] Further, the area surrounded by the metal fence 220 is defined as the inside of the metal fence, and the area not surrounded is defined as the outside of the metal fence. Correspondingly, the angle at which the side wall of the metal fence 220 inclines outward is not greater than 90 degrees.

[0053] Furthermore, the side of the sub-pixel 210 close to the driving wafer 100 is a metal layer 250; the bottom of the metal fence 220 is connected to the edge of the metal layer 250. The bottom of the sub-pixel 210 is the metal layer 250. The sub-pixel 210 is connected to the driving wafer 100 through the metal layer 250. At the same time, the bottom of the metal fence 220 is connected to the outer peripheral edge of the metal layer 250 to surround the sub-pixel 210, and the metal fence 220 can also function to prevent crosstalk.

[0054] Wherein, the metal layer 250 includes: a metal bonding layer 251 and / or a second ohmic contact layer 254. Exemplarily, the sub-pixel 210 may include, stacked in a direction away from the driving wafer 100: a metal bonding layer 251, a second ohmic contact layer 254, an active layer, and a first ohmic contact layer. Among them, the surface dimensions of the metal bonding layer 251 and the second ohmic contact layer 254 may be the same, the surface dimensions of the active layer and the first ohmic contact layer may be the same, and the surface dimension of the former is larger than that of the latter, so that when the metal fence 220 is connected to the outer peripheral edges of the metal bonding layer 251 and the second ohmic contact layer 254 on the bottom surface, it is separated from the outer peripheral edges of the active layer and the first ohmic contact layer 254 by a certain distance, thereby preventing the metal fence 220 from electrically connecting the P side and the N side of the device and causing the device to short-circuit.

[0055] It can be understood that the first ohmic contact layer and the second ohmic contact layer in this application can be designed to be a P-type ohmic contact layer and an N-type ohmic contact layer respectively, or can be designed to be an N-type ohmic contact layer and a P-type ohmic contact layer respectively.

[0056] Exemplarily, the sub-pixel 210 is made of a compound wafer material. The structures of some compound wafers are as follows. In some practical applications, the film layers of the compound wafer will be more complex, or there will be cross-use of materials. Without limiting the material range, its typical main components include a P-type material (corresponding to the second ohmic contact layer or the first ohmic contact layer), an N-type material (corresponding to the first ohmic contact layer or the second ohmic contact layer), and an MQW quantum well (corresponding to the active layer) and other functional layers sandwiched between the two:

[0057]

[0058] Furthermore, the metal fence 220 at least includes: a first part of the fence, which is made of the same material as the metal layer 250 and is formed by re-sputtering the metal layer 250. Specifically, after integrating the display device layer 200 and the driving wafer 100 through the metal bonding layer 251 and completing the pixelization preparation of the sub-pixels 210, when patterning the metal bonding layer 251 and the second ohmic contact layer 254 by ion beam etching, the metal atoms corresponding to the metal bonding layer 251 and the second ohmic contact layer 254 form a fence-like structure surrounding the sub-pixels 210 through re-sputtering and deposition, that is, the first part of the fence. This first part of the fence is connected to the outer perimeters of the metal bonding layer 251 and the second ohmic contact layer 254 at the bottom surface of the sub-pixels 210.

[0059] Exemplarily, the material of the metal layer 250 can be a combination of various metal materials, such as: a combination of Ni and Sn, a combination of Au and Sn, a combination of Cu and Sn, a combination of Au and In, a combination of Au and Au, a combination of Al and Al, a combination of Cu and Cu, a combination of ITO and ITO, etc.; correspondingly, the first part of the fence formed by re-sputtering the metal layer 250 is also made of the above materials.

[0060] Furthermore, the metal fence 220 further includes: a second part of the fence, which is disposed above the first part of the fence or around the first part of the fence. In the case where the height / thickness of the first part of the fence does not meet the requirements, the second part of the fence can be further provided, and the second part of the fence can be prepared by metal deposition.

[0061] Wherein, the materials of the second part of the fence and the first part of the fence can be the same or different, and the present application does not limit this.

[0062] In summary, for the technical solution provided in the embodiments of the present application, the micro-display device includes a driving wafer and a display device layer disposed on the driving wafer. The display device layer is filled with an insulating layer, and sub-pixels are disposed in the insulating layer. The top height of the sub-pixels is not lower than the top height of the insulating layer around the sub-pixels to expose the tops of the sub-pixels. A metal fence is also disposed in the insulating layer, and the metal fence surrounds the sub-pixels. By controlling the height of the insulating layer in the display device layer and adding a metal fence in the insulating layer, the heat dissipation capacity of the device is effectively improved, and the influence of poor heat dissipation on the display performance of the micro-display device is avoided.

[0063] Further, the metal fence may be a first part of the fence formed by reverse sputtering of the metal layer on the bottom surface of the sub-pixel, thereby making full use of the fence structure that is inevitable during the ion beam etching due to physical properties, simplifying the overall process flow, greatly improving the process stability, production efficiency and production capacity. At the same time, the metal fence can also play the role of anti-crosstalk and enhancing the brightness of the micro-display device.

[0064] Further, the metal fence may further include a second part of the fence to flexibly control the height or thickness of the final metal fence.

[0065] Based on the above embodiments, in an exemplary embodiment, as Figure 1 shown, the top height of the sub-pixel 210 is flush with the top height of the insulating layer 230 around the sub-pixel 210 to expose the complete upper surface of the top of the sub-pixel 210.

[0066] In this embodiment, as Figure 1 shown, in the display device layer 200, the insulating layer 230 is etched to be flush with the top height of the sub-pixel 210 to expose the complete upper surface of the top of the sub-pixel 210, changing the structural design of the contact between the first ohmic contact layer at the top of the sub-pixel 210 and the transparent conductive layer 240, increasing the N-side current injection area, improving the brightness of the micro-display device and reducing the power consumption.

[0067] Based on the above embodiments, in an exemplary embodiment, as Figure 2 、 Figure 3 shown, the top height of the sub-pixel 210 is higher than the top height of the insulating layer 230 around the sub-pixel 210 to expose the complete upper surface and part of the side wall of the top of the sub-pixel 210.

[0068] In this embodiment, as Figure 2 、 Figure 3 shown, in the display device layer 200, part of the insulating layer 230 around the sub-pixel 210 is etched to be lower than the top height of the sub-pixel 210 to expose the complete upper surface and part of the side wall of the top of the sub-pixel 210, changing the structural design of the contact between the first ohmic contact layer at the top of the sub-pixel 210 and the transparent conductive layer 240, increasing the N-side current injection area, improving the brightness of the micro-display device and reducing the power consumption.

[0069] Further, the exposed side wall part of the sub-pixel 210 belongs to the first ohmic contact layer, and the height of the exposed side wall part of the sub-pixel 210 is less than or equal to the height of the first ohmic contact layer. That is, the lowest point of the exposed side wall part of the sub-pixel 210 is not lower than the lowest point of the first ohmic contact layer, avoiding the exposure of other structures below the first ohmic contact layer in the sub-pixel 210 to provide sufficient insulation protection for the sub-pixel 210.

[0070] Further, as Figure 2 shown, the top height of the insulating layer 230 between at least some adjacent sub-pixels 210 is higher than the top heights of the two side sub-pixels 210. By reserving a certain thickness of the insulating layer 230 above the sub-pixels 210 and then exposing the complete upper surface and part of the side walls of the tops of the sub-pixels 210 through a planarization technique, the difficulty of the planarization insulating layer process is reduced.

[0071] Further, as Figure 3 shown, the top height of the insulating layer 230 between adjacent sub-pixels 210 is lower than the top heights of the two side sub-pixels 210. By controlling the height of the insulating layer 230 and making the overall height of the insulating layer 230 lower than the top height of the sub-pixels 210, the heat dissipation ability is optimal.

[0072] Based on the above embodiments, in an exemplary embodiment, as Figure 4 , Figure 5 shown, between the metal bonding layer 251 and the second ohmic contact layer 254, an ODR metal layer 252 and an ODR dielectric layer 253 stacked in a direction away from the driving wafer 100 are further provided.

[0073] In this embodiment, as Figure 4 , Figure 5 shown, an ODR structure is formed under the second ohmic contact layer 254 in the display device layer 200, so as to improve the light extraction efficiency of the micro-display device and further improve the brightness.

[0074] Among them, the ODR dielectric layer 253 can be a stack of one or more of transparent dielectric layers such as SiO2, Si3N4, Al2O3, Nb2O5, Ti3O5, etc.; the ODR metal layer 252 can be composed of a metal with high reflectivity. Exemplarily, the material of the ODR metal layer 252 includes at least one of the following: silver (Ag), aluminum (Al).

[0075] Further, as Figure 5 shown, at least one metal through-hole is formed in the ODR dielectric layer 253, so as to ensure electrical connection through the metal through-hole.

[0076] All the above optional technical solutions can be combined arbitrarily to form optional embodiments of the present invention, that is, any number of embodiments can be combined to meet the requirements of different application scenarios, and all are within the protection scope of this application, and will not be elaborated one by one here.

[0077] It should be noted that the above are only the preferred embodiments of the present utility model, and are not intended to limit the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A microdisplay device, characterized in that, The microdisplay device includes a driving wafer and a display device layer disposed on the driving wafer; An insulating layer is filled in the display device layer; Sub-pixels are provided in the insulating layer, and the top height of the sub-pixels is not lower than the top height of the insulating layer around the sub-pixels to expose the tops of the sub-pixels; A metal fence is also provided in the insulating layer, and the metal fence surrounds the sub-pixels.

2. The microdisplay device according to claim 1, wherein The top height of the sub-pixels is flush with the top height of the insulating layer around the sub-pixels to expose the complete upper surface of the tops of the sub-pixels.

3. The microdisplay device according to claim 1, wherein The top height of the sub-pixels is higher than the top height of the insulating layer around the sub-pixels to expose the complete upper surface and part of the side walls of the tops of the sub-pixels.

4. The microdisplay device according to claim 3, wherein The side wall part exposed by the sub-pixels belongs to the first ohmic contact layer, and the height of the side wall part exposed by the sub-pixels is less than or equal to the height of the first ohmic contact layer.

5. The microdisplay device according to claim 3, wherein The top height of the insulating layer between adjacent sub-pixels is lower than the top heights of the two side sub-pixels.

6. The microdisplay device according to claim 3, wherein The top height of the insulating layer between at least some adjacent sub-pixels is higher than the top heights of the two side sub-pixels.

7. The microdisplay device according to any one of claims 1 to 6, wherein The tops of multiple sub-pixels are connected in common cathode through a transparent conductive layer, and the transparent conductive layer is disposed on the tops of the sub-pixels and the tops of the insulating layer exposed on the side of the display device layer away from the driving wafer.

8. The microdisplay device according to claim 7, wherein The distance between the metal fence and the transparent conductive layer is not less than 30 nm.

9. The microdisplay device according to any one of claims 1 to 6, characterized in that, The side of the sub-pixel close to the driving wafer is a metal layer; The bottom of the metal fence is connected to the edge of the metal layer.

10. The microdisplay device according to claim 9, wherein The metal fence at least includes: a first part of the fence, the first part of the fence is made of the same material as the metal layer and is formed by reverse sputtering through the metal layer.

11. The microdisplay device according to claim 10, wherein The metal fence further includes: a second part of the fence, the second part of the fence is disposed above the first part of the fence or around the first part of the fence.

12. The microdisplay device according to claim 9, wherein The metal layer includes: a metal bonding layer and / or a second ohmic contact layer.

13. The microdisplay device according to claim 12, wherein Between the metal bonding layer and the second ohmic contact layer, an ODR metal layer and an ODR dielectric layer are further stacked in a direction away from the driving wafer.

14. The microdisplay device according to claim 13, wherein At least one metal through hole is formed in the ODR dielectric layer.

15. The microdisplay device according to any one of claims 1 to 6, characterized in that the height of the metal fence is not less than 0.1 um.

16. The microdisplay device according to any one of claims 1 to 6, characterized in that the angle at which the side wall of the metal fence inclines outward is not greater than 90 degrees.

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