Multi-core-group ceramic dielectric capacitor chip lead and multi-core-group ceramic dielectric capacitor

Abstract

The utility model discloses a chip lead of a multi-core-group ceramic dielectric capacitor and the multi-core-group ceramic dielectric capacitor, relates to the field of electronic components, and solves the problem that a chip body is easy to collapse due to the fact that solder between the chip lead and a bonding pad is difficult to fully infiltrate and fill in the existing chip lead of the multi-core-group ceramic dielectric capacitor. The key points of the technical scheme are as follows: the LED display screen comprises a base plate, wherein the base plate comprises a first plate piece and a second plate piece which is formed by extending the first plate piece along 90 degrees; a plurality of round holes are formed in the surface of the first plate in an array mode, a plurality of rectangular holes are formed in the bottom of the first plate at intervals, and the rectangular holes extend to the second plate; at least two positioning rulers are arranged on the surface of the first plate piece, and the positioning rulers are perpendicular to the first plate piece; the bottom of the second plate is provided with at least two protruding structures. The problems are solved by arranging a positioning ruler and a protruding structure.

Description

Technical Field

[0001] The utility model relates to the field of electronic components, and more specifically, to a multi-core group ceramic capacitor patch lead and a multi-core group ceramic capacitor. Background Art

[0002] The multi-core group ceramic capacitor is a product developed on the basis of MLCC. It is composed of multiple layers of ceramic capacitor chips (MLCC) connected in parallel by patch leads through precise assembly and welding technology. A ceramic capacitor group with a larger capacitance can be obtained. Moreover, with special pins designed, it has good heat conduction and heat dissipation effects, can reduce the influence of adverse stress, and improve reliability.

[0003] Patent document CN201584295U, a multi-core group laminated ceramic capacitor, discloses that the patch lead for welding the multi-core group ceramic capacitor has serrated mounting feet, and the tooth roots of the serrated mounting feet are located below the bottom layer chip and have a certain distance from the bottom surface of the chip. The installation is convenient, and it can effectively avoid the cracking of the ceramic body during welding or temperature shock, and improve the reliable performance of the product to withstand thermal stress and temperature stress. It can be seen that the design technical level of the patch lead for welding the multi-core group ceramic capacitor is crucial.

[0004] However, in the existing welding process, the solder between such patch leads and the pads is difficult to be fully infiltrated and filled, resulting in reduced welding quality and insecure welding; and the chip body of the multi-core group ceramic capacitor is prone to collapse during the welding process with the circuit board.

[0005] Based on this, the present application provides a multi-core group ceramic capacitor patch lead and a multi-core group ceramic capacitor to solve the above problems. Summary of the Utility Model

[0006] The technical problem to be solved by the present application is that the existing patch leads of multi-core group ceramic capacitors have problems that the solder between the patch leads and the pads is difficult to be fully infiltrated and filled, and the chip body is prone to collapse. The purpose is to provide a multi-core group ceramic capacitor patch lead and a multi-core group ceramic capacitor to solve the above problems by setting a positioning ruler and a convex structure.

[0007] The present application first provides a multi-core group ceramic capacitor patch lead, including: a substrate, the substrate includes a first plate member and a second plate member formed by the first plate member extending 90 degrees; a plurality of circular holes are arranged in an array on the surface of the first plate member, a plurality of rectangular holes are arranged at intervals at the bottom of the first plate member, and the rectangular holes extend to the second plate member; at least two positioning rulers are arranged on the surface of the first plate member, and the positioning rulers are perpendicular to the first plate member; at least two convex structures are arranged at the bottom of the second plate member.

[0008] With the above technical solution, the stacked ceramic capacitor chips are clamped in the middle by two multi-core ceramic capacitor patch leads, the stacked ceramic capacitor chips are fixed by the first support plate, and the second support plate is used as a pin and is welded and fixed on the circuit board. There is a certain distance between the ceramic capacitor chips and the second support plate, which can effectively avoid the problem of chip cracking during welding or thermal shock caused by the different thermal expansion coefficients of the chip and the circuit board. In addition, the stacked ceramic capacitor chips are supported by a positioning ruler, which can avoid chip collapse during the welding process. Through the convex structure arranged at the bottom of the second support plate, a certain gap is generated between the second support plate and the circuit board, which is beneficial to the full infiltration of the solder between the bottom of the pin and the circuit board during the welding (reflow soldering) process, improving the welding quality and firmness.

[0009] Further, the positioning ruler is in the shape of a square column.

[0010] Further, the length of the positioning ruler is less than the length of the second plate member.

[0011] Further, there are two positioning rulers, and they are located above the rectangular holes on both sides of the first plate member.

[0012] Further, the convex structure is hemispherical.

[0013] Further, the diameter of the convex structure is less than the length of the second plate member.

[0014] Further, there are two convex structures, and they are located at both ends of the bottom of the second plate member.

[0015] Further, when there are N stacked ceramic capacitor chips, the number of round holes in each column of the array is N - 1, and N is a positive integer greater than 1.

[0016] This application also provides a multi-core ceramic capacitor, including: two multi-core ceramic capacitor patch leads as described above and multiple ceramic capacitor chips; the two multi-core ceramic capacitor patch leads are arranged opposite to each other left and right, and multiple ceramic capacitor chips are stacked and placed on the positioning rulers of the left and right multi-core ceramic capacitor patch leads.

[0017] Further, there are four ceramic capacitor chips.

[0018] Compared with the prior art, the present application has the following beneficial effects: positioning teeth are provided, which mainly support the ceramic capacitor chip body, preventing the chip body from collapsing during the process of welding the multi-core ceramic capacitor onto the circuit board. At the same time, only two positioning teeth are retained, which not only support the capacitor chip body but also minimize the contact area with the end electrodes of the capacitor chip, reducing the influence of welding stress on the capacitor chip; a convex structure is provided, which contacts the circuit board, creating a certain gap between the horizontal plane at the bottom of the patch lead around the convex structure and the welding surface, facilitating the infiltration and filling of solder between the bottom of the patch lead and the circuit board during the welding (reflow soldering) process, improving the welding quality and firmness. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The drawings described herein are used to provide a further understanding of the embodiments of the present utility model, form a part of the present application, and do not limit the embodiments of the present application. In the drawings:

[0020] Figure 1 are the three-view drawings of the patch lead of the multi-core ceramic capacitor provided by an embodiment of the present application;

[0021] Figure 2 are the three-view drawings of the multi-core ceramic capacitor provided by an embodiment of the present application;

[0022] Figure 3 is a schematic diagram of pin welding provided by an embodiment of the present application.

[0023] The reference numerals and corresponding component names in the drawings:

[0024] 1, positioning ruler; 2, convex structure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0025] To make the objectives, technical solutions, and advantages of the present utility model clearer, the present utility model will be further described in detail below with reference to the embodiments and the drawings. The illustrative embodiments and descriptions thereof of the present utility model are only used to explain the present utility model and do not limit the present utility model.

[0026] Embodiment 1

[0027] Embodiment 1 of the present application provides a patch lead for a multi-core ceramic capacitor. Please refer to Figure 1 as shown, which includes: a substrate, the substrate includes a first plate member and a second plate member formed by the first plate member extending 90 degrees; a plurality of round holes are arranged in an array on the surface of the first plate member, a plurality of rectangular holes are arranged at intervals at the bottom of the first plate member, and the rectangular holes extend to the second plate member; at least two positioning rulers 1 are arranged on the surface of the first plate member, and the positioning rulers 1 are perpendicular to the first plate member; at least two convex structures 2 are arranged at the bottom of the second plate member.

[0028] The principle of this embodiment is that the stacked ceramic capacitor chips are clamped in the middle by two multi-core ceramic capacitor patch leads. The stacked ceramic capacitor chips are fixed by the first support plate, and the second support plate is used as a pin and is welded and fixed to the circuit board. There is a certain distance between the ceramic capacitor chips and the second support plate, which can effectively avoid the problem of chip cracking during welding or temperature shock caused by different thermal expansion coefficients between the chip and the circuit board. In addition, the stacked ceramic capacitor chips are supported by the positioning ruler 1, which can avoid chip collapse during the welding process. Through the convex structure 2 arranged at the bottom of the second support plate, a certain gap is generated between the second support plate and the circuit board, which is beneficial to the full infiltration of the solder between the bottom of the pin and the circuit board during the welding (reflow soldering) process, improving the welding quality and firmness.

[0029] Further, the positioning ruler 1 is in the shape of a square column. It should be noted that the function of the positioning ruler 1 is to support the stacked ceramic capacitor chips and prevent them from collapsing during the welding process. For the convenience of manufacturing, the positioning ruler 1 is set as a square column in this embodiment. During the actual manufacturing process, the positioning ruler 1 can also be made into other structures such as a triangular column, a trapezoidal column, a cylindrical column, etc. that can play a supporting role.

[0030] Further, the length of the positioning ruler 1 is less than the length of the second plate member. It should be noted that the length here is Figure 1 the length in the horizontal direction of the middle side view. The length of the positioning ruler 1 should not be too long. The purpose is to keep the support while minimizing the contact area with the end electrodes of the capacitor chips.

[0031] Further, there are two positioning rulers 1, and they are located above the rectangular holes on both sides of the first plate member. It should be noted that in order to reduce the contact area with the end electrodes of the capacitor chips and ensure the reliability of the support, therefore, two positioning rulers 1 are set in this embodiment and are located above the left and right rectangular holes of the first plate member.

[0032] Further, the convex structure 2 is hemispherical. It should be noted that the hemispherical structure can ensure the full infiltration of the solder between the circuit board and the pin while increasing the contact area between the pin and the solder, improving the welding quality and firmness.

[0033] Further, the diameter of the convex structure 2 is less than the length of the second plate member. It should be noted that the convex structure 2 should not be too large either, so as to avoid too large a gap between the pin and the circuit board and make it difficult for the solder to fill.

[0034] Further, there are two protruding structures 2, which are located at both ends of the bottom of the second plate member. It should be noted that the protruding structure 2 is provided to create a small gap between the pins and the circuit board, so as to ensure sufficient infiltration of the solder. However, in order not to affect the structural stability, two protruding structures 2 are provided in this embodiment, and the two protruding structures 2 are located at the left and right ends of the bottom of the second plate member.

[0035] Further, when the stacked ceramic capacitor chips are N in number, the number of round holes in each column of the array is N - 1, where N is a positive integer greater than 1. It should be noted that the round holes are provided so that excess solder can flow out through the round holes during welding, preventing excessive solder from accumulating between the ceramic capacitor chips.

[0036] Taking a multi-chip ceramic capacitor with a ceramic capacitor chip size of 45105 and 4 stacked chips as an example, the material of the ceramic capacitor chip is phosphor bronze, with nickel and tin-lead plating on the surface. The nickel layer thickness is 2 - 5 μm, and the tin-lead layer thickness is 6 - 9 μm. Correspondingly, the structural parameters of the patch leads of the multi-chip ceramic capacitor are shown in Figure 1 as shown.

[0037] Embodiment 2

[0038] Embodiment 2 of the present application provides a multi-chip ceramic capacitor. Please refer to Figure 2 as shown, which includes: two patch leads of the multi-chip ceramic capacitor provided in Embodiment 1 and a plurality of ceramic capacitor chips; the two patch leads of the multi-chip ceramic capacitor are arranged opposite to each other on the left and right, and a plurality of ceramic capacitor chips are stacked and placed on the positioning rulers 1 of the left and right patch leads of the multi-chip ceramic capacitor.

[0039] Further, there are four ceramic capacitor chips.

[0040] Taking a multi-chip ceramic capacitor with a ceramic capacitor chip size of 45105 and 4 stacked chips as an example, the material of the ceramic capacitor chip is phosphor bronze, with nickel and tin-lead plating on the surface. The nickel layer thickness is 2 - 5 μm, and the tin-lead layer thickness is 6 - 9 μm. Correspondingly, the external shape structure of the multi-chip ceramic capacitor formed by welding the ceramic capacitor chips and the patch leads is as shown in Figure 2 as shown, and its parameters are shown in Table 1.

[0041] Table 1 Capacitor Dimensions

[0042]

[0043] Please refer to Figure 3 as shown. The innovation points of the patch leads of the multi-chip ceramic capacitor and the multi-chip ceramic capacitor provided in Embodiments 1 and 2 of the present application are:

[0044] (1) Set the positioning teeth 1. The positioning teeth 1 mainly support the ceramic capacitor chip body to prevent the chip body from collapsing during the welding of the multi-core ceramic capacitor to the circuit board. At the same time, only two positioning teeth 1 are retained (as shown in Figure 2 ), which not only support the capacitor chip body but also minimize the contact area with the end electrodes of the capacitor chip, reducing the influence of welding stress on the capacitor chip.

[0045] (2) Set the convex structure 2. The convex structure 2 contacts the circuit board, creating a certain gap between the horizontal plane at the bottom of the patch lead around the convex structure 2 and the welding surface, which is beneficial to the infiltration and filling of the solder between the bottom of the patch lead and the circuit board during the welding (reflow soldering) process, improving the welding quality and firmness.

[0046] The specific embodiments described above further elaborate on the purpose, technical solutions, and beneficial effects of the present utility model. It should be understood that the above are only specific embodiments of the present utility model and are not used to limit the protection scope of the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present utility model shall be included in the protection scope of the present utility model.

Claims

1. A multi-core group ceramic capacitor patch lead, characterized in that, Comprising: A substrate, which includes a first plate member and a second plate member formed by the first plate member extending 90 degrees; A plurality of round holes are arranged in an array on the surface of the first plate member, and a plurality of rectangular holes are arranged at intervals at the bottom of the first plate member, and the rectangular holes extend to the second plate member; At least two positioning rulers are arranged on the surface of the first plate member, and the positioning rulers are perpendicular to the first plate member; At least two convex structures are arranged at the bottom of the second plate member.

2. The multi-core group ceramic capacitor patch lead according to claim 1, characterized in that The positioning ruler is in the shape of a square column.

3. A multi-core ceramic capacitor patch lead according to claim 2, characterized in that The length of the positioning ruler is less than the length of the second plate member.

4. The multi-core ceramic capacitor patch lead according to claim 3, wherein There are two positioning rulers, and they are located above the rectangular holes on both sides of the first plate member.

5. A multi-core ceramic capacitor patch lead according to claim 1, characterized in that, The convex structure is hemispherical.

6. A multi-core ceramic capacitor patch lead according to claim 5, characterized in that The diameter of the convex structure is less than the length of the second plate member.

7. A multi-core ceramic capacitor patch lead according to claim 6, characterized in that, There are two convex structures, and they are located at both ends of the bottom of the second plate member.

8. A multi-core group ceramic capacitor patch lead according to claim 1, characterized in that, When the stacked ceramic dielectric capacitor chips are N, the number of round holes in each column of the array is N - 1, and N is a positive integer greater than 1.

9. A multi-core ceramic capacitor, characterized in that, Comprising two multi-core group ceramic dielectric capacitor patch leads as described in any one of claims 1 - 8 and a plurality of ceramic dielectric capacitor chips; The two multi-core group ceramic dielectric capacitor patch leads are arranged opposite to each other left and right, and after a plurality of ceramic dielectric capacitor chips are stacked, they are placed on the positioning rulers of the left and right multi-core group ceramic dielectric capacitor patch leads.

10. A multi-core ceramic capacitor patch lead and a multi-core ceramic capacitor according to claim 9, characterized in that, The number of the ceramic dielectric capacitor chips is four.

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