PCIE (Peripheral Component Interface Express) card testing device
By designing an independent PCIE card testing device, using power supply circuits, clock circuits and reset circuits to form a communication system, the problem of PCIe card testing relying on the motherboard is solved, and efficient and safe PCIe card testing is achieved.
Patent Information
- Application Number
- CN202422384086.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-27
- Publication Date
- 2025-08-26
- Estimated Expiration
- 2034-09-27
AI Technical Summary
The existing PCIe card testing methods rely on the motherboard environment, which leads to inconvenience in testing and may damage the card parts, and lacks an effective loopback testing environment, affecting testing efficiency and security.
A PCIE card testing device is designed, including a test fixture, power supply circuit, clock circuit and reset circuit, forming an independent communication system that can conduct self-inductive and self-receive signal testing and electrical function detection of PCIe cards without relying on the motherboard.
It realizes PCIe card testing without relying on the motherboard, reduces testing costs, improves testing efficiency and safety, and can independently complete the detection of signal quality and electrical functions.
Smart Images
Figure CN223272642U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of PCIE testing technology, and in particular to a PCIE card testing device. Background Art
[0002] In the server industry, PCIe (Peripheral Component Interconnect express) cards are often used to expand server functions and improve server performance, such as RAID cards and wireless network cards.
[0003] Currently, PCIe card testing usually involves inserting the PCIe card to be tested into the motherboard and then powering the motherboard before the PCIe card can start. This makes white box testing of PCIE cards more dependent on the motherboard and other environments. Secondly, since the test leads or probes are difficult to place, this also causes inconvenience in point testing of PCIE high-speed signals. Utility Model Content
[0004] The present application provides a PCIE card testing device, which can improve the convenience of PCIE card testing and improve the testing efficiency of PCIE cards.
[0005] To achieve the above objectives, this application adopts the following technical solutions:
[0006] An embodiment of the present application provides a PCIE card testing device, the device comprising: a test fixture, a PCIE card to be tested is connected to the test fixture, and a transmitting end and a receiving end of the PCIE card are connected;
[0007] The test fixture includes: a power supply circuit, a clock circuit and a reset circuit;
[0008] The power supply circuit is used to supply power to the PCIE card;
[0009] The PCIE card, the clock circuit and the reset circuit form a communication system of the PCIE card;
[0010] A first signal sent by the transmitting end is transmitted to the receiving end to obtain a corresponding second signal, wherein the first signal is generated based on the communication system;
[0011] The PCIE card is used to detect the communication function of the PCIE card according to the first signal and the second signal.
[0012] In one embodiment, the testing device further includes an electrical detection device, and the electrical detection device is connected to the PCIE card;
[0013] The electrical detection device is used to detect the electrical functions in the PCIE card, and the electrical functions include whether the voltages of multiple circuits in the PCIE card are normal.
[0014] In one embodiment, the test fixture further includes: a dip switch, and the dip switch is used to control the communication function test or the electrical function test of the test fixture.
[0015] In one embodiment, the power supply circuit includes: a power socket connected to an external DC power supply;
[0016] The power socket is used to provide input voltage to the test fixture.
[0017] In one embodiment, the power supply circuit further includes: a DCDC converter, the DCDC converter being connected between the power socket and the test fixture;
[0018] The DCDC converter is used to convert the input voltage of the power socket into a preset voltage and then input it to the test fixture.
[0019] In one embodiment, the PCIE card includes a processing chip, and the processing chip is configured to detect a communication function of the PCIE card according to the first signal and the second signal.
[0020] In one embodiment, the test fixture has a hot-swap function.
[0021] In one embodiment, the clock circuit is used to generate a clock signal, and the reset circuit is used to generate a reset signal.
[0022] In one embodiment, the clock signal is a differential signal, and the reference clock corresponding to the clock signal is 100 MHz.
[0023] The beneficial effects of the technical solutions provided in the embodiments of the present application include at least:
[0024] The embodiment of the present application provides a PCIE card testing device, which includes: a test fixture, a PCIE card to be tested is connected to the test fixture, and the transmitting end of the PCIE card is connected to the receiving end; the test fixture includes: a power supply circuit, a clock circuit and a reset circuit, wherein the power supply circuit is used to power the PCIE card; the PCIE card, the clock circuit and the reset circuit form a communication system of the PCIE card. The first signal sent by the transmitting end is transmitted to the receiving end to obtain a corresponding second signal, and the first signal is generated based on the communication system. The PCIE card is used to determine the communication function of the PCIE card based on the first signal and the second signal. The PCIE card testing device provided in the embodiment of the present application can test the PCIE card without relying on the motherboard, with low testing cost and high testing efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] Figure 1 The structure of a PCIE card testing device provided in the embodiment of the present application Figure 1 ;
[0026] Figure 2 The structure of a PCIE card testing device provided in the embodiment of the present application Figure 2 ;
[0027] Figure 3 The structure of a PCIE card testing device provided in the embodiment of the present application Figure 3 ;
[0028] Figure 4 This is a structural diagram of a power supply circuit in a PCIE card testing device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0029] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0030] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.
[0031] Additionally, the use of “based on” or “according to” is intended to be open and inclusive, in that a process, step, calculation, or other action “based on” or “according to” one or more conditions or values may, in practice, be based on additional conditions or beyond values.
[0032] In the server industry, PCIe (Peripheral Component Interconnect express) cards are often used to expand server functions and improve server performance, such as RAID cards and wireless network cards.
[0033] Currently, PCIe card testing typically involves inserting the PCIe card under test into the motherboard and then powering the motherboard before the PCIe card can boot up. This makes white-box testing of PCIE cards highly dependent on the motherboard and other environmental factors. Furthermore, the placement of test leads or probes can be difficult, which can also hinder point-to-point testing of PCIE high-speed signals. Furthermore, on most PCIE card products, it is sometimes necessary to perform self-transmission and self-reception testing on the PCIE TX and RX signals on the card. This loopback test verifies the quality of the PCIE path signals within the PCIE card itself. The motherboard itself lacks this type of loopback testing environment, necessitating a fixture capable of performing external loop testing on PCIE cards. This fixture must also be equipped with the small signals required for PCIE card loopback testing, such as clock and reset signals. Furthermore, directly plugging a PCIE card into the motherboard for testing could damage the card itself or even the motherboard if the card malfunctions.
[0034] In order to solve the above problems, the embodiment of the present application provides a PCIE card testing device, such as Figure 1 As shown, the device includes: a test fixture 10, a PCIE card 20 to be tested is connected to the test fixture 10, and a transmitting end and a receiving end of the PCIE card 20 are connected.
[0035] The test fixture 10 includes a power supply circuit 11 , a clock circuit 12 and a reset circuit 13 . The power supply circuit 11 is used to supply power to the PCIE card 20 . The PCIE card 20 , the clock circuit 12 and the reset circuit 13 form a communication system of the PCIE card 20 .
[0036] The first signal sent by the transmitting end is transmitted to the receiving end to obtain a corresponding second signal, where the first signal is generated based on the communication system; the PCIE card 20 is used to detect the communication function of the PCIE card 20 according to the first signal and the second signal.
[0037] Optionally, the PCIE card 20 includes a processing chip, and the processing chip is used to detect the communication function of the PCIE card 20 according to the first signal and the second signal.
[0038] The processing chip may be a GPU chip.
[0039] It should be noted that the PCIE card 20 , the clock circuit 12 , and the reset circuit 13 can form a minimum communication system of the PCIE card 20 , so that the PCIE card 20 can normally transmit and receive signals.
[0040] By connecting the transmitting end and the receiving end of the PCIE card 20, that is, connecting TX0 of the PCIE card 20 to RX0, a PCIE signal loopback test of self-transmitting and self-receiving can be performed on the PCIE card 20. The PCIE link signal quality can be detected based on the first signal and the second signal, and can also be used for aging testing.
[0041] The embodiment of the present application provides a PCIE card 20 testing device, which includes: a test fixture 10, to which the PCIE card 20 to be tested is connected, and the transmitting end of the PCIE card 20 is connected to the receiving end; the test fixture 10 includes: a power supply circuit 11, a clock circuit 12, and a reset circuit 13, wherein the power supply circuit 11 is used to supply power to the PCIE card 20; the PCIE card 20, the clock circuit 12, and the reset circuit 13 form a communication system for the PCIE card 20. A first signal sent by the transmitting end is transmitted to the receiving end to obtain a corresponding second signal, and the first signal is generated based on the communication system. The PCIE card 20 is used to determine the communication function of the PCIE card 20 based on the first signal and the second signal. The PCIE card 20 testing device provided in the embodiment of the present application can test the PCIE card 20 without relying on the motherboard, with low testing cost and high testing efficiency.
[0042] Optional, such as Figure 2 As shown, the testing device further includes an electrical detection device 30, and the electrical detection device 30 is connected to the PCIE card 20;
[0043] The electrical detection device 30 is used to detect the electrical functions in the PCIE card 20 , including whether the voltages of multiple circuits in the PCIE card 20 are normal.
[0044] That is, the electrical detection device 30 can be used to detect the voltage and current conditions of the circuit in the PCIE card 20, and to detect whether the electrical functions in the PCIE card 20 are normal.
[0045] Optional, such as Figure 3 As shown, the test fixture 10 further includes a dip switch 14 , and the dip switch 14 is used to control the communication function test or the electrical function test of the test fixture 10 .
[0046] By controlling the DIP switch 14 , the communication function test and the electrical function test can be performed independently without interfering with each other.
[0047] Optional, such as Figure 4 As shown, the power supply circuit 11 includes: a power socket 111, and the power socket 111 is connected to an external DC power supply;
[0048] The power socket 111 is used to provide input voltage to the test fixture 10. The power supply circuit 11 also includes a DCDC converter 112, which is connected between the power socket 111 and the test fixture 10. The DCDC converter 112 is used to convert the input voltage of the power socket 111 into a preset voltage and input it to the test fixture 10.
[0049] The external input voltage is usually a 12V DC voltage. The DCDC converter 112 is used to convert the 12V DC voltage into 3.3V and then input it to the test fixture 10 .
[0050] Optionally, the test fixture 10 has a hot-swap function, so that when performing a PCIE test, there is no need to power off and restart, and the PCIE card 20 can be plugged and unplugged at will when the power is on.
[0051] Optionally, the clock circuit 12 is used to generate a clock signal, and the reset circuit 13 is used to generate a reset signal.
[0052] The clock signal is a differential signal, corresponding to a 100MHz reference clock. It uses LVPECL (Low-Voltage Phase-Emitting Clamp) with a controlled impedance of 100Ω. This clock signal is generated by clock circuit 12 in test fixture 10 and is used by the PCIE PHY phase-locked loop (PLL). This signal is essential for PCIE communication.
[0053] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0054] The above embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the utility model patent. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the concept of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be based on the appended claims.
Claims
1. A PCIE card testing device, characterized in that: The device comprises: a test fixture, a PCIE card to be tested is connected to the test fixture, and a transmitting end and a receiving end of the PCIE card are connected; The test fixture includes: a power supply circuit, a clock circuit and a reset circuit; The power supply circuit is used to supply power to the PCIE card; The PCIE card, the clock circuit and the reset circuit form a communication system of the PCIE card; A first signal sent by the transmitting end is transmitted to the receiving end to obtain a corresponding second signal, wherein the first signal is generated based on the communication system; The PCIE card is used to detect the communication function of the PCIE card according to the first signal and the second signal.
2. The device according to claim 1, characterized in that The testing device further includes an electrical detection device, wherein the electrical detection device is connected to the PCIE card; The electrical detection device is used to detect the electrical functions in the PCIE card, and the electrical functions include whether the voltages of multiple circuits in the PCIE card are normal.
3. The device according to claim 2, characterized in that The test fixture further includes a dip switch, and the dip switch is used to control the communication function test or the electrical function test of the test fixture.
4. The device according to claim 2, characterized in that The power supply circuit includes: a power socket connected to an external DC power supply; The power socket is used to provide input voltage to the test fixture.
5. The device according to claim 4, characterized in that The power supply circuit further includes: a DCDC converter, the DCDC converter being connected between the power socket and the test fixture; The DCDC converter is used to convert the input voltage of the power socket into a preset voltage and then input it to the test fixture.
6. The device according to claim 1, characterized in that The PCIE card includes a processing chip, and the processing chip is used to detect the communication function of the PCIE card according to the first signal and the second signal.
7. The device according to claim 1, characterized in that The test fixture has a hot-swap function.
8. The device according to claim 1, characterized in that The clock circuit is used to generate a clock signal, and the reset circuit is used to generate a reset signal.
9. The device according to claim 8, characterized in that The clock signal is a differential signal, and the reference clock corresponding to the clock signal is 100 MHz.