Ultrasonic echo signal processing circuit

Abstract

The utility model discloses an ultrasonic echo signal processing circuit, which comprises a differential amplification circuit, a band-pass filtering amplification circuit, a voltage reference circuit and a power supply control circuit, the input end of the differential amplification circuit is connected with the ultrasonic transducer, and the output end of the differential amplification circuit is coupled with the input end of the band-pass filtering amplification circuit through a capacitor; the output end of the band-pass filtering and amplifying circuit is connected with the signal acquisition end of the signal processor; a power-on time sequence control end of the signal processor is connected to the differential amplification circuit and the band-pass filtering amplification circuit through the power supply control circuit; the voltage reference circuit is connected to the differential amplification circuit and the band-pass filtering amplification circuit. The device is used for amplifying and filtering echo signals received by an ultrasonic receiving transducer, so that the signal amplitude meets the requirement of a signal processor on the quality of the echo signals and the requirement on power consumption under the condition of battery power supply.

Description

Technical Field

[0001] The utility model relates to the technical field of ultrasonic measurement, in particular to an ultrasonic echo signal processing circuit. Background Art

[0002] Ultrasonic echo signals are typically weak and easily affected by environmental noise, resulting in a low signal-to-noise ratio. After the echo signal undergoes electromechanical conversion through the transducer, the resulting electrical signal has a low peak-to-peak value, making it difficult to meet the input standards required by the signal processing unit. Therefore, an operational amplifier is required to amplify the signal. However, when the electrical signal enters the operational amplifier as a single-ended input, its ability to resist external interference is weak, especially in the presence of electromagnetic interference or mechanical vibration. This can cause the output signal to become unstable, thereby affecting the data acquisition and processing performance of the subsequent sampling circuit.

[0003] Common ultrasonic fluid metering products used for ultrasonic echo signal sampling are all battery-powered. To minimize power consumption, ultrasonic echo signal sampling operates intermittently. During operation, the operational amplifier circuit is powered on and must reach a stable operating state within 10μS. When not operating, the operational amplifier circuit is powered off, consuming no energy. The reference voltage for the operational amplifier circuit is typically generated by an LDO or a separate voltage regulator. If the reference voltage source is powered on and off simultaneously with the operational amplifier circuit, the stabilization time requirement cannot be met. If the reference voltage source is continuously powered on, the high static power consumption of the LDO or separate voltage regulator will not meet the overall circuit power consumption requirements.

[0004] Therefore, how to provide an ultrasonic echo signal processing circuit with strong anti-interference capability and low power consumption is a technical problem that needs to be solved urgently by those skilled in the art. Utility Model Content

[0005] In response to the above research status, the utility model provides an ultrasonic echo signal processing circuit for amplifying and filtering the echo signal received by the ultrasonic receiving transducer so that the signal amplitude meets the requirements of the signal processor for echo signal quality and the requirements for power consumption under battery power supply.

[0006] The utility model provides an ultrasonic echo signal processing circuit, comprising: a differential amplifier circuit, a bandpass filter amplifier circuit, a voltage reference circuit and a power supply control circuit; wherein,

[0007] The input end of the differential amplifier circuit is connected to the ultrasonic transducer, and the output end of the differential amplifier circuit is coupled to the input end of the band-pass filter amplifier circuit through a capacitor; the output end of the band-pass filter amplifier circuit is connected to the signal acquisition end of the signal processor;

[0008] The power-on timing control terminal of the signal processor is connected to the differential amplifier circuit and the band-pass filter amplifier circuit through a power control circuit;

[0009] The voltage reference circuit is connected to the differential amplifier circuit and the bandpass filter amplifier circuit.

[0010] Preferably, the voltage reference circuit adopts a resistor voltage divider circuit structure.

[0011] Preferably, the voltage reference circuit is powered by an external power supply.

[0012] Preferably, the differential amplifier circuit includes:

[0013] The non-inverting input terminal and the inverting input terminal of the operational amplifier U1 are connected to the two ends of the ultrasonic transducer TR1 through the resistor R3 and the resistor R6 respectively; the output terminal of the operational amplifier U1 is coupled to the band-pass filter amplifier circuit through the capacitor C4;

[0014] The output terminal of the operational amplifier U1 is reversely connected to the inverting input terminal of the operational amplifier U1 through a parallel circuit consisting of a capacitor C3 and a resistor R4;

[0015] The non-inverting input terminal of the operational amplifier U1 is connected to the voltage reference circuit via a parallel circuit consisting of a capacitor C7 and a resistor R7;

[0016] An enable terminal of the operational amplifier U1 is connected to the power control circuit.

[0017] Preferably, the bandpass filter amplifier circuit includes:

[0018] The inverting input terminal of the operational amplifier U2 is connected to the capacitor C4 through the capacitor C5 and the resistor R5 in sequence, and is coupled to the differential amplifier circuit through the capacitor C4;

[0019] The non-inverting input terminal of the operational amplifier U2 is connected to the voltage reference circuit, and the non-inverting input terminal of the operational amplifier U2 is also connected to the connection node of the capacitor C5 and the resistor R5 through the resistor R8;

[0020] The output end of the operational amplifier U2 is connected to the connection node of the capacitor C5 and the resistor R5 through the capacitor C2, and the output end of the operational amplifier U2 is connected to the connection node of the capacitor C5 and the inverting input end of the operational amplifier U2 through the resistor R2; the output end of the operational amplifier U2 is also connected to the signal acquisition end of the signal processor through the capacitor C6;

[0021] The enable terminal of the operational amplifier U2 is connected to the power control circuit.

[0022] Preferably, the voltage reference circuit includes:

[0023] The external power supply Pwr is connected to the ground terminal through the resistor R9 and the resistor R10 in sequence;

[0024] A connection node between the resistor R9 and the resistor R10 is connected to a reference voltage terminal;

[0025] Connect capacitor C8 between the ground terminal and the reference voltage terminal;

[0026] The connection node between C8 and the reference voltage terminal is connected to the non-inverting input terminal of the operational amplifier in the differential amplifier circuit and the band-pass filter amplifier circuit.

[0027] Preferably, the power control circuit is a MOS tube switch circuit.

[0028] Preferably, the power control circuit includes:

[0029] The gate of the P-channel MOS transistor is connected to the power-on timing control terminal of the signal processor;

[0030] The drain of the P-channel MOS transistor is connected to the differential amplifier circuit and the band-pass filter amplifier circuit; the drain of the P-channel MOS transistor is also connected to the ground terminal through the capacitor C1;

[0031] The source of the P-channel MOS tube is connected to the drain through the resistor R1.

[0032] Compared with the prior art, the present invention has the following beneficial effects:

[0033] This utility model amplifies and filters the echo signal received by an ultrasonic transducer, ensuring that the signal amplitude and quality meet the requirements of a signal processor. By incorporating a differential amplifier circuit and a bandpass filter circuit, it effectively addresses issues such as small signal amplitude, low signal-to-noise ratio, unstable performance, and low measurement accuracy typically encountered by ultrasonic transducers. The analog front-end circuit, comprised of a power control circuit, a voltage reference circuit, and an op amp circuit, effectively meets the power consumption requirements of battery-powered ultrasonic measurement circuits.

[0034] The utility model adopts a differential and bandpass filter amplifier circuit, and adopts capacitive coupling between the first-stage differential amplifier circuit and the bandpass filter amplifier circuit to eliminate the influence of the differential amplifier on the voltage reference, thereby improving the signal-to-noise ratio of the ultrasonic echo signal, laying the foundation for the subsequent circuit to stabilize signal acquisition and data processing; and solves the problems of low signal-to-noise ratio and weak anti-interference energy of the current circuit.

[0035] The utility model adopts an electronic switch to power the operational amplifier in a time-sharing manner, thereby reducing the power consumption of the signal amplification circuit, greatly solving the problem of high power consumption of the current circuit, and reducing the requirement for battery capacity when the whole machine is powered by batteries.

[0036] This new voltage reference circuit uses a resistor divider to achieve low power consumption and low cost. To reduce the voltage reference power-up stabilization time and the energy loss of the power-down energy storage capacitor, the voltage reference circuit operates continuously and does not power on or off according to the acquisition cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for the embodiments or the description of the prior art. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without inventive effort.

[0038] Figure 1 This is a schematic diagram of an ultrasonic echo signal processing circuit provided by an embodiment of the present utility model;

[0039] Figure 2 It is a logic circuit diagram of an ultrasonic echo signal processing circuit provided by an embodiment of the utility model.

[0040] In the figure,

[0041] 1 is an ultrasonic transducer, 2 is a differential amplifier circuit, 3 is a capacitor used as a power supply isolator, 4 is a bandpass filter amplifier circuit, 5 is a power supply control circuit, 6 is a signal processor, and 7 is a voltage reference circuit. DETAILED DESCRIPTION

[0042] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0043] like Figure 1 As shown, the utility model discloses an ultrasonic echo signal processing circuit, including: a differential amplifier circuit 2, a bandpass filter amplifier circuit 4, a voltage reference circuit 7 and a power supply control circuit 5; wherein, the input end of the differential amplifier circuit 2 is connected to the ultrasonic transducer 1, and the output end of the differential amplifier circuit 2 is coupled to the input end of the bandpass filter amplifier circuit 4 through the capacitor 3; the output end of the bandpass filter amplifier circuit 4 is connected to the signal acquisition end of the signal processor 6; the power-on timing control end of the signal processor 6 is connected to the differential amplifier circuit 2 and the bandpass filter amplifier circuit 4 through the power supply control circuit 5; the voltage reference circuit 7 is connected to the differential amplifier circuit 2 and the bandpass filter amplifier circuit 4.

[0044] In this embodiment, the signal from ultrasonic transducer 1 undergoes differential amplification by differential amplifier circuit 2, filtering out common-mode noise from ultrasonic transducer 1. Differential amplifier circuit 2 then outputs a signal with a relatively high amplitude, achieving the first stage of amplification of the ultrasonic echo signal. The output of differential amplifier circuit 2 is then AC-coupled by capacitor 3 and then fed into capacitor 3 for bandpass filtering and amplification, further increasing the signal amplitude and filtering out invalid noise signals, thereby meeting the signal amplitude requirements of the signal processor.

[0045] In this embodiment, the power control circuit 5 controls the voltage of the differential amplifier circuit 2 and the capacitor 3 according to the signal of the signal processing unit, thereby reducing the average power consumption of the ultrasonic amplifier circuit.

[0046] In this embodiment, voltage reference circuit 7 provides a voltage reference source for the operational amplifier circuits in differential amplifier circuit 2 and bandpass filter amplifier circuit 4. The static operating points of differential amplifier circuit 2 and bandpass filter amplifier circuit 4 serve as the reference voltage source, enabling undistorted amplification of the AC echo signal from the ultrasonic transducer. Voltage reference circuit 7 exhibits low static power consumption and high stability. When power control circuit 5 shuts down and stops supplying power to differential amplifier circuit 2 and bandpass filter amplifier circuit 4, capacitor 3 prevents current from being released from differential amplifier circuit 2 and bandpass filter amplifier circuit 4 to voltage reference circuit 7, ensuring the stability of voltage reference circuit 7 and reducing power consumption of the entire circuit.

[0047] In one embodiment, voltage reference circuit 7 provides a reference voltage for signal amplification in differential amplifier circuit 2 and bandpass filter amplifier circuit 4. Voltage reference circuit 7 is implemented using a resistor divider, resulting in low power consumption and low cost. To reduce the voltage reference power-up stabilization time and energy loss in the power-down energy storage capacitor, the voltage reference circuit operates continuously and is not powered on or off according to the acquisition cycle.

[0048] In one embodiment, the voltage reference circuit 7 is powered by an external power supply.

[0049] In one embodiment, the differential amplifier circuit 2 includes:

[0050] The non-inverting input terminal and the inverting input terminal of the operational amplifier U1 are connected to the two ends of the ultrasonic transducer TR1 through the resistor R3 and the resistor R6 respectively; the output terminal of the operational amplifier U1 is coupled to the bandpass filter amplifier circuit through the capacitor C4;

[0051] The output terminal of the operational amplifier U1 is reversely connected to the inverting input terminal of the operational amplifier U1 through a parallel circuit consisting of a capacitor C3 and a resistor R4;

[0052] The non-inverting input terminal of the operational amplifier U1 is connected to the voltage reference circuit through a parallel circuit consisting of a capacitor C7 and a resistor R7;

[0053] The enable terminal of the operational amplifier U1 is connected to the power control circuit.

[0054] In one embodiment, the bandpass filter amplifier circuit 4 includes:

[0055] The inverting input terminal of the operational amplifier U2 is connected to the capacitor C4 through the capacitor C5 and the resistor R5 in sequence, and is coupled to the differential amplifier circuit through the capacitor C4;

[0056] The non-inverting input terminal of the operational amplifier U2 is connected to the voltage reference circuit, and the non-inverting input terminal of the operational amplifier U2 is also connected to the connection node of the capacitor C5 and the resistor R5 through the resistor R8;

[0057] The output terminal of the operational amplifier U2 is connected to the connection node of the capacitor C5 and the resistor R5 through the capacitor C2, and the output terminal of the operational amplifier U2 is connected to the connection node of the capacitor C5 and the inverting input terminal of the operational amplifier U2 through the resistor R2; the output terminal of the operational amplifier U2 is also connected to the signal acquisition terminal of the signal processor through the capacitor C6;

[0058] The enable terminal of the operational amplifier U2 is connected to the power control circuit.

[0059] like Figure 2 As shown, when the circuit is not working, the power supply of the differential amplifier circuit 2 is turned off. In order to prevent the differential amplifier circuit 2 from discharging the charge of the voltage reference Vref through the resistors R8 and R5, affecting the stability of the reference voltage and causing fluctuations in the output signal of the operational amplifier, it is necessary to use capacitive coupling between the first-stage differential amplifier circuit and the bandpass filter amplifier circuit to eliminate the influence of the differential amplifier on the voltage reference.

[0060] In one embodiment, the voltage reference circuit 7 includes:

[0061] The external power supply Pwr is connected to the ground terminal through the resistor R9 and the resistor R10 in sequence;

[0062] A connection node between the resistor R9 and the resistor R10 is connected to a reference voltage terminal;

[0063] Connect capacitor C8 between the ground terminal and the reference voltage terminal;

[0064] The connection node between C8 and the reference voltage terminal is connected to the non-inverting input terminal of the operational amplifier in the differential amplifier circuit and the band-pass filter amplifier circuit.

[0065] In one embodiment, the power control circuit 5 is a MOS transistor switch circuit. The ultrasonic excitation of the ultrasonic transducer 1 and the signal acquisition frequency of the signal processor operate at a predetermined frequency. During operation, the signal processor 6 is awakened and operates, which controls the MOS switch circuit to turn on, powering on the differential amplifier and bandpass filter. During non-operation, the signal processor is dormant and controls the MOS switch circuit to turn off, powering on and off the differential amplifier and bandpass filter to reduce system power consumption.

[0066] In one embodiment, the power control circuit 5 includes:

[0067] The gate of the P-channel MOS tube is connected to the power-on timing control terminal of the signal processor;

[0068] The drain of the P-channel MOS transistor is connected to the differential amplifier circuit and the band-pass filter amplifier circuit; the drain of the P-channel MOS transistor is also connected to the ground terminal through the capacitor C1;

[0069] The source of the P-channel MOS tube is connected to the drain through the resistor R1.

[0070] The above is a detailed introduction to an ultrasonic echo signal processing circuit provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there may be changes in the specific implementation methods and application scope. In summary, the contents of this specification should not be understood as limiting the present invention.

[0071] In this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

Claims

1. An ultrasonic echo signal processing circuit, characterized in that: Including: differential amplifier circuit, bandpass filter amplifier circuit, voltage reference circuit and power supply control circuit; wherein, The input end of the differential amplifier circuit is connected to the ultrasonic transducer, and the output end of the differential amplifier circuit is coupled to the input end of the band-pass filter amplifier circuit through a capacitor; the output end of the band-pass filter amplifier circuit is connected to the signal acquisition end of the signal processor; The power-on timing control terminal of the signal processor is connected to the differential amplifier circuit and the band-pass filter amplifier circuit through a power control circuit; The voltage reference circuit is connected to the differential amplifier circuit and the bandpass filter amplifier circuit.

2. The ultrasonic echo signal processing circuit according to claim 1, characterized in that: The voltage reference circuit adopts a resistor voltage divider circuit structure.

3. The ultrasonic echo signal processing circuit according to claim 1, characterized in that: The voltage reference circuit is powered by an external power supply.

4. The ultrasonic echo signal processing circuit according to claim 1, characterized in that: The differential amplifier circuit comprises: The non-inverting input terminal and the inverting input terminal of the operational amplifier U1 are connected to the two ends of the ultrasonic transducer TR1 through the resistor R3 and the resistor R6 respectively; the output terminal of the operational amplifier U1 is coupled to the band-pass filter amplifier circuit through the capacitor C4; The output terminal of the operational amplifier U1 is reversely connected to the inverting input terminal of the operational amplifier U1 through a parallel circuit consisting of a capacitor C3 and a resistor R4; The non-inverting input terminal of the operational amplifier U1 is connected to the voltage reference circuit via a parallel circuit consisting of a capacitor C7 and a resistor R7; An enable terminal of the operational amplifier U1 is connected to the power control circuit.

5. The ultrasonic echo signal processing circuit according to claim 1, characterized in that: The bandpass filter amplifier circuit comprises: The inverting input terminal of the operational amplifier U2 is connected to the capacitor C4 through the capacitor C5 and the resistor R5 in sequence, and is coupled to the differential amplifier circuit through the capacitor C4; The non-inverting input terminal of the operational amplifier U2 is connected to the voltage reference circuit, and the non-inverting input terminal of the operational amplifier U2 is also connected to the connection node of the capacitor C5 and the resistor R5 through the resistor R8; The output end of the operational amplifier U2 is connected to the connection node of the capacitor C5 and the resistor R5 through the capacitor C2, and the output end of the operational amplifier U2 is connected to the connection node of the capacitor C5 and the inverting input end of the operational amplifier U2 through the resistor R2; the output end of the operational amplifier U2 is also connected to the signal acquisition end of the signal processor through the capacitor C6; The enable terminal of the operational amplifier U2 is connected to the power control circuit.

6. An ultrasonic echo signal processing circuit according to claim 1, 2, 3, 4 or 5, characterized in that: The voltage reference circuit comprises: The external power supply Pwr is connected to the ground terminal through the resistor R9 and the resistor R10 in sequence; A connection node between the resistor R9 and the resistor R10 is connected to a reference voltage terminal; Connect capacitor C8 between the ground terminal and the reference voltage terminal; The connection node between C8 and the reference voltage terminal is connected to the non-inverting input terminal of the operational amplifier in the differential amplifier circuit and the band-pass filter amplifier circuit.

7. The ultrasonic echo signal processing circuit according to claim 1, characterized in that: The power control circuit is a MOS tube switch circuit.

8. An ultrasonic echo signal processing circuit according to claim 1, 4 or 5, characterized in that: The power control circuit includes: The gate of the P-channel MOS transistor is connected to the power-on timing control terminal of the signal processor; The drain of the P-channel MOS transistor is connected to the differential amplifier circuit and the band-pass filter amplifier circuit; the drain of the P-channel MOS transistor is also connected to the ground terminal through the capacitor C1; The source of the P-channel MOS tube is connected to the drain through the resistor R1.

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