Display device

Abstract

A display device includes: a light emitting element layer including light emitting elements; a first insulating layer including an inorganic material over the light emitting element layer; a color conversion layer including a bank and quantum dots over the first insulating layer; a low refractive layer over the color conversion layer; and a second insulating layer including an inorganic material over the low refractive layer.

Description

[0001] Cross Reference to Related Applications

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0149331, filed on November 1, 2023, in the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. TECHNICAL FIELD

[0003] The disclosure relates generally to a display device and a manufacturing method for a display device. BACKGROUND

[0004] As information technology develops, the importance of a display device, which is a medium for connecting users and information, increases. Accordingly, display devices such as liquid crystal display devices and organic light emitting display devices are increasingly used.

[0005] As the demand for high-quality display devices increases, it can be desirable to improve the light emitting efficiency of the display device. In addition, when a structure that is strong against external influences is implemented, it can be appropriate to reduce or prevent the possibility of product defects caused by impurities. SUMMARY

[0006] Embodiments provide a display device capable of improving light emitting efficiency and a manufacturing method for a display device.

[0007] Embodiments also provide a display device capable of reducing the risk of defects occurring in the product structure and a manufacturing method for a display device.

[0008] According to an aspect of the disclosure, a display device is provided, the display device including: a light emitting element layer including light emitting elements; a first insulating layer including an inorganic material above the light emitting element layer; a color conversion layer including a bank and quantum dots above the first insulating layer; a low-refraction layer above the color conversion layer; and a second insulating layer including an inorganic material above the low-refraction layer.

[0009] The low-refraction layer can include an organic material and can have a refractive index smaller than that of the color conversion layer.

[0010] The color conversion layer and the low-refraction layer can be in contact with each other without any organic layer therebetween.

[0011] The first insulating layer and the color conversion layer can be in contact with each other without any organic layer therebetween.

[0012] The light emitting element layer can include: first electrodes corresponding to the light emitting elements, respectively; light emitting layers above the first electrodes, respectively; and a second electrode above the light emitting layers and below the first insulating layer.

[0013] The display device can further include a monomer between the quantum dots and the first insulating layer, wherein the quantum dots are in an opening defined by the bank and respectively overlap the pixel regions.

[0014] The display device can further include a third insulating layer including an inorganic material between the color conversion layer and the low-refractive layer.

[0015] The low-refractive layer can extend into a bank trap region, wherein the bank trap region is an opening defined by the bank and spaced apart from the pixel regions in a plan view.

[0016] The display device can further include a monomer between the quantum dots and the first insulating layer, and between the first insulating layer and a portion of the low-refractive layer extending into the bank trap region, wherein the quantum dots are in another opening defined by the bank and overlap one of the pixel regions.

[0017] The display device can further include a third insulating layer including an inorganic material between the color conversion layer and the low-refractive layer, and between the monomer and the portion of the low-refractive layer extending into the bank trap region.

[0018] The display device can further include a pixel circuit layer including pixel circuits and a power line connected to the pixel circuits and to the second electrodes in the light emitting element layer through a contact hole, wherein the light emitting element layer is above the pixel circuit layer, and wherein the bank trap region overlaps the contact hole.

[0019] The display device can further include a color filter layer above the second insulating layer and including color filters.

[0020] The display device can further include an overcoat layer above the color filter layer and including an organic material.

[0021] The color conversion layer can include a first color conversion pattern including first quantum dots for converting light from the light emitting element layer into light of a first color and a second color conversion pattern including second quantum dots for converting light from the light emitting element layer into light of a second color.

[0022] According to another aspect of the disclosure, a display device is provided, the display device including: a pixel circuit layer above a base layer and including pixel circuits; a light emitting element layer above the pixel circuit layer and including first electrodes respectively corresponding to light emitting elements, light emitting layers respectively above the first electrodes, and second electrodes above the light emitting layers; an insulating layer above the light emitting element layer and including an inorganic material; a color conversion layer above the insulating layer and including a bank and a color conversion portion including quantum dots; and a low-refractive layer above the color conversion layer, including an organic material, having a refractive index smaller than a refractive index of the color conversion layer, and contacting the color conversion layer.

[0023] According to still another aspect of the present disclosure, there is provided a method for manufacturing a display device, the method including: forming a light emitting element layer including a light emitting element over a base layer; forming a first insulating layer including an inorganic material over the light emitting element layer; forming a color conversion layer over the first insulating layer, the color conversion layer including a bank and a color conversion portion surrounded by the bank in a plan view and having a quantum dot; forming a low-refraction layer including an organic material and having a refractive index smaller than a refractive index of the color conversion layer over the color conversion layer; and forming a second insulating layer including an inorganic material over the low-refraction layer. BRIEF DESCRIPTION OF DRAWINGS

[0024] In the following, embodiments will be described more fully with reference to the accompanying drawings. Embodiments can, however, be implemented in many different forms and should not be construed as limited to the embodiments set forth in this document. Rather, these embodiments are provided as illustrative so that this disclosure will be thorough and complete, and will fully convey the scope of the embodiment to those skilled in the art.

[0025] In the drawings, the size of some of the elements can be exaggerated relative to others for clarity. It will be understood that when an element is referred to as being "on" another element, it can be directly on the other element or an intervening element can also be present. Like reference numerals refer to like elements throughout.

[0026] Figure 1 is a plan view illustrating a display device according to one or more embodiments of the present disclosure.

[0027] Figure 2 is a circuit diagram illustrating any one of sub-pixels included in the display device shown in Figure 1

[0028] Figure 3 is an enlarged view of the region A shown in Figure 1

[0029] Figure 4 is a cross-sectional view taken along line I-I' shown in Figure 3

[0030] Figure 5 is a cross-sectional view taken along line II-II' shown in Figure 3

[0031] Figure 6 is a cross-sectional view taken along line I-I' shown in Figure 3

[0032] ​​​​​Figure 7 is a cross-sectional view taken along line II-II’ shown in FIG. 1B, according to another or more other embodiments of the display apparatus. Figure 3 is a cross-sectional view taken along line II-II’ shown in FIG. 1B, according to another or more other embodiments of the display apparatus.

[0033] Figure 8 is a cross-sectional view taken along line I-I’ shown in FIG. 1A, according to another or more other embodiments of the display apparatus. Figure 3 is a cross-sectional view taken along line I-I’ shown in FIG. 1A, according to another or more other embodiments of the display apparatus.

[0034] Figure 9 is a cross-sectional view taken along line II-II’ shown in FIG. 1B, according to another or more other embodiments of the display apparatus. Figure 3 is a cross-sectional view taken along line II-II’ shown in FIG. 1B, according to another or more other embodiments of the display apparatus.

[0035] Figure 10 is a flowchart illustrating a manufacturing method for a display apparatus according to one or more embodiments of the disclosure. DETAILED DESCRIPTION

[0036] Some embodiments of the disclosure and various aspects of methods to realize the same can be more readily understood by reference to the following detailed description in conjunction with the accompanying drawings. The described embodiments provide examples of the disclosure, so that the disclosure will be thorough and complete, and will fully convey the various aspects of the disclosure to those skilled in the art. Accordingly, processes, elements, and techniques that are redundant, that are unrelated to the embodiments, or that are not necessary for understanding the various aspects of the disclosure to those skilled in the art can be omitted from the description. Unless otherwise indicated, like reference numerals, characters or combinations thereof in the entire specification and drawings mean the same element or combination of elements, and thus repetitive description thereof can be omitted.

[0037] The described embodiments can have various modifications and can be implemented in different forms, and should not be interpreted as being limited only to the embodiments illustrated herein. The use of “can,” “may,” or “might” in describing the embodiments corresponds to one or more embodiments of the disclosure. The disclosure covers all modifications, equivalents, and alternatives falling within the idea and technical scope of the disclosure. Furthermore, each of the features of the various embodiments of the disclosure can be combined partially or entirely with each other, and technically various interlocks and drives are possible. Each of the embodiments can be implemented independently of each other, or can be implemented together.

[0038] In the drawings, the relative sizes of elements, layers, and regions can be exaggerated for clarity and / or descriptive purposes. In addition, the use of cross-hatching and / or shading in the drawings is for clarifying boundaries and / or regions that are not expressly called out. As such, the presence or absence of cross-hatching or shading does not convey or imply any preference or requirement for particular material, material properties, dimensions, ratios, commonality of illustrated elements, and / or any other characteristic, attribute, property, etc. between elements illustrated in the drawings, unless otherwise indicated.

[0039] Various embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of embodiments and / or intermediate structures for purposes of explanation only. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Moreover, the particular structural and functional descriptions set forth herein are not intended to be exhaustive or to be construed as limiting embodiments according to the present disclosure. Thus, embodiments disclosed herein are not limited to the particular examples described.

[0040] For example, an implant region that is illustrated as rectangular typically has rounded or curved features at its edges and / or a gradient of implant concentration, rather than a binary change from the implant region to the non-implant region. Likewise, a buried region formed by implantation can result in some implant in the region between the buried region and the surface through which implantation occurs.

[0041] For ease of explanation, spatially relative terms such as "below," "beneath," "lower," "bottom," "under," "above," "upper," and "top" can be used herein for the purpose of describing the orientation of one element or feature relative to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or in operation, in addition to the orientations depicted in the figures. For example, if a device in the figures is turned over, elements described as "below," "beneath," or "under" other elements or features would then be oriented "above" the other elements or features. Thus, the example terms "below," "beneath," and "under" can encompass both the up and down orientations. Devices can be otherwise oriented (e.g., rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly. Similarly, when a first component is described as being "on" a second component, it indicates that the first component is disposed on the upper side or lower side of the second component, as the case can be, without regard to the orientation of the first component relative to the second component.

[0042] Furthermore, the phrase "in plan view" means when viewing the object portion from above, while the phrase "in a schematic cross-sectional view" means when viewing a schematic cross-section taken through a vertical cut of the object portion from the side. The term "overlapping" or "overlapped" means that a first object can be above or below or to the side of a second object, or vice versa. Additionally, the term "overlapping" can include stacking, facing, or variations thereof, extending over, covering or partially covering, or any other suitable term that would be appreciated and understood by one of ordinary skill in the art. The expression "not overlapping" can include such as "separated from", "leaving out of", or "deviating from", as well as any other suitable equivalent that would be appreciated and understood by one of ordinary skill in the art. The term "facing" and variations thereof can mean that a first object can be directly or indirectly opposite a second object. In the case where a third object is interposed between the first object and the second object, the first object and the second object can be understood as indirectly opposite each other, although still facing each other.

[0043] It will be understood that when an element, layer, region or component is referred to as being "on" or "connected to" or "coupled to" another element, layer, region or component, it can be directly on, connected to or coupled to the other element, layer, region or component, or intervening elements, layers, regions or components can be present. In addition, it can collectively mean directly or indirectly coupled or connected as well as integrally or non-integrally coupled or connected. For example, when a layer, region or component is referred to as being "electrically connected" or "electrically coupled" to another layer, region or component, it can be directly electrically connected or directly coupled to the other layer, region and / or component, or one or more intervening layers, regions or components can be present. The one or more intervening components can include switches, resistors, and / or capacitors, etc. In describing embodiments, unless explicitly described as directly connected, the expression of connection indicates electrical connection, and "directly connected / directly coupled" or "directly on" refers to a component directly connected or directly coupled another component, or on another component, without intervening components.

[0044] Also, in this Specification, when a part of a layer, film, region, or plate, etc. is formed "on" another part, the direction of formation is not limited to an upward direction, but includes formation of the part on a side surface or in a downward direction. Conversely, when a part of a layer, film, region, or plate, etc. is formed "under" another part, this includes not only the case where the part is "directly under" the other part, but also the case where there is yet another part between the part and the other part. Meanwhile, other expressions describing relationships between components such as "between" and "immediately between" or "adjacent to" and "directly adjacent to" can be similarly interpreted. It will be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers or there can be one or more intervening elements or layers.

[0045] For purposes of the present disclosure, the expression such as "at least one of... or "any of... or "one or more of... when preceding a list of elements, modifies the entire list of elements and not the individual elements of the list. For example, "at least one of X, Y, and Z" and "at least one of a group consisting of X, Y, and Z" can be interpreted as X alone, Y alone, Z alone, a combination of two or more of X, Y, and Z, such as XYZ, XY, YZ, and XZ, or any variations of the above in any order. Similarly, the expression "at least one of A and B" can include A, B, or A and B. As used in this document, "or" means "and / or" and the term "and / or" includes any and all combinations of one or more of the associated listed items. For example, the expression "A and / or B" can include A, B, or A and B. Similarly, when the expression such as "at least one of... " "a plurality of... " "one of... " and other similar phrases is used preceding a list of elements, the entire list of elements is modified and not the individual elements of the list.

[0046] It will be understood that, although the terms“first,”“second,”“third,” etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section described below could be termed a second element, component, region, layer or section without departing from the spirit and scope of the present disclosure. Describing the element as a“first” element does not require or imply the presence of a second or other elements. The terms“first,”“second,” etc. can also be used herein to distinguish different categories or groups of elements. For the sake of simplicity, the terms“first,”“second,” etc. can be used herein to designate the“first type (or first group)” and the“second type (or second group),” respectively, as is merely an example.

[0047] In examples, the x-axis, y-axis and / or z-axis are not limited to the three axes of a rectangular coordinate system, and can be interpreted in a broad sense. For example, the x-axis, y-axis and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. The same applies to the first direction DR1, the second direction DR2 and / or the third direction DR3.

[0048] The terminology used herein is for the purpose of describing embodiments only and is not intended to be limiting of the present disclosure. As used herein, the singular forms“a,”“an” and“the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms“comprises,”“comprising,”“includes” and / or“including,” when used herein, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0049] When one or more embodiments can be implemented differently, a specific process sequence can be performed differently from the described order. For example, two processes described consecutively can be performed substantially simultaneously or in an order opposite to the described order.

[0050] As used herein, the terms “substantially,” “approximately,” “about,” and similar terms are used as terms of approximation and not as terms of degree, and are intended to account for the inherent deviations in measured or calculated values that would be recognized by those of ordinary skill in the art. For example, “substantially” can include a range of + / - 5% of a corresponding value. “About” or “approximately,” as used in this document, includes the stated value and means within a reasonable deviation of the particular value as determined by one of ordinary skill in the art. For example, “about” can mean within one or more standard deviations or within + / - 30%, + / - 20%, + / - 10%, + / - 5% of the stated value. Furthermore, the use of “may” when describing embodiments of the present disclosure refers to one or more embodiments of the present disclosure.

[0051] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and / or the present specification, and should not be interpreted in an overly idealized or formal sense unless expressly so defined herein.

[0052] The present disclosure relates generally to display devices and manufacturing methods for display devices. Hereinafter, display devices and manufacturing methods for display devices according to one or more embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0053] Figure 1 is a plan view illustrating a display device according to one or more embodiments of the present disclosure.

[0054] Referring to Figure 1 The display device DD can include a substrate layer BSL and sub-pixels SPX disposed on the substrate layer BSL. In one or more embodiments, the display device DD can further include driving circuits (e.g., scan drivers and data drivers), lines, and pads for driving the sub-pixels SPX.

[0055] The display device DD (or the substrate layer BSL) can include a display area DA and a non-display area NDA. The non-display area NDA can mean an area other than the display area DA. The non-display area NDA can surround at least a portion of the display area DA (e.g., in a plan view).

[0056] The base layer BSL can form a base surface of the display device DD. The base layer BSL can be a rigid or flexible substrate or a rigid or flexible film. For example, the base layer BSL can be a rigid substrate made of glass or tempered glass, a flexible substrate (or a thin film) made of plastic or a metal material, or at least one insulating layer. The material and / or properties of the base layer BSL are not particularly limited. In one or more embodiments, the base layer BSL can be substantially transparent. The term "substantially transparent" can mean that light can be transmitted with a corresponding transmittance (e.g., a predetermined transmittance) or higher. In one or more other embodiments, the base layer BSL can be translucent or opaque. In addition, in some embodiments, the base layer BSL can include a reflective material. In one or more embodiments, the base layer BSL can form a lower substrate.

[0057] The display area DA can mean an area in which the sub-pixels SPX are arranged. The non-display area NDA can mean an area in which the sub-pixels SPX are not positioned. The driving circuit, the lines, and the pads of the sub-pixels SPX connected to the display area DA can be located in the non-display area NDA.

[0058] The sub-pixels SPX can be arranged along a plurality of rows and a plurality of columns. For example, as shown in FIG. 1A, a sub-pixel arranged on a second row and a first column can be defined as a first sub-pixel SPX1, a sub-pixel arranged on a first row and a second column can be defined as a second sub-pixel SPX2, and a sub-pixel arranged on a second row and a third column can be defined as a third sub-pixel SPX3. Figure 1

[0059] According to one or more embodiments, the sub-pixels SPX can be arranged according to a stripe arrangement structure or a RGBG matrix structure, a RGBW matrix structure, a RGBW structure, or a RGBG structure, is a registered trademark of Samsung Display Co., Ltd., Republic of Korea. However, the present disclosure is not limited thereto, and various embodiments can be applied in the present disclosure.

[0060] ​The first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can constitute one pixel unit capable of emitting light of various colors. For example, each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 can emit light of one color. For example, the first sub-pixel SPX1 can be a red pixel for emitting light of a red color (e.g., a first color), the second sub-pixel SPX2 can be a green pixel for emitting light of a green color (e.g., a second color), and the third sub-pixel SPX3 can be a blue pixel for emitting light of a blue color (e.g., a third color). According to one or more embodiments, the number of the second sub-pixels SPX2 can be greater than the number of the first sub-pixels SPX1 and the number of the third sub-pixels SPX3. However, the color, kind, and / or number of the first sub-pixels SPX1, the second sub-pixels SPX2, and the third sub-pixels SPX3 constituting each pixel unit are not limited to the specific examples.

[0061] Figure 2 is a circuit diagram illustrating one or more embodiments of any one of the sub-pixels included in the display apparatus shown in Figure 1 In Figure 2 , for ease of description, a sub-pixel SPXij located on the i-th row and the j-th column is illustrated.

[0062] Referring to Figure 2 , the sub-pixel SPXij can include a pixel circuit 12 connected to a scan line SLi and a data line DLj, and a light emitting element LD connected to the pixel circuit 12. In some embodiments, the light emitting element LD can be selected as an organic light emitting diode. In addition, the light emitting element LD can be selected as an inorganic light emitting diode such as a micro LED (light emitting diode) or a quantum dot light emitting diode. In addition, the light emitting element LD can be an element constituted with a combination of an organic material and an inorganic material.

[0063] The pixel circuit 12 can include a first transistor M1 and a second transistor M2, and a storage capacitor Cst. In some embodiments, the first transistor M1 can include a drain electrode connected to a first power supply ELVDD, a source electrode connected to a pixel electrode (e.g., connected to an anode electrode of a light emitting element LD), and a gate electrode connected to a first node N1. In some embodiments, the drain electrode and the source electrode of the first transistor M1 can be converted to each other depending on a polarity of a voltage applied to the first transistor M1 and / or a type of the first transistor M1. The first transistor M1 can control a driving current corresponding to a voltage of the first node N1, which flows from the first power supply ELVDD via the light emitting element LD to a second power supply ELVSS. That is, the first transistor M1 can be a driving transistor for controlling the driving current of the sub-pixel SPXij. In some embodiments, the first power supply ELVDD and the second power supply ELVSS can be a high-potential pixel power supply and a low-potential pixel power supply, respectively.

[0064] In some embodiments, the second transistor M2 can include a drain electrode connected to a data line DLj, a source electrode connected to the first node N1, and a gate electrode connected to a scan line SLi. In some embodiments, the drain electrode and the source electrode of the second transistor M2 can be converted to each other depending on a polarity of a voltage applied to the second transistor M2 and / or a type of the second transistor M2. When a scan signal having a gate-on voltage (e.g., a high voltage) is supplied from the scan line SLi, the second transistor M2 can be turned on. When the second transistor M2 is turned on, the data line DLj and the first node N1 can be electrically connected to each other. That is, the second transistor M2 can be a switching transistor for controlling connection between the sub-pixel SPXij and the data line DLj.

[0065] In some embodiments, the storage capacitor Cst can be connected between one electrode (e.g., the source electrode of the first transistor M1) and the first node N1. The storage capacitor Cst can store a voltage corresponding to a data signal supplied to the first node N1, and can maintain the stored voltage for a period (e.g., a predetermined period). For example, the storage capacitor Cst can maintain the stored voltage until a data signal of a next frame is supplied. Meanwhile, in some embodiments, a connection position of the storage capacitor Cst can be changed. For example, the storage capacitor Cst can be connected between the first power supply ELVDD and the first node N1.

[0066] In some embodiments, the light emitting element LD can be connected between the first transistor M1 and the second power supply ELVSS. In an example, the light emitting element LD can include an anode electrode connected to the source electrode of the first transistor M1, and a cathode electrode connected to the second power supply ELVSS. The light emitting element LD can emit light having a luminance corresponding to the driving current controlled by the first transistor M1.

[0067] In Figure 2 one or more embodiments, the first transistor M1 and the second transistor M2 are implemented with N-type transistors. However, the present disclosure is not limited thereto. That is, in some embodiments, the first transistor M1 or the second transistor M2 can be implemented with a P-type transistor. In an example, the first transistor M1 and the second transistor M2 can be implemented with P-type transistors.

[0068] Figure 3 is an enlarged view of the region A shown in Figure 1 .

[0069] Referring to Figure 3 , the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 and the bank well region BWA adjacent thereto can be located in the region A. Figure 3 The first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 shown in Figure 1 may be repeatedly located in the entire display region DA (see ). The peripheral region NSPXA can be located at a periphery of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3. The peripheral region NSPXA can set a boundary of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3. The peripheral region NSPXA can surround the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3. A structure (e.g., a pixel defining layer and / or a bank) for reducing or preventing color mixing between the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be located in the peripheral region NSPXA.

[0070] The first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can respectively correspond to the first to third sub-pixels SPX1, SPX2, and SPX3 shown in Figure 1 . The first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can respectively be emission regions of the first to third sub-pixels SPX1, SPX2, and SPX3. For example, a pixel defining layer and / or a bank defining the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be located in the display region DA shown in Figure 1 , and the corresponding light emitting layers can be respectively located in the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3.

[0071] In Figure 3In the illustrated example, the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 are illustrated as having the same shape in the plane and different areas in the plane. However, the present disclosure is not limited to this. The areas of at least two of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be the same. The areas of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be set in accordance with the emission colors. The area of the sub-pixel region that emits red light among the primary colors can be the largest, and the area of the sub-pixel region that emits blue light among the primary colors can be the smallest.

[0072] In the illustrated example, the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 are illustrated as having the same shape in the plane and different areas in the plane. However, the present disclosure is not limited to this. The areas of at least two of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be the same. The areas of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be set in accordance with the emission colors. The area of the sub-pixel region that emits red light among the primary colors can be the largest, and the area of the sub-pixel region that emits blue light among the primary colors can be the smallest. Figure 3 In the illustrated example, the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 are illustrated as having the same shape in the plane and different areas in the plane. However, the present disclosure is not limited to this. The areas of at least two of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be the same. The areas of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be set in accordance with the emission colors. The area of the sub-pixel region that emits red light among the primary colors can be the largest, and the area of the sub-pixel region that emits blue light among the primary colors can be the smallest.

[0073] In the illustrated example, the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 are illustrated as having the same shape in the plane and different areas in the plane. However, the present disclosure is not limited to this. The areas of at least two of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be the same. The areas of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be set in accordance with the emission colors. The area of the sub-pixel region that emits red light among the primary colors can be the largest, and the area of the sub-pixel region that emits blue light among the primary colors can be the smallest. Figure 3 In the illustrated example, the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 are illustrated as having the same shape in the plane and different areas in the plane. However, the present disclosure is not limited to this. The areas of at least two of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be the same. The areas of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can be set in accordance with the emission colors. The area of the sub-pixel region that emits red light among the primary colors can be the largest, and the area of the sub-pixel region that emits blue light among the primary colors can be the smallest.

[0074] One of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can provide third color light corresponding to the source light, another of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can provide first color light different from the third color light, and the remaining of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 can provide second color light different from both the third color light and the first color light. The third sub-pixel region SPXA3 can provide the third color light. The first sub-pixel region SPXA1 can provide red light, the second sub-pixel region SPXA2 can provide green light, and the third sub-pixel region SPXA3 can provide blue light.

[0075] A bank trap region BWA can be defined in the display region DA (see Figure 1 ). The bank trap region BWA can be a region for accommodating a color conversion layer CCL (see Figure 4a plurality of color conversion patterns CCP1 and CCP2 (see Figure 4 ) and a light scattering pattern LSP (see Figure 4 ) in a process (e.g., a patterning process) in which the residual is formed in an unintended area. Since the bank wall area BWA is provided, unintended formation of the residual in the color conversion layer CCL can be reduced, prevented, or minimized, and thus the possibility of a corresponding defect of the display device can be reduced or prevented.

[0076] In Figure 3 , it is illustrated that two bank wall areas BWA are defined adjacent to the second sub-pixel area SPXA2. However, the present disclosure is not limited thereto, and the number and / or arrangement of the bank wall areas BWA can be variously changed.

[0077] Next, cross-sectional structures of display devices each including a color conversion layer according to embodiments of the present disclosure will be described with reference to Figures 4 to 9 . In Figures 4 to 9 , parts that are briefly described or parts that are not repeated with the above-described parts will not be repeated.

[0078] Figure 4 is a cross-sectional view taken along the line I-I’ illustrated in Figure 3 . In

[0079] Referring to Figure 4 , the display device DD can include a base layer BSL, a pixel circuit layer PCL, a light emitting element layer EML, a first insulating layer INS1, a color conversion layer CCL, a low-refraction layer LR, a second insulating layer INS2, a color filter layer CFL, and an overcoat layer OC.

[0080] The base layer BSL can include a rigid or flexible substrate or a rigid or flexible film. The base layer BSL can support the pixel circuit layer PCL, the light emitting element layer EML, the first insulating layer INS1, the color conversion layer CCL, the low-refraction layer LR, the second insulating layer INS2, the color filter layer CFL, and the overcoat layer OC.

[0081] The pixel circuit layer PCL can be located on the base layer BSL. The pixel circuit layer PCL can include a pixel circuit 12 (see Figure 2 ) for driving a light emitting element LD (see Figure 2 ) of each sub-pixel. The pixel circuit layer PCL can include a conductive layer for forming the pixel circuit and an insulating layer located between the conductive layers.

[0082] The pixel circuit can include a thin film transistor. For example, the pixel circuit can include a driving transistor. The pixel circuit can be electrically connected to the light emitting element LD to provide an electrical signal for allowing the light emitting element LD to emit light.

[0083] The light emitting element layer EML can be located on the pixel circuit layer PCL. In some embodiments, the light emitting element layer EML can include the first electrode ELT1, the pixel definition layer PDL, each of the first to third light emitting layers EL1, EL2, and EL3, and the second electrode ELT2 located in each of the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3 (located in some of the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3, respectively).

[0084] The first electrode ELT1 can be located in each of the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3 on the pixel circuit layer PCL. The pixel definition layer PDL can be located on the pixel circuit layer PCL and can expose a portion of the first electrode ELT1 of each light emitting element LD. The light emitting layer EL can be located on the exposed portion of the first electrode ELT1. As such, the light emitting layer EL can be located in an area defined by the pixel definition layer PDL. One surface of the light emitting layer EL can be electrically connected to the first electrode ELT1, and the other surface of the light emitting layer EL can be electrically connected to the second electrode ELT2.

[0085] The first electrode ELT1 can be an anode electrode with respect to the light emitting layer EL, and the second electrode ELT2 can be a common electrode (or a cathode electrode) with respect to the light emitting layer EL. As such, the first electrode ELT1 located in each of the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3, the light emitting layer EL located in each of the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3, and the portion of the second electrode ELT2 overlapping the corresponding light emitting layer EL can be provided as one light emitting element LD.

[0086] In some embodiments, the first electrode ELT1 and the second electrode ELT2 can include a conductive material. For example, the first electrode ELT1 can include a conductive material having reflectivity, and the second electrode ELT2 can include a transparent conductive material. However, the present disclosure is not limited thereto.

[0087] The pixel definition layer PDL can define the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3 corresponding to the first to third sub-pixels SPX1, SPX2, and SPX3, respectively. The sub-pixel area SPXA can include the first sub-pixel area SPXA1 in which light of a first color is emitted as an area formed by the first sub-pixel SPX1, the second sub-pixel area SPXA2 in which light of a second color is emitted as an area formed by the second sub-pixel SPX2, and the third sub-pixel area SPXA3 in which light of a third color is emitted as an area formed by the third sub-pixel SPX3.

[0088] In some embodiments, the light emitting element LD of the first sub-pixel SPX1 can include a first light emitting layer EL1. The light emitting element LD of the second sub-pixel SPX2 can include a second light emitting layer EL2. The light emitting element LD of the third sub-pixel SPX3 can include a third light emitting layer EL3.

[0089] In some embodiments, the first to third light emitting layers EL1, EL2, and EL3 can emit light of a third color. However, the present disclosure is not necessarily limited thereto.

[0090] The light emitting layer EL can have a multi-layer thin film structure including a light generating layer. The light emitting layer EL can include a hole injection layer for injecting holes, a hole transport layer for which the transportability of holes is excellent for increasing the opportunity of hole recombination by suppressing the movement of electrons that do not recombine in the light generating layer, a light generating layer for emitting light by recombination of injected electrons and holes, a hole blocking layer for suppressing the movement of holes that do not recombine in the light generating layer, an electron transport layer for smoothly transporting electrons to the light generating layer, and an electron injection layer for injecting electrons. The light emitting layer EL can emit light based on an electrical signal provided from the first electrode ELT1 and the second electrode ELT2.

[0091] The pixel defining layer PDL can be located on the pixel circuit layer PCL to define the position where the light emitting layer EL is disposed. The pixel defining layer PDL can include an organic material. In some embodiments, the pixel defining layer PDL can include an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and / or a polyimide resin. However, the present disclosure is not limited thereto.

[0092] The first insulating layer INS1 can be located on the second electrode ELT2. The first insulating layer INS1 can include at least one insulating layer that covers the first to third light emitting layers EL1, EL2, and EL3 and / or the second electrode ELT2. The first insulating layer INS1 can be a cap layer for the first to third light emitting layers EL1, EL2, and EL3 and / or the second electrode ELT2.

[0093] In some embodiments, the first insulating layer INS1 can be located on the second electrode ELT2 without any organic layer interposed therebetween. Experimentally, when an organic layer having a relatively thick thickness is located on the first to third light emitting layers EL1, EL2, and EL3, light loss can occur in the process of allowing light provided from the first to third light emitting layers EL1, EL2, and EL3 to be emitted to the outside. However, in some embodiments, the first insulating layer INS1 including an inorganic material can be directly located on the first to third light emitting layers EL1, EL2, and EL3, and accordingly, the risk that light loss will occur can be addressed.

[0094] In one or more embodiments, the light emitting element layer EML is in direct contact with the first insulating layer INS1.

[0095] In some embodiments, the first insulating layer INS1 can include an inorganic material. The inorganic material can include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and / or aluminum oxide (Al x O y ). However, the present disclosure is not limited thereto.

[0096] The color conversion layer CCL can be located on the first insulating layer INS1. The color conversion layer CCL can include the bank BNK, the color conversion patterns CCP1 and CCP2 including the quantum dots QD, and the light scattering pattern LSP including the light scattering particles SCT.

[0097] In one or more embodiments, the color conversion layer CCL can be located on the first insulating layer INS1 without any organic layer interposed therebetween. Since the first to third light emitting layers EL1, EL2, and EL3 and the quantum dots QD are configured such that the distance between the first to third light emitting layers EL1, EL2, and EL3 and the quantum dots QD is relatively small, the light emitting efficiency of light emitted from the first to third light emitting layers EL1, EL2, and EL3 can be improved.

[0098] The bank BNK can be located on the first insulating layer INS1. The bank BNK can contact the first insulating layer INS1. The bank BNK can protrude from the first insulating layer INS1 in the thickness direction (e.g., the third direction DR3) of the base layer BSL. The bank BNK can include an organic material. For example, the bank BNK can include an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, and / or a polyimide resin. However, the present disclosure is not limited thereto.

[0099] In one or more embodiments, the bank BNK can include an opening. For example, the opening can be formed by etching the bank BNK. The opening can overlap the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3 or the bank trap region.

[0100] The color conversion patterns CCP1 and CCP2 and the light scattering pattern LSP, which respectively coincide with the colors of the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3, can be located in the opening overlapping the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3. That is, the bank BNK can define the opening in which the color conversion patterns CCL1 and CCL2 and the light scattering pattern LSP are positioned. As such, the bank BNK can define the first to third sub-pixel regions SPXA1, SPXA2, and SPXA3.

[0101] The color conversion patterns CCP1 and CCP2 can be configured to change a wavelength of light. The color conversion patterns CCP1 and CCP2 and the light scattering pattern LSP can be located on the light emitting element layer EML. The color conversion patterns CCP1 and CCP2 and the light scattering pattern LSP can be under the color filters CF1, CF2, and CF3. The color conversion patterns CCP1 and CCP2 and the light scattering pattern LSP can be located between the color filter layer CFL and the light emitting element layer EML. The color conversion patterns CCP1 and CCP2 and the light scattering pattern LSP can be positioned (or patterned) in an opening surrounded by a bank BNK protruding in a thickness direction (e.g., the third direction DR3) of the base layer BSL.

[0102] The first color conversion pattern CCP1 can include first color conversion particles for converting light of a third color (e.g., blue) emitted from the blue light emitting layer into light of a first color (e.g., red).

[0103] For example, the first color conversion pattern CCP1 can include a plurality of first quantum dots QD1 dispersed in a matrix material such as a base resin. The first quantum dots QD1 can absorb blue light and can emit red light by shifting a wavelength of the blue light according to an energy transition.

[0104] The second color conversion pattern CCP2 can include second color conversion particles for converting light of a third color (e.g., blue) emitted from the blue light emitting layer into light of a second color (e.g., green).

[0105] For example, the second color conversion pattern CCP2 can include a plurality of second quantum dots QD2 dispersed in a matrix material such as a base resin. The second quantum dots QD2 can absorb blue light and can emit green light by shifting a wavelength of the blue light according to an energy transition.

[0106] In one or more embodiments, light of a blue color having a relatively short wavelength in a visible light band is incident into the first quantum dots QD1 and the second quantum dots QD2, so that an absorption coefficient of the first quantum dots QD1 and the second quantum dots QD2 can be increased. Accordingly, efficiency of light finally emitted from the first sub-pixel SPX1 and the second sub-pixel SPX2 can be improved, and excellent color reproduction can be ensured.

[0107] The light scattering pattern LSP can be provided to effectively use light of a third color (e.g., blue) emitted from the blue light emitting layer. For example, the light scattering pattern LSP can include light scattering particles SCT. In an example, the light scattering particles SCT of the light scattering pattern LSP can include various light scattering particles and various light scattering materials.

[0108] For example, the light scattering particles SCT can include silicon dioxide (SiO x(e.g., silica beads or hollow silica, etc.), titanium oxide (TiO x ), zirconium oxide (ZrO x ), aluminum oxide (Al x O y ), indium oxide (In x O y ), zinc oxide (ZnO x ), tin oxide (SnO x ), and / or antimony oxide (Sb x O y ). However, the present disclosure is not limited thereto.

[0109] Meanwhile, the light scattering particles SCT do not necessarily have to be located only in the third sub-pixel SPX3, and can be selectively included in the first color conversion pattern CCP1 and / or the second color conversion pattern CCP2. In some embodiments, the light scattering particles SCT can be omitted such that a light scattering pattern LSP constituted with a transparent polymer is provided.

[0110] The low-refraction layer LR can be located on the color conversion layer CCL. In one or more embodiments, the low-refraction layer LR and the color conversion layer CCL can be in contact with each other without any organic layer interposed therebetween. For example, the low-refraction layer LR can be located on the bank BNK, the color conversion patterns CCP1 and CCP2, and the light scattering pattern LSP.

[0111] The low-refraction layer LR can function to improve light extraction efficiency by recycling light provided from the color conversion layer CCL by total reflection. To this end, the low-refraction layer LR can have a refractive index smaller than that of the color conversion layer CCL. For example, the refractive index of the color conversion layer CCL can be about 1.6 to about 2.0, and the refractive index of the low-refraction layer LR can be about 1.1 to about 1.3.

[0112] The low-refraction layer LR can have various materials to have one refractive index. For example, the low-refraction layer LR can include an organic material. However, the present disclosure is not limited thereto.

[0113] The second insulating layer INS2 can be located on the low-refraction layer LR. The second insulating layer INS2 can be provided throughout the first to third sub-pixels SPX1, SPX2, and SPX3. The second insulating layer INS2 can cover the low-refraction layer LR. The second insulating layer INS2 can reduce or prevent the possibility of the low-refraction layer LR being damaged or contaminated due to penetration of moisture or air from the outside, etc.

[0114] In one or more embodiments, the low-refraction layer LR is in direct contact with the second insulating layer INS2.

[0115] The second insulating layer INS2 can include an inorganic material. The inorganic material can include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and / or aluminum oxide (AlO x ). However, the present disclosure is not limited thereto.

[0116] The color filter layer CFL can be located on the second insulating layer INS2. The color filter layer CFL can include a first color filter CF1, a second color filter CF2, and a third color filter CF3.

[0117] Each of the color filters CF1, CF2, and CF3 can allow light in a wavelength range corresponding to one color to be selectively transmitted therethrough. According to one or more embodiments, the color filters CF1, CF2, and CF3, which respectively coincide with the colors of the corresponding first to third sub-pixels SPX1, SPX2, and SPX3, are arranged to enable a full-color image to be displayed.

[0118] The first color filter CF1 is a color filter for forming the first sub-pixel SPX1 and can overlap the first sub-pixel area SPXA1 when viewed in a plan (e.g., in a plan view). The first color filter CF1 can allow light of a first color to be selectively transmitted therethrough. The first color filter CF1 can be a red color filter and can include a red color filter material.

[0119] The second color filter CF2 is a color filter for forming the second sub-pixel SPX2 and can overlap the second sub-pixel area SPXA2 when viewed in a plan. The second color filter CF2 can allow light of a second color to be selectively transmitted therethrough. The second color filter CF2 can be a green color filter and can include a green color filter material.

[0120] The third color filter CF3 is a color filter for forming the third sub-pixel SPX3 and can overlap the third sub-pixel area SPXA3 when viewed in a plan. The third color filter CF3 can allow light of a third color to be selectively transmitted therethrough. The third color filter CF3 can be a blue color filter and can include a blue color filter material.

[0121] In some embodiments, two or more color filters among the first to third color filters CF1, CF2, and CF3 can overlap each other in the peripheral area NSPXA when viewed in a plan, and the color filters overlapping each other can form a light-blocking layer BL in the peripheral area NSPXA. The light-blocking layer BL can be located between the sub-pixel areas SPXA. However, the present disclosure is not necessarily limited thereto. In some embodiments, a separate light-blocking material can be located between the sub-pixel areas SPXA to form the light-blocking layer BL.

[0122] The overcoat layer OC can be positioned on the color filter layer CFL. The overcoat layer OC can be a planarization layer, and can be a protective layer for protecting the inside of the display device from the outside. The overcoat layer OC can include an organic material. However, the present disclosure is not limited thereto.

[0123] In one or more embodiments, a film layer can be positioned on the overcoat layer OC. The film layer can include a polyethylene terephthalate (PET) film, a low reflection film, a polarizing film, and / or a transmittance-controllable film. However, the present disclosure is not limited thereto.

[0124] Figure 5 is a cross-sectional view taken along line II-II' of the display device shown in Figure 3 FIG. 2.

[0125] Referring to Figure 5 , the display device DD can include a base layer BSL, a pixel circuit layer PCL, a light emitting element layer EML, a first insulating layer INS1, a color conversion layer CCL, a low-refraction layer LR, a second insulating layer INS2, a color filter layer CFL, and an overcoat layer OC. Figure 5 The display device DD shown in Figure 4 may be described similarly to the display device DD shown in

[0126] Referring to Figure 4 and Figure 5 together, the bank BNK can define a bank well area BWA spaced apart from the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3 in a planar view. That is, the bank well area BWA can be designated as an opening among openings of the bank BNK that does not overlap the first to third sub-pixel areas SPXA1, SPXA2, and SPXA3 in a planar view.

[0127] The bank well area BWA can be formed by removing a partial area of the bank BNK so as to reduce or prevent the possibility of a corresponding defect in a process of patterning the color conversion patterns CCP1 and CCP2 and the light scattering pattern LSP included in the color conversion layer CCL.

[0128] The bank trap region BWA is a portion into which the formation material of the color conversion pattern CCP1 and CCP2 and the light scattering pattern LSP, which can be erroneously coated in the process of patterning the color conversion pattern CCP1 and CCP2 and the light scattering pattern LSP, can flow. By the bank trap region BWA, it is possible to reduce or prevent the possibility of a defect caused by the formation material of the color conversion pattern CCP1 and CCP2 and the light scattering pattern LSP remaining on the top of the bank BNK in the process of forming the upper member due to the formation material of the color conversion pattern CCP1 and CCP2 and the light scattering pattern LSP being erroneously coated. In one or more embodiments, a portion of the ink composition for forming the color conversion pattern CCP1 and CCP2 and the light scattering pattern LSP can be located in at least a portion of the bank trap region BWA.

[0129] In the bank trap region BWA, the low-refractive layer LR can extend to the inside of the bank trap region BWA to be located on the first insulating layer INS1. In one or more embodiments, the inside of the bank trap region BWA can be filled with the low-refractive layer LR. That is, in the bank trap region BWA, one surface of the low-refractive layer LR can contact the first insulating layer INS1, and the other surface of the low-refractive layer LR can contact the second insulating layer INS2.

[0130] In one or more embodiments, the low-refractive layer LR can be located on the bank BNK, on the color conversion pattern CCP1 and CCP2, and on the light scattering pattern LSP, and can be positioned to extend to the inside of the bank trap region BWA. Accordingly, any excessive step difference between the color conversion pattern CCP1 and CCP2, the light scattering pattern LSP, and the bank trap region BWA does not occur.

[0131] The bank trap region BWA can overlap the contact hole CNT. The contact hole CNT can connect a power line PL located in the pixel circuit layer PCL to the second electrode ELT2 of the light emitting element layer EML. The power line PL can supply a second power source ELVSS (see Figure 2 ) to the pixel circuit 12 (see Figure 2 ) of the pixel circuit layer PCL. In the bank trap region BWA, any light emitting layer can not be positioned. In one or more embodiments, the light emitting layer located in the bank trap region BWA can be removed in a manufacturing process.

[0132] Figure 6 is a cross-sectional view taken along the line I-I’ shown in Figure 3 .

[0133] Referring to Figure 6The display device DD illustrated in FIG. 1A can be described similarly to the display device DD illustrated in FIG. 1B, and a repeated description will be simplified or omitted.

[0134] Figure 6 The display device DD illustrated in FIG. 1A can be described similarly to the display device DD illustrated in FIG. 1B, and a repeated description will be simplified or omitted. Figure 4 The display device DD illustrated in FIG. 1A can be described similarly to the display device DD illustrated in FIG. 1B, and a repeated description will be simplified or omitted.

[0135] The color conversion layer CCL can include a bank BNK, color conversion patterns CCP1 and CCP2 including quantum dots QD, a light scattering pattern LSP including light scattering particles SCT, and a monomer MN.

[0136] The monomer MN can be located between the first insulating layer INS1 and the color conversion patterns CCP1 and CCP2. For example, a first monomer MN1 can be located between the first insulating layer INS1 and the first color conversion pattern CCP1 in the first sub-pixel area SPXA1. A second monomer MN2 can be located between the first insulating layer INS1 and the second color conversion pattern CCP2 in the second sub-pixel area SPXA2.

[0137] In addition, the monomer MN can be located between the first insulating layer INS1 and the light scattering pattern LSP. A third monomer MN3 can be located between the first insulating layer INS1 and the light scattering pattern LSP in the third sub-pixel area SPXA3.

[0138] In one or more embodiments, the monomer MN can be formed in the first insulating layer INS1, and the color conversion patterns CCP1 and CCP2 or the light scattering pattern LSP can be formed after the monomer MN is cured.

[0139] The monomer MN located between the first insulating layer INS1 and the color conversion patterns CCP1 and CCP2 or between the first insulating layer INS1 and the light scattering pattern LSP makes it possible to reduce or prevent moisture or oxygen from penetrating into the pixel circuit layer PCL and the light emitting element layer EML during a manufacturing process of the display device DD.

[0140] In addition, the monomer MN located between the first insulating layer INS1 and the color conversion patterns CCP1 and CCP2 or between the first insulating layer INS1 and the light scattering pattern LSP makes it possible to reduce damage occurring at a surface of the color conversion patterns CCP1 and CCP2 or the light scattering pattern LSP by the first insulating layer INS1.

[0141] For example, the monomer MN can include lauryl acrylate, lauryl methacrylate, hydroxypropyl methacrylate, 3,5,5-trimethylhexyl acrylate, glycidyl methacrylate, tetrahydrofurfuryl acrylate, tetrahydrofurfuryl methacrylate, benzyl methacrylate, or cyclohexyl methacrylate. However, the disclosure is not limited thereto.

[0142] Figure 7 is a cross-sectional view taken along line II-II' shown in Figure 3 of FIG. 1A.

[0143] Referring to Figure 7 , the display device DD can include a base layer BSL, a pixel circuit layer PCL, a light emitting element layer EML, a first insulating layer INS1, a color conversion layer CCL, a low-refraction layer LR, a second insulating layer INS2, a color filter layer CFL, and an overcoat layer OC.

[0144] Figure 7 The display device DD shown in Figure 5 may be described similarly to the display device DD shown in Figure 7 , and a repeated description will be simplified or omitted. In addition, Figure 6 The monomer MN shown in may be described similarly to the monomer MN shown in

[0145] , and a repeated description will be simplified or omitted.

[0146] Figure 8 is a cross-sectional view taken along line I-I' shown in Figure 3 of FIG. 1A.

[0147] Referring to Figure 8 , the display device DD can include a base layer BSL, a pixel circuit layer PCL, a light emitting element layer EML, a first insulating layer INS1, a color conversion layer CCL, a third insulating layer INS3, a low-refraction layer LR, a second insulating layer INS2, a color filter layer CFL, and an overcoat layer OC.

[0148] Figure 8 The display device DD shown in Figure 6 may be described similarly to the display device DD shown in , and a repeated description will be simplified or omitted.

[0149] The display device DD may further include a third insulating layer INS3 located between the color conversion layer CCL and the low refractive index layer LR. In one or more embodiments, one surface of the third insulating layer INS3 may contact the color conversion layer CCL, and the other surface of the third insulating layer INS3 may contact the low refractive index layer LR. Thus, the third insulating layer INS3 may be in direct contact with the color conversion layer CCL and the low refractive index layer LR.

[0150] The third insulating layer INS3 may include an inorganic material. The inorganic material may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and / or aluminum oxide (Al x O y ). However, the present disclosure is not limited thereto.

[0151] The third insulating layer INS3 is located between the color conversion layer CCL and the low refractive index layer LR, enabling reduction or prevention of moisture or oxygen from penetrating into the color conversion layer CCL.

[0152] Figure 9 is a cross-sectional view taken along line II-II' shown in Figure 3 according to yet another one or more other embodiments of the display device.

[0153] Referring to Figure 9 , the display device DD may include a base layer BSL, a pixel circuit layer PCL, a light-emitting element layer EML, a first insulating layer INS1, a color conversion layer CCL, a third insulating layer INS3, a low refractive index layer LR, a second insulating layer INS2, a color filter layer CFL, and an outer coating OC. Figure 9 The illustration shows a cross-section corresponding to line II-II' shown in Figure 3 [[ID=�3]]

[0154] Figure 9 The display device DD shown in Figure 7 may be described similarly to the display device DD shown in Figure 9 and repetitive descriptions will be simplified or omitted. Additionally, Figure 8 the third insulating layer INS3 shown in

[0155] In the bank wall area BWA, the third insulating layer INS3 can be located on the monomer MN. The low-refraction layer LR can be located on the third insulating layer INS3. That is, the third insulating layer INS3 can extend to the inside of the bank wall area BWA, between the portion of the low-refraction layer LR extending to the inside of the bank wall area BWA and the monomer MN. That is, in the bank wall area BWA, one surface of the third insulating layer INS3 can contact the monomer MN, and the other surface of the third insulating layer INS3 can contact the low-refraction layer LR. Thus, in the bank wall area BWA, the third insulating layer INS3 can be in direct contact with the monomer MN and the portion of the low-refraction layer LR.

[0156] Figure 10 is a flowchart illustrating a manufacturing method for a display device according to one or more embodiments of the present disclosure.

[0157] Referring to Figure 4 and Figure 10 In operation S110, a light-emitting element layer EML can be formed on the base layer BSL.

[0158] In operation S120, a first insulating layer INS1 can be formed on the light-emitting element layer EML. The first insulating layer INS1 can include an inorganic material.

[0159] In operation S130, a color conversion layer CCL can be formed on the first insulating layer INS1. In one or more embodiments, the color conversion layer CCL can be formed on the first insulating layer INS1 without forming any separate organic layer.

[0160] In operation S140, a low-refraction layer LR can be formed on the color conversion layer CCL. The low-refraction layer LR can have a refractive index smaller than that of the color conversion layer CCL. The low-refraction layer LR can include an organic material. In one or more embodiments, the low-refraction layer LR can be formed on the color conversion layer CCL without forming any separate organic layer.

[0161] In operation S150, a second insulating layer INS2 can be formed on the low-refraction layer LR. The second insulating layer INS2 can include an inorganic material.

[0162] According to the present disclosure, it is possible to provide a display device capable of improving light-emitting efficiency and a manufacturing method for a display device.

[0163] According to the present disclosure, it is possible to provide a display device capable of reducing the risk of defects occurring in a product structure and a manufacturing method for a display device.

[0164] Example embodiments have been disclosed herein and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation, unless otherwise specifically stated. In some instances, certain terminology can have been utilized for the sake of readability and that is in no way intended to be limiting, unless otherwise specifically stated. In some instances, features, structures, or characteristics have not been described in detail in order to avoid obscuring the subject matter. Therefore, it will be appreciated that the specific structural and functional details disclosed herein are illustrative only and that many modifications can be made by those skilled in the art, now known or later developed, without departing from the spirit and scope of the disclosure as it is set forth in the claims and their equivalents.

Claims

1. A display device comprising: a light-emitting element layer including light-emitting elements; a first insulating layer formed of an inorganic material over the light-emitting element layer; a color conversion layer including banks and quantum dots over the first insulating layer; a low-refractive layer over the color conversion layer; and a second insulating layer formed of an inorganic material over the low-refractive layer, wherein the color conversion layer and the low-refractive layer are in contact with each other and no organic layer is between the color conversion layer and the low-refractive layer, wherein the first insulating layer and the color conversion layer are in contact with each other and no organic layer is between the first insulating layer and the color conversion layer, wherein the light-emitting element layer is in direct contact with the first insulating layer, and wherein the low-refractive layer is in direct contact with the second insulating layer. The low-refractive layer is formed of an organic material and has a refractive index smaller than that of the color conversion layer.

2. The display device according to claim 1, wherein The light-emitting element layer includes:

3. The display device according to any one of claims 1 to 2, wherein, first electrodes corresponding to the light-emitting elements, respectively; light-emitting layers over the first electrodes, respectively; and a second electrode over the light-emitting layers and under the first insulating layer.

4. The display device according to claim 1, further comprising: a monomer between the quantum dots and the first insulating layer, wherein the quantum dots are in openings defined by the banks and overlap with pixel regions, respectively.

5. The display device according to claim 4, further comprising: a third insulating layer formed of an inorganic material between the color conversion layer and the low-refractive layer, wherein the third insulating layer is in direct contact with the color conversion layer and the low-refractive layer. The low-refractive layer extends into a bank-trap region, and 6. The display device according to claim 1, wherein wherein the bank-trap region is an opening defined by the banks and spaced apart from a pixel region in a plan view.

7. The display device according to claim 6, further comprising: a monomer between the quantum dots and the first insulating layer and between the first insulating layer and a portion of the low-refractive layer extending into the bank-trap region, wherein the quantum dots are in another opening defined by the banks and overlapping with one of the pixel regions, and wherein the monomer is in direct contact with the first insulating layer and the portion of the low-refractive layer.

8. The display device according to claim 7, further comprising: a third insulating layer formed of an inorganic material between the color conversion layer and the low-refractive layer and between the monomer and the portion of the low-refractive layer extending into the bank-trap region, wherein the third insulating layer is in direct contact with the monomer and the portion of the low-refractive layer. ​

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