Inverter circuit and automobile power supply

Abstract

The utility model relates to the technical field of power supply circuits, and discloses an inverter circuit and an automobile power supply, the inverter circuit comprises a voltage dividing module (110), an operational amplifier module (120), a gate circuit (120), a first buffer module (141), a second buffer module (142), a bridge arm module (160) and a transformer (TR1), when a first driving signal is in a high level, and a second driving signal is in a low level, an upper bridge arm is conducted, a lower bridge arm is turned off, and the voltage dividing module (110) is connected with the gate circuit (120). And when the second driving signal is at a high level and the first driving signal is at a low level, the lower bridge arm is switched on, and the upper bridge arm is switched off, so that an oscillation alternating current signal is alternately switched on / off to be output and is boosted by the transformer (TR1) to be output.

Description

TECHNICAL FIELD

[0001] The utility model relates to power supply circuit technical field more specifically, relate to a kind of inverter circuit and automobile power supply. BACKGROUND

[0002] Inverter power supply is the electric energy conversion circuit that can be into ac from dc, can obtain energy from dc input voltage and get stable ac voltage output, for ac load power supply.Currently, the inverter power supply commonly seen on market mainly has traditional inverter power supply and digital inverter power supply, traditional inverter power supply uses ordinary silicon steel sheet winding, output voltage is unstable, and it is easy to damage load;Digital inverter is combined by digital control technology and power supply technology, and its inverter efficiency is high, but part of frequency is not adjustable, and the waveform of output ac is not stable enough.

[0003] Therefore, how to realize the inverter power supply with adjustable output voltage frequency and stable waveform becomes the technical problem that the person skilled in the art needs to solve urgently. UTILITY MODEL CONTENTS

[0004] The technical problem to be solved by the utility model is that, in view of the defects of unstable output voltage of the traditional inverter power supply and part of frequency of the digital inverter not adjustable in the prior art, an inverter circuit with adjustable output voltage frequency and stable waveform is provided.

[0005] The technical scheme adopted by the utility model to solve its technical problem is that: an inverter circuit is constructed, which has:

[0006] A voltage dividing module is arranged in the inverter circuit, for receiving a 12V voltage signal and performing voltage dividing processing on the 12V voltage signal;

[0007] An operational amplifier module is connected with the output end of the voltage dividing module, for receiving the voltage signal after voltage dividing;

[0008] A gate circuit is connected with the output end of the operational amplifier module, for receiving the voltage signal after operational amplification and outputting corresponding driving signal according to the voltage signal;

[0009] A first buffer module is connected with one output end of the gate circuit, for receiving the first driving signal;

[0010] A second buffer module is connected with another output end of the gate circuit, for receiving the second driving signal;

[0011] A bridge arm module is connected with the output end of the first buffer module, for receiving the first driving signal,

[0012] a first input end of a lower bridge arm is connected with an output end of the second buffer module, for receiving the second driving signal,

[0013] a transformer, one end of a primary winding of which is connected with a second end of the upper bridge arm, and the other end of the primary winding is connected with a second end of the lower bridge arm;

[0014] when the first driving signal is high and the second driving signal is low, the upper bridge arm is turned on and the lower bridge arm is turned off,

[0015] when the second driving signal is high and the first driving signal is low, the lower bridge arm is turned on and the upper bridge arm is turned off, alternatingly turned on / off to output an oscillating AC signal, which is boosted by the transformer.

[0016] In some embodiments, the voltage dividing module comprises at least a potentiometer, one end of which is used for receiving the 12V voltage signal, for adjusting the output voltage frequency,

[0017] the other end of the potentiometer is connected with the input end of the operational amplifier module through a third resistor and a fourth resistor in parallel, respectively.

[0018] In some embodiments, the operational amplifier module comprises at least a first operational amplifier and a second operational amplifier,

[0019] the inverting end of the first operational amplifier is connected with one end of the potentiometer through the third resistor,

[0020] the non-inverting end of the first operational amplifier is connected with one end of the potentiometer through the fourth resistor,

[0021] the inverting end of the second operational amplifier is connected with the output end of the first operational amplifier,

[0022] the non-inverting end of the second operational amplifier is connected with the input end of the second buffer module,

[0023] the output end of the second operational amplifier is coupled to an input end of the gate circuit.

[0024] In some embodiments, the gate circuit comprises a first NOT gate and a second NOT gate,

[0025] one end of the first NOT gate is coupled to the output end of the second operational amplifier,

[0026] the output end of the first NOT gate is connected with one end of the second NOT gate and the input end of the first buffer module, respectively,

[0027] the output end of the second NOT gate is connected with the input end of the second buffer module,

[0028] The other end of the first NOT gate and the second NOT gate is connected with a common end.

[0029] In some embodiments, the operational amplifier module is connected with the gate circuit to form a voltage-controlled oscillator.

[0030] In some embodiments, further comprising a first voltage limiting module and a second voltage limiting module,

[0031] The input end of the first voltage limiting module is connected with the output end of the first buffer module, for receiving the first driving signal and limiting the input first driving signal,

[0032] The output end of the first voltage limiting module is connected with the first input end of the upper bridge arm,

[0033] The other output end of the first voltage limiting module is connected with the second end of the upper bridge arm,

[0034] The input end of the second voltage limiting module is connected with the output end of the second buffer module, for receiving the second driving signal and limiting the input second driving signal,

[0035] The output end of the second voltage limiting module is connected with the first input end of the lower bridge arm,

[0036] The other output end of the second voltage limiting module is connected with the second end of the lower bridge arm.

[0037] In some embodiments, the first voltage limiting module at least comprises a ninth resistor, a tenth resistor, an eleventh resistor and a third voltage stabilizing diode connected in series,

[0038] One end of the eleventh resistor is connected with the output end of the first buffer module through the ninth resistor and the tenth resistor,

[0039] The other end of the eleventh resistor is coupled to the first input end of the upper bridge arm,

[0040] The anode of the third voltage stabilizing diode is connected with the output end of the first buffer module,

[0041] The cathode of the third voltage stabilizing diode is connected with the second end of the upper bridge arm.

[0042] In some embodiments, the second voltage limiting module at least comprises a thirteenth resistor, a fourteenth resistor, a fifteenth resistor and a fifth voltage stabilizing diode connected in series,

[0043] One end of the fifteenth resistor is connected with the output end of the second buffer module through the thirteenth resistor and the fourteenth resistor,

[0044] the other end of the fifteenth resistor is coupled to a first input end of the lower bridge arm,

[0045] the anode of the fifth voltage stabilizing diode is connected with the output end of the second buffer module,

[0046] the cathode of the fifth voltage stabilizing diode is connected with the second end of the lower bridge arm.

[0047] In some embodiments, the third end of the upper bridge arm is connected with the third end of the lower bridge arm.

[0048] In the second aspect, the application provides an automobile power supply comprising the inverter circuit.

[0049] In the inverter circuit, when the first driving signal is high and the second driving signal is low, the upper bridge arm is turned on and the lower bridge arm is turned off; when the second driving signal is high and the first driving signal is low, the lower bridge arm is turned on and the upper bridge arm is turned off, so that the output oscillation alternating current signal is turned on / off alternately, is boosted by the transformer, and the frequency of the voltage signal (such as 50Hz or 60Hz) is adjusted by the voltage dividing module, then the input voltage signal is oscillated by the voltage-controlled oscillator composed of the operational amplifier module and the gate circuit, two driving signals are formed, the upper bridge arm and the lower bridge arm of the bridge arm module are controlled to be turned on / off alternately by the first buffer module and the second buffer module, and the alternating current signal is output by the secondary winding of the transformer, so that the problems of unstable output voltage and unadjustable frequency of the digital inverter in the traditional inverter power supply can be effectively solved. BRIEF DESCRIPTION OF DRAWINGS

[0050] The application will be further described below with reference to the drawings and embodiments, and in the drawings:

[0051] Figure 1 is a circuit principle diagram of an embodiment of the inverter circuit provided by the application. DETAILED DESCRIPTION

[0052] In order to have a clearer understanding of the technical features, purposes and effects of the application, the specific embodiments of the application will be described in detail with reference to the drawings.

[0053] As Figure 1 shown in the first embodiment of the inverter circuit 10 of the application, the inverter circuit 10 at least comprises a voltage dividing module 110, an operational amplifier module 120, a gate circuit 130, a first buffer module 141, a second buffer module 142, a first voltage limiting module 151 and a second voltage limiting module 152, a bridge arm module 160 and a transformer TR1,

[0054] The voltage dividing module 110 has the functions of adjusting the frequency of the input voltage signal and voltage dividing.

[0055] The operational amplifier module 120 is used to amplify the input voltage signal in one or two stages.

[0056] The gate circuit 130 has four double-input NOR gate circuits, each of which has two input terminals and one output terminal. The NOR gate is a kind of logic gate that can realize the logic functions of AND gate, OR gate and NOT gate, and has a wide working voltage range and high noise tolerance.

[0057] The first and second buffer modules 141 and 142 have the functions of signal amplification, isolation, protection of the subsequent elements, and improvement of the stability and reliability of signal transmission, so as to improve the driving performance of the bridge arm module 160.

[0058] The bridge arm module 160 is used to control the on / off state of the output current signal.

[0059] The transformer TR1 has the functions of voltage boosting and isolation.

[0060] Specifically, by using a suitable transformer TR1, it can be used for a wide range of power supply voltages.

[0061] By using a suitable turns ratio, it can be used to provide a wide range of output voltages and output frequency adjustment and stability.

[0062] Specifically, the voltage dividing module 110 is arranged in the inverter circuit 10, and is used to receive the 12V voltage signal output by the battery, and to divide and adjust the frequency of the 12V voltage signal, and then output the processed voltage signal to the operational amplifier module 120.

[0063] The input terminal of the operational amplifier module 120 is connected with the output terminal of the voltage dividing module 110, and is used to receive the divided voltage signal, and to amplify the input voltage signal in two stages, and then output the processed voltage signal (high level or low level) to the gate circuit 130.

[0064] Further, the input terminal of the gate circuit 130 is connected with the output terminal of the operational amplifier module 120, and is used to receive the processed voltage signal (high level or low level), and to output the corresponding driving signal (high level or low level) according to the level state of the voltage signal.

[0065] The above driving signal at least includes a first driving signal and a second driving signal.

[0066] Further, the input terminal of the first buffer module 141 is connected with one output terminal of the gate circuit 130, and is used to receive the first driving signal.

[0067] The input end of the second buffer module 142 is connected with another output end of the gate circuit 130, for receiving the second driving signal;

[0068] Further, the bridge arm module 160 is connected by the upper bridge arm (corresponding to VT101) and the lower bridge arm (corresponding to VT102),

[0069] The first input end (corresponding to G1 end) of the upper bridge arm (corresponding to VT101) is connected with the output end of the first buffer module 141, for receiving the first driving signal,

[0070] The first input end (corresponding to G2 end) of the lower bridge arm (corresponding to VT102) is connected with the output end of the second buffer module 142, for receiving the second driving signal;

[0071] Further, one end (corresponding to 1 pin) of the primary winding (corresponding to N1) of the transformer TR1 is connected with the second end of the upper bridge arm (corresponding to VT101), and the other end (corresponding to 2 pin) of the primary winding (corresponding to N1) is connected with the second end of the lower bridge arm (corresponding to VT102);

[0072] When the first driving signal is high level and the second driving signal is low level, the upper bridge arm (corresponding to VT101) is turned on, and the lower bridge arm (corresponding to VT102) is turned off,

[0073] When the second driving signal is high level and the first driving signal is low level, the lower bridge arm (corresponding to VT102) is turned on, and the upper bridge arm (corresponding to VT101) is turned off, so as to alternately turn on / off the output oscillation alternating current signal, and the alternating current signal (such as 110V-220V alternating voltage) is output through the transformer TR1.

[0074] For example, the alternating current output by the inverter can provide stable and reliable power supply for electric appliances such as vehicle-mounted television, electric barbecue, mini rice cooker or notebook computer.

[0075] By using the technical solution, the frequency (such as 50Hz or 60Hz) of the voltage signal is adjusted through the voltage division module, the input voltage signal is oscillated by the voltage-controlled oscillator composed of the operational amplifier module and the gate circuit, two driving signals are formed, the upper bridge arm and the lower bridge arm of the bridge arm module are controlled by the first buffer module and the second buffer module to alternately turn on / off, and the alternating current signal is output through the secondary winding of the transformer, so as to effectively solve the problems of unstable output voltage of the traditional inverter power supply and unadjustable frequency of the digital inverter.

[0076] In some embodiments, in order to obtain different ranges of frequency (such as 50Hz or 60Hz), the potentiometer R101 can be arranged in the voltage division module 110, and the resistance value is selected as 25K,

[0077] When the frequency of the input voltage signal needs to be adjusted, the resistance of the potentiometer R101 can be adjusted, for example, when the resistance of the potentiometer R101 is selected as 15K, the corresponding frequency corresponds to 50Hz, or

[0078] for example, when the resistance of the potentiometer R101 is selected as 22K, the corresponding frequency corresponds to 60Hz.

[0079] Specifically, one end of the potentiometer R101 is used to receive a 12V voltage signal, which is used to adjust the output voltage frequency (such as 50Hz or 60Hz),

[0080] The other end of the potentiometer R101 is connected to the input end of the operational amplifier module 120 through the second resistor R102 and the parallel connection of the third resistor R103 and the fourth resistor R104,

[0081] Among them, the second resistor R102 and the third resistor R103 are connected to form a voltage dividing branch,

[0082] The second resistor R102 and the fourth resistor R104 are connected to form another voltage dividing branch,

[0083] The voltage dividing branch inputs the voltage signal divided by the voltage dividing branch to the operational amplifier module 120.

[0084] In some embodiments, in order to output a stable "square wave" output voltage signal, a first operational amplifier A101 and a second operational amplifier A102 can be arranged in the operational amplifier module 120,

[0085] The above operational amplifier has the functions of signal amplification and isolation;

[0086] Specifically, the inverting terminal (corresponding to pin 2) of the first operational amplifier A101 is connected to one end of the potentiometer R101 through the series connection of the third resistor R103 and the second resistor R102, and the voltage signal output by the potentiometer R101 is input to the inverting terminal (corresponding to pin 2) of the first operational amplifier A101 after being divided by the third resistor R103 and the second resistor R102,

[0087] The non-inverting terminal (corresponding to pin 3) of the first operational amplifier A101 is connected to one end of the potentiometer R101 through the fourth resistor R104 and the second resistor R102, and the voltage signal output by the potentiometer R101 is input to the non-inverting terminal (corresponding to pin 3) of the first operational amplifier A101 after being divided by the fourth resistor R104 and the second resistor R102, when the potential of the non-inverting terminal (corresponding to pin 3) of the first operational amplifier A101 is higher than the potential of the inverting terminal (corresponding to pin 2) of the first operational amplifier A101, the output end outputs a high level, and vice versa,

[0088] The inverting terminal (corresponding to pin 6) of the second operational amplifier A102 is connected to the output terminal (corresponding to pin 1) of the first operational amplifier A101, for receiving the level signal,

[0089] The non-inverting terminal (corresponding to pin 5) of the second operational amplifier A102 is connected to the input terminal of the second buffer module 142,

[0090] The output terminal (corresponding to pin 7) of the second operational amplifier A102 is coupled to an input terminal of the gate circuit 130, for outputting the amplified level signal to the gate circuit 130.

[0091] In some embodiments, in order to output a stable driving signal, the first non-gate B101 and the second non-gate B102 can be provided in the gate circuit 130, which are basic digital circuit elements, and the output is exactly opposite to the input; that is, when the input is 1, the output is 0; when the input is 0, the output is 1.

[0092] Specifically, one end (corresponding to pin 1) of the first non-gate B101 is coupled to the output terminal (corresponding to pin 7) of the second operational amplifier A102,

[0093] The output terminal (corresponding to pin 3) of the first non-gate B101 is connected to one end (corresponding to pin 5) of the second non-gate B102 and the input terminal of the first buffer module 141, respectively,

[0094] The output terminal (corresponding to pin 4) of the second non-gate B102 is connected to the input terminal of the second buffer module 142,

[0095] The other end (corresponding to pin 2) of the first non-gate B101 and the other end (corresponding to pin 6) of the second non-gate B102 are connected to a common terminal.

[0096] That is, when the output of the first non-gate B101 is high, the output of the second non-gate B102 is low, so as to ensure that the upper bridge arm (corresponding to VT101) and the lower bridge arm (corresponding to VT102) in the bridge arm module 160 are alternately turned on / off.

[0097] In some embodiments, the op-amp module 120 and the gate circuit 130 are connected to form a voltage-controlled oscillator, so that a stable driving signal can be output.

[0098] In some embodiments, in order to ensure the reliability of the operation of the bridge arm module 160, the first voltage limiting module 151 and the second voltage limiting module 152 can be provided in the inverter circuit 10, which both have the functions of limiting voltage and stabilizing voltage.

[0099] Specifically, the input terminal of the first voltage limiting module 151 is connected to the output terminal of the first buffer module 141, for receiving the first driving signal and limiting the input first driving signal,

[0100] An output end of the first voltage limiting module 151 is connected with a first input end (corresponding to G1 end) of the upper bridge arm (corresponding to VT101),

[0101] Another output end of the first voltage limiting module 151 is connected with a second end (corresponding to D1 end) of the upper bridge arm (corresponding to VT101),

[0102] An input end of the second voltage limiting module 152 is connected with an output end of the second buffer module 142, for receiving the second driving signal and limiting the input second driving signal,

[0103] An output end of the second voltage limiting module 152 is connected with a first input end (corresponding to G2 end) of the lower bridge arm (corresponding to VT102),

[0104] Another output end of the second voltage limiting module 152 is connected with a second end (corresponding to D2 end) of the lower bridge arm (corresponding to VT102);

[0105] The third end (corresponding to S1 end) of the upper bridge arm (corresponding to VT101) is connected with the third end (corresponding to S2 end) of the lower bridge arm (corresponding to VT102);

[0106] When the input first driving signal is high and the second driving signal is low, the upper bridge arm (corresponding to VT101) is controlled to be turned on, the lower bridge arm (corresponding to VT102) is controlled to be turned off, the voltage signal of 12V-24V is transmitted to the common end through the third pin (corresponding to 3 pin) of the transformer TR1, the first pin (corresponding to 1 pin) and the drain-source of the upper bridge arm (corresponding to VT101), and the alternating current signal is coupled from the primary winding (corresponding to N1) to the secondary winding (corresponding to N2) for output;

[0107] When the input second driving signal is high and the first driving signal is low, the lower bridge arm (corresponding to VT102) is controlled to be turned on, the upper bridge arm (corresponding to VT101) is controlled to be turned off, the voltage signal of 12V-24V is transmitted to the common end through the third pin (corresponding to 3 pin) of the transformer TR1, the second pin (corresponding to 1 pin) and the drain-source of the lower bridge arm (corresponding to VT102), and the alternating current signal is coupled from the primary winding (corresponding to N1) to the secondary winding (corresponding to N2) for output.

[0108] In some embodiments, in order to improve the stability of the output first driving signal, a third non-gate B103 can be arranged in the first buffer module 141, which has the function of signal buffering;

[0109] The input end (corresponding to 12-13 pins) of the third NOT gate B103 is connected with the output end (corresponding to 3 pin) of the first NOT gate B101, for receiving the first driving signal, and an output end (corresponding to 11 pin) of the third NOT gate B103 is connected with the first input end (corresponding to G1 end) of the upper bridge arm (corresponding to VT101), for inputting the first driving signal to the first input end (corresponding to G1 end) of the upper bridge arm (corresponding to VT101),

[0110] The output end (corresponding to 11 pin) of the third NOT gate B103 is also connected with the second end (corresponding to D1 end) of the upper bridge arm (corresponding to VT101), for providing the drain voltage.

[0111] In some embodiments, in order to improve the stability of the output second driving signal, the fourth NOT gate B104 can be arranged in the second buffer module 142, which has the signal buffering function.

[0112] The input end (corresponding to 8-9 pins) of the fourth NOT gate B104 is connected with the output end (corresponding to 4 pin) of the second NOT gate B102, for receiving the second driving signal, and an output end (corresponding to 10 pin) of the fourth NOT gate B104 is connected with the first input end (corresponding to G2 end) of the lower bridge arm (corresponding to VT102), for inputting the first driving signal to the first input end (corresponding to G2 end) of the lower bridge arm (corresponding to VT102),

[0113] The output end (corresponding to 10 pin) of the third NOT gate B103 is also connected with the second end (corresponding to D2 end) of the lower bridge arm (corresponding to VT102), for providing the drain voltage.

[0114] In some embodiments, in order to improve the safety of the operation of the upper bridge arm (corresponding to VT101), the ninth resistor R109, the tenth resistor R110, the eleventh resistor R111 and the third voltage stabilizing diode VS103 can be arranged in the first voltage limiting module 151,

[0115] The ninth resistor R109, the tenth resistor R110 and the eleventh resistor R111 are connected in series,

[0116] The third voltage stabilizing diode VS103 has the voltage stabilizing function, which can stabilize the voltage of a pin of the transformer TR1 at 36V,

[0117] Specifically, one end of the eleventh resistor R111 is connected with the output end of the first buffer module 141 through the ninth resistor R109 and the tenth resistor R110,

[0118] The other end of the eleventh resistor R111 is coupled to the first input end (corresponding to G1 end) of the upper bridge arm (corresponding to VT101), and the first driving signal is input to the first input end (corresponding to G1 end) of the upper bridge arm (corresponding to VT101) through the ninth resistor R109, the tenth resistor R110 and the eleventh resistor R111, so as to drive the upper bridge arm (corresponding to VT101) to turn on / off;

[0119] The anode of the third voltage stabilizing diode VS103 is connected with the output end of the first buffer module 141, specifically, the anode of the third voltage stabilizing diode VS103 is connected with an output end (corresponding to 11 pin) of the third non-inverter B103,

[0120] The cathode of the third voltage stabilizing diode VS103 is connected with the second end (corresponding to D1 end) of the upper bridge arm (corresponding to VT101).

[0121] In some embodiments, in order to improve the safety of the operation of the lower bridge arm (corresponding to VT102), the thirteenth resistor R113, the fourteenth resistor R114, the fifteenth resistor R115 and the fifth voltage stabilizing diode VS105 can be arranged in the second voltage limiting module 152,

[0122] The thirteenth resistor R113, the fourteenth resistor R114 and the fifteenth resistor R115 are connected in series,

[0123] The fifth voltage stabilizing diode VS105 has the function of voltage stabilization, which can stabilize the voltage of the three-pin of the transformer TR1 at 36V,

[0124] Specifically, one end of the fifteenth resistor R115 is connected with the output end of the second buffer module 142 through the thirteenth resistor R113 and the fourteenth resistor R114,

[0125] The other end of the fifteenth resistor R115 is coupled to the first input end (corresponding to G2 end) of the lower bridge arm (corresponding to VT102), and the second driving signal is input to the first input end (corresponding to G2 end) of the lower bridge arm (corresponding to VT102) through the thirteenth resistor R113, the fourteenth resistor R114 and the fifteenth resistor R115, so as to drive the lower bridge arm (corresponding to VT102) to turn on / off;

[0126] The anode of the fifth voltage stabilizing diode VS105 is connected with the output end of the second buffer module 142, specifically, the anode of the fifth voltage stabilizing diode VS105 is connected with an output end (corresponding to 10 pin) of the fourth non-inverter B104

[0127] The cathode of the fifth voltage stabilizing diode VS105 is connected with the second end (corresponding to D2 end) of the lower bridge arm (corresponding to VT102).

[0128] In some embodiments, a first triode VT103 is further included, which is selected as an NPN type triode and has a function of a switch,

[0129] The base of the first triode VT103 is connected to one end of the second buffer module 142 (corresponding to pin 9) through the eighteenth resistor R118, the collector is connected to the inverting terminal of the first operational amplifier A101 (corresponding to pin 2) through the seventeenth resistor R117, and the emitter is connected to the common terminal.

[0130] When the base is at a high level, the first triode VT103 is controlled to be turned on, and the potential of the inverting terminal of the first operational amplifier A101 (corresponding to pin 2) is pulled to a low level, so as to change the level state of the output of the first operational amplifier A101.

[0131] In a second aspect, an automobile power supply includes the above-mentioned inverter circuit 10.

[0132] The embodiments of the utility model are described above in combination with the drawings, but the utility model is not limited to the above-mentioned specific embodiments, and the above-mentioned specific embodiments are only illustrative but not restrictive, and a person skilled in the art can make many forms under the inspiration of the utility model without departing from the scope of the utility model and the protection scope of the claims, and these all belong to the protection scope of the utility model.

Claims

1. An inverter circuit, characterized by comprising: Have: A voltage dividing module is arranged in the inverter circuit, configured to receive a 12V voltage signal and perform voltage dividing on the 12V voltage signal; An operational amplifier module, the input end of which is connected with the output end of the voltage dividing module, configured to receive the voltage signal after voltage dividing; A gate circuit, the input end of which is connected with the output end of the operational amplifier module, configured to receive the voltage signal after operational amplification and output corresponding driving signals according to the voltage signal; A first buffer module, the input end of which is connected with one output end of the gate circuit, configured to receive the first driving signal; A second buffer module, the input end of which is connected with another output end of the gate circuit, configured to receive the second driving signal; A bridge arm module, the first input end of the upper bridge arm of which is connected with the output end of the first buffer module, configured to receive the first driving signal, the first input end of the lower bridge arm of which is connected with the output end of the second buffer module, configured to receive the second driving signal, a transformer, one end of the primary winding of which is connected with the second end of the upper bridge arm, and the other end of the primary winding is connected with the second end of the lower bridge arm; when the first driving signal is high and the second driving signal is low, the upper bridge arm is turned on and the lower bridge arm is turned off, when the second driving signal is high and the first driving signal is low, the lower bridge arm is turned on and the upper bridge arm is turned off, so as to alternately turn on / off and output oscillating AC signals, and the oscillating AC signals are boosted by the transformer.

2. The inverter circuit according to claim 1, wherein the voltage dividing module at least comprises a potentiometer, one end of the potentiometer being configured to receive the 12V voltage signal and being used for adjusting the output voltage frequency, the other end of the potentiometer is connected with the input end of the operational amplifier module through a third resistor and a fourth resistor in parallel.

3. The inverter circuit according to claim 2, wherein the operational amplifier module at least comprises a first operational amplifier and a second operational amplifier, the inverting terminal of the first operational amplifier is connected with one end of the potentiometer through the third resistor, the non-inverting terminal of the first operational amplifier is connected with one end of the potentiometer through the fourth resistor, the inverting terminal of the second operational amplifier is connected with the output end of the first operational amplifier, the non-inverting terminal of the second operational amplifier is connected with the input end of the second buffer module, the output end of the second operational amplifier is coupled with one input end of the gate circuit.

4. The inverter circuit according to claim 3, wherein the gate circuit comprises a first NOT gate and a second NOT gate, one end of the first NOT gate is coupled with the output end of the second operational amplifier, the output end of the first NOT gate is connected with one end of the second NOT gate and the input end of the first buffer module respectively, the output end of the second NOT gate is connected with the input end of the second buffer module, the other ends of the first NOT gate and the second NOT gate are connected with a common terminal.

5. The inverter circuit according to claim 3 or 4, wherein the operational amplifier module and the gate circuit are connected to form a voltage controlled oscillator.

6. The inverter circuit according to claim 4, wherein The first voltage limiting module and the second voltage limiting module are further included, The input end of the first voltage limiting module is connected with the output end of the first buffer module, for receiving the first drive signal and limiting the input first drive signal, One output end of the first voltage limiting module is connected with the first input end of the upper bridge arm, The other output end of the first voltage limiting module is connected with the second end of the upper bridge arm, The input end of the second voltage limiting module is connected with the output end of the second buffer module, for receiving the second drive signal and limiting the input second drive signal, One output end of the second voltage limiting module is connected with the first input end of the lower bridge arm, The other output end of the second voltage limiting module is connected with the second end of the lower bridge arm.

7. The inverter circuit according to claim 6, wherein The first voltage limiting module at least includes a ninth resistor, a tenth resistor, an eleventh resistor and a third zener diode connected in series, One end of the eleventh resistor is connected with the output end of the first buffer module through the ninth resistor and the tenth resistor, The other end of the eleventh resistor is coupled to the first input end of the upper bridge arm, The anode of the third zener diode is connected with the output end of the first buffer module, The cathode of the third zener diode is connected with the second end of the upper bridge arm.

8. The inverter circuit according to claim 6, wherein The second voltage limiting module at least includes a thirteenth resistor, a fourteenth resistor, a fifteenth resistor and a fifth zener diode connected in series, One end of the fifteenth resistor is connected with the output end of the second buffer module through the thirteenth resistor and the fourteenth resistor, The other end of the fifteenth resistor is coupled to the first input end of the lower bridge arm, The anode of the fifth zener diode is connected with the output end of the second buffer module, The cathode of the fifth zener diode is connected with the second end of the lower bridge arm.

9. The inverter circuit according to claim 7 or 8, wherein The third end of the upper bridge arm is connected with the third end of the lower bridge arm.

10. An automotive power supply characterized by comprising: The inverter circuit according to any one of claims 1-9 is included.

Images