Signal indicating lamp circuit of photovoltaic data transceiver
By introducing a combination of transistors and PMOS transistors into the signal indicator circuit of the photovoltaic data transceiver, the problem of wasted I/O port resources was solved, and compatible indication of 4G and WIFI communication status was achieved, simplifying circuit design and reducing costs.
Patent Information
- Application Number
- CN202422709638.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-07
- Publication Date
- 2025-12-05
- Estimated Expiration
- 2034-11-07
AI Technical Summary
In the existing signal indicator circuit design of photovoltaic data transceivers, the I/O port resources are seriously wasted, which leads to increased system design complexity and reduced flexibility, and cannot effectively support 4G and WIFI communication status indication.
By introducing a transistor component and combining it with a PMOS component, the I/O port requirement is reduced, and a single I/O port compatible indicator light circuit is realized. The level control is used to indicate the 4G and WIFI communication status.
It reduces the use of I/O ports, improves resource utilization efficiency, simplifies circuit design, reduces system costs, improves device integration and signal stability, and ensures accurate indication of communication status.
Smart Images
Figure CN223639414U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to photovoltaic technology field especially relates to a signal indicating lamp circuit of photovoltaic data transceiver. BACKGROUND
[0002] A photovoltaic system refers to a system that uses solar modules to convert sunlight into electrical energy. Photovoltaic modules are the basic units in a photovoltaic system that convert solar energy into electrical energy. They can be individual solar cells or panels composed of multiple cells. Voltage, current, and power are key parameters of photovoltaic module performance. In a photovoltaic system, data transceivers are often used to collect and transmit these data in order to report the voltage, current, power, and other information of photovoltaic modules to the cloud platform in real time. Data transceivers use indicator lights to visually display communication methods and communication states. Common communication methods include WIFI and 4G.
[0003] The signal indicator light circuit design used in the prior art photovoltaic data transceiver is equipped with four input / output ports (hereinafter referred to as "IO ports"), which are responsible for signal reception and transmission. In addition, the circuit also includes a switch tube for managing the on-off of the circuit and an indicator light, which indicates the state of the WIFI and 4G communication methods by cooperating with the above-mentioned ports. This design scheme adjusts the working state of different IO ports and switch tubes to achieve the indicator light reflecting the current communication mode (4G or WIFI) and its state in a diversified flashing mode (such as fast flashing, slow flashing, continuous lighting, or complete extinguishing).
[0004] However, the prior art has some deficiencies. In the existing photovoltaic data transceiver technology, two IO ports are used for 4G communication, and the other two IO ports are used for WIFI communication. Although this design can achieve the indication of communication state, it has a certain problem of IO port resource waste. First, since each communication method requires independent IO port resources, this means that at any given time, at least two IO ports are in an idle state, which does not fully utilize the potential capacity of the IO ports, resulting in resource waste. Second, the waste of IO port resources can also lead to an increase in system design complexity and affect the scalability and flexibility of the system. SUMMARY
[0005] In view of the above-mentioned defects of the prior art, the utility model provides a signal indicator light circuit of photovoltaic data transceiver, which reduces the circuit requirement of one IO port by adding a triode element, thereby improving the IO port usage scheme, solving the IO port resource waste without affecting the efficiency and performance of the system.
[0006] To achieve the above-mentioned purpose, the utility model adopts the following technical scheme:
[0007] A signal indicator circuit of a photovoltaic data transceiver, comprising an indicator lamp connected to a power supply, further comprising a first PMOS tube and a first triode in series; the first triode is in series with a first IO port; the source electrode of the first PMOS tube is in series with a second IO port; further comprising a second PMOS tube; the gate electrode of the second PMOS tube is in series with the first IO port, and the source electrode is in series with a third IO port; one kind of signal accesses the second IO port, and another kind of signal accesses the third IO port.
[0008] Taking the first triode as an NPN type triode as an example. The system uses one of the communication modes, which uses the second IO port. The first IO port is high, the source electrode and the emitter electrode of the first triode are in a conductive state, the drain electrode and the source electrode of the first PMOS tube are in a conductive state, and the current can flow from the source electrode to the drain electrode, which enables the indicator lamp to be turned on to display the current signal state. The third IO port has no communication, and the drain electrode and the source electrode of the second PMOS tube are in a cut-off state. The indicator lamp can display the signal state of the second IO port through states such as rapid flashing and extinguishing. For example, when communicating, the indicator lamp presents a rapid flashing state, and when not communicating, the indicator lamp presents an extinguishing state. When the system uses another communication mode, the first IO port is low, the source electrode and the emitter electrode of the first triode are in a cut-off state, the drain electrode and the source electrode of the first PMOS tube are in a cut-off state, and the drain electrode and the source electrode of the second PMOS tube are in a conductive state. The indicator lamp can display another signal state through states such as rapid flashing and extinguishing.
[0009] In summary, in the prior art, in order to realize the access of 4G and WIFI signals, it is usually necessary to use one IO port respectively to cooperate with level control to drive the indicator lamp circuit, so as to indicate different communication modes. The utility model realizes that only one IO port is used to cooperate with level control, and the compatible indication of the indicator lamp circuit to the 4G and WIFI two communication modes can be completed. Not only the demand for the IO port is reduced, the utilization efficiency of resources is improved, but also the performance of the indicator lamp circuit is maintained unchanged, the accurate indication of the communication state is ensured. At the same time, the circuit design is simplified, the system cost is reduced, and the integration of the equipment is improved without sacrificing the function and performance. For electronic equipment that needs to support 4G and WIFI communication at the same time, it has important practical value.
[0010] As preferred, the drain electrode of the first PMOS tube is connected to the drain electrode of the second PMOS tube, and the drain electrode of the second PMOS tube is connected to a second triode after being connected in parallel; the second triode is connected in series with the indicator lamp.
[0011] The second triode is used to control the on-off of the signals from the first PMOS and the second PMOS, and to drive the on-off of the indicator light. By controlling the on-off of the second triode, the current flowing through the indicator light can be controlled, and thus the on-off of the indicator light can be controlled. By controlling the on-off of the second triode to control the on-off of the indicator light, more complex signal indication logic can be achieved.
[0012] As a preferred embodiment, the first triode is an NPN triode, the collector of which is connected to the gate of the first PMOS, and the base of which is connected to the first IO port.
[0013] The first triode is an NPN triode, allowing the on-off state of the first triode to be controlled by the level change of the first IO port, and thus affecting the on-off state of the first PMOS.
[0014] As a preferred embodiment, the first triode, the second PMOS, and the second triode are all grounded.
[0015] Grounding can simplify the layout of the circuit, reducing the required circuit board area, and thus helping to reduce the size of the device. At the same time, grounding can provide a low-impedance loop, helping to reduce noise and interference in the circuit and improve the stability and reliability of the signal.
[0016] As a preferred embodiment, a resistor one is connected between the source and the gate of the first PMOS; a resistor two is provided in the circuit between the first triode and the first IO port; and a resistor three is connected between the base and the emitter of the first triode.
[0017] The resistor one, the resistor two, and the resistor three provide necessary current limiting and signal buffering for the circuit. The resistor one is used to provide gate bias for the first PMOS, and the resistor two and the resistor three are used to limit the current flowing through the first triode, protecting the first triode from being damaged by excessive current.
[0018] As a preferred embodiment, a resistor four is provided in the circuit between the second PMOS and the first IO port; and a resistor five is connected to the gate of the second PMOS.
[0019] The resistor four and the resistor five provide gate drive for the second PMOS. The resistor four is used for current limiting and isolation of the gate signal, and the resistor five is used to stabilize the gate voltage, ensuring reliable operation of the second PMOS.
[0020] As a preferred embodiment, a resistor six is provided on the bus where the drain of the first PMOS and the drain of the second PMOS are connected; a resistor seven is connected between the base and the emitter of the second triode; and a resistor eight is provided in the circuit between the second triode and the indicator light.
[0021] The resistors six, seven and eight provide current control and protection for the indicator light. Resistor six acts as a current limiting resistor on the bus, preventing the indicator light from being damaged by excessive current. Resistors seven and eight are used to adjust the brightness and flashing pattern of the indicator light, providing a more intuitive signal indication.
[0022] Preferably, the indicator light is an LED light.
[0023] The LED light has low power consumption, long life and fast response, which can reduce the energy consumption of the entire system, reduce maintenance costs, and provide clearer signal indication.
[0024] Compared with the prior art, the beneficial effects of the utility model are reflected in:
[0025] 1. The utility model discloses a triode element is integrated, and it is combined with PMOS tube element, realizes only using single IO port and through level control, and the compatible indication of indicator light circuit under 4G and WIFI two communication modes can be realized. Not only the dependence on IO port is reduced significantly, and the use efficiency of resources is improved, but also the performance of indicator light circuit is maintained, and the accurate feedback of communication state is ensured.
[0026] 2. The utility model discloses reduce the IO port quantity required, reduce the pin demand of microcontroller or control chip, thereby can use the chip of less pin quantity and lower cost, reduce the overall hardware cost. The combination of triode and PMOS tube reduces the number of external elements, realizes more simple circuit design, thereby simplifies the circuit board layout, helps to simplify the production and assembly process.
[0027] 3. The utility model discloses through the conduction and cut-off of triode and PMOS tube, realizes the diversified control of indicator light, such as fast flashing, slow flashing or extinguishing, provides flexible signal indication mode.
[0028] 4. Through reducing the number of elements and optimizing circuit layout, the complexity of circuit is reduced, the fault point is reduced, and the reliability and stability of system are improved.
[0029] 5. Using LED light as indicator light, compared with traditional bulb, LED light has lower power consumption and longer service life, which helps to reduce energy consumption and reduce maintenance cost. BRIEF DESCRIPTION OF DRAWINGS
[0030] Figure 1 It is the circuit diagram of example one;
[0031] Figure 2 It is the circuit diagram of example two.
[0032] Among them:
[0033] L, indicator light;
[0034] Q1, first PMOS transistor; Q2, first transistor; Q3, second PMOS transistor; Q4, second transistor;
[0035] A. First I / O port; B. Second I / O port; C. Third I / O port;
[0036] R1, Resistor 1; R2, Resistor 2; R3, Resistor 3; R4, Resistor 4; R5, Resistor 5; R6, Resistor 6; R7, Resistor 7; R8, Resistor 8. Detailed Implementation
[0037] To make the technical means, inventive features, objectives, and effects of this utility model readily understandable, the present utility model is further described below in conjunction with specific illustrations. However, this utility model is not limited to the following embodiments.
[0038] It should be noted that the structures, proportions, sizes, etc., illustrated in the accompanying drawings of this specification are only used to complement the content disclosed in the specification for those skilled in the art to understand and read, and are not intended to limit the conditions under which this utility model can be implemented. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportional relationships, or adjustments to the size, without affecting the effects and purposes that this utility model can produce, should still fall within the scope of the technical content disclosed in this utility model.
[0039] Example 1:
[0040] like Figure 1 The circuit shown is a signal indicator light circuit for a photovoltaic data transceiver. It includes an indicator light L connected to the power supply, and also includes a first PMOS transistor Q1 and a first transistor Q2 connected in series. The first transistor Q2 is connected in series to a first I / O port A. The source of the first PMOS transistor Q1 is connected in series to a second I / O port B. It also includes a second PMOS transistor Q3. The gate of the second PMOS transistor Q3 is connected in series to the first I / O port A, and its source is connected in series to the third I / O port C. The first transistor Q2 is an NPN transistor, with its collector connected to the gate of the first PMOS transistor Q1 and its base connected to the first I / O port A. The indicator light L is an LED.
[0041] The 4G signal is connected to the second IO port B, and the WIFI signal is connected to the third IO port C. When the 4G signal is communicated, the first IO port A is high, the source and emitter of the first triode Q2 are in the conduction state, the drain and source of the first PMOS Q1 are in the conduction state, and the current can flow from the source to the drain, which enables the indicator lamp L to light up to show the current signal state. The third IO port C has no communication, and the drain and source of the second PMOS Q3 are in the cut-off state. The indicator lamp L can show the signal state of the second IO port B through fast flashing, extinguishing and other states. For example, when communicating, the indicator lamp L presents a fast flashing state, and when there is no communication, the indicator lamp L presents an extinguishing state. When the system uses another WIFI communication mode, the first IO port A is low, the source and emitter of the first triode Q2 are in the cut-off state, the drain and source of the first PMOS Q1 are in the cut-off state, and the drain and source of the second PMOS Q3 are in the conduction state. The indicator lamp L can show another signal state through fast flashing, extinguishing and other states.
[0042] In the prior art, in order to realize the access of 4G and WIFI signals, it is usually necessary to use an IO port respectively to cooperate with level control to drive the indicator lamp circuit, so as to indicate different communication modes. The utility model realizes that only one IO port is used to cooperate with level control, and the compatible indication of the indicator lamp circuit to the 4G and WIFI two communication modes can be completed. Not only the demand for IO port is reduced, and the utilization efficiency of resources is improved, but also the performance of the indicator lamp circuit is kept unchanged, and the accurate indication of the communication state is ensured. Meanwhile, the circuit design can be simplified, the system cost can be reduced, and the integration of the equipment can be improved without sacrificing the function and performance. For electronic equipment which needs to support 4G and WIFI communication at the same time, it has important practical value.
[0043] Specifically, the drain of the first PMOS Q1 is connected with the drain of the second PMOS Q3, and after converging, is connected with the second triode Q4; and the second triode Q4 is connected with the indicator lamp L in series. The second triode Q4 is used for controlling the on-off of the signals from the first PMOS Q1 and the second PMOS Q3, and simultaneously driving the light-off of the indicator lamp L. By controlling the conduction and cut-off of the second triode Q4, the current flowing through the indicator lamp L can be controlled, so as to control the light-off of the indicator lamp L. By controlling the conduction and cut-off of the second triode Q4 to control the light-off of the indicator lamp, more complex signal indication logic can be realized.
[0044] The first triode Q2, the second PMOS Q3 and the second triode Q4 are all grounded. Grounding can simplify the layout of the circuit, reduce the required circuit board area, and thus help to reduce the size of the equipment. At the same time, grounding can provide a low-impedance loop, which helps to reduce noise and interference in the circuit, and improves the stability and reliability of the signal.
[0045] A resistor R1 is connected between the source and gate of the first PMOS transistor Q1; a resistor R2 is connected between the first transistor Q2 and the first I / O port A; a resistor R3 is connected between the base and emitter of the first transistor Q2. A resistor R4 is connected between the second PMOS transistor Q3 and the first I / O port A; a resistor R5 is connected to the gate of the second PMOS transistor Q3. A resistor R6 is connected on the bus connecting the drains of the first PMOS transistor Q1 and the drain of the second PMOS transistor Q3; a resistor R7 is connected between the base and emitter of the second transistor Q4; a resistor R8 is connected between the second transistor Q4 and the indicator light L.
[0046] Resistors R1, R2, and R3 are configured to provide necessary current limiting and signal buffering for the circuit. R1 provides gate bias for the first PMOS transistor Q1, while R2 and R3 limit the current flowing through Q2, protecting it from damage due to excessive current. Resistors R4 and R5 provide gate drive for the second PMOS transistor Q3. R4 limits current and isolates the gate signal, while R5 stabilizes the gate voltage, ensuring reliable operation of Q3. Resistors R6, R7, and R8 provide current control and protection for the indicator light L. R6 acts as a current-limiting resistor on the bus, preventing damage to indicator light L due to excessive current. R7 and R8 adjust the brightness and flashing mode of indicator light L, providing more intuitive signal indication.
[0047] Example 2:
[0048] like Figure 2 The circuit shown is a signal indicator circuit for a photovoltaic data transceiver. The first transistor Q2 is a PNP transistor, with its emitter connected to the gate of the first PMOS transistor Q1 and its base connected to the first I / O port A. The PNP transistor performs the same function as the NPN transistor Q2. Compared to the NPN transistor, the PNP transistor has a reverse current direction when it is turned on, which helps to adapt to different circuit design requirements or optimize performance. The choice between NPN and PNP transistors depends on the specific requirements of the circuit.
Claims
1. A signal indicator light circuit for a photovoltaic data transceiver comprising an indicator light (L) connected to a power source, characterized in that, The first PMOS tube (Q1) and the first triode (Q2) are connected in series; the first triode (Q2) is connected with the first IO port (A) in series; the source of the first PMOS tube (Q1) is connected with the second IO port (B) in series; the second PMOS tube (Q3) is further included; the gate of the second PMOS tube (Q3) is connected with the first IO port (A) in series, and the source is connected with the third IO port (C) in series; one kind of signal accesses the second IO port (B), and another kind of signal accesses the third IO port (C).
2. The signal indicator light circuit for a photovoltaic data transceiver of claim 1, wherein, The drain of the first PMOS tube (Q1) is connected with the drain of the second PMOS tube (Q3), and is connected with the second triode (Q4) after being converged; the second triode (Q4) is connected with the indicator lamp (L) in series.
3. The signal indicator light circuit for a photovoltaic data transceiver of claim 2, wherein, The first triode (Q2) is an NPN type triode, the collector of which is connected with the gate of the first PMOS tube (Q1), and the base is connected with the first IO port (A).
4. The signal indicator light circuit for a photovoltaic data transceiver of claim 3, wherein, The first triode (Q2), the second PMOS tube (Q3) and the second triode (Q4) are all grounded.
5. The signal indicator light circuit for a photovoltaic data transceiver of claim 4, wherein, The source and the gate of the first PMOS tube (Q1) are connected with the resistance one (R1); the resistance two (R2) is arranged on the circuit between the first triode (Q2) and the first IO port (A); the base and the emitter of the first triode (Q2) are connected with the resistance three (R3).
6. The signal indicator light circuit for a photovoltaic data transceiver of claim 4, wherein, The resistance four (R4) is arranged on the circuit between the second PMOS tube (Q3) and the first IO port (A); the gate of the second PMOS tube (Q3) is connected with the resistance five (R5).
7. The signal indicator light circuit for a photovoltaic data transceiver of claim 4, wherein, The resistance six (R6) is arranged on the bus where the drain of the first PMOS tube (Q1) and the drain of the second PMOS tube (Q3) are converged; the base and the emitter of the second triode (Q4) are connected with the resistance seven (R7); the resistance eight (R8) is arranged on the circuit between the second triode (Q4) and the indicator lamp (L).
8. The signal indicator light circuit of a photovoltaic data transceiver according to any of claims 1-7, wherein, The indicator lamp (L) is an LED lamp.