Wireless transceiver supporting star flash SLE

Abstract

The utility model discloses a wireless transceiver supporting a star flash SLE, which relates to the technical field of telecommunication, and comprises a power supply part, a clock part and a radio frequency link part, the power supply part, the clock part and the radio frequency link part are all in circuit connection with a main chip part, and the main chip part is in circuit connection with the main chip part. The VBAT of the power supply part is connected with one end of the D3 and the VDDnRF, the other end of the D3 is grounded, and the D3 is a transient voltage suppressor. According to the utility model, the high and low frequency clock circuits are arranged, so that the requirements of basic operation and signal transmission of the transceiver are met, and meanwhile, the PI filter circuit is arranged for impedance matching. Star flash is applied, power consumption is low, the working requirement of a radio frequency circuit can be met, clutters can be eliminated, and the advantages of being low in time delay, resistant to interference, high in speed and the like are achieved. The transmission distance is long, the anti-interference capability is strong, and the signal is good.

Description

TECHNICAL FIELD

[0001] The utility model relates to wireless communication technical field, concretely relates to a kind of wireless transceiver of the component of transmission system supports star flash SLE. BACKGROUND

[0002] Internet of Things is a big trend in the information age, which emphasizes Internet of Things. The popularity of Internet of Things will bring great convenience to our future life. Due to the rise of Internet of Things, the demand for short-range wireless communication is increasing, and the technology is like a hundred flowers blooming. The existing wireless short-range communication solutions mainly include Wi-Fi, Bluetooth and near field communication (NFC) technologies. Wi-Fi technology has the advantages of high-speed transmission and support for multi-device linking. Bluetooth has relatively low cost and good power consumption control, and is easy to use. For short-range communication with power consumption requirements and low distance requirements, it is a good solution. NFC solution is very convenient to use, with very low power consumption, and is widely used in mobile payment and identity verification fields.

[0003] With the continuous emergence of more new application scenarios and the continuous improvement of demand, wireless short-range communication technology is required to have higher communication requirements in terms of low latency, high reliability, precise synchronization, high speed, multi-concurrency, high security, low power consumption, etc. The existing mainstream wireless short-range communication technologies, such as Bluetooth, have disadvantages such as speed and latency, and Wi-Fi has problems such as asynchronous and system efficiency, making it difficult to fully meet the transmission requirements of these scenarios.

[0004] Star flash has advantages over Wi-Fi and Bluetooth. It introduces 5G key technologies such as Polar code to overcome the shortcomings of traditional technologies, has low latency, anti-interference, high speed, etc., and solves the problem that WiFi and Bluetooth cannot meet the demand for extreme experience in terms of latency and reliability in some sub-scenarios of intelligent terminals and smart home.

[0005] As disclosed in the "impedance matching transceiver" with publication number CN115004560A, it has a relatively complex impedance matching circuit, which is high in complexity, easy to distort and high in power consumption. UTILITY MODEL CONTENTS

[0006] The utility model aims to provide a miniaturized modular wireless transceiver supporting star flash technology. Another object of the utility model is to reduce the power consumption of the wireless transceiver, reduce the latency, improve the anti-interference capability, and improve the transmission rate to meet the communication use in short-distance scenarios. A further object of the utility model is to improve the data transmission success rate in weak environment and ensure the stability and efficiency of data transmission.

[0007] The utility model achieves the above technical objects through the following technical means.

[0008] A wireless transceiver supporting star flash SLE, comprising a power supply part and a clock part and a radio frequency link part, the power supply part and the clock part and the radio frequency link part are all connected with the main chip part circuit, the VBAT of the power supply part is connected with one end of the D3 and the VDDnRF, the other end of the D3 is grounded, and the D3 is a transient voltage suppressor.

[0009] Further, the VDDnRF is connected with the VDD1 pin and the VDD2 pin and the VDDIO1 pin of the main chip respectively.

[0010] The VDDnRF is connected with one end of the capacitor C25 and the VDD1 pin, and the other end of the capacitor C25 is grounded.

[0011] The VDDnRF is connected with one end of the capacitor C27 and the VDD2 pin, and the other end of the capacitor C27 is grounded.

[0012] The VDDnRF is connected with one end of the capacitor C38 and the VDDIO1 pin, and the other end of the capacitor C38 is grounded.

[0013] As preferred, the main chip is connected with two clock circuits, one is a low-frequency clock circuit, and the other is a high-frequency clock circuit.

[0014] The two ends of the crystal oscillator X4 in the low-frequency clock circuit are connected with the XL1 pin and the XL2 pin of the main chip respectively, and the other end of the crystal oscillator X4 is connected with one end of the capacitor C28 and the capacitor C29 respectively, and the other ends of the capacitor C28 and the capacitor C29 are connected in parallel to the ground.

[0015] Further, one end of the capacitor C23 in the high-frequency clock circuit and the XIN32M of the main chip are connected in parallel, and the pin 3 of the crystal oscillator X3 is connected, the pin 4 of the crystal oscillator X3 is connected in parallel with the other end of the capacitor C23 and grounded, the XOUT32M pin of the main chip is connected in series with one end of the resistor R14, the other end of the resistor R14 is connected in parallel with one end of the capacitor C24 and connected with the pin 1 of the crystal oscillator X3, and the other end of the capacitor C24 is connected in parallel with the pin 2 of the crystal oscillator X3 and grounded.

[0016] Further, the radio frequency link part comprises a pi filter circuit and an electrostatic protection circuit and a radio frequency module circuit, and the pi filter circuit and the electrostatic protection circuit and the radio frequency module circuit are connected in circuit.

[0017] Further, one end of the capacitor C36 of the pi filter circuit and one end of the inductor L5 are connected in parallel and connected with the RFIO pin of the main chip, the other end of the capacitor C36 is grounded, one end of the capacitor C37 of the pi filter circuit is connected in parallel with the electrostatic protection circuit and the other end of the inductor L5 is connected, and the other end of the capacitor C37 is grounded.

[0018] As preferred, one end of D4 in the electrostatic protection circuit is connected with one end of inductor L6 and one end of the radio frequency module circuit, the other end of D4 is grounded, the other end of inductor L6 is grounded, and D4 is a transient voltage suppressor.

[0019] As preferred, the radio frequency module circuit connects capacitor C32 and capacitor C34 in parallel with one end of inductor L6, and connects the other end of C34 with the ANTTP pin of the controller communication chip.

[0020] Or the radio frequency module circuit connects inductor L6 and the ANTTP pin of the controller communication chip and one end of capacitor C35 in parallel with pin 1 of antenna ANT1, and the other end of capacitor 35 is grounded, and pin 2 of antenna ANT1 is grounded.

[0021] Further, the GPIO series pins of the main chip are connected with the corresponding numbered GPIO pins of the controller communication chip one by one.

[0022] Further, the circuit connection modes of the two kinds of radio frequency modules represent that the signal is output to the stamp hole or the PCB antenna.

[0023] The utility model has the following gain effects:

[0024] Compared with the complex impedance matching filter of the prior art, the high-low frequency clock circuit is arranged in the utility model, the basic operation of the transceiver and the demand of signal transmission are met, the PI filter circuit is arranged for impedance matching, star flash is applied, power consumption is low, the working needs of the radio frequency circuit can be met, the noise can be eliminated, and the utility model has the characteristics of low time delay, anti-interference, high speed and the like. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 It is the circuit connection diagram of the main chip of the utility model.

[0026] Figure 2 It is the radio frequency link part circuit diagram of the utility model.

[0027] Figure 3 It is the high frequency clock circuit diagram of the utility model.

[0028] Figure 4 It is the controller communication chip circuit diagram of the utility model.

[0029] Figure 5 It is another part of the controller communication chip circuit diagram of the utility model.

[0030] Figure 6 It is the circuit diagram of the utility model before the external power supply is connected with the main chip. DETAILED DESCRIPTION

[0031] The utility model will be further described below in combination with the drawings and specific embodiments, but the protection scope of the utility model is not limited to this.

[0032] Embodiment one:

[0033] As Figures 1 to 6 shown, a wireless transceiver supporting star flash SLE includes a power supply part and a clock part and a radio frequency link part, the power supply part and the clock part and the radio frequency link part are all connected with the main chip part circuit, the VBAT of the power supply part is connected with one end of D3 and VDDnRF, the other end of D3 is grounded, and D3 is a transient voltage suppressor.

[0034] The design of the power supply part aims to provide stable and reliable power supply for the whole wireless transceiver. The key components of the power supply part include the main chip and the elements for power supply protection and filtering. The external power supply VBAT is first connected, and is connected with one end of the transient voltage suppressor D3 and the VDDnRF power supply node. The other end of the transient voltage suppressor D3 is grounded, and its function is to quickly conduct the energy to the ground when overvoltage or transient peak appears at the VBAT end, so as to protect the subsequent circuit from overvoltage impact and electrostatic protection. The voltage input to the main chip is controlled within the clamping voltage range of D3.

[0035] VDDnRF, as the power supply voltage of the radio frequency front-end part, is connected to the VDD1 pin, the VDD2 pin and the VDDIO1 pin of the main chip respectively, and provides radio frequency related power supply input for the main chip. VDD1 is used for internal BUCK input, VDD2 is used for internal LDO input, and VDDIO1 is used as reference voltage for a part of internal GPIO and power supply for USB PHY. In order to further improve the purity and stability of the power supply, filter capacitors are connected in parallel between the VDDnRF node and each power supply pin of the main chip.

[0036] Specifically, VDDnRF is connected with one end of the capacitor C25, and is also connected to the VDD1 pin of the main chip, the other end of the capacitor C25 is grounded, forming decoupling filtering for the VDD1 pin; VDDnRF is connected with one end of the capacitor C27, and is also connected to the VDD2 pin of the main chip, the other end of the capacitor C27 is grounded, forming decoupling filtering for the VDD2 pin; VDDnRF is connected with one end of the capacitor C38, and is also connected to the VDDIO1 pin of the main chip, the other end of the capacitor C38 is grounded, forming decoupling filtering for the VDDIO1 pin.

[0037] Capacitors C25, C27 and C38 are all decoupling capacitors, which are used to filter out the noise and ripple that may exist in the circuit, ensure the purity of the power supply, and thus improve the performance and stability of the radio frequency front-end circuit.

[0038] The clock section provides a precise clock signal to the wireless transceiver to ensure the synchronized operation of all functional modules. In this embodiment, the clock section includes two independent clock circuits: a low-frequency clock circuit and a high-frequency clock circuit, both connected to the main chip.

[0039] The low-frequency clock circuit is mainly used to provide a low-speed clock signal for low-power operation or timing functions, fulfilling the basic functions of the chip. The low-frequency clock circuit uses a crystal oscillator X4 as its core component. The two ends of the crystal oscillator X4 are connected to the XL1 and XL2 pins of the main chip, respectively, forming the input and output terminals of the crystal oscillator circuit.

[0040] To ensure stable oscillation of crystal oscillator X4, each end of crystal oscillator X4 is connected to a load capacitor. Specifically, one end of crystal oscillator X4 is connected to one end of capacitor C28 and one end of capacitor C29, while the other ends of capacitors C28 and C29 are connected to ground in parallel. Capacitors C28 and C29 are the load capacitors of crystal oscillator X4, and their values ​​need to be matched according to the parameters of crystal oscillator X4 to ensure stable and reliable operation. In this embodiment, the oscillation frequency of crystal oscillator X4 is 32.768 kHz.

[0041] The high-frequency clock circuit is mainly used to provide a high-speed clock signal, and in this embodiment it is mainly used in high-speed data transmission and radio frequency transceiver.

[0042] like Figure 3 As shown, the high-frequency clock circuit uses crystal oscillator X3 as the core component. Crystal oscillator X3 is a high-frequency crystal oscillator with four pins. In this embodiment, the oscillation frequency of crystal oscillator X3 is 32MHz. Crystal oscillator X3, together with peripheral circuitry, forms an oscillation circuit. One end of capacitor C23 and the XIN32M pin of the main chip are connected in parallel and then connected to pin 3 of crystal oscillator X3, serving as the input terminal of crystal oscillator X3.

[0043] Pin 4 of crystal oscillator X3 is connected in parallel with the other end of capacitor C23 and then grounded. The XOUT32M pin of the main chip is connected in series with one end of resistor R14. The other end of resistor R14 is connected in parallel with one end of capacitor C24 and then connected to pin 1 of crystal oscillator X3, serving as the feedback and output terminal for crystal oscillator X3. The other end of capacitor C24 is connected in parallel with pin 2 of crystal oscillator X3 and then grounded. The function of resistor R14 here is to limit current, reduce drive power, and reduce signal reflection. Capacitors C23 and C24 are also load capacitors for crystal oscillator X3, similar to the load capacitors for crystal oscillator X4; their values ​​also need to be matched according to the parameters of crystal oscillator X3.

[0044] Through the design of the high-frequency and low-frequency clock circuits, the wireless transceiver can flexibly adapt to different working modes and power consumption requirements. That is, the frequency of the high-frequency clock is controlled according to the use requirement, so that the transceiver adjusts the power according to the use requirement.

[0045] The radio frequency link part is responsible for the transmission and reception of wireless signals, and its performance directly affects the communication distance and reliability of the wireless transceiver. As shown in Figure 2 The radio frequency link part mainly includes a pi filter circuit, an electrostatic protection circuit and a radio frequency module circuit, and the three circuit modules are connected in sequence to form a complete radio frequency signal path.

[0046] The pi filter circuit is located at the front end of the radio frequency link, and its function is to filter out the noise and interference in the radio frequency signal and improve the purity of the signal. The pi filter circuit includes a capacitor C36, a capacitor C37 and an inductor L5. One end of the capacitor C36 and one end of the inductor L5 are connected in parallel and then connected with the RFIO pin of the main chip, the RFIO pin being the radio frequency input / output pin of the main chip and being responsible for the transmission of the radio frequency signal. The other end of the capacitor C36 is connected to the ground, forming a ground branch of the input part of the pi filter circuit. The inductor L5 is connected in series in the radio frequency signal path. The other end of the inductor L5 is connected with one end of the capacitor C37, and the other end of the capacitor C37 is connected to the ground, forming a ground branch of the output part of the pi filter circuit. The capacitor C37, together with the capacitor C36 and the inductor L5, forms a low-pass filter to filter out high-frequency noise.

[0047] The electrostatic protection circuit is connected after the pi filter circuit, and its function is to prevent external electrostatic discharge from damaging the radio frequency link and improve the reliability and durability of the device. The electrostatic protection circuit mainly relies on a transient voltage suppressor D4 to bear the electrostatic protection function. One end of the electrostatic protection circuit is connected in parallel with one end of the capacitor C37 of the pi filter circuit and then connected with the other end of the inductor L5, and the other end of the capacitor C37 is connected to the ground. One end of the transient voltage suppressor D4 is connected with one end of the inductor L6 and one end of the radio frequency module circuit, and the other end of the D4 is connected to the ground, and the other end of the inductor L6 is connected to the ground. When external electrostatic discharge occurs, the transient voltage suppressor D4 quickly conducts to discharge the electrostatic energy to the ground, protecting the subsequent radio frequency module circuit. The inductor L6 is an inductor installed for testing circuit performance and further impedance matching, and it can not be installed in actual use.

[0048] The radio frequency module circuit is the core part of the radio frequency link. In this embodiment, the radio frequency module circuit can adopt two different connection modes for signal transmission, such as outputting signals to a stamp hole or a PCB antenna.

[0049] The first radio frequency module circuit connection mode is suitable for the case of outputting radio frequency signals to a stamp hole connector. The radio frequency module circuit connects the capacitor C32 and the capacitor C34 in parallel with one end of the inductor L6, and connects the other end of the C34 with the ANTTP pin of the controller communication chip. The ANTTP pin of the controller communication chip is an antenna port of the controller communication chip, and the radio frequency signals are output through the port. The capacitors C32 and C34 are used for filtering, noise reduction and impedance matching.

[0050] The second radio frequency module circuit connection mode is suitable for the case of directly connecting a PCB antenna. The radio frequency module circuit connects the inductor L6, the ANTTP pin of the controller communication chip and one end of the capacitor C35, and the pin 1 of the antenna ANT1 in parallel, the other end of the capacitor C35 is grounded, and the pin 2 of the antenna ANT1 is grounded. The antenna ANT1 is a PCB antenna, which is directly integrated on the circuit board. The capacitor C35 is used for impedance matching, so that the output impedance of the controller communication chip matches the input impedance of the antenna, and the signal transmission efficiency is improved. The pin 2 of the antenna ANT1 is grounded, which constitutes the ground plane of the antenna.

[0051] In order to realize the control and data interaction of the main chip to the controller communication chip, in the embodiment, the GPIO series pins of the main chip are connected with the corresponding numbered GPIO pins of the controller communication chip one by one. Through the connection of the GPIO pins, the main chip can control the working mode, frequency, power and other parameters of the controller communication chip, and can receive the state information fed back by the controller communication chip.

[0052] In summary, the wireless transceiver supporting star flash SLE disclosed by the utility model realizes the high-efficiency and stable wireless communication function through the cooperative work of the power supply part, the clock part and the radio frequency link part. Through the measures such as transient voltage suppressor, filter capacitor, pi filter circuit and electrostatic protection circuit, the reliability and anti-interference ability of the equipment are improved. At the same time, by providing two different radio frequency module circuit connection modes, the wireless transceiver can be flexibly applied to various different application scenarios.

[0053] Embodiment two:

[0054] The line connection structure of the embodiment is basically the same as that of embodiment one, and the functions of some chip pins are additionally described.

[0055] As Figures 1 to 6 shown, a wireless transceiver supporting star flash SLE includes a power supply part, a clock part and a radio frequency link part, the power supply part, the clock part and the radio frequency link part are all connected with the main chip part circuit, the VBAT of the power supply part is connected with one end of the D3 and the VDDnRF, the other end of the D3 is grounded, and the D3 is a transient voltage suppressor.

[0056] The design of the power supply part aims to provide stable and reliable power supply for the whole wireless transceiver. The key components of the power supply part include the main chip and elements for power supply protection and filtering. The external power supply VBAT is first connected and connected to one end of the transient voltage suppressor D3 and the VDDnRF power supply node. The other end of the transient voltage suppressor D3 is grounded, which functions to quickly conduct energy to the ground when an overvoltage or transient spike occurs at the VBAT end, thereby protecting the subsequent circuit from overvoltage impact and static protection. The voltage input to the main chip is controlled within the clamping voltage range of D3.

[0057] VDDnRF is the power supply voltage of the radio frequency front-end part, connected to the VDD1 pin, VDD2 pin and VDDIO1 pin of the main chip respectively, providing radio frequency related power supply input for the main chip. VDD1 is used for internal BUCK input, VDD2 is used for internal LDO input, and VDDIO1 is used as reference voltage for a part of internal GPIO and as power supply for USB PHY. In order to further improve the purity and stability of the power supply, filter capacitors are connected in parallel between the VDDnRF node and each power supply pin of the main chip.

[0058] Specifically, VDDnRF is connected to one end of capacitor C25 and simultaneously connected to the VDD1 pin of the main chip, and the other end of capacitor C25 is grounded, forming decoupling filtering for the VDD1 pin; VDDnRF is connected to one end of capacitor C27 and simultaneously connected to the VDD2 pin of the main chip, and the other end of capacitor C27 is grounded, forming decoupling filtering for the VDD2 pin; VDDnRF is connected to one end of capacitor C38 and simultaneously connected to the VDDIO1 pin of the main chip, and the other end of capacitor C38 is grounded, forming decoupling filtering for the VDDIO1 pin.

[0059] Capacitors C25, C27 and C38 are all decoupling capacitors, used to filter out noise and ripple that may exist in the circuit, ensuring the purity of the power supply, thereby improving the performance and stability of the radio frequency front-end circuit.

[0060] The clock part provides accurate clock signals for the wireless transceiver to ensure the synchronous operation of each functional module. In this embodiment, the clock part includes two independent clock circuits: a low-frequency clock circuit and a high-frequency clock circuit, both connected to the main chip.

[0061] The low-frequency clock circuit is mainly used to provide low-speed clock signals for running in low-power mode or timing functions to meet the basic functions of the chip. The low-frequency clock circuit uses crystal oscillator X4 as the core element, and the two ends of crystal oscillator X4 are connected to the XL1 pin and XL2 pin of the main chip respectively, constituting the input and output ends of the crystal oscillator circuit.

[0062] In order to make the crystal X4 stable, the crystal X4 is also connected with a load capacitor at each end. Specifically, one end of the crystal X4 is connected to one end of the capacitor C28 and the capacitor C29, and the other end of the capacitor C28 and the capacitor C29 is connected to ground in parallel. The capacitor C28 and C29 are load capacitors of the crystal X4, and the selection of the value needs to be matched according to the parameters of the crystal X4 to ensure that the crystal X4 can work stably and reliably. In this embodiment, the vibration frequency of the crystal X4 is 32.768KHz.

[0063] The high-frequency clock circuit is mainly used to provide a high-speed clock signal, and is mainly used in high-speed data transmission and radio frequency transmission in this embodiment.

[0064] As shown in Figure 3 , the high-frequency clock circuit uses a crystal X3 as a core element, and the crystal X3 is a high-frequency crystal oscillator with four pins. In this embodiment, the vibration frequency of the crystal X3 is 32MHz. The crystal X3 cooperates with the peripheral circuit to form an oscillation circuit. One end of the capacitor C23 and the XIN32M pin of the main chip are connected in parallel, and the pin 3 of the crystal X3 is connected as the input end of the crystal X3.

[0065] The pin 4 of the crystal X3 is connected in parallel with the other end of the capacitor C23 and grounded. The XOUT32M pin of the main chip is connected in series with one end of the resistor R14, and the other end of the resistor R14 is connected in parallel with one end of the capacitor C24 and connected with the pin 1 of the crystal X3 as the feedback and output end of the crystal X3. The other end of the capacitor C24 is connected in parallel with the pin 2 of the crystal X3 and grounded. The resistor R14 functions as current limiting, reducing driving power and signal reflection. The capacitor C23 and C24 are also load capacitors of the crystal X3, and similar to the load capacitors of the crystal X4, the values also need to be matched according to the parameters of the crystal X3.

[0066] Through the design of the high-frequency and low-frequency clock circuits, the wireless transceiver of this embodiment can flexibly adapt to different working modes and power consumption requirements. That is, according to the use requirements, the frequency of the high-frequency clock is controlled, so that the transceiver adjusts the power according to the use requirements.

[0067] The radio frequency link part is responsible for the transmission and reception of wireless signals, and its performance directly affects the communication distance and reliability of the wireless transceiver. As shown in Figure 2 , the radio frequency link part mainly includes a pi filter circuit, an electrostatic protection circuit and a radio frequency module circuit, and the three circuit modules are connected in sequence to form a complete radio frequency signal path.

[0068] The pi filter circuit is located at the front end of the radio frequency link, and functions to filter out noise and interference in the radio frequency signal and improve the purity of the signal. The pi filter circuit includes a capacitor C36 and a capacitor C37 and an inductor L5. One end of the capacitor C36 and one end of the inductor L5 are connected in parallel and then connected to the RFIO pin of the main chip, the RFIO pin being the radio frequency input / output pin of the main chip and being responsible for the transmission of the radio frequency signal. The other end of the capacitor C36 is connected to the ground, constituting the ground branch of the input part of the pi filter circuit. The inductor L5 is connected in series in the radio frequency signal path. The other end of the inductor L5 is connected to one end of the capacitor C37, and the other end of the capacitor C37 is connected to the ground, constituting the ground branch of the output part of the pi filter circuit. The capacitor C37, together with the capacitor C36 and the inductor L5, constitutes a low-pass filter to filter out high-frequency noise.

[0069] The electrostatic protection circuit is connected after the pi filter circuit, and functions to prevent external electrostatic discharge from damaging the radio frequency link and to improve the reliability and durability of the device. The electrostatic protection circuit mainly relies on the transient voltage suppressor D4 to bear the electrostatic protection function. One end of the electrostatic protection circuit is connected in parallel with one end of the capacitor C37 of the pi filter circuit and then connected to the other end of the inductor L5, and the other end of the capacitor C37 is connected to the ground. One end of the transient voltage suppressor D4 is connected to one end of the inductor L6 and one end of the radio frequency module circuit, and the other end of the D4 is connected to the ground, and the other end of the inductor L6 is connected to the ground. When external electrostatic discharge occurs, the transient voltage suppressor D4 rapidly conducts to discharge the electrostatic energy to the ground, protecting the subsequent radio frequency module circuit. The inductor L6 is an inductor installed for testing circuit performance and further impedance matching, and can not be installed in actual use.

[0070] The radio frequency module circuit is the core part of the radio frequency link. In this embodiment, the radio frequency module circuit can adopt two different connection modes for signal transmission, such as outputting the signal to the stamp hole or the PCB antenna.

[0071] The first connection mode of the radio frequency module circuit is suitable for the case of outputting the radio frequency signal to the stamp hole connector. The radio frequency module circuit connects the capacitor C32 and the capacitor C34 in parallel with one end of the inductor L6, and connects the other end of the C34 to the ANTTP pin of the controller communication chip. The ANTTP pin of the controller communication chip is the antenna port of the controller communication chip, through which the radio frequency signal is output. The capacitors C32 and C34 are used for filtering and noise reduction and impedance matching.

[0072] The second radio frequency module circuit connection mode is suitable for the case of directly connecting the PCB antenna. The radio frequency module circuit connects the inductor L6 and the ANTTP pin of the controller communication chip in parallel with one end of the capacitor C35 and the pin 1 of the antenna ANT1, the other end of the capacitor C35 is grounded, and the pin 2 of the antenna ANT1 is grounded. The antenna ANT1 is a PCB antenna and is directly integrated on the circuit board. The capacitor C35 is used for impedance matching, so that the output impedance of the controller communication chip is matched with the input impedance of the antenna, and the signal transmission efficiency is improved. The pin 2 of the antenna ANT1 is grounded, and the ground plane of the antenna is formed.

[0073] In order to realize the control and data interaction of the main chip to the controller communication chip, in the embodiment, the GPIO series pins of the main chip are connected one by one with the corresponding numbered GPIO pins on the controller communication chip. Through the connection of the GPIO pins, the main chip can control the working mode, frequency, power and other parameters of the controller communication chip, and can receive the state information fed back by the controller communication chip.

[0074] The controller communication chip is also connected with an external controller, and communication can be performed between the controller communication chip and the external controller. The user can perform and debug the functions of the wireless transceiver, such as whether the basic functions of sending and receiving can normally run, through the external controller.

[0075] In summary, the wireless transceiver supporting star flash SLE disclosed by the utility model realizes the high-efficiency and stable wireless communication function through the cooperative work of the power supply part, the clock part and the radio frequency link part. Through the measures of transient voltage suppressor, filter capacitor, pi filter circuit and electrostatic protection circuit, the reliability and anti-interference ability of the equipment are improved. At the same time, by providing two different radio frequency module circuit connection modes, the wireless transceiver can be flexibly applied to various different application scenarios.

[0076] In the main chip:

[0077] Burning serial port: GPIO19, GPIO20, used for burning firmware.

[0078] Application serial port: GPIO17, GPIO18, used by the user to debug the network or hardware performance.

[0079] Reset pin: low level effective.

[0080] USB interface: the module reserves a USB2.0 interface.

Claims

1. A wireless transceiver supporting star flash (SLE), characterized by The power supply part and the clock part and the radio frequency link part are connected with the main chip part circuit, VBAT of the power supply part is connected with one end of D3 and VDDnRF, the other end of D3 is grounded, and D3 is a transient voltage suppressor.

2. The wireless transceiver supporting star flash SLE of claim 1, wherein, VDDnRF is connected with VDD1 pin and VDD2 pin and VDDIO1 pin of the main chip respectively; VDDnRF is connected with one end of capacitor C25 and VDD1 pin, and the other end of capacitor C25 is grounded. VDDnRF is connected with one end of capacitor C27 and VDD2 pin, and the other end of capacitor C27 is grounded. VDDnRF is connected with one end of capacitor C38 and VDDIO1 pin, and the other end of capacitor C38 is grounded.

3. The wireless transceiver supporting star flash SLE of claim 1, wherein, The main chip is connected with two clock circuits, one is a low frequency clock circuit, and the other is a high frequency clock circuit. Two ends of the crystal oscillator X4 in the low frequency clock circuit are connected with XL1 pin and XL2 pin of the main chip respectively, and the other end of the crystal oscillator X4 is connected with one end of capacitor C28 and capacitor C29 respectively, and the other ends of the capacitor C28 and capacitor C29 are connected with the ground in parallel.

4. The wireless transceiver supporting star flash SLE according to claim 3, wherein, One end of capacitor C23 in the high frequency clock circuit and XIN32M of the main chip are connected with pin 3 of the crystal oscillator X3 in parallel, pin 4 of the crystal oscillator X3 and the other end of capacitor C23 are connected with the ground in parallel, XOUT32M pin of the main chip and one end of resistor R14 are connected in series, the other end of resistor R14 and one end of capacitor C24 are connected with pin 1 of the crystal oscillator X3 in parallel, and the other end of capacitor C24 and pin 2 of the crystal oscillator X3 are connected with the ground in parallel.

5. The wireless transceiver supporting Starlink SLE according to claim 1 or 2 or 3 or 4, characterized in that, The radio frequency link part includes a pi filter circuit, an electrostatic protection circuit and a radio frequency module circuit, and the pi filter circuit, the electrostatic protection circuit and the radio frequency module circuit are connected in circuit.

6. The wireless transceiver supporting star flash SLE according to claim 5, wherein, One end of capacitor C36 of the pi filter circuit and one end of inductor L5 are connected with RFIO pin of the main chip in parallel, the other end of capacitor C36 is grounded, one end of capacitor C37 of the pi filter circuit and the other end of inductor L5 are connected in parallel, and the other end of capacitor C37 is grounded.

7. The wireless transceiver supporting star flash SLE according to claim 5, wherein, One end of D4 in the electrostatic protection circuit and one end of inductor L6 and one end of the radio frequency module circuit are connected, the other end of D4 is grounded, the other end of inductor L6 is grounded, and D4 is a transient voltage suppressor.

8. The wireless transceiver supporting star flash SLE of claim 5, wherein, The radio frequency module circuit connects capacitor C32 and capacitor C34 and one end of inductor L6 in parallel, and connects the other end of C34 with ANTTP pin of the controller communication chip. Or the radio frequency module circuit connects inductor L6 and ANTTP pin of the controller communication chip and one end of capacitor C35 and pin 1 of antenna ANT1 in parallel, the other end of capacitor C35 is grounded, and pin 2 of antenna ANT1 is grounded.

9. A wireless transceiver supporting Starlink SLE according to claim 1 or 2 or 3 or 4 or 6 or 7 or 8, characterized in that, GPIO series pins of the main chip are connected with corresponding numbered GPIO pins of the controller communication chip one by one.

10. The wireless transceiver supporting star flash SLE of claim 8, wherein, The circuit connection modes of the two kinds of radio frequency modules represent that the signal output is to the stamp hole or the PCB antenna.

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