Image sensor pixel unit, signal processing device and electronic equipment
By integrating multiple parallel photosensitive units within the pixel unit of the image sensor and performing staged charge readout, the problems of low-light imaging and motion blur are solved, achieving high resolution and clear imaging.
Patent Information
- Application Number
- CN202423319745.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2026-02-13
- Estimated Expiration
- 2034-12-31
AI Technical Summary
Existing image sensors perform poorly in low-light conditions and are prone to motion blur when shooting fast-moving objects, making it difficult to achieve both low-light imaging and clear imaging.
Multiple parallel photosensitive units are integrated within the pixel unit of the image sensor, and different charge readout methods are performed on the photosensitive units through different readout stages, including a full-resolution exposure stage and a combined exposure stage, to output a first signal and a second signal respectively, so as to improve low-light imaging performance and suppress motion blur.
While maintaining image resolution, it improves low-light imaging performance and effectively suppresses motion blur, achieving clear imaging of fast-moving objects in low-light scenes.
Smart Images

Figure CN223912536U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to the technical field of sensors, and particularly to an image sensor pixel unit, a signal processing device and an electronic device. BACKGROUND
[0002] Image sensors have been widely applied in the fields of digital cameras, mobile phones, medical treatment, automobiles, unmanned aerial vehicles and machine recognition, and the rapid development of complementary metal oxide semiconductor (CMOS) image sensor technology has made people have higher requirements for the output image quality of image sensors. CMOS image sensors can be divided into two categories according to the signal acquisition mode: one mode is to set the exposure time of the pixel to measure the voltage signal change; the second mode is to set the voltage change of the pixel to measure the exposure time, and this kind of image sensor is called pulse sequence image sensor. In the working process of the pixel, random reset noise will be brought by resetting the pixel each time, and noise and errors will also be introduced in the transmission path of the pixel signal from the pixel to the column-level circuit. CONTENT OF THE INVENTION
[0003] The present disclosure provides an image sensor pixel unit, a signal processing device and an electronic device.
[0004] In one aspect of the present disclosure, an image sensor pixel unit is provided, comprising: k parallel light sensing units, a reset transistor, a floating diffusion capacitor and an auxiliary circuit; wherein k is an integer greater than 1.
[0005] The output end of each light sensing unit is connected to the source end of the reset transistor and one end of the floating diffusion capacitor, respectively.
[0006] The other end of the floating diffusion capacitor is grounded.
[0007] The drain end of the reset transistor is connected to a power supply signal, and the gate end of the reset transistor receives a reset signal.
[0008] The input end of the auxiliary circuit is connected to the source end of the reset transistor and one end of the floating diffusion capacitor, and the output end of the auxiliary circuit serves as the output end of the pixel unit.
[0009] Optionally, the auxiliary circuit comprises a source follower transistor and a readout transistor.
[0010] The gate end of the source follower transistor is connected to the source end of the reset transistor and one end of the floating diffusion capacitor, the drain end is connected to a power supply signal, and the source end is connected to the drain end of the readout transistor.
[0011] The gate terminal of the read transistor receives a read control signal, and the source terminal of the read transistor serves as an output terminal of the auxiliary circuit, and controls output of a first signal or a second signal through the output terminal.
[0012] Optionally, the light sensing unit comprises a photodiode, a first switch transistor, a buffer capacitor and a second switch transistor.
[0013] One end of the photodiode is grounded, and the other end is connected to the source terminal of the first switch transistor.
[0014] The gate terminal of the first switch transistor receives a first switch signal, and the drain terminal is connected to one end of the buffer capacitor and the source terminal of the second switch transistor.
[0015] The other end of the buffer capacitor is grounded.
[0016] The gate terminal of the second switch transistor receives a second switch signal, and the drain terminal serves as an output terminal of the light sensing unit.
[0017] Another aspect of the embodiment of the present disclosure provides a signal processing device, comprising: a pixel array, a row driving control module and a column readout module.
[0018] The pixel array comprises n columns and m rows of image sensor pixel units according to any one of the above embodiments; each of the image sensor pixel units comprises k photodiodes; k, n and m are integers greater than 1.
[0019] The row driving control module is connected to the image sensor pixel units in the pixel array row by row, and provides a plurality of signals for each row of the image sensor pixel units to control reset, exposure and signal output of the image sensor pixel units.
[0020] The column readout module is connected to the image sensor pixel units in the pixel array column by column.
[0021] Optionally, the row driving control module provides a first switch signal, a second switch signal, a reset signal and a read control signal for the pixel array.
[0022] The first switch signal is used to control whether the first switch transistor in all the image sensor pixel units included in the pixel array is turned on or not; the second switch signal is used to control whether the second switch transistor in the image sensor pixel units is turned on or not row by row; the reset signal is used to control whether the reset transistor in the image sensor pixel units is turned on or not row by row; and the read control signal is used to control the image sensor pixel units to output a first signal or a second signal row by row.
[0023] Optionally, the column readout module comprises a cache unit and a signal fusion unit.
[0024] The cache unit is connected with each column of image sensor pixel units in the pixel array, and receives first signals and second signals output by the image sensor pixel units.
[0025] The signal fusion unit is connected with the cache unit, and performs fusion processing on the first signals and the second signals cached in the cache unit to obtain image information.
[0026] In yet another aspect of the embodiments of the present disclosure, an electronic device is provided, comprising a processor and a memory connected with the processor in communication, and further comprising the image sensor pixel unit according to any one of the above embodiments or the signal processing device according to any one of the above embodiments.
[0027] The memory stores computer execution instructions.
[0028] The processor executes the computer execution instructions stored in the memory to control the image sensor pixel unit or the signal processing device.
[0029] Optionally, the electronic device is incorporated into any one of the following: an image data acquisition device, an audio / video player, a navigation device, an entertainment device, a communication device, a roadside traffic facility, a device in a motor vehicle, an industrial detection device, a flight device, a medical device, and a security device.
[0030] Based on the image sensor pixel unit, the signal processing device and the electronic device provided by the above embodiments of the present disclosure, k parallel light sensing units, a reset transistor, a floating diffusion capacitor and an auxiliary circuit are included; wherein k is an integer greater than 1; the output end of each light sensing unit is connected with the source end of the reset transistor and one end of the floating diffusion capacitor, respectively; the other end of the floating diffusion capacitor is grounded; the drain end of the reset transistor is connected with a power signal, and the gate end of the reset transistor receives a reset signal; the input end of the auxiliary circuit is connected with the source end of the reset transistor and one end of the floating diffusion capacitor, and the output end of the auxiliary circuit serves as the output end of the pixel unit. The embodiments of the present disclosure propose to integrate multiple parallel light sensing units in one pixel unit, and to perform different modes of charge readout on the k parallel light sensing units by an output control unit in different readout stages, so as to improve the dark imaging performance while ensuring the resolution of the image.
[0031] The technical solutions of the present disclosure will be described in further detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF DRAWINGS
[0032] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.
[0033] The present disclosure can be more clearly understood and appreciated from the following detailed description, taken in conjunction with the following drawings of which:
[0034] Figure 1 is a structural schematic diagram of an image sensor pixel unit provided by an exemplary embodiment of the present disclosure;
[0035] Figure 2 is a structural schematic diagram of an image sensor pixel unit provided by another exemplary embodiment of the present disclosure;
[0036] Figure 3 is a structural schematic diagram of a light sensing unit in an image sensor pixel unit provided by yet another exemplary embodiment of the present disclosure;
[0037] Figure 4 is a structural schematic diagram of an image sensor pixel unit provided by still another exemplary embodiment of the present disclosure;
[0038] Figure 5 is a structural schematic diagram of a signal processing device provided by an exemplary embodiment of the present disclosure;
[0039] Figure 6 is a timing control schematic diagram of a signal processing device provided by another exemplary embodiment of the present disclosure;
[0040] Figure 7 is an image processing schematic diagram of a signal processing device provided by an exemplary embodiment of the present disclosure;
[0041] Figure 8 is a structural schematic diagram of an electronic device according to an application embodiment of the present disclosure. DETAILED DESCRIPTION
[0042] Various exemplary embodiments of the present disclosure will now be described in detail below with reference to the accompanying drawings. Note that the relative arrangement, numerical expressions, and numerical values of components and steps set forth in these embodiments are not intended to limit the scope of the present disclosure unless otherwise specifically stated.
[0043] Those skilled in the art can understand that the terms "first", "second", and the like in the embodiments of the present disclosure are only used to distinguish different steps, devices, or modules, and neither represent any specific technical meaning nor indicate their inherent logical sequence.
[0044] It should also be understood that in the embodiments of the present disclosure, "a plurality of" can mean two or more, and "at least one" can mean one, two, or more.
[0045] It should also be understood that, for any components, data, or structures mentioned in the embodiments of the present disclosure, one or more can be generally understood unless specifically limited or contrary implications are given in the context.
[0046] In addition, the term "and / or" in the present disclosure is merely a description of the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " in the present disclosure generally represents an "or" relationship between the front and rear associated objects.
[0047] It should also be understood that the description of the embodiments of the present disclosure emphasizes the differences between the embodiments, and the same or similar parts can be referred to each other, and for the sake of brevity, will not be repeated.
[0048] At the same time, it should be understood that, for the convenience of description, the size of each part shown in the drawings is not drawn according to the actual proportion relationship.
[0049] The following description of at least one example embodiment is merely illustrative in nature and is in no way intended to limit the present disclosure, its application, or uses.
[0050] Techniques, methods, and devices known to those of ordinary skill in the relevant art can not be discussed in detail, but should be considered part of the specification where appropriate.
[0051] It should be noted that similar reference numbers and letters in the following drawings represent similar items, and therefore, once an item is defined in one drawing, it need not be discussed further in subsequent drawings.
[0052] The embodiments of the present disclosure can be applied to terminal devices, computer systems, servers, and other electronic devices, which can operate with many other general-purpose or special-purpose computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments, and / or configurations suitable for use with terminal devices, computer systems, servers, and other electronic devices include, but are not limited to, personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network personal computers, small computer systems, mainframe computer systems, and distributed cloud computing technology environments including any of the above systems, and the like.
[0053] Electronic devices such as terminal devices, computer systems, servers, and the like can be described in the general context of computer system-executable instructions, such as program modules, being executed by a computer system. Generally, program modules can include routines, programs, objects, components, logic, data structures, and the like, that perform particular tasks or implement particular abstract data types. Computer systems / server can be practiced in distributed cloud computing environments with other computer systems coupled to a communications network. Program modules can be located in local or remote computer system storage media including memory storage devices.
[0054] In the process of implementing the present disclosure, the inventors found that conventional image sensors reflect the intensity of illumination by recording the cumulative value of photoelectric signals at a fixed time. In a scene with dim light, the amount of light signal that the sensor can collect per unit time is small. Generally, the amount of light signal collected can be increased by prolonging the exposure time, thereby achieving clear imaging of the dim scene. On the other hand, when shooting a high-speed moving object, the longer the exposure time, the longer the displacement of the object moving within the exposure time, which will cause motion blur in imaging. Therefore, to suppress the occurrence of motion blur, shortening the exposure time is an effective means. However, if you want to clearly image a high-speed moving object in a dim light scene, simply adjusting the exposure time cannot meet the performance of both aspects. In view of the above problems, the present disclosure provides an image sensor pixel unit to solve the problems of dark light imaging and clear imaging at the same time.
[0055] Figure 1 FIG. 1 is a structural schematic diagram of an image sensor pixel unit provided by an exemplary embodiment of the present disclosure. As shown in the figure, the image sensor pixel unit (hereinafter referred to as pixel unit) of the embodiment includes k parallel light sensing units 11, a reset transistor 12, a floating diffusion capacitor 13, and an auxiliary circuit 14. Wherein, k is an integer greater than 1. Figure 1
[0056] The output end of each light sensing unit 11 is connected to the source end of the reset transistor 12 and one end of the floating diffusion capacitor 13, respectively.
[0057] In the first exposure stage, each of the k light sensing units 11 converts the received light signal into photo-generated charge and stores it.
[0058] The pixel unit provided by the embodiment mainly goes through two exposure stages in the imaging process. The first exposure stage is referred to as the full resolution exposure stage. In the first exposure stage, all light sensing units receive light signals and convert them into photo-generated charges and store them in the light sensing units. After reaching the preset exposure time, it enters the first readout stage (signal transfer stage).
[0059] In the first readout stage, the floating diffusion capacitor 13 reads out the photo-generated charges stored in each of the k photo-sensing units 11 one by one and outputs k first signals.
[0060] Optionally, in the readout stage after the first exposure stage, the photo-generated charges stored in each of the photo-sensing units are read out one by one, optionally, the passageway between each of the k photo-sensing units and the floating diffusion capacitor is controlled to be turned on by the external signal one by one, when the passageway between one photo-sensing unit and the floating diffusion capacitor is turned on, the photo-generated charges accumulated in the photo-sensing unit are read out by the floating diffusion capacitor, and a first signal is determined based on the photo-generated charges accumulated in each of the photo-sensing units, respectively, k first signals are obtained by k times of readout, after the photo-generated charges accumulated in all the photo-sensing units are read out in the first readout stage, a reset operation is performed on all the photo-sensing units, so as to perform the second exposure subsequently.
[0061] In the second exposure stage, each of the k photo-sensing units 11 converts the received light signal into photo-generated charges and stores the photo-generated charges.
[0062] In the second exposure stage in the embodiment, the second exposure of the pixel unit in one exposure period, the second exposure stage is recorded as a merging exposure stage. Since the reset operation is performed after the first readout stage, the operation of the k photo-sensing units is the same as that in the first exposure stage, and the photo-generated charges converted from the received light signal are stored in all the photo-sensing units in the second exposure stage.
[0063] In the second readout stage, the output control unit 12 reads out all the photo-generated charges stored in the k photo-sensing units 11 at one time and outputs a second signal.
[0064] Optionally, in the readout stage after the second exposure stage, in order to improve the performance of dark light imaging, the output control unit reads out the photo-generated charges stored in all the photo-sensing units at one time, optionally, the passageway between the k photo-sensing units and the output control unit is controlled to be turned on at the same time by the external signal, the photo-generated charges accumulated in the k photo-sensing units are read out, the second signal is determined based on all the photo-generated charges and output, the second signal accumulates the photo-generated charges accumulated in all the photo-sensing units, that is, the signal strength of the second signal is greater than that of the first signal, and therefore, the dark light imaging is more favorable.
[0065] In the embodiment, the first exposure stage and the second exposure stage correspond to exposure time lengths that are controlled under a boundary condition of no motion blur, for example, the exposure time lengths are less than or equal to a preset boundary length (the preset boundary length represents that when the exposure time length is the preset boundary length, the image obtained by the pixel unit exposure has no motion blur). Optionally, the exposure time lengths corresponding to the first exposure stage and the second exposure stage are consistent.
[0066] The other end of the floating diffusion capacitor 13 is grounded.
[0067] The floating diffusion capacitor 13 is used to receive and store the photo-generated charges stored in at least one of the k photoelectric units 11 when the k photoelectric units 11 are turned on with the floating diffusion capacitor 13.
[0068] In the embodiment, the floating diffusion capacitor is used to store the photo-generated charges transmitted from at least one of the photoelectric units, as shown in FIG. 1. Figure 1 As shown in FIG. 1, one end of the floating diffusion capacitor is grounded, and the other end is connected with the drain end of the reset transistor, the k photoelectric units, and the gate end of the source follower transistor.
[0069] The drain end of the reset transistor 12 is connected with a power supply signal, and the gate end of the reset transistor 12 receives a reset signal. The reset transistor is used to be turned on or turned off according to the control of the reset signal RST, and the reset transistor is turned on to perform a reset operation on the k photoelectric diodes or the floating diffusion capacitor.
[0070] In the embodiment, only one reset transistor is arranged in the circuit, and the reset operation of the k photoelectric diodes and the floating diffusion capacitor can be controlled through the reset transistor. For example, when the k second switch transistors and the k first switch transistors in the k photoelectric units are all turned on, the reset operation of the k photoelectric diodes is realized through the reset transistor; and when the k second switch transistors in the k photoelectric units are all not turned on, the reset operation of the floating diffusion capacitor is realized through the reset transistor. As shown in FIG. 1, Figure 1 As shown in FIG. 1, the drain end of the reset transistor 12 is connected with a power supply signal Vdd, the source end is connected with the floating diffusion capacitor and the k photoelectric units, and the gate end receives a reset signal RST. For example, in response to the reset signal RST being at a high level, the reset transistor performs a reset operation on the k buffer capacitors or the floating diffusion capacitor.
[0071] The input end of the auxiliary circuit 14 is connected with the source end of the reset transistor 12 and one end of the floating diffusion capacitor 13, and the output end of the auxiliary circuit 14 serves as the output end of the pixel unit.
[0072] The image sensor pixel unit provided by the above-mentioned embodiments of the present disclosure integrates multiple parallel photosensitive units in one pixel unit, and outputs the control unit to perform different modes of charge reading on the k parallel photosensitive units in different reading stages, thereby improving the dark imaging performance while ensuring the resolution of the image.
[0073] Figure 2 FIG. 1 is a structural schematic diagram of an image sensor pixel unit provided by another exemplary embodiment of the present disclosure. As shown in FIG. 1, the auxiliary circuit 14 includes a source follower transistor 141 and a reading transistor 142. Figure 2
[0074] The gate end of the source follower transistor 141 is connected with the source end of the reset transistor 12 and one end of the floating diffusion capacitor 13, the drain end is connected with a power supply signal, and the source end is connected with the drain end of the reading transistor. The source follower transistor is used to generate a corresponding first signal or second signal according to the change amount of the photo-generated charge stored in the floating diffusion capacitor.
[0075] The gate end of the reading transistor 142 receives a reading control signal, and the source end of the reading transistor 142 serves as the output end of the auxiliary circuit 14, and controls the output of the first signal or the second signal through the output end.
[0076] The reading transistor 142 is used to be turned on or turned off according to the control of the reading control signal RS, and outputs the first signal or the second signal in response to the turning on of the reading transistor 142. The drain end of the reading transistor is connected with the source end of the source follower transistor, the source end serves as the output end of the pixel unit, and the gate end receives the reading control signal RS; in response to the high level of the reading control signal RS, the reading transistor is turned on, and k first signals or second signals are output through the output end.
[0077] Optionally, in the first reading stage, the source follower transistor reads the photo-generated charge accumulated by one photosensitive unit in the floating diffusion capacitor each time under the control of the second switch signal, generates a corresponding first signal according to the change amount of the photo-generated charge in the floating diffusion capacitor (from the reset state to the state of accumulating the photo-generated charge of one photosensitive unit) after storing the photo-generated charge of one photosensitive unit in the floating diffusion capacitor each time, and generates k first signals after k times of reading. In the second reading stage, the floating diffusion capacitor reads all the photo-generated charges accumulated by k photosensitive units at one time, and the source follower transistor generates a corresponding second signal according to the change amount of the photo-generated charge in the floating diffusion capacitor. Figure 2 As shown, the drain terminal of the source follower transistor is connected to the power supply signal, the source terminal is connected to the drain terminal of the readout transistor, and the gate terminal is connected to the floating diffusion capacitor.
[0078] Figure 3 is a structural schematic diagram of a light sensing unit in a pixel unit of an image sensor according to another exemplary embodiment of the present disclosure. As shown in Figure 2 The light sensing unit 11 includes a photodiode 111, a first switch transistor 112, a buffer capacitor 113, and a second switch transistor 114.
[0079] One end of the photodiode 111 is grounded, and the other end is connected to the source terminal of the first switch transistor 112. The photodiode 111 is used to receive a light signal to generate photo-generated charges in a first exposure stage and a second exposure stage.
[0080] Optionally, the photodiode can be a pinned photodiode or other component that can realize photoelectric conversion; as shown in Figure 3 One end of the photodiode is grounded, and the other end is connected to the source terminal of the first switch transistor 112.
[0081] The gate terminal of the first switch transistor 112 receives a first switch signal GS, and the drain terminal is connected to one end of the buffer capacitor 113 and the source terminal of the second switch transistor 114. The first switch transistor 112 connects the photodiode 111 and the buffer capacitor 113, and when the first switch transistor 112 is turned on, the photo-generated charges accumulated in the photodiode 111 are transferred to the buffer capacitor 113 for storage.
[0082] The other end of the buffer capacitor 113 is grounded.
[0083] Optionally, the source terminal of the first switch transistor 112 is connected to the photodiode, the drain terminal is connected to the buffer capacitor 113, and the gate terminal receives the first switch signal GS to control the conduction or disconnection according to the first switch signal GS. For example, in response to the first switch signal GS being high, the first switch transistor is turned on. When the first switch transistor 112 is turned on, the photo-generated charges accumulated in the photodiode are transmitted to the buffer capacitor 113 through the path formed by the conduction of the first switch transistor, and the photo-generated charges accumulated in the photodiode are stored by the buffer capacitor.
[0084] The second switch transistor 114 connects the buffer capacitor 113 and the output control unit 12, and in response to the second switch transistor 114 being turned on, the photo-generated charges stored in the buffer capacitor 113 are transmitted to the output control unit 12.
[0085] Optionally, the source terminal of the second switch transistor is connected with the buffer capacitor, the drain terminal serves as the output terminal of the photosensitive unit, and the gate terminal receives a second switch signal TX (different photosensitive units can correspond to different numbers, for example, TX1, TX2, TXk, etc., to realize the on-off control of different second switch transistors). The second switch transistor is turned on or turned off according to the control of the second switch signal. For example, in response to the second switch signal being at a high level, the second switch transistor is turned on. In this embodiment, when the second switch transistor is turned on, the photo-generated charges stored in the corresponding buffer capacitor are transmitted to the output control unit through the channel formed by the turned-on second switch transistor, so as to realize the transfer of the photo-generated charges converted and accumulated in the photosensitive unit. Optionally, in different readout stages, the on-off control of the second switch transistor can be realized through different timing of the second switch signal, so as to realize different charge transfer modes of the photosensitive units; for example, in the first readout stage, the second switch transistors in the k photosensitive units are sequentially given the second switch signal at a high level, so as to realize the readout of the photo-generated charges accumulated in the k photosensitive units in sequence; and in the second readout stage, the second switch transistors in the k photosensitive units are simultaneously given the second switch signal at a high level, so as to realize the readout of the photo-generated charges accumulated in all the photosensitive units.
[0086] Optionally, the first signal and the second signal can be voltage signals, pulse signals, digital signals, etc.
[0087] Optionally, the reset transistor 12 is used to be turned on or turned off according to the control of a reset signal RST. In response to the reset transistor 12, the k first switch transistors and the k second switch transistors being turned on at the same time, the reset operation is performed on the k photodiodes; and in response to the reset transistor being turned on, the k first switch transistors and the k second switch transistors being not turned on, the reset operation is performed on the floating diffusion capacitor.
[0088] The floating diffusion capacitor receives and stores the photo-generated charges stored in the buffer capacitor corresponding to the turned-on second switch transistor in the case that the second switch transistor (one or more) is turned on, and controls the source follower transistor to generate a corresponding signal through the stored photo-generated charges in the case that all the second switch transistors are not turned on.
[0089] Figure 4 is a structural schematic diagram of an image sensor pixel unit provided by another exemplary embodiment of the present disclosure. As shown in the figure, Figure 4 the present embodiment includes four photosensitive units 11 (the number of photosensitive units in the present embodiment is only exemplary description, and is not used to limit the number of photosensitive units included in the pixel unit) and one output control unit 12.
[0090] Each photosensitive unit 11 has the same structure, including a photodiode 111, a first switch transistor 112, a buffer capacitor 113 and a second switch transistor 114.
[0091] One end of the photodiode is grounded, and the other end is connected to the source end of the first switch transistor 112. The source end of the first switch transistor 112 is connected to the photodiode, the drain end is connected to the buffer capacitor 113, and the gate end receives the first switch signal GS. One end of the buffer capacitor is grounded, and the other end is connected to the drain end of the first switch transistor and the source end of the second switch transistor. The source end of the second switch transistor is connected to the buffer capacitor, the drain end is connected to the output control unit, and the gate end receives the second switch signal TX. In this embodiment, the four second switch transistors correspond to four second switch signals TX1, TX2, TX3, and TX4, respectively.
[0092] The output control unit 12 includes a reset transistor 121, a floating diffusion capacitor 122, a source follower transistor 141, and a readout transistor 142.
[0093] In this embodiment, the drain end of the reset transistor 121 is connected to the power supply signal Vdd, the source end is connected to the floating diffusion capacitor and the k light sensing units, and the gate end receives the reset signal RST. One end of the floating diffusion capacitor is grounded, and the other end is connected to the drain end of the reset transistor, the k light sensing units, and the gate end of the source follower transistor. The drain end of the source follower transistor is connected to the power supply signal, the source end is connected to the drain end of the readout transistor, and the gate end is connected to the floating diffusion capacitor. The drain end of the readout transistor is connected to the source end of the source follower transistor, the source end is the output end of the pixel unit, and the gate end receives the readout control signal RS.
[0094] The pixel unit provided in this embodiment can be prepared in the middle position of the chip, and the four light sensing units are arranged around the output control unit. This structure can compress the space occupied by the pixel unit in the chip, and is more convenient for the integration of the sensor circuit structure.
[0095] Figure 5 is a structural schematic diagram of the signal processing device provided by an example embodiment of the present disclosure. As shown in FIG. 5, the signal processing device provided by the present embodiment includes a pixel array 51 composed of image sensor pixel units, a row driving control module 52, and a column readout module 53.
[0096] The pixel array 51 includes n columns and m rows of image sensor pixel units provided by any of the above embodiments; each image sensor pixel unit includes k photodiodes.
[0097] Wherein, k, n, m are integers greater than 1 respectively. The pixel array 51 is configured to output k×n×m first signals to the column readout module 53 in a first readout stage and n×m second signals to the column readout module 53 in a second readout stage according to the control of the row drive control module 52; each image sensor pixel unit includes k photodiodes. Wherein, k, n, m are integers greater than 1 respectively.
[0098] The row drive control module 52 is connected with the image sensor pixel units in the pixel array 51 row by row, and is configured to provide a plurality of signals for the image sensor pixel units in the pixel array 51 row by row to control the reset, exposure and signal output of the image sensor pixel units.
[0099] Optionally, the row drive control module 52 provides the pixel array 51 with a first switch signal GS, a second switch signal TX, a reset signal RST and a readout control signal RS. The second switch signal TX, the reset signal RST and the readout control signal RS control the image sensor pixel units in the pixel array row by row, and the first switch signal GS corresponds to the entire pixel array.
[0100] The first switch signal GS controls whether the first switch transistor in all the image sensor pixel units included in the pixel array is turned on or not. The second switch signal TX controls whether the second switch transistor in the image sensor pixel units is turned on or not row by row; the reset signal RST controls whether the reset transistor in the image sensor pixel units is turned on or not row by row; the readout control signal RS controls whether the image sensor pixel units output the first signal or the second signal row by row.
[0101] The column readout module 53 is connected with the image sensor pixel units in the pixel array 51 column by column, and the column readout module 53 is configured to receive k×n×m first signals and n×m second signals, and determine image information based on the k×n×m first signals and the n×m second signals.
[0102] In this embodiment, the exposure stage and the readout stage of the pixel array are controlled by the row drive control module, so that each row of the pixel array sequentially performs the first exposure stage, the first readout stage, the second exposure stage, and the second readout stage. Each row of pixel units outputs k x m first signals in the first readout stage and m second signals in the second readout stage. After n rows of readout are completed, the entire pixel array outputs k x n x m first signals and n x m second signals. The column readout module determines image information based on the k x n x m first signals and the n x m second signals. The image information integrates the signals output in the first readout stage and the second readout stage, thereby suppressing motion blur while ensuring dark light imaging performance. Alternatively, the main function of the column readout module is to convert the first signals and the second signals into digital signals and output them to the chip interface, for example, through a parallel-to-serial conversion circuit to output them to the chip interface.
[0103] In some optional embodiments, a low dropout regulator (LDO) and a charge pump can also be deployed around the row drive control module in the signal processing device. The main function of the low dropout regulator is to provide a stable low-noise power signal for the analog circuit module such as the photosensitive unit array. The main function of the charge pump is to provide a higher voltage signal than the power voltage and a lower negative voltage signal than the ground. The high voltage signal is mainly used to improve the transfer efficiency of photo-generated charges in the photosensitive unit, and the negative voltage signal is mainly used to suppress the leakage current in the photosensitive unit. A reference voltage and bias voltage generation module and a slope voltage generation module are deployed around the column readout module. The reference voltage generation module mainly uses the principle of bandgap reference to generate several temperature-independent voltage signals and current signals for the bias voltage generation module and the slope voltage generation module. The bias voltage generation module mainly uses the current signal of the reference to generate a column readout bias voltage for the column readout module, so as to ensure that the column readout signal is obtained under a fixed current bias. The slope voltage generation module is mainly used to generate a signal voltage that increases linearly with a fixed slope over a fixed period. This signal voltage is required for single-slope ADC analog-to-digital conversion.
[0104] In some optional embodiments, the row drive control module 52 controls each row of image sensor pixel units in the pixel array 51 to read out k x n first signals through k times of readout in the first readout stage through the second switch signal TX.
[0105] In some optional embodiments, the row drive control module 52 controls each row of image sensor pixel units in the pixel array 51 to read out k x n first signals through k times of readout in the first readout stage through the second switch signal TX.
[0106] In the embodiment, the second switch signal TX turns on the second switch transistor, and makes the corresponding buffer capacitor and the floating diffusion capacitor be connected, and then the photo-generated charge in the corresponding at least one buffer capacitor is transferred to the floating diffusion capacitor.
[0107] Optionally, the row driving control module 52 resets the floating diffusion capacitor in the image sensor pixel unit by the reset signal RST before reading out the n first signals each time when reading out the k x n first signals in the first readout stage.
[0108] The reset of the floating diffusion capacitor makes the charge stored in the floating diffusion capacitor be emptied, so that the floating diffusion capacitor generates more accurate first signals when receiving the photo-generated charge transmitted by the next light sensing unit.
[0109] The row driving control module 52 controls each row of image sensor pixel units in the pixel array 51 to read out n second signals in the second readout stage by the second switch signal TX.
[0110] The second signal corresponds to k light sensing units in the image sensor pixel unit.
[0111] Optionally, the row driving control module 52 resets the floating diffusion capacitor in the image sensor pixel unit by the reset signal before reading out the n second signals in the second readout stage.
[0112] The reset of the floating diffusion capacitor before reading out the second signal makes the floating diffusion capacitor be emptied before receiving the photoelectric charge generated by the corresponding k light sensing units, which improves the accuracy of the obtained second signal.
[0113] In the embodiment, the row driving control module resets the floating diffusion capacitor in the first readout stage and the second readout stage, so that the photo-generated charge accumulated and stored in the floating diffusion capacitor is only single reading, which improves the accuracy of the obtained signal.
[0114] Figure 6 is a timing control schematic diagram of the signal processing device provided by another exemplary embodiment of the present disclosure. As shown in Figure 6 The timing schematic diagram of the main signals corresponding to each stage of the signal processing device in the embodiment is shown (in the embodiment, k is taken as 4 as an example, that is, the image sensor pixel unit in the embodiment includes 4 light sensing units, and the corresponding 4 photodiodes can be represented as PD1, PD2, PD3 and PD4; and the corresponding second switch signals are TX1, TX2, TX3 and TX4, respectively). The signal processing device mainly includes six stages when working:
[0115] Firstly, the first reset stage is entered: in the first reset stage, all reset signals RST are high level, the second switch signal TX is high level, and the first switch signal GS is also high level. At this time, all reset transistors, first switch transistors and second switch transistors are all turned on, and all photodiodes (PDs) in all pixel units are connected to the power supply signal Vdd, so as to realize the simultaneous reset of all PDs.
[0116] First exposure stage: after the reset is completed, all reset signals RST, all second switch signals TX and the first switch signal GS are simultaneously set to low level. At this time, all PDs start exposure at the same time, and the first exposure stage is recorded as the full-resolution exposure stage. In the first exposure stage, the photodiode in each light sensing unit receives a light signal and converts it into photo-generated charges and accumulates. After reaching a preset exposure time, the first signal transfer stage is entered.
[0117] First signal transfer stage: the first switch signal GS is set to high level, and the first switch transistor is fully turned on. The photo-generated charges collected by each photodiode in the full-resolution exposure stage are all transferred to the corresponding buffer capacitor for storage. After the signal transfer stage is completed, the first readout stage (row-by-row and PD-by-PD readout stage) is entered.
[0118] The first read stage: firstly, the first signal of the first row is read, the read control signal RS[1] of the first row is set to high level, then the reset signal RST[1] of the first row is set to high level to reset the floating diffusion capacitor in the first row pixel unit, at this time, the reset voltage on the floating diffusion capacitor can be read on the output end, then the reset signal RST[1] is set to low level, the second switch signal TX1[1] is set to high level, the photo-generated charge collected by PD1 in the first row pixel unit is transferred from the corresponding buffer capacitor to the floating diffusion capacitor, at this time, the signal voltage of PD1 can be read on the output end, and the first signal obtained by the first photosensitive unit is obtained. In the column read module, the voltage difference between the reset voltage and the signal voltage (the first signal) of each column pixel unit is converted into a digital signal, and ADC[1] represents the digital signal output result of the first column, and r1c1pd1 represents the converted and output digital signal corresponding to the first PD in the first row and the first column. After the signal output of the first row PD1 is completed, the above process is repeated, and the reset voltage on the floating diffusion capacitor and the signal voltage of the first row PD2, the reset voltage on the floating diffusion capacitor and the signal voltage of the first row PD3, and the reset voltage on the floating diffusion capacitor and the signal voltage of the first row PD4 are sequentially output; r1c1pd1, r2c2pd2, r3c3pd3 and r4c4pd4 represent the converted and output digital signal corresponding to the first pixel unit in the first row and the first column. After the four PDs are read, the next row of pixel units is read, and the signal voltages of the four PDs are also sequentially read. The signals of all n rows are read, and a total of 4×n×m first signals are output, that is, a full-resolution first image original signal with a resolution of 4×n×m is output. After the first frame is read, the second reset stage is entered.
[0119] The second reset stage: the logic of the control signal is the same as that in the first reset stage, and all PDs are reset at the same time. After the reset is completed, the second exposure stage (the combined exposure stage) is entered.
[0120] The second exposure stage: the logic of the control signal is the same as that in the first exposure stage, and the photo-generated charge is collected by each PD in the exposure stage. After the preset exposure time is reached, the second signal transfer stage is entered.
[0121] The second signal transfer stage: the first switch signal GS is set to high level, and all global exposure control transistors are turned on, and the photo-generated charge collected by each PD in the full-resolution exposure stage is transferred to the corresponding buffer capacitor for storage. After the signal transfer stage is completed, the second read stage is entered.
[0122] The second reading stage: firstly, the reading of the second signal of the first row is performed, the readout control signal RS[1] of the first row of pixel units is set to high level, then the reset signal RST[1] of the first row is set to high level to reset the floating diffusion capacitor in the first row of pixel units, at this time, the reset voltage on the floating diffusion capacitor can be read on the output terminal, then the reset signal RST[1] is set to low level, and the four second switch signals TX1[1], TX2[1], TX3[1] and TX4[1] corresponding to the pixel units are simultaneously set to high level, the photo-generated charges collected by the four PDs in each pixel unit of the first row are simultaneously transferred to the floating diffusion capacitor in each pixel unit, at this time, the signal voltage added by the four PDs in each pixel unit is read on the output terminal. In the column readout module, the voltage difference between the reset voltage and the signal voltage (the second signal) of each column is converted into a digital signal, and r1c1bin represents the digital signal corresponding to the converted output of the signal of the four PDs combined and accumulated in the first row and the first column of pixels. All n rows of signals are read in this way, and n×m second signals are output when all n rows of signals are read, that is, a second image original signal with a resolution of n×m is obtained. Compared with the first image original signal with full resolution, the signal obtained by this exposure is stronger and more conducive to dark light imaging. After the two exposure signals are read out, the sensor completes a complete exposure period, and the sensor works in a cycle according to the exposure period, so that continuous imaging is realized.
[0123] In some optional embodiments, the column readout module 53 includes a buffer unit and a signal fusion unit.
[0124] The buffer unit is connected with each column of image sensor pixel units in the pixel array, receives the first signal and the second signal output by the image sensor pixel units, and is used for receiving and storing k×n×m first signals in the first reading stage and receiving and storing n×m second signals in the second reading stage.
[0125] The signal fusion unit is connected with the buffer unit, performs fusion processing on the first signal and the second signal buffered in the buffer unit, and obtains image information. For example, the signal fusion unit performs fusion processing on the k×n×m first signals and the n×m second signals stored in the buffer unit, and obtains image information.
[0126] In this embodiment, after two frames of image signals (including the signals obtained after the pixel array is subjected to two reading stages, for example, the first image original signal and the second image original signal in the above-mentioned embodiments) are obtained, the two frames of images need to be further fused into a full-resolution image without motion blur and taking into account the dark light performance through image processing. Figure 6 The image processing schematic diagram of the signal processing device provided by an example embodiment of the present disclosure is shown in FIG. 8. As shown in FIG. 8, the image processing device includes a buffer unit 81, a signal fusion unit 82 and a motion blur correction unit 83. Figure 7 The image processing schematic diagram of the signal processing device provided by an example embodiment of the present disclosure is shown in FIG. 8. As shown in FIG. 8, the image processing device includes a buffer unit 81, a signal fusion unit 82 and a motion blur correction unit 83.Figure 7 As shown in the shooting scene, there is a circular target moving from left to right. In the shooting process, based on the first exposure stage and the first readout stage, a full-resolution image (determined based on k x n x m first signals) is obtained, in which the texture of most areas is clearly visible, and due to the weak light of the circular target, the internal texture details of the target cannot be clearly imaged, and can only be presented as a black patch. In the subsequent second exposure stage and second readout stage, if the exposure time of the two exposure stages (the first exposure stage and the second exposure stage) is the same, the equivalent pixel area is increased by k times (k photoelectric conversion light-generated charges are converted by one readout), and the signal strength is also increased by k times, and the collection performance of the weak light signal is improved. At this time, the merged exposure image is as shown in Figure 7 As shown, it can be seen that the internal details of the circular target are clearly visible, but the brightness of the rest of the background is too high, and the background details are not obvious. The target of the embodiment of the present disclosure is to realize clear imaging of both the background and the target, and therefore the circular target in the merged exposure image is fused into the full-resolution image. In the process of image processing, the object to be fused can be located by detecting the contour and the brightness of the signal. For example, in the background, there are rarely clear contours, but the appearance of the target will bring very clear contours, and then it is detected whether the signal inside the target contour in the full-resolution image is clear. If it is detected that the signal value inside the target contour is very low, that is, a black patch in the image, the internal signal of the target in the merged exposure image is subjected to a certain interpolation stretching processing (interpolation refers to calculating the value between two or more values by using a certain function, for example, the arithmetic mean (x+y) / 2 is the linear interpolation of x and y, and interpolation is a common technical means for performing image enlargement operation, and linear interpolation can be selected) to expand the size of the target, and replace the target information in the full-resolution image. Finally, the fusion image in which the scene and the target are clearly imaged as shown in Figure 7
[0127] The embodiment of the present disclosure fuses the two exposure images into a full-resolution image through an image fusion algorithm, so as to suppress the motion blur while ensuring the dark light imaging performance.
[0128] In addition, the embodiment of the present disclosure also provides an electronic device, comprising:
[0129] The processor, and the memory connected with the processor in communication, further comprising the image sensor pixel unit or the signal processing device of any one of the above embodiments;
[0130] The memory stores computer execution instructions;
[0131] The processor executes the computer execution instructions stored in the memory to control the image sensor pixel unit or the signal processing device.
[0132] The electronic device provided by the present disclosure can be incorporated into any of the following: an image data acquisition device, an audio / video player, a navigation device, an entertainment device, a communication device, a roadside traffic facility, a device in a motor vehicle, an industrial detection device, a flight device, a medical device, a security device, etc.
[0133] The electronic device provided by the present disclosure can be applied to any of the following: an image data acquisition device, an audio / video player, a navigation device, an entertainment device, a communication device, a roadside traffic facility, a device in a motor vehicle, an industrial detection device, a flight device, a medical device, a security device, etc.
[0134] Figure 8 A structural schematic diagram of an application embodiment of the electronic device of the present disclosure is shown in FIG. 1. Hereinafter, an electronic device according to an embodiment of the present disclosure will be described with reference to FIG. 1. Figure 8 The electronic device can be any one or both of a first device and a second device, or a single device independent of them, which can communicate with the first device and the second device to receive input signals acquired therefrom.
[0135] As shown in FIG. 1, the electronic device includes one or more processors and a memory. Figure 8
[0136] The processor can be a central processing unit (CPU) or other form of processing unit having data processing and / or instruction execution capabilities, and can control other components in the electronic device to perform desired functions.
[0137] The memory can store one or more computer program products, and can include various forms of computer readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may, for example, include random access memory (RAM), cache memory, and / or the like. The non-volatile memory may, for example, include read-only memory (ROM), hard disk, flash memory, and / or the like. One or more computer program products can be stored on the computer readable storage medium, and the processor can execute the computer program products to implement the image sensor pixel unit or signal processing apparatus of various embodiments of the present disclosure described above and / or other desired functions.
[0138] In one example, the electronic device can further include an input device and an output device, which are interconnected through a bus system and / or other form of connection mechanism (not shown).
[0139] In addition, the input device can further include, for example, a keyboard, a mouse, and / or the like.
[0140] The output device can output various information including the determined distance information, direction information, etc. to the outside. The output device can include, for example, a display, a speaker, a printer, a communication network and a remote output device connected thereto, etc.
[0141] Of course, in order to simplify, Figure 8 Only some of the components of the electronic device related to the present disclosure are shown in the middle, and components such as buses, input / output interfaces, etc. are omitted. In addition, the electronic device can further include any other appropriate components according to the specific application.
[0142] In addition to the above-mentioned method and device, the embodiments of the present disclosure can also be a computer program product including computer program instructions, which, when executed by a processor, cause the processor to perform the image sensor pixel unit or signal processing apparatus according to various embodiments of the present disclosure described in the above part of the specification.
[0143] The computer program product can be written in any combination of one or more programming languages including an object-oriented programming language such as Java, C++, etc., and a conventional procedural programming language such as "C" language or similar programming languages. The program code can be executed entirely on a user computing device, partially on a user device, as an independent software package, partially on a user computing device and partially on a remote computing device, or entirely on a remote computing device or server.
[0144] In addition, the embodiments of the present disclosure can also be a computer readable storage medium having stored thereon computer program instructions, which, when executed by a processor, cause the processor to perform the image sensor pixel unit or signal processing apparatus according to various embodiments of the present disclosure described in the above part of the specification.
[0145] The computer readable storage medium can employ any combination of one or more readable media. The readable medium can be a readable signal medium or a readable storage medium. The readable storage medium may, for example, include but is not limited to an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or apparatus, or any combination of the above. More specific examples (non-exhaustive list) of readable storage media include an electrical connection having one or more wires, a portable disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any appropriate combination of the above.
[0146] The above describes the basic principles of the present disclosure in conjunction with specific embodiments, but it should be noted that the advantages, benefits, effects and the like mentioned in the present disclosure are merely examples and are not limiting, and these advantages, benefits, effects and the like cannot be considered as necessary for each embodiment of the present disclosure. In addition, the above specific details are only for the purpose of example and understanding, and are not limiting, and the above details do not limit the present disclosure to be necessarily implemented with the above specific details.
[0147] Each embodiment in the specification is described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between each embodiment can be mutually referred to. For system embodiments, since they basically correspond to method embodiments, the description is relatively simple, and the relevant parts can be referred to the part of the method embodiment.
[0148] The block diagrams of the devices, apparatuses, equipment, systems involved in the present disclosure are only exemplary examples and are not intended to require or imply the connection, arrangement, configuration shown in the block diagram. As those skilled in the art will recognize, these devices, apparatuses, equipment, systems can be connected, arranged, configured in any manner. Words such as "include", "contain", "have" and the like are open-ended words, which mean "including but not limited to", and can be used interchangeably. The words "or" and "and" used herein mean the word "and / or", and can be used interchangeably unless the context clearly indicates otherwise. The word "such as" used herein means the phrase "such as but not limited to", and can be used interchangeably.
[0149] The methods and devices of the present disclosure can be implemented in many ways. For example, the methods and devices of the present disclosure can be implemented by software, hardware, firmware, or any combination of software, hardware, firmware. The above order of steps for the method is only for illustration, and the steps of the method of the present disclosure are not limited to the above specific description, unless otherwise specifically described. In addition, in some embodiments, the present disclosure can also be implemented as programs recorded in recording media, which include machine-readable instructions for implementing the method according to the present disclosure. Therefore, the present disclosure also covers the recording media storing the programs for executing the method according to the present disclosure.
[0150] It should also be noted that in the devices, equipment and methods of the present disclosure, each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be considered as equivalent solutions of the present disclosure.
[0151] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other aspects without departing from the scope of the disclosure. Thus, the present disclosure is not intended to be limited to the aspects shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
[0152] The above description has been presented to enable any person skilled in the art to make or use the disclosure. Furthermore, the purpose of the above description is not intended to limit the embodiments of the present disclosure to the form disclosed herein. Although various example aspects and embodiments have been discussed above, those of ordinary skill in the art will appreciate a variety of modifications, alternatives, permutations, additions, and sub-combinations of the described aspects and embodiments.
Claims
1. A pixel unit for an image sensor, characterized in that, The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit.
2. The image sensor pixel cell of claim 1, wherein, The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit.
3. The image sensor pixel cell of claim 1 or 2, wherein, The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit.
4. A signal processing device, characterized by The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit.
5. The apparatus of claim 4, wherein, The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit.
6. The apparatus of any of claims 4-5, wherein, The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. The application relates to an image sensor pixel unit. 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7. An electronic device, comprising: The image sensor pixel unit or the signal processing device is connected with a processor and a memory in communication with the processor, and the image sensor pixel unit or the signal processing device is any one of claims 1-3 or any one of claims 4-6; The memory stores computer execution instructions; The processor executes the computer execution instructions stored in the memory to control the image sensor pixel unit or the signal processing device.
8. The apparatus of claim 7, wherein, The electronic device is included in any one of the following: an image data acquisition device, an audio / video player, a navigation device, an entertainment device, a communication device, a roadside traffic facility, a device in a motor vehicle, an industrial detection device, a flight device, a medical device, and a security device.