Pixel sensor array and image sensor device

Abstract

A pixel sensor array and an image sensor device are provided, by including an autofocus pixel sensor and an imaging pixel sensor in the pixel sensor array, autofocus functionality is integrated into the pixel sensor array of the image sensor device. The metal grid structure is arranged around the autofocus pixel sensor and the imaging pixel sensor in the pixel sensor array. A grid extension of the metal grid structure extends laterally outward over at least a portion of a photodiode of the autofocus pixel sensor such that the portion of the photodiode is shielded from incident light. The autofocus pixel sensors are arranged in pairs in the pixel sensor array such that opposite sides of the photodiodes are shielded by the mesh extensions. This results in a phase difference between incident light sensed by a pair of autofocus pixel sensors, which can be used to determine the focus of the array of pixel sensors.

Description

TECHNICAL FIELD

[0001] Some embodiments of the present disclosure relate to a pixel sensor array and an image sensor device. BACKGROUND

[0002] A complementary metal oxide semiconductor (CMOS) image sensor can include a plurality of pixel sensors. A pixel sensor of a CMOS image sensor can include a transfer gate transistor that can include a photodiode to convert photons of incident light into a photocurrent of electrons and a transfer gate to control a flow of the photocurrent between the photodiode and a drain region. The drain region can be to receive the photocurrent such that the photocurrent can be measured and / or transferred to other areas of the CMOS image sensor. SUMMARY

[0003] Some embodiments of the present disclosure provide a pixel sensor array. The pixel sensor array includes a plurality of pixel sensors configured in a grid. The pixel sensor array includes a metal grid structure over a plurality of photodiodes of the pixel sensors, wherein the metal grid structure surrounds the photodiodes of the pixel sensors, and wherein the metal grid structure includes a plurality of grid extensions that extend laterally from the metal grid structure and over at least a portion of the photodiodes of a subset of the pixel sensors.

[0004] Some embodiments of the present disclosure provide an image sensor device. The image sensor device includes a plurality of pixel sensors configured in a pixel sensor array. The image sensor device includes a metal grid structure over a plurality of photodiodes of the pixel sensors, wherein the metal grid structure surrounds the photodiodes of the pixel sensors, and wherein the metal grid structure includes a first grid extension and a second grid extension. The first grid extension extends laterally from the metal grid structure over at least a portion of a first photodiode of a first pixel sensor of the pixel sensors. The second grid extension extends laterally from the metal grid over at least a portion of a second photodiode of a second pixel sensor of the pixel sensors. A first extension distance that the first grid extension extends laterally over the at least a portion of the first photodiode is different than a second extension distance that the second grid extension extends laterally over the at least a portion of the second photodiode.

[0005] Some embodiments of the disclosure provide a pixel sensor array. The pixel sensor array includes a plurality of pixel sensors configured in a grid. The pixel sensor array includes a metal grid structure over a plurality of photodiodes of the pixel sensors, wherein the metal grid structure surrounds the photodiodes of the pixel sensors, and wherein the metal grid structure includes a plurality of grid extensions extending laterally from the metal grid structure and over at least a portion of the photodiodes of a subset of the pixel sensors. The pixel sensor array includes a plurality of color filter regions over the photodiodes, wherein a subset of the color filter regions is between the metal grid structure and the grid extensions. BRIEF DESCRIPTION OF DRAWINGS

[0006] Aspects of some embodiments of the disclosure are described in Figure One The detailed description is best understood with reference to the accompanying drawings drawn with the understanding that, according to the standard practice of the industry, various features are not to scale. As such, the dimensions of the various features can be arbitrarily increased or decreased for clarity. In fact, the various features can be shown in somewhat schematic form rather than in complete detail so as to afford a better understanding of the principles of the application without unnecessary detail.

[0007] Figure 1 is a schematic diagram of an example of a pixel sensor as described in some embodiments of the disclosure;

[0008] Figures 2A-2C is a schematic diagram of an example of an image sensor device as described in some embodiments of the disclosure;

[0009] Figure 3A and Figure 3B is a schematic diagram of an example of a pixel sensor array of a sensor die as described in some embodiments of the disclosure;

[0010] Figures 4A-4D is a schematic diagram of an example of a pixel sensor array of a sensor die as described in some embodiments of the disclosure;

[0011] Figure 5 is a schematic diagram of an example of a pixel sensor array of a sensor die as described in some embodiments of the disclosure;

[0012] Figure 6 is a schematic diagram of an example of a pixel sensor array of a sensor die as described in some embodiments of the disclosure;

[0013] Figure 7 is a schematic diagram of an example of a pixel sensor array of a sensor die as described in some embodiments of the disclosure;

[0014] Figure 8 is a schematic diagram of an example of a pixel sensor array of a sensor die as described in some embodiments of the disclosure;

[0015] Figure 9is a schematic diagram of an example of a pixel sensor array of a sensor die as described in some embodiments of the present disclosure;

[0016] Figures 10A-10E is a schematic diagram of an example implementation of a circuitry die (or a portion thereof) as described in some embodiments of the present disclosure;

[0017] Figures 11A-11F is a schematic diagram of an example implementation of a sensor die (or a portion thereof) as described in some embodiments of the present disclosure;

[0018] Figures 12A-12F is a schematic diagram of an example implementation of an image sensor device (or a portion thereof) as described in some embodiments of the present disclosure;

[0019] Figure 13 is a flow diagram of an example process associated with forming a pixel sensor array as described in some embodiments of the present disclosure.

[0020] NOTATION

[0021] 100: pixel sensor

[0022] 102: supply voltage

[0023] 104: ground

[0024] 106: sensing region

[0025] 108: control circuitry region

[0026] 110: photocurrent

[0027] 112: photodiode

[0028] 114: pass gate

[0029] 116: pass voltage

[0030] 118: reset gate

[0031] 120: reset voltage

[0032] 122: floating diffusion node

[0033] 124: source follower gate

[0034] 126: column select gate

[0035] 128: select voltage

[0036] 130: output

[0037] 200: example

[0038] 202: circuitry wafer

[0039] 204: sensor wafer

[0040] 206: circuitry die

[0041] 208: sensor die

[0042] 210: image sensor device

[0043] 212: device layer

[0044] 214: interconnect layer

[0045] 216: device layer

[0046] 218: interconnect layer

[0047] 220: bonding interface

[0048] 222: pixel sensor array

[0049] 224: metal grid structure

[0050] 226: autofocus pixel sensor

[0051] 228: grid extension

[0052] 230: autofocus pixel pair

[0053] 232: BLC region

[0054] 234: bonding pad region

[0055] 236: seal ring region

[0056] 238: semiconductor layer

[0057] 240: dielectric layer

[0058] 242: device

[0059] 244: dielectric layer

[0060] 246: bonding layer

[0061] 248: interconnect structure

[0062] 250: bonding structure

[0063] 252: semiconductor layer

[0064] 254: dielectric layer

[0065] 256: STI structure

[0066] 258: DTI structure

[0067] 260: dielectric material

[0068] 262: dielectric liner

[0069] 264: dielectric layer

[0070] 266: bonding layer

[0071] 268: interconnect structure

[0072] 270: bonding structure

[0073] 272: passivation layer

[0074] 274: color filter region

[0075] 276: microlens

[0076] 278: metal layer

[0077] 280, 282, 284, 286, 288: dielectric layer

[0078] 290: bonding liner structure

[0079] 292: bonding liner opening

[0080] 300, 302: example

[0081] 400, 402, 404, 406: example

[0082] 500: example

[0083] 502: passivation layer

[0084] 504, 506, 508: example

[0085] 600, 602, 604, 606: example

[0086] 700, 800, 900: example

[0087] 1000: example implementation

[0088] 1100: example implementation

[0089] 1200: example implementation

[0090] 1300: process

[0091] 1310, 1320, 1330, 1340: block

[0092] D1, D2, D3, D4, D5, D6, D7: distance

[0093] D8, D9, D10, D11, D12, D13, D14: distance

[0094] W1: first cross-sectional width

[0095] W2: second profile width

[0096] W3: first profile width

[0097] W4: second profile width DETAILED DESCRIPTION

[0098] The following disclosure provides many different embodiments, or examples, for implementing different characteristics of the provided subject matter. Specific examples of components and configurations are described below to simplify the present disclosure. These are, of course, merely examples and are in no way limiting of the scope of the present disclosure. For example, in the following description, the formation of a first feature over or on a second feature can include embodiments in which the first feature is formed directly on the second feature, and can also include embodiments in which additional features can be formed between the first and second features such that the first and second features are not in direct contact. In addition, some embodiments of the present disclosure can refer to reference numerals that are the same but denote different

[0099] Furthermore, spatial relative terms, such as "under", "below", "lower", "over", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. The devices can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0100] An image sensor device (e.g., a complementary metal oxide semiconductor (CMOS) image sensor device or another type of image sensor device) is an electronic semiconductor device that uses a pixel sensor to generate a photo current based on light received at the pixel sensor. The measure of the photo current can be based on the intensity of the light, based on the wavelength of the light, and / or based on another property of the light. The photo current is then processed to generate an electronic image, an electronic video, and / or another type of electronic signal.

[0101] Generally, an electronic device including an image sensor device (e.g., a camera device) can also include a separate autofocus device. A portion of incident light received via a lens of the camera device is directed to the autofocus device for performing an autofocus function of the camera device, thereby focusing a field of view onto the image sensor device. Having a separate image sensor device and a separate autofocus device in a camera device increases complexity and cost of the camera device because additional circuitry is needed to interconnect the separate image sensor device and the separate autofocus device in the camera device. Moreover, having a separate image sensor device and a separate autofocus device in a camera device can hinder reducing a size or form factor of the camera device because the separate image sensor device and the separate autofocus device can occupy a relatively large area in the camera device. Furthermore, having a separate image sensor device and a separate autofocus device in a camera device can increase manufacturing complexity of the camera device because separate semiconductor fabrication processes are used to fabricate the separate image sensor device and the separate autofocus device.

[0102] Some embodiments of the present disclosure provide an image sensor device and an associated method of formation in which autofocus functionality is integrated into a pixel sensor array of the image sensor device. This enables the image sensor device of some embodiments of the present disclosure to perform autofocus and image capture in the same pixel sensor array. In this way, integrating autofocus and image capture functionality into a single image sensor device can reduce complexity and cost of a camera device including the image sensor device because complexity of circuitry in the camera device can be reduced. Moreover, integrating autofocus and image capture functionality into a single image sensor device can reduce a size or form factor of a camera device including the image sensor device because the image sensor device can occupy a smaller area in the camera device relative to a separate image sensor device and a separate autofocus device. Furthermore, integrating autofocus and image capture functionality into a single image sensor device can reduce manufacturing complexity of a camera device including the image sensor device because the image sensor device can be fabricated using a single set of semiconductor fabrication processes.

[0103] As described in some embodiments of the present disclosure, autofocus functionality can be integrated into a pixel sensor array of an image sensor device described in some embodiments of the present disclosure by including autofocus pixel sensors and imaging pixel sensors in the pixel sensor array. A metal grid structure is included around the autofocus pixel sensors and the imaging pixel sensors in the pixel sensor array. Further, the metal grid structure includes grid extensions that are portions of the metal grid structure that extend laterally outward over at least a portion of a photodiode of an autofocus pixel sensor, thereby shielding that portion of the photodiode from incident light. The autofocus pixel sensors can be configured in pairs in the pixel sensor array such that opposite sides of the photodiodes of the paired autofocus pixel sensors are shielded by the grid extensions. This results in a phase difference between incident light sensed by the paired autofocus pixel sensors. The phase difference is used to determine a focus point of the pixel sensor array. Thus, the grid extensions of the metal grid structure and the autofocus pixel sensors enable “on-array” implementation of phase detection autofocus (PDAF) for high-speed autofocus performance. Further, the grid extensions can cover different percentages of the area of the photodiodes of different autofocus pixel sensors, which can enable high-speed autofocus performance in high- and low-illumination scenarios.

[0104] Figure 1 is a schematic diagram of an example of a pixel sensor 100 described in some embodiments of the present disclosure. The pixel sensor 100 can include a front-side pixel sensor (e.g., a pixel sensor to receive photons of light from a front side of a sensor die), a back-side pixel sensor (e.g., a pixel sensor to receive photons of light from a back side of a sensor die), and / or another type of pixel sensor. The pixel sensor 100 can be electrically connected to a supply voltage (V dd ) 102 and a ground 104.

[0105] The pixel sensor 100 includes a sensing region 106 that can be used to sense and / or accumulate incident light (e.g., light directed toward the pixel sensor 100). The pixel sensor 100 also includes a control circuitry region 108. The control circuitry region 108 is electrically connected to the sensing region 106 and is used to receive a photocurrent 110 generated by the sensing region 106. Further, the control circuitry region 108 is used to transfer the photocurrent 110 from the sensing region 106 to downstream circuitry, such as an amplifier or an analog-to-digital (AD) converter, among other examples.

[0106] The sensing region 106 includes a photodiode 112. The photodiode 112 can absorb and accumulate photons of incident light and can generate a photocurrent 110 based on the absorbed photons. The measure of the photocurrent 110 is based on the amount of light collected in the photodiode 112. Thus, the accumulation of photons in the photodiode 112 creates a build-up of charge that is representative of the intensity or brightness of the incident light (e.g., a greater amount of charge can correspond to a greater intensity or brightness, while a lower amount of charge can correspond to a lower intensity or brightness).

[0107] The photodiode 112 is electrically connected to a source of a pass gate 114 in the control circuitry region 108. The pass gate 114 is used to control the transmission of the photocurrent 110 from the photodiode 112. Based on selectively switching a gate of the pass gate 114, the photocurrent 110 is provided from the source of the pass gate 114 to a drain of the pass gate 114. The gate of the pass gate 114 can be selectively switched by applying a pass voltage (V tx ) 116 to the pass gate 114. In some implementations, the pass voltage 116 applied to the pass gate 114 causes a conductive channel to form between the source and the drain of the pass gate 114, which enables the photocurrent 110 to traverse from the source to the drain along the conductive channel. In some implementations, removing the pass voltage 116 from the pass gate 114 (or the absence of the pass voltage 116) causes the conductive channel to be removed, such that the photocurrent 110 cannot pass from the source to the drain.

[0108] The control circuitry region 108 further includes a reset gate 118. The reset gate 118 is electrically connected to the supply voltage 102. The reset gate 118 can be controlled by a reset voltage (V rst ) 120. The pass gate 114 and the reset gate 118 can be electrically coupled with a floating diffusion node 122. The reset voltage 120 can be applied to the reset gate 118 to pull the drain of the pass gate 114 to a high voltage (e.g., to the supply voltage 102) to “reset” the floating diffusion node 122 (e.g., by bleeding off any residual charge in the floating diffusion node 122) prior to enabling the pass gate 114 to transmit the photocurrent 110 from the photodiode 112 to the floating diffusion node 122.

[0109] The photocurrent 110 can be used to apply a floating diffusion voltage (V fd ) to a source follower gate 124 of the control circuitry region 108. This allows the photocurrent 110 to be observed without removing or discharging the photocurrent 110 from the floating diffusion node 122. The reset gate 118 can alternatively be used to remove or discharge the photocurrent 110 from the floating diffusion node 122.

[0110] The source follower gate 124 acts as a high impedance amplifier for the pixel sensor 100. The source follower gate 124 provides voltage-to-current conversion of the floating diffusion voltage. The output of the source follower gate 124 is electrically connected to a column select gate 126, which is used to control the flow of the photo current 110 to external circuitry. The column select gate 126 is controlled by selectively applying a select voltage (V di ) 128 to the gate of the column select gate 126. This allows the photo current 110 to flow to the output 130 of the pixel sensor 100.

[0111] As described above, Figure 1 are provided as examples. Other examples can differ from what is described Figure 1 with respect to

[0112] Figures 2A-2C is a schematic diagram of an example 200 of an image sensor device as described in some embodiments of the present disclosure. As shown in Figure 2A , the image sensor device can be formed by bonding a circuitry wafer 202 and a sensor wafer 204. For example, a bonding tool can be used to perform the bonding operation to bond the circuitry wafer 202 and the sensor wafer 204 using a metal-to-metal bonding technique, a dielectric-to-dielectric bonding technique, and / or another bonding technique. In the bonding operation, circuitry dies 206 on the circuitry wafer 202 and associated sensor dies 208 on the sensor wafer 204 are bonded to an image sensor device 210. The image sensor device 210 is then diced and packaged. Other processing steps can be performed to form the image sensor device 210.

[0113] Each image sensor device 210 includes a circuitry die 206 and a sensor die 208. The circuitry die 206 and the sensor die 208 can be stacked or vertically configured in the image sensor device 210. The sensor die 208 includes a pixel sensor array, which includes a plurality of pixel sensors 100, or portions of a plurality of pixel sensors 100. In particular, the pixel sensor array includes at least the sensing region 106 (and thus the photodiode 112) of the pixel sensor 100. Thus, the sensor die 208 is primarily used to sense photons of incident light and convert the photons to a photo current 110.

[0114] Circuitry die 206 includes circuitry to measure, manipulate, and / or otherwise use photocurrent 110. Further, circuitry die 206 includes at least a subset of the transistors of control circuitry region 108 of pixel sensor 100. For example, circuitry die 206 can include column select gates 126 of pixel sensor 100, source follower gates 124 of the pixel sensor, and / or combinations thereof. This provides increased area for photodiode 112 on sensor die 208, enabling increased size of photodiode 112 to increase sensitivity and / or overall performance of the light sensing performance of the pixel sensor, and / or enabling reduced size of pixel sensor 100 while maintaining the same size of photodiode 112.

[0115] As Figure 2A As further shown in FIG. 2, circuitry die 206 can include device layer 212 and interconnect layer 214. Device layer 212 can include devices (e.g., transistors) of circuitry die 206, and interconnect layer 214 can include interconnects to enable signals and / or power to be provided to and / or from the devices in device layer 212. Sensor die 208 can also include device layer 216 and interconnect layer 218. Device layer 216 can include portions of pixel sensor 100, including photodiode 112, transfer gate 114, and floating diffusion node 122, among other examples. Interconnect layer 218 can include interconnects to enable signals and / or power to be provided to and / or from device layer 216.

[0116] Circuitry die 206 and sensor die 208 can be bonded at bonding interface 220, which can be included between interconnect layer 214 and interconnect layer 218, and / or can be included in a portion of interconnect layer 214 and / or interconnect layer 218. Bonding interface 220 can include bonding pads, bonding vias, bonding dielectric layers, and / or other bonding structures.

[0117] Figure 2B is a top view of an example pixel sensor array 222 included on sensor die 208. Pixel sensor array 222 can be included on sensor die 208 of image sensor device 210. As shown in Figure 2B As shown in FIG. 2, pixel sensor array 222 can include a plurality of pixel sensors 100 (or portions of a plurality of pixel sensors 100). For example, pixel sensor array 222 can include photodiodes 112 of pixel sensors 100. As further shown in Figure 2B As further shown in FIG. 2, pixel sensors 100 can be configured in a grid. In some implementations, pixel sensors 100 are square shaped (as shown in FIG. 2), and / or rectangular shaped (as shown in FIG. 3). Figure 2BIn some implementations, the pixel sensor 100 includes other shapes, such as a rectangular shape, a circular shape, an octagonal shape, a diamond shape, and / or other shapes.

[0118] In some implementations, the pixel sensor 100 has a size (e.g., a width or a diameter of the pixel sensor 100) of approximately 1 micrometer. In some implementations, the pixel sensor 100 has a size (e.g., a width or a diameter of the pixel sensor 100) of less than approximately 1 micrometer. For example, the width of one or more of the pixel sensors 100 can be included in a range of approximately 0.6 micrometers to approximately 0.7 micrometers. In these examples, the pixel sensor 100 can be referred to as a sub-micron pixel sensor. Sub-micron pixel sensors can reduce a pixel sensor pitch (e.g., a distance between adjacent pixel sensors) in the pixel sensor array 222, which can enable an increase in pixel sensor density in the pixel sensor array 222 (which can improve performance of the pixel sensor array 222). However, other values of the range of sizes of the pixel sensor 100 are also within the scope of some embodiments of the present disclosure.

[0119] Each pixel sensor 100 can be used to sense a particular wavelength range of incident light associated with a particular color component of the incident light. For example, the pixel sensor 100 can be used to sense a wavelength range associated with a red component of the incident light, and thus can be referred to as a red pixel sensor. As another example, the pixel sensor 100 can be used to sense a wavelength range associated with a blue component of the incident light, and thus can be referred to as a blue pixel sensor. As another example, the pixel sensor 100 can be used to sense a wavelength range associated with a green component of the incident light, and thus can be referred to as a green pixel sensor. In some implementations, a plurality of pixel sensors 100 are used to sense a wavelength range associated with a near infrared (NIR) component of the incident light, and thus can be referred to as NIR pixel sensors. NIR pixel sensors can be included in the pixel sensor array 222 to improve low-light performance of the image sensor device 210 and / or to enable implementation of night vision functionality of the image sensor device 210.

[0120] As Figure 2BAs further shown, the photodiode 112 of the pixel sensor 100 can be electrically and optically isolated by a metal mesh structure 224 included in the pixel sensor array 222. The photodiode 112 may be formed in a semiconductor layer (e.g., a substrate) of the sensor die 208, and the metal mesh structure 224 may be included above the semiconductor layer. The metal mesh structure 224 includes a plurality of intersecting metal wires around the periphery of the pixel sensor 100. The metal mesh structure 224 may be formed of tungsten (W) and / or another suitable metal or metal alloy. The metal mesh structure 224 may be included in the pixel sensor array 222 to reduce optical noise between the pixel sensors 100, which reduces color mixing between the pixel sensors 100.

[0121] like Figure 2B As further shown, the pixel sensor array 222 further includes an autofocus pixel sensor 226. The autofocus pixel sensor 226 is similar to the pixel sensor 100, except that the autofocus pixel sensor 226 generates a photocurrent 110 for determining the focal point of the pixel sensor array 222, while the pixel sensor 100 generates a photocurrent 110 for generating an image or video through the image sensor device 210. Structurally, the autofocus pixel sensor 226 differs from the pixel sensor 100 in that the mesh extension 228 of the metal mesh structure 224 extends above a portion of the top of the photodiode 112 of the autofocus pixel sensor 226. The mesh extension 228 is a portion of the metal mesh structure 224 formed during the patterning of the metal mesh structure 224. In detail, a mask in the patterned layer can be used to form a mesh extension 228 during the formation of the metal mesh structure 224, such that the mesh extension 228 extends laterally outward from the metal mesh structure 224 and extends over at least a portion of the plurality of autofocus pixel sensors 226. For example... Figure 2B As shown, the mesh extension 228 may have an approximately rectangular top view shape. However, other top view shapes are also within the scope of some embodiments disclosed herein, and other examples of the top view shape of the mesh extension 228 are combined with... Figure 3A , Figure 3B and Figures 4A-4D Provide illustrations and descriptions.

[0122] Autofocus pixel sensors 226 are disposed in autofocus pixel pairs 230, with grid extensions 228 of metal grid structure 224 covering opposite sides of photodiodes 112 of autofocus pixel sensors 226 in autofocus pixel pairs 230. For example, an autofocus pixel pair 230 can include a first autofocus pixel sensor 226 and a second autofocus pixel sensor 226. First and second autofocus pixel sensors 226 can be formed with the same type of color filter, and thus used to pass the same range of wavelengths. Thus, an autofocus pixel pair 230 can be used to determine the focus of a particular light component of incident light sensed by pixel sensor array 222. In some implementations, pixel sensor array 222 includes at least one autofocus pixel pair 230 for each of the color components that pixel sensor array 222 is used to sense. For example, if pixel sensor array 222 includes red pixel sensors 100, green pixel sensors 100, and blue pixel sensors 100, then pixel sensor array 222 can include red autofocus pixel pairs 230, green autofocus pixel pairs 230, and blue autofocus pixel pairs 230. This enables autofocus to be implemented for each of the color components of pixel sensor array 222.

[0123] First grid extension 228 can extend over and cover a left side of a top of photodiode 112 of first autofocus pixel sensor 226, with a right side of the top of photodiode 112 exposed via metal grid structure 224. Second grid extension 228 can extend over and cover a right side of a top of photodiode 112 of second autofocus pixel sensor 226, with a left side of the top of photodiode 112 exposed via metal grid structure 224. When incident light is received at pixel sensor array 222, because of the configuration of first and second grid extensions 228, the incident light is sensed by first and second autofocus pixel sensors 226 at opposite sides of photodiodes 112 of first and second autofocus pixel sensors 226. This results in a phase difference between the incident light sensed by first autofocus pixel sensor 226 and the incident light sensed by second autofocus pixel sensor 226. This phase difference is used (e.g., by devices in circuit system die 206) to determine the focus of the pixel sensor array. Thus, grid extensions 228 and autofocus pixel sensors 226 enable phase detection autofocus (PDAF) to be implemented "on-wire" in (e.g., integrated to) pixel sensor array 222 (e.g., as opposed to having a separate PDAF region around or adjacent to pixel sensor array 222).

[0124] Figure 2C A cross-sectional view of image sensor device 210 is illustrated. AsFigure 2C As shown in FIG. 2A, the circuitry die 206 and the sensor die 208 can be bonded at a bonding interface 220 such that the circuitry die 206 and the sensor die 208 are stacked or vertically configured in the image sensor device 210 in a z-direction. As shown in FIG. 2A, the circuitry die 206 and the sensor die 208 can be bonded at the bonding interface 220 such that the circuitry die 206 and the sensor die 208 are horizontally adjacent to each other in the image sensor device 210 in an x-y plane. Figure 2C As further shown in FIG. 2A, the image sensor device 210 includes a pixel sensor array 222 (e.g., including the pixel sensor 100 and the autofocus pixel sensor 226), a black level correction (BLC) region 232 adjacent (e.g., horizontally adjacent) to the pixel sensor array 222, and a bond pad region 234 adjacent (e.g., horizontally adjacent) to the BLC region 232, and a seal ring region 236 adjacent (e.g., horizontally adjacent) to the bond pad region 234.

[0125] As shown in FIG. 2A, the circuitry die 206 and the sensor die 208 can be bonded at the bonding interface 220 such that the circuitry die 206 and the sensor die 208 are stacked or vertically configured in the image sensor device 210 in a z-direction. As shown in FIG. 2A, the circuitry die 206 and the sensor die 208 can be bonded at the bonding interface 220 such that the circuitry die 206 and the sensor die 208 are horizontally adjacent to each other in the image sensor device 210 in an x-y plane. Figure 2C As further shown in FIG. 2A, the image sensor device 210 includes a plurality of layers, such as the device layer 212 and the interconnect layer 214 of the circuitry die 206, and the device layer 216 and the interconnect layer 218 of the sensor die 208. The device layer 212 of the circuitry die 206 includes a semiconductor layer 238 and a dielectric layer 240 over the semiconductor layer 238. The semiconductor layer 238 can include silicon (Si) (e.g., a silicon substrate), a III-V compound semiconductor material including silicon, such as gallium arsenide (GaAs), silicon on insulator (SOI), or another type of semiconductor material. The dielectric layer 240 can include one or more dielectric materials, such as silicon oxide (SiO x ), silicon nitride (Si x N y ), silicon oxynitride (SiON), tetraethyl orthosilicate oxide, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), fluorosilicate glass (FSG), and / or carbon-doped silicon oxide, among other examples.

[0126] Devices 242 can be included in and / or on semiconductor layer 238 of device layer 212. Devices 242 can include one or more application-specific integrated circuit (ASIC) devices, one or more system-on-chip (SOC) devices, one or more transistors, and / or one or more other components to measure a measure of photocurrent 110 generated by pixel sensor 100 to determine a light intensity of incident light and / or to generate an image and / or video (e.g., digital image, digital video). In addition, devices 242 can include one or more ASIC devices, one or more SOC devices, one or more transistors, and / or one or more other components to measure a measure of photocurrent 110 generated by autofocus pixel sensor 226 to determine a focus of pixel sensor array 222.

[0127] Interconnect layers 214 of circuitry die 206 can include dielectric layers 244, bonding layers 246, a plurality of interconnect structures 248 in dielectric layers 244, and a plurality of bonding structures 250 in bonding layers 246. Dielectric layers 244 can include one or more interlayer dielectric (ILD) layers, one or more intermetal dielectric (IMD) layers, and / or one or more etch stop layers (ESL), among other examples. Each of dielectric layers 244 and bonding layers 246 can include one or more dielectric materials, such as silicon oxide (SiO x ), silicon nitride (Si x N y ), silicon oxynitride (SiON), tetraethyl orthosilicate oxide, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), fluorosilicate glass (FSG), and / or carbon-doped silicon oxide, among other examples.

[0128] Each of interconnect structures 248 can include a wire, a trench, a via, an interconnect, a metallization layer, and / or other types of electrically conductive structures that electrically connect devices 242 to one or more other regions of circuitry die 206 and / or one or more regions of sensor die 208, among other examples. Each of bonding structures 250 can include a bond pad, a bond via, and / or other types of bonding structures. Each of interconnect structures 248 and bonding structures 250 can include one or more electrically conductive materials, such as an electrically conductive metal, an electrically conductive metal alloy, an electrically conductive ceramic, tungsten (W), cobalt (Co), ruthenium (Ru), titanium (Ti), aluminum (Al), copper (Cu), and / or gold (Au), among other examples of electrically conductive materials.

[0129] The device layer 216 of the sensor die 208 includes a semiconductor layer 252 and a dielectric layer 254 below the semiconductor layer 252. The semiconductor layer 252 can include silicon (Si) (e.g., a silicon substrate), a III-V compound semiconductor material such as gallium arsenide (GaAs) including silicon, SOI, or another type of semiconductor material. The dielectric layer 254 can include one or more dielectric materials such as silicon oxide (SiO x ), silicon nitride (Si x N y ), silicon oxynitride (SiON), tetraethyl orthosilicate oxide, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), fluorosilicate glass (FSG), and / or carbon-doped silicon oxide, among other examples.

[0130] The photodiodes 112 are included in the semiconductor layer 252 of the sensor die 208. Each of the photodiodes 112 can include one or more doped regions of the semiconductor layer 252. The semiconductor layer 252 can be doped with multiple types of ions to form p-n junctions or PIN junctions (e.g., a junction between a p-type portion, an intrinsic (or undoped) portion, and an n-type portion) corresponding to the photodiodes 112. For example, the semiconductor layer 252 can be doped with an n-type dopant to form a first portion (e.g., an n-type portion) of the photodiodes 112 and can be doped with a p-type dopant to form a second portion (e.g., a p-type portion) of the photodiodes 112. The photodiodes 112 can be used to absorb photons of incident light. Absorption of the photons causes the photodiodes 112 to accumulate charge (photocurrent 110) due to the photoelectric effect. Here, the photons strike the photodiodes 112, which causes emission of electrons from the photodiodes 112. The emission of electrons causes the formation of electron-hole pairs, where the electrons migrate toward cathodes of the photodiodes 112 and the holes migrate toward anodes, thereby generating the photocurrent 110.

[0131] The photodiodes 112 can be electrically and / or optically isolated from one another by one or more isolation structures in the semiconductor layer 252. Shallow trench isolation (STI) structures 256 extend into the semiconductor layer 252 from a bottom side of the semiconductor layer 252 (referred to as a front side of the semiconductor layer 252), and deep trench isolation (DTI) structures 258 extend into the semiconductor layer 252 from a top side of the semiconductor layer 252 (referred to as a back side of the semiconductor layer 252) above the STI structures 256. The combination of the STI structures 256 and the DTI structures 258 in the semiconductor layer 252 surround the pixel sensors 100 and the autofocus pixel sensors 226 in the semiconductor layer 252 and provide electrical and / or optical isolation for the pixel sensors 100 and the autofocus pixel sensors 226 in the semiconductor layer 252.

[0132] STI structure 256 may include one or more dielectric materials, such as silicon oxide (SiO2). x ), silicon nitride (Si x N y (e.g., silicon oxynitride (SiON), and / or silicon oxynitride (SiON), and other examples. The DTI structure 258 may include an elongated structure of dielectric material 260 and a dielectric pad 262 between the dielectric material 260 and the semiconductor layer 252. The DTI structure 258 extends along the side of the photodiode 112 and conforms to... Figure 2B The top view of the metal mesh structure 224 (excluding mesh extensions 228) shown is illustrated. Dielectric material 260 may also be included as a buffer layer on the top side of semiconductor layer 252. Dielectric pad 262 may be included on the sidewalls and bottom surface of DTI structure 258 and may include an antireflective coating (ARC) and / or further promote electrical and / or optical isolation between pixel sensor 100 and autofocus pixel sensor 226. In some embodiments, dielectric material 260 includes silicon oxide (SiO2). x (For example, silicon dioxide (SiO2)) and silicon nitride (SiO2) x N y ), silicon carbide (SiC) x ), Hafnium oxide (HfO) x The dielectric material may include silicon oxynitride (SiON), tetraethyl orthosilicate oxide, silicon phosphosilicate glass (PSG), borosilicate phosphosilicate glass (BPSG), fluorosilicone glass (FSG), carbon-doped silicon oxide, and / or another dielectric material. In some embodiments, the dielectric pad 262 may include a high-k dielectric material, such as silicon nitride (SiON). x N y ), Hafnium oxide (HfO) x ), and / or another high-k dielectric material.

[0133] A transmission gate 114 is included in dielectric layer 254 and on the bottom side of semiconductor layer 252. Transmission gate 114 is electrically connected to interconnect layer 218, enabling the provision of an input (e.g., a gate voltage) to transmission gate 114. Interconnect layer 218 may include dielectric layer 264, bonding layer 266, multiple interconnect structures 268 in dielectric layer 264, and multiple bonding structures 270 in bonding layer 266. Dielectric layer 264 may include one or more ILD layers, one or more IMD layers, and / or one or more ESLs, and other examples. Each of dielectric layer 264 and bonding layer 266 may include one or more dielectric materials, such as silicon oxide (SiO2). x ), silicon nitride (Si x N y) silicon oxynitride (SiON), tetraethyl orthosilicate oxide, phosphosilicate glass (PSG), borophosphosilicate glass (BPSG), fluorosilicate glass (FSG), and / or carbon-doped silicon oxide, among other examples.

[0134] Each of the interconnect structures 268 can include wires, trenches, vias, interconnects, metallization layers, and / or other types of electrically conductive structures that electrically connect the transfer gate 114 to one or more other regions of the sensor die 208 and / or one or more regions of the circuitry die 206, among other examples. Each of the bonding structures 270 can include a bond pad, a bond via, and / or other types of bonding structures. Each of the interconnect structures 268 and the bonding structures 270 can include one or more electrically conductive materials, such as an electrically conductive metal, an electrically conductive metal alloy, an electrically conductive ceramic, tungsten (W), cobalt (Co), ruthenium (Ru), titanium (Ti), aluminum (Al), copper (Cu), and / or gold (Au), among other examples of electrically conductive materials.

[0135] At the bonding interface 220, the bonding layer 246 and the bonding layer 266 can be bonded together (e.g., with a dielectric-to-dielectric bond), and the bonding structure 250 and the bonding structure 270 can be bonded together (e.g., with a metal-to-metal bond). Signals and / or power can be provided between the circuitry die 206 and the sensor die 208 via the bonding structure 250 and the bonding structure 270.

[0136] Above the top side of the semiconductor layer 252, a passivation layer 272 can be included on the buffer layer, and the metal mesh structure 224 and the associated networking grid extensions 228 can be included above the passivation layer 272. The passivation layer 272 can include an oxide material, such as silicon oxide (SiO x ) in addition or otherwise, silicon nitride (SiN x ), silicon carbide (SiC x ), or a mixture thereof, such as silicon carbon nitride (SiCN), silicon oxynitride (SiON), or another dielectric material, can also be used for the passivation layer 272.

[0137] As Figure 2CAs shown in the middle, the mesh extension 228 can extend laterally outward (e.g., in the x-direction) from the metal mesh structure 224 and over portions of the photodiodes 112 of the autofocus pixel sensor 226. The metal mesh structure 224 and associated mesh extension 228 can include a post or pillar around the photodiodes 112. The post or pillar of the metal mesh structure 224 and associated mesh extension 228 can be located above the DTI structure 258. The metal mesh structure 224 and associated mesh extension 228 can be formed of a metal material, such as gold (Au), copper (Cu), silver (Ag), cobalt (Co), tungsten (W), titanium (Ti), ruthenium (Ru), a metal alloy (e.g., aluminum copper (AlCu)), and / or combinations thereof, among other examples.

[0138] The color filter regions 274 of the pixel sensor 100 are included in openings in the metal mesh structure 224. The color filter regions 274 can be included over the photodiodes 112 of the pixel sensor 100. The color filter regions 274 of the autofocus pixel sensor 226 are included in openings between the metal mesh structure 224 and the mesh extension 228. The color filter regions 274 can be included over the photodiodes 112 of the autofocus pixel sensor 226.

[0139] Each color filter region 274 can be used to filter incident light to allow a particular wavelength of incident light to pass through the photodiode 112. For example, a color filter region 274 can filter incident light to allow red light to pass through the color filter region 274 to the associated photodiode 112. As another example, a color filter region 274 can filter incident light to allow green light to pass through the color filter region 274 to the associated photodiode 112. As another example, a color filter region 274 can filter incident light to allow blue light to pass through the color filter region 274 to the associated photodiode 112.

[0140] A blue color filter region 274 can allow incident light components near a 450 nanometer wavelength to pass through and can block other wavelengths from passing through. A green color filter region 274 can allow incident light components near a 550 nanometer wavelength to pass through and can block other wavelengths from passing through. A red color filter region 274 can allow incident light components near a 650 nanometer wavelength to pass through and can block other wavelengths from passing through. A yellow color filter region 274 can allow incident light components near a 580 nanometer wavelength to pass through and can block other wavelengths from passing through.

[0141] In some implementations, the color filter region 274 can be non-discriminating or non-filtered, which can define a white pixel sensor. The non-discriminating or non-filtered color filter region 274 can include a material that allows all wavelengths of light to pass through the associated photodiode 112 (e.g., for determining overall brightness to increase light sensitivity of the image sensor). In some implementations, the color filter region 274 can be a NIR bandpass color filter region 274, which can define a NIR pixel sensor. The NIR bandpass color filter region 274 can include a material that allows a portion of incident light within a NIR wavelength range to pass through the associated photodiode 112 while blocking visible light from passing through.

[0142] The microlens 276 can be included above and / or on the color filter region 274. The microlens 276 can include individual microlenses for each of the pixel sensors 100 and autofocus pixel sensors 226. The microlenses can be formed to focus incident light toward the photodiode 112 of the associated pixel sensor 100 or autofocus pixel sensor 226.

[0143] As further shown in Figure 2C The metal layer 278 can be included above the semiconductor layer 252 in the BLC region 232. The metal layer 278 can include a light-blocking layer to prevent incident light from entering the portion of the semiconductor layer 252 in the BLC region 232. The portion of the semiconductor layer 252 in the BLC region 232 is thus a “dark” sensing region, such that a dark current measurement can be performed in the BLC region 232. The dark current measurement can be performed to measure the amount of charge (dark current) generated in the semiconductor layer 252 from sources other than incident light (e.g., thermal energy in the semiconductor layer 252), such that the dark current measurement can be used for black level correction (or black level calibration) of the pixel sensor array 222.

[0144] As further shown in Figure 2C The bond pad region 234 can include a plurality of dielectric layers 280, 282, 284, 286, and 288 of a bond pad structure 290. The bond pad structure 290 is electrically and / or physically coupled with one or more of the interconnect structures 268 in the interconnect layer 218 of the sensor die 208. A bond pad opening 292 is included above the bond pad structure 290 to enable an external electrical connection to the bond pad structure 290.

[0145] Each of the plurality of dielectric layers 280, 282, 284, 286, and 288 can include one or more dielectric materials, such as silicon oxide (SiO x ), silicon nitride (Si x N ySilicon oxynitride (SiON), tetraethyl orthosilicate oxide, phosphosilicate glass (PSG), borosilicate phosphosilicate glass (BPSG), fluorosilicone glass (FSG), and / or carbon-doped silicon oxide, among other examples. The bonding pad structure 290 may include metallic materials such as gold (Au), copper (Cu), silver (Ag), cobalt (Co), tungsten (W), titanium (Ti), ruthenium (Ru), metal alloys (e.g., aluminum-copper (AlCu)), and / or combinations thereof, among other examples.

[0146] The sealing ring region 236 includes a plurality of stacked interconnect structures 248 in the interconnect layer 214 and a plurality of stacked interconnect structures 268 in the interconnect layer 218 to seal the structure and layers of the image sensor device 210 and to provide structural rigidity for the image sensor device 210.

[0147] As mentioned above, Figures 2A-2C It is provided as an instance. Other instances may differ from those provided. Figures 2A-2C As stated above.

[0148] Figure 3A This is a schematic diagram of an example of a pixel sensor array 222 of a sensor die 208 as described in some embodiments of this disclosure. Figure 3A The illustration shows a top view of an example 300 of a pixel sensor array 222. Figure 3A As shown, example 300 of the pixel sensor array 222 is similar to Figure 2B Example 200 of the pixel sensor array 222 shown. However, example 300 of the pixel sensor array 222 includes those having... Figure 2B The grid extension 228 shown is an approximate triangular top view shape opposite to the approximate rectangular top view shape. Therefore, the autofocus pixel pair 230 includes an autofocus pixel sensor 226, and for the autofocus pixel sensor, the grid extension 228 covers the opposite diagonal portions (e.g., opposite corners) of the photodiode 112 of the autofocus pixel sensor 226.

[0149] Figure 3B The illustration shows a top view of an example 302 of the pixel sensor array 222. (See diagram below.) Figure 3B As shown, example 302 of the pixel sensor array 222 is similar to Figure 3AExample 300 of the pixel sensor array 222 is shown. However, in example 302 of the pixel sensor array 222, the grid extension 228 is mirrored for two or more autofocus pixel pairs 230. For example, the first autofocus pixel pair 230 may have grid extensions 228 in the southwest quadrant of the first autofocus image sensor 226 and in the northeast quadrant of the second autofocus image sensor 226 in the xy plane, and the second autofocus pixel pair 230 may have grid extensions 228 in the northeast quadrant of the first autofocus pixel sensor 226 and in the southwest quadrant of the second autofocus pixel sensor 226 in the xy plane.

[0150] Alternatively, in example 302 of pixel sensor array 222, the grid extension 228 of the first autofocus pixel pair 230 is oriented at 90 degrees relative to the second autofocus pixel pair 230. For example, the first autofocus pixel pair 230 may have grid extensions 228 in the southwest quadrant of the first autofocus image sensor 226 and the northeast quadrant of the second autofocus image sensor 226 in the xy plane, and the second autofocus pixel pair 230 may have grid extensions 228 in the northwest quadrant of the first autofocus pixel sensor 226 and the southeast quadrant of the second autofocus pixel sensor 226 in the xy plane.

[0151] As mentioned above, Figure 3A and Figure 3B It is provided as an instance. Other instances may differ from those provided. Figure 3A and Figure 3B As stated above.

[0152] Figures 4A-4D This is a schematic diagram of an example of a pixel sensor array 222 of a sensor die 208 as described in some embodiments of this disclosure. Figure 4A The illustration shows a top view of an example 400 of a pixel sensor array 222. Figure 4A As shown, example 400 of the pixel sensor array 222 is similar to Figure 2B Example 200 of the pixel sensor array 222 shown. However, example 400 of the pixel sensor array 222 also includes a grid extension 228 having an approximately triangular upward view shape, in addition to the grid extension 228 having an approximately rectangular upward view shape.

[0153] Figure 4B The illustration shows a top view of an example 402 of the pixel sensor array 222. (See diagram below.) Figure 4B As shown, example 402 of the pixel sensor array 222 is similar to Figure 4AExample 400 of the pixel sensor array 222 shown in FIG. 4. However, in the example 402 of the pixel sensor array 222, the grid extensions 228 having the approximately rectangular top view shape are rotated approximately 90 degrees with respect to the example 400 of the pixel sensor array.

[0154] Figure 4C A top view of an example 404 of the pixel sensor array 222 is illustrated. As Figure 4C shown in FIG. 4, the example 404 of the pixel sensor array 222 is similar to Figure 4A the example 400 of the pixel sensor array 222 shown in FIG. 4. However, in the example 404 of the pixel sensor array 222, the plurality of autofocus pixel pairs 230 includes grid extensions 228 having an approximately rectangular top view shape, wherein a first autofocus pixel pair 230 includes grid extensions 228 having an approximately rectangular top view shape that are rotated approximately 90 degrees with respect to a second autofocus pixel pair 230 that includes grid extensions 228 having an approximately rectangular top view shape. Thus, the grid extensions 228 for the first autofocus pixel pair 230 are orthogonal to the grid extensions 228 for the second autofocus pixel pair 230.

[0155] Figure 4D A top view of an example 406 of the pixel sensor array 222 is illustrated. As Figure 4D shown in FIG. 4, the example 406 of the pixel sensor array 222 is similar to Figure 4A the example 400 of the pixel sensor array 222 shown in FIG. 4. However, in the example 406 of the pixel sensor array 222, the plurality of autofocus pixel pairs 230 includes grid extensions 228 having an approximately triangular top view shape, wherein a first autofocus pixel pair 230 includes grid extensions 228 having an approximately triangular top view shape that are rotated approximately 90 degrees with respect to a second autofocus pixel pair 230 that includes grid extensions 228 having an approximately triangular top view shape.

[0156] As described above, Figures 4A-4D are provided as examples. Other examples can differ from what is described Figures 4A-4D with respect to the above-described examples. For specific use cases, the example top view configurations shown in Figure 3A , Figure 3B , and / or Figures 4A-4D may be implemented in the image sensor device 210. For example, depending on the use case or application of the image sensor device 210, or the estimated angle or direction of incident light in the use case or application, the examples Figure 3A , Figure 3B , and / or Figures 4A-4DOne or more of the top-view configurations shown. For example, the top-view configuration of the image sensor device 210 with a security camera use case may be different from the top-view configuration of the image sensor device 210 with an automotive camera use case, in that, for these use cases, the images and / or videos will be captured from different angles.

[0157] Figure 5 This is a schematic diagram of an example of a pixel sensor array 222 of a sensor die 208 as described in some embodiments of this disclosure. Figure 5 The figure shows a cross-sectional view of an example of pixel sensor array 222. Figure 5 The examples shown correspond to different sizes and / or different coverage of the photodiode 112 of the autofocus pixel sensor 226 included in the example of pixel sensor array 222.

[0158] like Figure 5 As shown, an example 500 of the pixel sensor array 222 includes one or more pixel sensors 100 and one or more autofocus pixel sensors 226. Each of the pixel sensors 100 and the autofocus pixel sensors 226 may include a photodiode 112 in the semiconductor layer 252 of the sensor die 208. A DTI structure 258 is included around the photodiode 112 in the semiconductor layer 252, and a metal mesh structure 224 is included on the semiconductor layer 252 above the DTI structure 258. The metal mesh structure 224 extends over the semiconductor layer 252 and surrounds the photodiode 112. A color filter region 274 is included between the openings of the metal mesh structure 224, and a microlens 276 is included on the color filter region. A passivation layer 502 is additionally included on the metal mesh structure 224, or may be omitted.

[0159] As further shown in Example 500, the grid extension 228 extends laterally outward from the metal grid structure 224 and extends above a portion of the photodiode 112 of the autofocus pixel sensor 226. The grid extension 228 extends laterally outward from the metal grid structure 224 by a distance D1, such that this portion of the photodiode 112 is shielded from incident light.

[0160] like Figure 5As shown in example 504 of pixel sensor array 222, grid extensions 228 extend laterally outward from metal grid structure 224 and over a portion of photodiode 112 of autofocus pixel sensor 226. In example 504, grid extensions 228 extend laterally outward from metal grid structure 224 a distance D2, where distance D2 is less than distance Dl. Thus, for the same size photodiode 112, the top region of photodiode 112 of autofocus pixel sensor 226 in example 504 of pixel sensor array 222 is covered less by grid extensions 228 than in example 500 of pixel sensor array 222. Thus, a greater amount of incident light can pass to photodiode 112 of autofocus pixel sensor 226 in example 504 of pixel sensor array 222 than in example 500 of pixel sensor array 222.

[0161] As shown in example 504 of pixel sensor array 222, grid extensions 228 extend laterally outward from metal grid structure 224 and over a portion of photodiode 112 of autofocus pixel sensor 226. In example 504, grid extensions 228 extend laterally outward from metal grid structure 224 a distance D2, where distance D2 is less than distance Dl. Thus, for the same size photodiode 112, the top region of photodiode 112 of autofocus pixel sensor 226 in example 504 of pixel sensor array 222 is covered less by grid extensions 228 than in example 500 of pixel sensor array 222. Thus, a greater amount of incident light can pass to photodiode 112 of autofocus pixel sensor 226 in example 504 of pixel sensor array 222 than in example 500 of pixel sensor array 222. Figure 5 As shown in example 506 of pixel sensor array 222, grid extensions 228 extend laterally outward from metal grid structure 224 and over a portion of photodiode 112 of autofocus pixel sensor 226. In example 506, grid extensions 228 extend laterally outward from metal grid structure 224 a distance D3, where distance D3 is less than distances Dl and D2. Thus, for the same size photodiode 112, the top region of photodiode 112 of autofocus pixel sensor 226 in example 506 of pixel sensor array 222 is covered less by grid extensions 228 than in examples 500 and 504. Thus, a greater amount of incident light can pass to photodiode 112 of autofocus pixel sensor 226 in example 506 than in examples 500 and 504.

[0162] As shown in example 506 of pixel sensor array 222, grid extensions 228 extend laterally outward from metal grid structure 224 and over a portion of photodiode 112 of autofocus pixel sensor 226. In example 506, grid extensions 228 extend laterally outward from metal grid structure 224 a distance D3, where distance D3 is less than distances Dl and D2. Thus, for the same size photodiode 112, the top region of photodiode 112 of autofocus pixel sensor 226 in example 506 of pixel sensor array 222 is covered less by grid extensions 228 than in examples 500 and 504. Thus, a greater amount of incident light can pass to photodiode 112 of autofocus pixel sensor 226 in example 506 than in examples 500 and 504. Figure 5 As shown in example 508 of pixel sensor array 222, grid extensions 228 extend laterally outward from metal grid structure 224 and over a portion of photodiode 112 of autofocus pixel sensor 226. In example 508, grid extensions 228 extend laterally outward from metal grid structure 224 a distance D4, where distance D4 is less than distances Dl - D3. Thus, for the same size photodiode 112, the top region of photodiode 112 of autofocus pixel sensor 226 in example 508 of pixel sensor array 222 is covered less by grid extensions 228 than in examples 500, 504, and 506. Thus, a greater amount of incident light can pass to photodiode 112 of autofocus pixel sensor 226 in example 508 than in examples 500, 504, and 506.

[0163] The greater the amount of the grid extensions 228 covering the photodiode 112 of the autofocus pixel sensor 226, the smaller the full well capacity (FWC) that the autofocus pixel sensor 226 has. Thus, the autofocus pixel sensor 226 in example 508 can have a greater full well capacity than the autofocus pixel sensor 226 in example 506, the autofocus pixel sensor 226 in example 506 can have a greater full well capacity than the autofocus pixel sensor 226 in example 504, and the autofocus pixel sensor 226 in example 504 can have a greater full well capacity than the autofocus pixel sensor 226 in example 500. An autofocus pixel sensor 226 with a greater full well capacity can have greater autofocus performance in low light situations, such as in night vision use cases, because the greater full well capacity enables the autofocus pixel sensor 226 to absorb a greater amount of incident light for determining the focus of the pixel sensor array 222. Conversely, in well-lit situations, such as in daytime period use cases, less full well capacity is needed, and an autofocus pixel sensor 226 with less full well capacity can have faster incident light detection, thereby enabling fast autofocus performance in well-lit situations.

[0164] As Figure 5 Further shown in FIGS. 5A-5D, the metal grid structures 224 and associated grid extensions 228 in example 500, example 504, example 506, and example 508 can have a cross-sectional shape or profile that is approximately trapezoidal. For example, the cross-sectional width of the top surface of the metal grid structures 224 and associated grid extensions 228 of example 500, example 504, example 506, and example 508 can be less than the cross-sectional width of the bottom surface of the metal grid structures 224 and associated grid extensions 228 in example 500, example 504, example 506, and example 508. Thus, in example 500, example 504, example 506, and example 508, the cross-sectional width of the metal grid structures 224 and associated grid extensions 228 increases from the top surface to the bottom surface.

[0165] As mentioned above, Figure 5 are provided as examples. Other examples can differ from what is described with respect to at least one of the Figure 5 described.

[0166] Figure 6 is a schematic diagram of an example of a pixel sensor array 222 of a sensor die 208 as described in some embodiments of the present disclosure. Figure 6 is a cross-sectional view illustrating an example of a pixel sensor array 222. Figure 6The examples shown in FIGS. 1-3 correspond to different sizes and / or different amounts of coverage of the photodiode 112 of the autofocus pixel sensor 226 included in the example of the pixel sensor array 222.

[0167] As Figure 6 As shown in the example 600 of the pixel sensor array 222, each of the pixel sensors 100 and the autofocus pixel sensors 226 can include a photodiode 112 in the semiconductor layer 252 of the sensor die 208. The DTI structure 258 is included in the semiconductor layer 252 around the photodiode 112, and the metal grid structure 224 is included on the semiconductor layer 252 over the DTI structure 258. The metal grid structure 224 extends over the semiconductor layer 252 and around the photodiode 112. The color filter regions 274 are included between the openings of the metal grid structure 224, and the microlenses 276 are included on the color filter regions. The passivation layer 502 is additionally included on the metal grid structure 224, or can be omitted.

[0168] As further shown in the example 600, the grid extensions 228 extend laterally outward from the metal grid structure 224 and over a portion of the photodiode 112 of the autofocus pixel sensor 226. The grid extensions 228 extend laterally outward from the metal grid structure 224 a distance D5 such that the portion of the photodiode 112 is shielded from incident light.

[0169] As Figure 6 As shown in the example 602 of the pixel sensor array 222 in FIG. 6, the grid extensions 228 extend laterally outward from the metal grid structure 224 and over a portion of the photodiode 112 of the autofocus pixel sensor 226. In the example 602, the grid extensions 228 extend laterally outward from the metal grid structure 224 a distance D6, where the distance D6 is less than the distance D5. Thus, for the same size photodiode 112, the top region of the photodiode 112 of the autofocus pixel sensor 226 in the example 602 of the pixel sensor array 222 is covered less by the grid extensions 228 than in the example 600 of the pixel sensor array 222. Thus, a greater amount of incident light can pass to the photodiode 112 of the autofocus pixel sensor 226 in the example 602 of the pixel sensor array 222 than to the photodiode 112 of the autofocus pixel sensor 226 in the example 600 of the pixel sensor array 222.

[0170] As Figure 6As shown in Example 604 of the pixel sensor array 222, a grid extension 228 extends laterally outward from the metal grid structure 224 and extends above a portion of the photodiode 112 of the autofocus pixel sensor 226. In Example 604, the grid extension 228 extends laterally outward from the metal grid structure 224 by a distance D7, where distance D7 is less than distances D5 and D6. Therefore, for photodiodes 112 of the same size, compared to Examples 600 and 602, the top region of the photodiode 112 of the autofocus pixel sensor 226 in Example 604 of the pixel sensor array 222 is less covered by the grid extension 228. Therefore, compared to Examples 600 and 602, a greater amount of incident light can pass through to the photodiode 112 of the autofocus pixel sensor 226 in Example 604.

[0171] like Figure 6 As shown in Example 606 of the pixel sensor array 222, a grid extension 228 extends laterally outward from the metal grid structure 224 and extends above a portion of the photodiode 112 of the autofocus pixel sensor 226. In Example 606, the grid extension 228 extends laterally outward from the metal grid structure 224 by a distance D8, where distance D8 is less than distances D5 to D7. Therefore, for photodiodes 112 of the same size, compared to Examples 600, 602, and 604, the top region of the photodiode 112 of the autofocus pixel sensor 226 in Example 606 of the pixel sensor array 222 is less covered by the grid extension 228. Therefore, compared to Examples 600, 602, and 604, a greater amount of incident light can pass through to the photodiode 112 of the autofocus pixel sensor 226 in Example 606.

[0172] The greater the amount of grid extension 228 covering the photodiode 112 of the autofocus pixel sensor 226, the smaller the full well capacity (FWC) that the autofocus pixel sensor 226 has. Thus, the autofocus pixel sensor 226 in example 606 can have a greater full well capacity than the autofocus pixel sensor 226 in example 606, the autofocus pixel sensor 226 in example 604 can have a greater full well capacity than the autofocus pixel sensor 226 in example 604, and the autofocus pixel sensor 226 in example 604 can have a greater full well capacity than the autofocus pixel sensor 226 in example 600. An autofocus pixel sensor 226 with a greater full well capacity can have greater autofocus performance in low light situations, such as in night vision use cases, because the greater full well capacity enables the autofocus pixel sensor 226 to absorb a greater amount of incident light for determining the focus of the pixel sensor array 222. Conversely, in well-lit situations, such as in daytime use cases, less full well capacity is needed, and an autofocus pixel sensor 226 with less full well capacity can have faster incident light detection, thereby enabling fast autofocus performance in well-lit situations.

[0173] As Figure 6 further shown in FIGS. 6A-6D, the metal grid structures 224 and associated grid extensions 228 in example 600, example 602, example 604, and example 606 can have a cross-sectional shape or profile that is approximately an inverted trapezoid. For example, the cross-sectional width of the top surface of the metal grid structures 224 and associated grid extensions 228 in example 600, example 602, example 604, and example 606 can be greater than the cross-sectional width of the bottom surface of the metal grid structures 224 and associated grid extensions 228 in example 600, example 602, example 604, and example 606. Thus, in example 600, example 602, example 604, and example 606, the cross-sectional width of the metal grid structures 224 and associated grid extensions 228 decreases from the top surface to the bottom surface.

[0174] As mentioned above, Figure 6 are provided as examples. Other examples can differ from what is described Figure 6 .

[0175] Figure 7 FIG. 7 is a schematic diagram of an example 700 of a pixel sensor array 222 of a sensor die 208, in accordance with some embodiments of the present disclosure. Figure 7A cross-sectional view of an example 700 of a pixel sensor array 222 is illustrated. In the example 700, the pixel sensor array 222 includes autofocus pixel sensors 226 for which different amounts of the associated photodiodes 112 are covered by the mesh extensions 228 of the metal mesh structure 224. For example, a first autofocus pixel sensor 226 in the pixel sensor array 222 includes a first photodiode 112 for which a first mesh extension 228 laterally extends over a top portion of the first photodiode by a distance D9. A second autofocus pixel sensor 226 in the pixel sensor array 222 includes a second photodiode 112 for which a second mesh extension 228 laterally extends over a top portion of the second photodiode 112 by a distance D10 that is greater than the distance D9. If the first and second photodiodes 112 have approximately the same cross-sectional width, then a greater amount of area of the second photodiode 112 is shielded from incident light as compared to the first photodiode 112. Thus, the first photodiode 112 can have a greater full-well capacity than the second photodiode 112, which means that the first autofocus pixel sensor 226 can have greater low-light performance than the second autofocus pixel sensor 226. Conversely, the smaller full-well capacity of the second photodiode 112 can enable the second photodiode 112 to generate photo current 110 faster than the first photodiode 112 in a well-lit situation, which means that the second autofocus pixel sensor 226 can have faster autofocus performance than the first autofocus pixel sensor 226 in a well-lit situation.

[0176] Inclusion of the first and second autofocus pixel sensors 226 in the same pixel sensor array 222 enables high autofocus performance in different illumination situations. The greater full-well capacity of the first autofocus pixel sensor 226 enables high autofocus performance in a low-light situation, and the smaller full-well capacity of the second autofocus pixel sensor 226 enables high autofocus performance in a well-lit situation.

[0177] As further shown in Figure 7 The metal mesh structure 224 and associated mesh extensions 228 above the autofocus pixel sensors 226 can have a cross-sectional shape or profile that is approximately trapezoidal. For example, a cross-sectional width of a top surface of the metal mesh structure 224 and associated mesh extensions 228 can be less than a cross-sectional width of a bottom surface of the metal mesh structure 224 and associated mesh extensions 228. Thus, the cross-sectional width of the metal mesh structure 224 and associated mesh extensions 228 increases from the top surface to the bottom surface.

[0178] As noted above, Figure 7 is provided as an example. Other examples can differ from what is described with respect to Figure 7The.

[0179] Figure 8 is a schematic diagram of an example 800 of a pixel sensor array 222 of a sensor die 208 as described in some embodiments of the present disclosure. Figure 8 A cross-sectional view of the example 800 of the pixel sensor array 222 is illustrated. In the example 800, the pixel sensor array 222 includes autofocus pixel sensors 226 having photodiodes 112 of different cross-sectional widths. For example, a first autofocus pixel sensor 226 can have a first photodiode 112 having a first cross-sectional width Wl that is greater than a second cross-sectional width W2 of a second photodiode 112 of a second autofocus pixel sensor 226. This results in the first autofocus pixel sensor 226 and the second autofocus pixel sensor 226 having different full well capacities.

[0180] Further, the first mesh extension 228 laterally extends over the top of the first photodiode 112 by a distance Dl l and the second mesh extension 228 laterally extends over the top of the second photodiode 112 by a distance D12, where the distance Dl l and the distance D12 can be the same or different distances. For example, the distance Dl l can be greater than the distance D12, resulting in the same or different percentages of the areas of the first photodiode 112 and the second photodiode 112 being shielded from incident light. As another example, the distance Dl l and the distance D12 can be approximately equal, resulting in different percentages of the areas of the first photodiode 112 and the second photodiode 112 being shielded from incident light.

[0181] As Figure 8 Further as shown in FIG. 6, the metal mesh structure 224 and the associated mesh extensions 228 over the autofocus pixel sensor 226 can have a cross-sectional shape or profile that is approximately trapezoidal. For example, a cross-sectional width of a top surface of the metal mesh structure 224 and the associated mesh extensions 228 can be less than a cross-sectional width of a bottom surface of the metal mesh structure 224 and the associated mesh extensions 228. Thus, the cross-sectional width of the metal mesh structure 224 and the associated mesh extensions 228 increases from the top surface to the bottom surface.

[0182] As described above, Figure 8 is provided as an example. Other examples can differ from what is described with respect to Figure 8 the present disclosure.

[0183] Figure 9 is a schematic diagram of an example 900 of a pixel sensor array 222 of a sensor die 208 as described in some embodiments of the present disclosure. Figure 9A cross-sectional view of an example 900 of a pixel sensor array 222 is illustrated. In the example 900, the pixel sensor array 222 includes autofocus pixel sensors 226 having photodiodes 112 with different cross-sectional widths. For example, a first autofocus pixel sensor 226 can have a first photodiode 112 with a first cross-sectional width W3 that is greater than a second cross-sectional width W4 of a second photodiode 112 of a second autofocus pixel sensor 226. This results in the first autofocus pixel sensor 226 and the second autofocus pixel sensor 226 having different full well capacities.

[0184] Further, the first mesh extension 228 laterally extends over the top of the first photodiode 112 by a distance D13 and the second mesh extension 228 laterally extends over the top of the second photodiode 112 by a distance D14, where the distance D13 and the distance D14 can be the same or different distances. For example, the distance D13 can be greater than the distance D14, resulting in the same or different percentages of the areas of the first photodiode 112 and the second photodiode 112 being shielded from incident light. As another example, the distance D13 and the distance D14 can be approximately equal, resulting in different percentages of the areas of the first photodiode 112 and the second photodiode 112 being shielded from incident light.

[0185] As further shown in Figure 8 the metal mesh structure 224 and the associated mesh extensions 228 over the autofocus pixel sensor 226 can have an approximately inverted-trapezoidal cross-sectional shape or profile. For example, a cross-sectional width of a top surface of the metal mesh structure 224 and the associated mesh extensions 228 can be greater than a cross-sectional width of a bottom surface of the metal mesh structure 224 and the associated mesh extensions 228. Thus, the cross-sectional width of the metal mesh structure 224 and the associated mesh extensions 228 decreases from the top surface to the bottom surface.

[0186] As noted above, Figure 9 is provided as an example. Other examples can differ from what is described with respect to Figure 9 .

[0187] Figures 10A-10E is a schematic diagram of an example implementation 1000 of a circuit system die 206 (or a portion thereof) forming some embodiments of the present disclosure. In some implementations, one or more of the semiconductor processing operations described in connection with Figures 10A-10E may be performed using one or more semiconductor processing tools, such as deposition tools, exposure tools, developer tools, etch tools, planarization tools, plating tools, ion implantation tools, and / or wafer / die transport tools, among other examples.

[0188] Turning to Figure 10AThe semiconductor layer 238 can be provided in the form of a semiconductor wafer, such as a silicon (Si) wafer, which can be provided as an SOI wafer, and / or another type of semiconductor workpiece. The semiconductor layer 238 can be provided by a semiconductor wafer provider, such as a foundry, and / or another entity.

[0189] As shown in Figure 10B One or more devices 242 can be formed in and / or on the semiconductor layer 238, as shown in FIG. 2. One or more semiconductor processing tools can be used to form one or more portions of the devices 242. For example, a deposition tool can be used to perform various deposition operations to deposit layers of the devices 242, and / or to deposit a photoresist layer for etching portions of the semiconductor layer 238 and / or deposited layers. As another example, an exposure tool can be used to expose the photoresist layer to form a pattern in the photoresist layer. As another example, a developer tool can develop the pattern in the photoresist layer. As another example, an etching tool can be used to etch portions of the semiconductor layer 238 and / or deposited layers to form the devices 242. As another example, a planarization tool can be used to planarize portions of the devices 242. As another example, an electroplating tool can be used to deposit metal structures and / or layers of the devices 242.

[0190] As shown in Figure 10B A dielectric layer 240 can be deposited over and / or on the semiconductor layer 238 and over and / or on the devices 242, as further shown in FIG. 2. A deposition tool can be used to deposit the dielectric layer 240 using a physical vapor deposition (PVD) technique, an atomic layer deposition (ALD) technique, a chemical vapor deposition (CVD) technique, an oxidation technique, another type of deposition technique. In some implementations, after the dielectric layer 240 is deposited, a planarization tool can be used to planarize the dielectric layer 240.

[0191] As shown in Figure 10C A first portion of the interconnect layer 214 of the circuitry die 206 is formed over the device layer 212, as shown in FIG. 2. To form the first portion of the interconnect layer 214, a deposition tool can be used to deposit a dielectric layer 244 (which can include one or more ILD layers, one or more IMD layers, one or more ESLs, and / or one or more of another type of dielectric layer) using a PVD technique, an ALD technique, a CVD technique, an oxidation technique, another deposition technique. In some implementations, after the dielectric layer 244 is deposited, a planarization tool can be used to planarize the dielectric layer 244.

[0192] Various operations can be performed using a deposition tool, an exposure tool, a developer tool, an etch tool, a planarization tool, a plating tool, and / or another semiconductor processing tool to form interconnect structures 248 in the first portion of interconnect layers 214. A deposition tool and / or a plating tool can be used to deposit interconnect structures 248 using PVD techniques, ALD techniques, CVD techniques, plating techniques, and / or another deposition technique. In some implementations, after depositing interconnect structures 248, a planarization tool can be used to planarize interconnect structures 248.

[0193] In some implementations, the first portion of interconnect layers 214 is built up in the z-direction in a plurality of via layers (V layers) and metallization layers (M layers). For example, a first portion of dielectric layers 244 can be formed, a recess can be formed in the first portion of dielectric layers 244, and a first interconnect structure 248 (e.g., a V0 via layer, a M0 metallization layer) can be formed in the recess. A second portion of dielectric layers 244 can be formed, a recess can be formed in the second portion of dielectric layers 244, and a second interconnect structure 248 (e.g., a VI via layer, a Ml metallization layer) can be formed in the recess. Remaining via layers and / or metallization layers of the first portion of interconnect layers 214 can be formed in a similar manner.

[0194] As shown in Figure 10D and Figure 10E , a second portion of interconnect layers 214 can be formed, and the second portion of interconnect layers 214 can include a bonding layer 246 and a bonding structure 250. As shown in Figure 10D , bonding layer 246 can be formed over and / or on dielectric layers 244, and over and / or on a topmost interconnect structure 248. A deposition tool can be used to deposit bonding layer 246 using PVD techniques, ALD techniques, CVD techniques, oxidation techniques, another deposition technique. In some implementations, after depositing bonding layer 246, a planarization tool can be used to planarize bonding layer 246.

[0195] As shown in Figure 10E , bonding structure 250 can be formed in bonding layer 246. For example, a deposition tool, an exposure tool, and a developer tool can be used to form a patterned mask layer on bonding layer 246. An etch tool can be used to etch bonding layer 246 (e.g., using a wet etch technique, a dry etch technique) to form a recess in bonding layer 246. A deposition tool and / or a plating tool can be used to deposit bonding structure 250 in the recess using CVD techniques, PVD techniques, ALD techniques, plating techniques, and / or another deposition technique. In some implementations, after depositing bonding structure 250, a planarization tool can perform a planarization operation to planarize bonding structure 250.

[0196] As described above, Figures 10A-10E is provided as an example. Other examples can differ from what is described with respect to which one or more embodiments are implemented.Figures 10A-10E The.

[0197] Figures 11A-11F is a schematic diagram of an example implementation 1100 of a sensor die 208 (or a portion thereof) described in some embodiments of the present disclosure. In some implementations, the sensor die 208 is formed in conjunction with Figures 11A-11F One or more of the semiconductor processing operations described can be performed using one or more semiconductor processing tools, such as a deposition tool, an exposure tool, a developer tool, an etch tool, a planarization tool, an electroplating tool, an ion implantation tool, and / or a wafer / die transport tool, among other examples.

[0198] Turning to Figure 11A , a semiconductor layer 252 of a device layer 216 of the sensor die 208 is provided. The semiconductor layer 252 can be provided in the form of a semiconductor wafer, such as a silicon (Si) wafer, which can be provided as an SOI wafer, and / or another type of semiconductor workpiece.

[0199] As shown in Figure 11B , the photodiodes 112 of the pixel sensors 100 of the pixel sensor array 222 and the autofocus pixel sensor 226 of the sensor die 208 can be formed in the semiconductor layer 252 in the device layer 216 of the sensor die 208. In some implementations, an ion implantation tool can be used to implant ions into the semiconductor layer 252 to form a P-N junction between a p-type doped region of the semiconductor layer 252 and an n-type doped region of the semiconductor layer 252, or a P-I-N junction between a p-type doped region of the semiconductor layer 252, an n-type doped region of the semiconductor layer 252, and an intrinsic (e.g., un-doped) semiconductor region, for the photodiodes 112.

[0200] As further shown in Figure 11B , the STI structures 256 can be formed in the semiconductor layer 252 (e.g., from a front side of the semiconductor layer 252) such that the STI structures 256 are located between the photodiodes 112. In some implementations, the STI structures 256 are formed after the photodiodes 112 are formed. In some implementations, the STI structures 256 are formed before the photodiodes 112 are formed. A deposition tool, an exposure tool, and a developer tool can be used to form a patterned mask layer on the semiconductor layer 252. An etch tool can be used to etch into the semiconductor layer 252 from the front side of the semiconductor layer 252 (e.g., using a wet etching technique, a dry etching technique) to form a recess in the front side of the semiconductor layer 252. A deposition tool can be used to deposit the STI structures 256 in the recess using a CVD technique, a PVD technique, an ALD technique, an oxidation technique, and / or another deposition technique. In some implementations, after the STI structures 256 are deposited, a planarization tool can perform a planarization operation to planarize the STI structures 256.

[0201] As shown in Figure 11C The transfer gate 114 can be formed over and / or on a front side surface of the semiconductor layer 252 of the pixel sensor 100 and the autofocus pixel sensor 226 of the pixel sensor array 222. Forming the transfer gate 114 can include depositing a gate dielectric layer on the front side surface of the semiconductor layer 252, depositing a gate electrode on the gate dielectric layer, and / or forming sidewall spacers on sidewalls of the gate electrode, among other examples.

[0202] As further shown in Figure 11C The dielectric layer 254 can be formed over and / or on the front side of the semiconductor layer 252, and over and / or on the transfer gate 114. A deposition tool can be used to deposit the dielectric layer 254 using a CVD technique, a PVD technique, an ALD technique, an electroplating technique, and / or another deposition technique. In some implementations, after depositing the dielectric layer 254, a planarization tool can perform a planarization operation to planarize the dielectric layer 254.

[0203] As shown in Figure 11D A first portion of the interconnect layer 218 of the sensor die 208 is formed over the device layer 216. To form the first portion of the interconnect layer 218, a deposition tool can be used to deposit a dielectric layer 264 (which can include one or more ILD layers, one or more IMD layers, one or more ESLs, and / or one or more of another type of dielectric layer) using a PVD technique, an ALD technique, a CVD technique, an oxidation technique, another deposition technique. In some implementations, after depositing the dielectric layer 264, a planarization tool can be used to planarize the dielectric layer 264.

[0204] Various operations can be performed using a deposition tool, an exposure tool, a developer tool, an etch tool, a planarization tool, an electroplating tool, and / or another semiconductor processing tool to form the interconnect structure 268 in the first portion of the interconnect layer 218. A deposition tool and / or an electroplating tool can be used to deposit the interconnect structure 268 using a PVD technique, an ALD technique, a CVD technique, an electroplating technique, and / or another deposition technique. In some implementations, after depositing the interconnect structure 268, a planarization tool can be used to planarize the interconnect structure 268.

[0205] In some implementations, the first portion of the interconnect layer 218 is built up in the z-direction in a plurality of via layers (V layers) and metallization layers (M layers). For example, a first portion of the dielectric layer 264 can be formed, a recess can be formed in the first portion of the dielectric layer 264, and a first interconnect structure 268 (e.g., a V0 via layer, a M0 metallization layer) can be formed in the recess. A second portion of the dielectric layer 264 can be formed, a recess can be formed in the second portion of the dielectric layer 264, and a second interconnect structure 268 (e.g., a VI via layer, a Ml metallization layer) can be formed in the recess. Remaining via layers and / or metallization layers of the first portion of the interconnect layer 218 can be formed in a similar manner.

[0206] As shown in Figure 11E and Figure 11F , a second portion of the interconnect layer 218 can be formed, and the second portion of the interconnect layer 218 can include the bonding layer 266 and the bonding structure 270. As shown in Figure 11E , the bonding layer 266 can be formed over and / or on the dielectric layer 264, and over and / or on the topmost interconnect structure 268. A deposition tool can be used to deposit the bonding layer 266 using a PVD technique, an ALD technique, a CVD technique, an oxidation technique, another deposition technique. In some implementations, after the bonding layer 266 is deposited, a planarization tool can be used to planarize the bonding layer 266.

[0207] As shown in Figure 11F , the bonding structure 270 can be formed in the bonding layer 266. For example, a deposition tool, an exposure tool, and a developer tool can be used to form a patterned mask layer on the bonding layer 266. An etching tool can be used to etch the bonding layer 266 (e.g., using a wet etching technique, a dry etching technique) to form a recess in the bonding layer 266. A deposition tool and / or an electroplating tool can be used to deposit the bonding structure 270 in the recess using a CVD technique, a PVD technique, an ALD technique, an electroplating technique, and / or another deposition technique. In some implementations, after the bonding structure 270 is deposited, a planarization tool can perform a planarization operation to planarize the bonding structure 270.

[0208] As described above, Figures 11A-11F is provided as an example. Other examples can differ from what is described with respect to Figures 11A-11F .

[0209] Figures 12A-12F is a schematic diagram of an example implementation 1200 of the image sensor device 210 (or a portion thereof) described in some embodiments of the present disclosure. In some implementations, the image sensor device 210 (or a portion thereof) is formed using the example implementation 1200 in combination with Figures 12A-12FOne or more of the semiconductor processing operations described can be performed using one or more semiconductor processing tools, such as deposition tools, exposure tools, developer tools, etch tools, planarization tools, plating tools, ion implantation tools, and / or wafer / die transport tools, among other examples.

[0210] As shown in Figure 12A and Figure 12B The circuitry die 206 and the sensor die 208 can be bonded at a bonding interface 220, which can include the bonding layer 246 and the bonding layer 266 (bonding layers of the circuitry die 206 and the sensor die 208, respectively) and the bonding structure 250 and the bonding structure 270 (bonding structures of the circuitry die 206 and the sensor die 208, respectively). A dielectric-to-dielectric bond can be formed between the bonding layer 246 and the bonding layer 266 at the bonding interface 220 using a bonding tool, and a metal-to-metal bond can be formed between the bonding structure 250 and the bonding structure 270 at the bonding interface 220.

[0211] As shown in Figure 12B After bonding, the circuitry die 206 and the sensor die 208 are stacked or vertically configured in the image sensor device 210 in the z-direction. The interconnect layer 214 of the circuitry die 206 and the interconnect layer 218 of the sensor die 208 face each other in the image sensor device 210, and the device layer 212 of the circuitry die 206 and the device layer 216 of the sensor die 208 face away from each other.

[0212] As shown in Figure 12C The DTI structure 258 can be formed in the semiconductor layer 252 (e.g., in the backside of the semiconductor layer 252) and around the photodiode 112 in the semiconductor layer 252. For example, a patterned mask layer can be formed on the semiconductor layer 252 using a deposition tool, an exposure tool, and a developer tool. The semiconductor layer 252 can be etched from the backside of the semiconductor layer 252 (e.g., using a wet etching technique, a dry etching technique) to form a trench in the backside of the semiconductor layer 252 using an etch tool. The trench is over the STI structure 256 and beside the photodiode 112.

[0213] A deposition tool can be used to deposit a dielectric liner 262 of the DTI structure 258 conformally in the trench and on the backside surface of the semiconductor layer 252 using a CVD technique, an ALD technique, and / or another conformal deposition technique. A deposition tool can be used to deposit a dielectric material 260 of the DTI structure 258 on the dielectric liner 262 in the trench and over the semiconductor layer 252 using a CVD technique, a PVD technique, an ALD technique, an oxidation technique, and / or another deposition technique. In some implementations, a planarization tool can perform a planarization operation to planarize the dielectric material 260 over the semiconductor layer 252, which can remain as a buffer layer.

[0214] As shown in Figure 12D A passivation layer 272 can be formed over and / or on the buffer layer, and a metal layer 278 can be formed over and / or on the passivation layer over the backside of the semiconductor layer 252. A deposition tool and / or an electroplating tool can be used to deposit the passivation layer 272 using a CVD technique, a PVD technique, an ALD technique, an oxidation technique, and / or another deposition technique. In some implementations, after depositing the passivation layer 272, a planarization tool can perform a planarization operation to planarize the passivation layer 272. A deposition tool and / or an electroplating tool can be used to deposit the metal layer 278 using a CVD technique, a PVD technique, an ALD technique, an electroplating technique, and / or another deposition technique. In some implementations, after depositing the metal layer 278, a planarization tool can perform a planarization operation to planarize the metal layer 278.

[0215] As shown in Figure 12E Various layers and / or structures can be formed in the bonding pad region 234 of the image sensor device 210. For example, a recess can be formed through the metal layer 278, through the passivation layer 272, through the buffer layer, through the dielectric liner 262, and / or through the semiconductor layer 252 to the dielectric layer 254. In some implementations, a deposition tool, an exposure tool, and a developer tool can be used to form a patterned mask layer on the metal layer 278. An etching tool can be used to etch through the metal layer 278, through the passivation layer 272, through the buffer layer, through the dielectric liner 262, through the semiconductor layer 252 (e.g., using a wet etching technique, a dry etching technique) from the backside of the semiconductor layer 252 to form the recess.

[0216] A dielectric layer 280 can be formed in the recess on the dielectric layer 254. A dielectric layer 282 can be formed on the dielectric layer 280. A deposition tool can be used to deposit the dielectric layer 280 and the dielectric layer 282 in the recess using a CVD technique, a PVD technique, an ALD technique, an oxidation technique, and / or another deposition technique.

[0217] An opening can be formed through dielectric layer 280, dielectric layer 282, and dielectric layer 254 such that interconnect structure 268 in interconnect layer 218 is exposed via the recess. A bond pad structure 290 can be formed in the opening such that bond pad structure 290 lands on interconnect structure 268. Bond pad structure 290 is also formed on dielectric layer 282.

[0218] In some implementations, a deposition tool, an exposure tool, and a developer tool can be used to form a patterned mask layer on dielectric layer 282. An etch tool can be used to etch through dielectric layer 282, through dielectric layer 280, and through dielectric layer 254 (e.g., using a wet etch technique, a dry etch technique) to form the recess. A deposition tool and / or an electroplating tool can be used to deposit bond pad structure 290 in the recess using a CVD technique, a PVD technique, an ALD technique, an electroplating technique, and / or another deposition technique.

[0219] Dielectric layer 284 can be formed on bond pad structure 290, and dielectric layer 286 and dielectric layer 288 can be deposited to fill the recess in bond pad region 234. A bond pad opening 292 can be formed through dielectric layer 284, dielectric layer 286, and dielectric layer 288 to expose bond pad structure 290.

[0220] A deposition tool can be used to deposit dielectric layer 284, dielectric layer 286, and dielectric layer 288 in the recess using a CVD technique, a PVD technique, an ALD technique, an oxidation technique, and / or another deposition technique. In some implementations, a deposition tool, an exposure tool, and a developer tool can be used to form a patterned mask layer on dielectric layer 288. An etch tool can be used to etch through dielectric layer 284, dielectric layer 286, and dielectric layer 288 (e.g., using a wet etch technique, a dry etch technique) to form bond pad opening 292.

[0221] As shown in FIG. 2B, metal layer 278 in pixel sensor array 222 is etched to form metal grid structure 224 and associated mesh extensions 228 that extend laterally over at least a portion of photodiode 112 of autofocus pixel sensor 226. Figure 12F

[0222] In some implementations, a deposition tool, an exposure tool, and a developer tool can be used to form a patterned mask layer on metal layer 278. An etch tool can be used to etch through metal layer 278 to passivation layer 272 (e.g., using a wet etch technique, a dry etch technique) to remove portions of metal layer 278. The remaining portions of metal layer 278 in pixel sensor array 222 correspond to metal grid structure 224 over DTI structure 258, and mesh extensions 228 that extend laterally outward from metal grid structure 224 and DTI structure 258. ​

[0223] As Figure 12F shown in FIG. 2, color filter regions 274 are formed in the openings in the metal grid structure 224 such that the color filter regions 274 are over and / or on the photodiodes 112 of the pixel sensor 100 and the photodiodes 112 of the autofocus pixel sensor 226. Micro-lenses 276 are formed over the color filter regions 274.

[0224] As described above, Figures 12A-12F is provided as an example. Other examples can differ from what is described with respect to Figures 12A-12F the described.

[0225] Figure 13 is a flow diagram of an example process 1300 associated with forming a pixel sensor array as described in connection with some embodiments of the present disclosure. In some implementations, one or more of the semiconductor processing operations described in connection with Figure 13 may be performed using one or more semiconductor processing tools, such as deposition tools, exposure tools, developer tools, etch tools, planarization tools, plating tools, ion implantation tools, and / or wafer / die transport tools, among other examples.

[0226] As Figure 13 shown in FIG. 13, the process 1300 can include forming a plurality of photodiodes in a semiconductor layer of a pixel sensor array (block 1310). For example, as described in connection with some embodiments of the present disclosure, a plurality of photodiodes 112 can be formed in a semiconductor layer 252 of a pixel sensor array 222 using one or more semiconductor processing tools. The semiconductor layer 252 can be included in a sensor die 208.

[0227] As Figure 13 shown in FIG. 13, the process 1300 can include forming a plurality of photodiodes in a semiconductor layer of a pixel sensor array (block 1310). For example, as described in connection with some embodiments of the present disclosure, a plurality of photodiodes 112 can be formed in a semiconductor layer 252 of a pixel sensor array 222 using one or more semiconductor processing tools. The semiconductor layer 252 can be included in a sensor die 208.

[0228] As Figure 13 further shown in FIG. 13, the process 1300 can include forming a metal grid structure over the semiconductor layer and over the DTI structure (block 1330). For example, as described in connection with some embodiments of the present disclosure, a metal grid structure 224 can be formed over the semiconductor layer 252 and over the DTI structure 258 using one or more semiconductor processing tools. In some implementations, forming the metal grid structure 224 includes forming a plurality of grid extensions 228 that extend laterally outward from the metal grid structure 224 and from the DTI structure 258. In some implementations, each of the plurality of grid extensions 228 extends at least partially over an individual photodiode 112 of the plurality of photodiodes 112.

[0229] Process 1300 can include additional implementations, such as any single implementation or any combination of the implementations described below and / or in connection with one or more other processes described elsewhere in this disclosure.

[0230] In a first implementation, forming the metal grid structure 224 includes depositing a layer of metal material (e.g., metal layer 278) over the semiconductor layer 252 and etching the layer of metal material to form the metal grid structure 224 such that a cross-sectional width of a top surface of a cross-section of the metal grid structure 224 is greater than a cross-sectional width of a bottom surface of the cross-section of the metal grid structure 224.

[0231] In a second implementation, alone or in combination with the first implementation, forming the metal grid structure 224 includes depositing a layer of metal material (e.g., metal layer 278) over the semiconductor layer 252 and etching the layer of metal material to form the metal grid structure 224 such that a cross-sectional width of a top surface of a cross-section of the metal grid structure 224 is less than a cross-sectional width of a bottom surface of the cross-section of the metal grid structure 224.

[0232] In a third implementation, alone or in combination with one or more of the first and second implementations, forming the plurality of grid extensions 228 includes forming the plurality of grid extensions 228 such that two or more of the plurality of grid extensions 228 have different top-view shapes.

[0233] In a fourth implementation, alone or in combination with one or more of the first through third implementations, forming the plurality of grid extensions 228 includes forming a first grid extension 228 of the plurality of grid extensions 228 such that the first grid extension 228 covers a first percentage of an area of a top surface of a first photodiode 112 of the plurality of photodiodes 112 and forming a second grid extension 228 of the plurality of grid extensions 228 such that the second grid extension 228 covers a second percentage of the area of the top surface of a second photodiode 112 of the plurality of photodiodes 112, where the first percentage is greater than the second percentage.

[0234] In a fifth implementation, alone or in combination with one or more of the first through fourth implementations, forming the plurality of photodiodes 112 includes forming a first photodiode 112 to a first cross-sectional width and forming a second photodiode 112 to a second cross-sectional width.

[0235] In a sixth implementation, alone or in combination with one or more of the first through fifth implementations, process 1300 includes forming a plurality of color filter regions 274 over the plurality of photodiodes 112 (block 1340), where a subset of the plurality of color filter regions 274 is formed between the metal grid structure 224 and the plurality of grid extensions 228.

[0236] AlthoughFigure 13 An example block of the process 1300 is shown, but in some implementations, the process 1300 includes more blocks, fewer blocks, different blocks, or differently configured blocks than those depicted in FIG. 13. Figure 13 Additionally or otherwise, two or more of the processes 1300 can be performed in parallel.

[0237] In this way, by including autofocus pixel sensors with imaging pixel sensors in a pixel sensor array, autofocus functionality can be integrated into the pixel sensor array of the image sensor devices described in some embodiments of the disclosure. A metal grid structure is included around the autofocus pixel sensors and the imaging pixel sensors in the pixel sensor array. Further, the metal grid structure includes a grid extension that is a portion of the metal grid structure that extends laterally outward over at least a portion of a photodiode of an autofocus pixel sensor, thereby shielding that portion of the photodiode from incident light. The autofocus pixel sensors can be configured in pairs in the pixel sensor array such that opposite sides of the photodiodes of the pair of autofocus pixel sensors are shielded by the grid extension. This results in a phase difference between the incident light sensed by the autofocus pixel sensors in the pair. The phase difference is used to determine a focus point for the pixel sensor array. Thus, the metal grid structure and the grid extension of the autofocus pixel sensors enable PDAF to be integrated into the pixel sensor array for high speed autofocus performance. Further, the grid extension can cover different percentages of the area of the photodiodes of different autofocus pixel sensors, which can enable high speed autofocus performance in both high and low light situations.

[0238] As described in more detail above, some embodiments of the present disclosure provide a pixel sensor array. The pixel sensor array includes a plurality of pixel sensors configured in a grid. The pixel sensing array includes a metal grid structure over a plurality of photodiodes of the pixel sensors, wherein the metal grid structure surrounds the photodiodes of the pixel sensors, and wherein the metal grid structure includes a plurality of grid extensions that extend laterally from the metal grid structure and over at least a portion of the photodiodes of a subset of the pixel sensors. In some embodiments, the grid extensions include a first grid extension and a second grid extension. The first grid extension is over a first portion of a first photodiode of a first pixel sensor of the subset of the pixel sensors. The second grid extension is over a second portion of a second photodiode of a second pixel sensor of the subset of the pixel sensors. The first portion faces away from the second photodiode. The second portion faces away from the first photodiode. In some embodiments, the grid extensions include a first grid extension and a second grid extension. The first grid extension is over a first portion of a first photodiode of a first pixel sensor of the subset of the pixel sensors from a first side of the first photodiode. The second grid extension is over a second portion of a second photodiode of a second pixel sensor of the subset of the pixel sensors from a second side of the second photodiode. Wherein the first side is approximately orthogonal to the second side. In some embodiments, the pixel sensor array further includes a first color filter and a second color filter. The first color filter is over the first photodiode. The second color filter is over the second photodiode, wherein the first color filter and the second color filter are to pass a same wavelength range of incident light. In some embodiments, a top surface of the grid extensions has a cross-sectional width that is less than a cross-sectional width of a bottom surface of the grid extensions. In some embodiments, a top surface of the grid extensions has a cross-sectional width that is greater than a cross-sectional width of a bottom surface of the grid extensions. In some embodiments, each of the grid extensions extends laterally and approximately perpendicular to a deep trench isolation structure that extends around the photodiodes.

[0239] As described in more detail above, some embodiments of the present disclosure provide an image sensor device. The image sensor device includes a plurality of pixel sensors configured in a pixel sensor array. The image sensor device includes a metal grid structure over a plurality of photodiodes of the pixel sensors, wherein the metal grid structure surrounds the photodiodes of the pixel sensors, and wherein the metal grid structure includes a first grid extension and a second grid extension. The first grid extension laterally extends from the metal grid structure over at least a portion of a first photodiode of a first pixel sensor of the pixel sensors. The second grid extension laterally extends from the metal grid over at least a portion of a second photodiode of a second pixel sensor of the pixel sensors. A first extension distance that the first grid extension laterally extends over the at least a portion of the first photodiode is different than a second extension distance that the second grid extension laterally extends over the at least a portion of the second photodiode. In some embodiments, a cross-sectional width of the first photodiode is greater than a cross-sectional width of the second photodiode. In some embodiments, the cross-sectional width of the first photodiode is approximately equal to the cross-sectional width of the second photodiode. In some embodiments, each of the first grid extension and the second grid extension has an approximately triangular top view shape. In some embodiments, the first grid extension has an approximately rectangular top view shape and the second grid extension has an approximately triangular top view shape. In some embodiments, a cross-sectional width of a top surface of the first grid extension is less than a cross-sectional width of a bottom surface of the first grid extension. In some embodiments, a cross-sectional width of a top surface of the first grid extension is greater than a cross-sectional width of a bottom surface of the first grid extension.

[0240] As described in more detail above, some embodiments of the present disclosure provide a method of forming a pixel sensor array. The method of forming a pixel sensor array includes forming a plurality of photodiodes in a semiconductor layer of the pixel sensor array. The method of forming a pixel sensor array includes forming a deep trench isolation structure around the photodiodes in the semiconductor layer. The method of forming a pixel sensor array includes forming a metal mesh structure over the semiconductor layer and over the deep trench isolation structure, where forming the metal mesh structure includes forming a plurality of mesh extensions that extend laterally outward from the metal mesh structure and from the deep trench isolation structure, and where each of the mesh extensions at least partially extends over an individual photodiode of the photodiodes. In some embodiments, forming the metal mesh structure includes depositing a layer of metal material over the semiconductor layer and etching the layer of metal material to form the metal mesh structure such that a cross-sectional width of a top surface of a cross-section of the metal mesh structure is greater than a cross-sectional width of a bottom surface of the cross-section of the metal mesh structure. In some embodiments, forming the metal mesh structure includes depositing a layer of metal material over the semiconductor layer and etching the layer of metal material to form the metal mesh structure such that a cross-sectional width of a top surface of a cross-section of the metal mesh structure is less than a cross-sectional width of a bottom surface of the cross-section of the metal mesh structure. In some embodiments, forming the mesh extensions includes forming the mesh extensions such that two or more of the mesh extensions have different upper-view shapes. In some embodiments, forming the mesh extensions includes forming a first mesh extension of the mesh extensions such that the first mesh extension covers a first percentage of an area of a top surface of a first photodiode of the photodiodes, and forming a second mesh extension of the mesh extensions such that the second mesh extension covers a second percentage of the area of a top surface of a second photodiode of the photodiodes, where the first percentage is greater than the second percentage. In some embodiments, the method of forming a pixel sensor array further includes forming a plurality of color filter regions over the photodiodes, where a subset of the color filter regions is formed between the metal mesh structure and the mesh extensions.

[0241] As described in more detail above, some embodiments of the present disclosure provide a pixel sensor array. The pixel sensor array includes a plurality of pixel sensors configured in a grid. The pixel sensor array includes a metal mesh structure over a plurality of photodiodes of the pixel sensors, where the metal mesh structure surrounds the photodiodes of the pixel sensors, and where the metal mesh structure includes a plurality of mesh extensions that extend laterally from the metal mesh structure and over at least a portion of the photodiodes of a subset of the pixel sensors. The pixel sensor array includes a plurality of color filter regions over the photodiodes, where a subset of the color filter regions is between the metal mesh structure and the mesh extensions.

[0242] The terms "about" and "substantially" can mean a value for a given quantity that varies within 5% of the value (e.g., ±1%, ±2%, ±3%, ±4%, ±5% of the value). These values are merely examples and are not intended to be limiting. It is understood that, in accordance with some embodiments of the present disclosure, the terms "about" and "substantially" can refer to a percentage of a value for a given quantity.

[0243] The foregoing outlines features of several embodiments so that a thorough comprehension of some embodiments of the present disclosure can be attained. It should be appreciated that those skilled in the art can readily apply the broad principles of some embodiments of the present disclosure to a wide variety of other processes and structures without departing from the spirit and scope of some embodiments of the present disclosure. Those skilled in the art will further appreciate that some embodiments of the present disclosure can be used as or to support hardware and / or software modules for the efficient, balanced and effective operation of the modules in a similar manner as efficiently, balanced and effectively operate the modules.

Claims

1. A pixel sensor array, comprising: Comprising: a plurality of pixel sensors configured in a grid; and a metal grid structure over a plurality of photodiodes of the plurality of pixel sensors, wherein the metal grid structure surrounds the plurality of photodiodes of the plurality of pixel sensors, and wherein the metal grid structure comprises a plurality of grid extensions that laterally extend from the metal grid structure and over at least a portion of the plurality of photodiodes of a subset of the plurality of pixel sensors.

2. The pixel sensor array of claim 1, wherein, wherein the plurality of grid extensions comprises: a first grid extension over a first portion of a first photodiode of a first pixel sensor of the subset of the plurality of pixel sensors; and a second grid extension over a second portion of a second photodiode of a second pixel sensor of the subset of the plurality of pixel sensors, wherein the first portion faces away from the second photodiode, and wherein the second portion faces away from the first photodiode.

3. The pixel sensor array of claim 1, wherein, wherein the plurality of grid extensions comprises: a first grid extension over a first portion of a first photodiode of a first pixel sensor of the subset of the plurality of pixel sensors from a first side of the first photodiode; and a second grid extension over a second portion of a second photodiode of a second pixel sensor of the subset of the plurality of pixel sensors from a second side of the second photodiode, wherein the first side is orthogonal to the second side. wherein a cross-sectional width of a top surface of the plurality of grid extensions is less than a cross-sectional width of a bottom surface of the plurality of grid extensions.

4. The pixel sensor array of claim 1, wherein, wherein a cross-sectional width of a top surface of the plurality of grid extensions is greater than a cross-sectional width of a bottom surface of the plurality of grid extensions.

5. The pixel sensor array of claim 1, wherein, wherein each of the plurality of grid extensions laterally and perpendicularly extends to a deep trench isolation structure extending around the plurality of photodiodes.

6. The pixel sensor array of claim 1, wherein, Comprising:

7. An image sensor device, comprising: a plurality of pixel sensors configured in a grid; and a metal grid structure over a plurality of photodiodes of the plurality of pixel sensors, wherein the metal grid structure surrounds the plurality of photodiodes of the plurality of pixel sensors, and wherein the metal grid structure comprises: a first grid extension laterally extending from the metal grid structure over at least a portion of a first photodiode of a first pixel sensor of the plurality of pixel sensors; and a second grid extension laterally extending from the metal grid structure over at least a portion of a second photodiode of a second pixel sensor of the plurality of pixel sensors, wherein a first extension distance that the first grid extension laterally extends over the at least a portion of the first photodiode is different from a second extension distance that the second grid extension laterally extends over the at least a portion of the second photodiode. wherein each of the first grid extension and the second grid extension has a triangular top view shape. wherein the first grid extension has a rectangular top view shape; and 8. The image sensor device of claim 7, wherein, wherein the second grid extension has a triangular top view shape.

9. The image sensor device of claim 7, wherein the first and second image sensor devices are configured to operate in a single frame time. 5 Comprising: a plurality of pixel sensors configured in a grid; and 10. A pixel sensor array, comprising: ​ ​ a metal grid structure over the plurality of photodiodes of the plurality of pixel sensors, wherein the metal grid structure surrounds the plurality of photodiodes of the plurality of pixel sensors, and the metal grid structure includes a plurality of grid extensions that extend laterally from the metal grid structure and over at least a portion of the plurality of photodiodes of a subset of the plurality of pixel sensors; and a plurality of color filter regions over the plurality of photodiodes, wherein a subset of the plurality of color filter regions is between the metal grid structure and the plurality of grid extensions.

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