Full-link signal acquisition optimization circuit based on IEPE

Abstract

The utility model discloses an IEPE-based full-link signal acquisition optimization circuit, which comprises a protection filter circuit, a constant current source adjustable circuit, an operational amplifier circuit, an active low-pass filter circuit, a voltage follower circuit and a differential operational circuit, the protection filter circuit, the operational amplifier circuit, the active low-pass filter circuit, the voltage follower circuit and the differential operational circuit are electrically connected in sequence, the constant current source adjustable circuit is connected to the protection filter circuit, the protection filter circuit is used for being electrically connected with an IEPE signal interface, and interference of effective signals is inhibited through a constructed three-level protection filter system. The voltage follower circuit guarantees the integrity of effective signals through high input impedance and low output impedance. According to the utility model, full-link collaborative optimization is carried out on an IEPE signal acquisition system, the transmission quality and integrity of signals are effectively improved, and the stability and anti-interference performance of the system are enhanced.

Description

Technical Field

[0001] This utility model relates to the field of industrial sensor signal conditioning technology, and more specifically, to a full-link signal acquisition optimization circuit based on IEPE. Background Technology

[0002] IEPE is a two-wire sensor technology. Its core feature is the integration of a piezoelectric sensing element and a preamplifier into a single package, using a constant current source (typically 2-20mA) to multiplex signal transmission and power supply. Traditional solutions use discrete components such as the LM317 to construct the constant current source, which suffers from large size, low integration, difficulty in multi-channel design, and a high output current temperature drift coefficient, leading to fluctuations in sensor power supply. The overall signal acquisition circuit also exhibits high noise and distortion rates, and weak anti-interference and protection capabilities.

[0003] Therefore, a new solution is needed to address the above problems. Utility Model Content

[0004] The purpose of this invention is to overcome the shortcomings of the prior art and provide a full-link signal acquisition optimization circuit based on IEPE.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] An IEPE-based end-to-end signal acquisition optimization circuit includes a protection filter circuit, an adjustable constant current source circuit, an operational amplifier circuit, an active low-pass filter circuit, a voltage follower circuit, and a differential operational circuit. The protection filter circuit, operational amplifier circuit, active low-pass filter circuit, voltage follower circuit, and differential operational circuit are electrically connected in sequence. The adjustable constant current source circuit is connected to the protection filter circuit. The protection filter circuit is used to electrically connect to the IEPE signal interface. The constructed three-level protection filter system suppresses interference with the effective signal. The voltage follower circuit ensures the integrity of the effective signal through high input impedance and low output impedance.

[0007] Furthermore, the protection filter circuit includes a diode D1, capacitors C1, C2, C3, and C4, a common-mode filter L1, resistors R3 and R4. Diode D1 and capacitor C1 are connected in parallel to the first and second pins of the common-mode filter L1. The third pin of the common-mode filter L1 is connected to the constant current adjustable circuit and one end of capacitor C2. The fourth pin of the common-mode filter L1 is connected to the other end of capacitor C2 and one end of capacitor C3. The other end of capacitor C3 is connected to one end of resistor R3. The other end of resistor R3 is connected to one end of resistor R4, one end of capacitor C4, and the operational amplifier circuit. The other end of resistor R4 is connected to the common-mode voltage, and the other end of capacitor C4 is grounded.

[0008] Furthermore, the adjustable constant current source circuit includes a constant current source A1, an error amplifier U1, a transistor Q1, a transistor Q2, a resistor R1, and a resistor R2. The non-inverting input terminal of the error amplifier U1 is connected to one end of the constant current source A1 and one end of the resistor R1. The other end of the constant current source A1 is connected to the positive power supply terminal of the error amplifier U1 and the emitter of the transistor Q2, and their common connection terminal is connected to the input voltage. The base of the transistor Q2 is connected to the collector of the transistor Q1. The base of the transistor Q1 is connected to the output terminal of the error amplifier U1. The collector of the transistor Q2 is connected to the emitter of the transistor Q1, one end of the resistor R2, the negative power supply terminal of the error amplifier U1, and the inverting input terminal of the error amplifier U1. The other end of the resistor R2 is connected to one end of the resistor R1 and a protection filter circuit.

[0009] Furthermore, the operational amplifier circuit includes operational amplifier U2, resistors R5, R6, and R7. The non-inverting input terminal of operational amplifier U2 is connected to one end of resistor R6, and the other end of resistor R6 is connected to a protection filter circuit. The inverting input terminal of operational amplifier U2 is connected to one end of resistor R5 and one end of resistor R7, respectively. The other end of resistor R5 is connected to a common-mode voltage. The other end of resistor R7 is connected to the output terminal of operational amplifier U2 and an active low-pass filter circuit, respectively. The negative power supply terminal of operational amplifier U2 is grounded, and the positive power supply terminal of operational amplifier U2 is connected to a 5V voltage.

[0010] Furthermore, the active low-pass filter circuit includes a low-pass filter U5, resistors R16, R17, R18, R19, R20, and R21, capacitors C10 and C11. The first pin of the low-pass filter U5 is connected to one end of resistors R16, R17, and R18, respectively. The other end of resistor R16 is connected to the operational amplifier circuit. The second pin of the low-pass filter U5 is connected to the other end of resistor R17. The third pin of the low-pass filter U5 is connected to the other end of resistor R18 and one end of resistor R19, respectively. The fourth pin of the low-pass filter U5 is connected to one end of capacitor C11. Its common connection terminal is connected to 5V voltage. The fifth pin of the low-pass filter U5 is connected to the other end of capacitor C11, and its common connection terminal is grounded. The sixth pin of the low-pass filter U5 is connected to one end of capacitor C10, and its common connection terminal is grounded. The seventh pin of the low-pass filter U5 is connected to the other end of capacitor C10, and its common connection terminal is connected to -5V voltage. The eighth pin of the low-pass filter U5 is connected to the voltage follower circuit and one end of resistor R21. The ninth pin of the low-pass filter U5 is connected to one end of resistor R20. The tenth pin of the low-pass filter U5 is connected to the other ends of resistor R19, resistor R20, and resistor R21.

[0011] Furthermore, the voltage follower circuit includes an operational amplifier U4, resistors R14 and R15, capacitors C8 and C9. The non-inverting input of the operational amplifier U4 is connected to one end of resistor R14. The other end of resistor R14 is connected to one end of resistor R15, one end of capacitor C8, and one end of capacitor C9. The other end of resistor R15 is connected to an active low-pass filter circuit. The other end of capacitor C8 is grounded. The other end of capacitor C9 is connected to the output of operational amplifier U4, the inverting input of operational amplifier U4, and the differential operational circuit. The negative power supply terminal of operational amplifier U4 is grounded, and the positive power supply terminal of operational amplifier U4 is connected to a 5V voltage.

[0012] Furthermore, the differential operational circuit includes a differential operational amplifier U3, resistors R8, R9, R10, R11, R12, R13, capacitors C5, C6, and C7. The first pin of the differential operational amplifier U3 is connected to one end of resistor R12, one end of capacitor C6, and one end of resistor R10. The other end of resistor R12 is connected to a common-mode voltage. The second pin of the differential operational amplifier U3 is connected to a common-mode voltage. The third pin of the differential operational amplifier U3 is connected to a 5V voltage. The fourth pin of the differential operational amplifier U3 is connected to one end of resistor R8 and one end of capacitor C7. At the other end of 6, the other end of resistor R8 is connected to one end of capacitor C5 and the other end of resistor R10, the fifth pin of differential operational amplifier U3 is connected to one end of capacitor C7 and one end of resistor R9, the other end of resistor R9 is connected to the other end of capacitor C5 and one end of resistor R11, the sixth pin of differential operational amplifier U3 is grounded, the seventh pin of differential operational amplifier U3 is connected to 5V voltage, the eighth pin of differential operational amplifier U3 is connected to one end of resistor R13, the other end of capacitor C7 and the other end of resistor R11, and the other end of resistor R13 is connected to a voltage follower circuit.

[0013] The beneficial effects of this utility model are: This utility model performs full-link collaborative optimization for the IEPE signal acquisition system, effectively improving the signal transmission quality and integrity, and enhancing the system's stability and anti-interference capabilities. Attached Figure Description

[0014] Figure 1 This is a circuit block diagram of the end-to-end signal acquisition optimization circuit based on IEPE in this embodiment;

[0015] Figure 2 This is a circuit diagram of an IEPE-based end-to-end signal acquisition optimization circuit in this embodiment.

[0016] Figure labels: 1. Protective filter circuit; 2. Adjustable constant current source circuit; 3. Operational amplifier circuit; 4. Active low-pass filter circuit; 5. Voltage follower circuit; 6. Differential operational circuit. Detailed Implementation

[0017] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0018] Example: A full-link signal acquisition optimization circuit based on IEPE, such as... Figure 1 As shown, the circuit includes a protective filter circuit 1, a constant current source adjustable circuit 2, an operational amplifier circuit 3, an active low-pass filter circuit 4, a voltage follower circuit 5, and a differential operational circuit 6. The protective filter circuit 1, operational amplifier circuit 3, active low-pass filter circuit 4, voltage follower circuit 5, and differential operational circuit 6 are connected in sequence. The constant current source adjustable circuit 2 is connected to the protective filter circuit 1.

[0019] The protection filter circuit 1 is used for electrical connection to the IEPE signal interface, and suppresses interference with the valid signal through a constructed three-level protection filter system. Specifically:

[0020] like Figure 2 As shown, the protection filter circuit 1 includes diode D1, capacitors C1, C2, C3, and C4, a common-mode filter L1, resistors R3 and R4. Diode D1 is a bidirectional ESD transistor. Diode D1 and capacitor C1 are connected in parallel to the first and second pins of the common-mode filter L1. The third pin of the common-mode filter L1 is connected to one end of resistor R2 and one end of capacitor C2 in the constant current adjustable circuit. The fourth pin of the common-mode filter L1 is connected to the other end of capacitor C2 and one end of capacitor C3. The other end of capacitor C3 is connected to one end of resistor R3. The other end of resistor R3 is connected to one end of resistor R4, one end of capacitor C4, and resistor R6 in the operational amplifier circuit 3. The other end of resistor R4 is connected to the common-mode voltage, and the other end of capacitor C4 is grounded.

[0021] In the protection filter circuit 1, a three-stage architecture of ESD tube-common mode filter-RC filter is adopted to achieve full-band suppression from kV level surge to mV level noise, which can greatly improve the anti-interference and protection capabilities of the circuit signal input port.

[0022] Furthermore, such as Figure 2As shown, the adjustable constant current source circuit includes a constant current source A1, an error amplifier U1, a transistor Q1, a transistor Q2, resistors R1 and R2. The non-inverting input of the error amplifier U1 is connected to one end of the constant current source A1 and one end of the resistor R1. The constant current source A1 is a precision micro constant current source. The other end of the constant current source A1 is connected to the positive power supply terminal of the error amplifier U1 and the emitter of the transistor Q2, and their common connection terminal is connected to the input voltage. The base of the transistor Q2 is connected to the collector of the transistor Q1. The base of the transistor Q1 is connected to the output terminal of the error amplifier U1. The collector of the transistor Q2 is connected to the emitter of the transistor Q1, one end of the resistor R2, the negative power supply terminal of the error amplifier U1, and the inverting input terminal of the error amplifier U1. The other end of the resistor R2 is connected to one end of the resistor R1 and the third pin of the common-mode filter L1 in the protection filter circuit 1.

[0023] The constant current source adjustable circuit 2 is based on a single resistor adjustment mechanism. It sets a wide range of output current through the resistor housing, with an initial accuracy of 1% and an extremely low temperature coefficient. It can also be extended to a digital potentiometer to dynamically adjust the output current.

[0024] Furthermore, such as Figure 2 As shown, the operational amplifier circuit 3 includes operational amplifier U2, resistors R5, R6, and R7. The non-inverting input of operational amplifier U2 is connected to one end of resistor R6, and the other end of resistor R6 is connected to resistor R3 in the protection filter circuit 1. The inverting input of operational amplifier U2 is connected to one end of resistor R5 and one end of resistor R7, respectively. The other end of resistor R5 is connected to the common-mode voltage. The other end of resistor R7 is connected to the output of operational amplifier U2 and resistor R16 in the active low-pass filter circuit 4, respectively. The negative power supply terminal of operational amplifier U2 is grounded, and the positive power supply terminal of operational amplifier U2 is connected to a 5V voltage.

[0025] The operational amplifier circuit 3 allows for the configuration of signal gain as needed through resistor adjustment, and its high common-mode rejection ratio also enhances the protection against power supply interference.

[0026] Furthermore, such as Figure 2As shown, the active low-pass filter circuit 4 includes a low-pass filter U5, resistors R16, R17, R18, R19, R20, and R21, capacitors C10 and C11. The first pin of the low-pass filter U5 is connected to one end of resistors R16, R17, and R18, respectively. The other end of resistor R16 is connected to resistor R7 in the operational amplifier circuit 3. The second pin of the low-pass filter U5 is connected to the other end of resistor R17. The third pin of the low-pass filter U5 is connected to the other end of resistor R18 and one end of resistor R19, respectively. The fourth pin of the low-pass filter U5 is connected to one end of capacitor C11, and its… The common connection terminal is connected to 5V. The fifth pin of the low-pass filter U5 is connected to the other end of capacitor C11, and its common connection terminal is grounded. The sixth pin of the low-pass filter U5 is connected to one end of capacitor C10, and its common connection terminal is grounded. The seventh pin of the low-pass filter U5 is connected to the other end of capacitor C10, and its common connection terminal is connected to -5V. The eighth pin of the low-pass filter U5 is connected to one end of resistor R15 and resistor R21 in voltage follower circuit 5. The ninth pin of the low-pass filter U5 is connected to one end of resistor R20. The tenth pin of the low-pass filter U5 is connected to the other ends of resistor R19, resistor R20, and resistor R21.

[0027] In the active low-pass filter circuit 4, the two independent second-order filter modules integrated inside can be cascaded to realize a fourth-order filter. The continuous-time architecture can achieve extremely low noise (typical value <10nV / √Hz) and low distortion (THD <0.01%).

[0028] Furthermore, such as Figure 2 As shown, the voltage follower circuit 5 includes an operational amplifier U4, resistors R14 and R15, capacitors C8 and C9. The non-inverting input of the operational amplifier U4 is connected to one end of resistor R14. The other end of resistor R14 is connected to one end of resistor R15, one end of capacitor C8, and one end of capacitor C9. The other end of resistor R15 is connected to pin 8 of the low-pass filter U5 in the active low-pass filter circuit 4. The other end of capacitor C8 is grounded. The other end of capacitor C9 is connected to the output of the operational amplifier U4, the inverting input of the operational amplifier U4, and resistor R13 in the differential operational circuit 6. The negative power supply terminal of the operational amplifier U4 is grounded, and the positive power supply terminal of the operational amplifier U4 is connected to a 5V voltage.

[0029] The voltage follower circuit 5 achieves signal isolation and temperature transmission through high input impedance (megaohm level) and low output impedance (milliohm level), enhances driving capability, and ensures signal integrity under long distance or complex loads.

[0030] Furthermore, such as Figure 2As shown, the differential operational circuit 6 includes a differential operational amplifier U3, resistors R8, R9, R10, R11, R12, and R13, and capacitors C5, C6, and C7. The first pin of the differential operational amplifier U3 is connected to one end of resistor R12, one end of capacitor C6, and one end of resistor R10. The other end of resistor R12 is connected to the common-mode voltage. The second pin of the differential operational amplifier U3 is connected to the common-mode voltage. The third pin of the differential operational amplifier U3 is connected to a 5V voltage. The fourth pin of the differential operational amplifier U3 is connected to one end of resistor R8 and the other end of capacitor C6. One end of resistor R8 is connected to one end of capacitor C5 and the other end of resistor R10. The fifth pin of differential operational amplifier U3 is connected to one end of capacitor C7 and one end of resistor R9. The other end of resistor R9 is connected to the other end of capacitor C5 and one end of resistor R11. The sixth pin of differential operational amplifier U3 is grounded. The seventh pin of differential operational amplifier U3 is connected to 5V voltage. The eighth pin of differential operational amplifier U3 is connected to one end of resistor R13, the other end of capacitor C7 and the other end of resistor R11. The other end of resistor R13 is connected to capacitor C9 in voltage follower circuit 5.

[0031] In use, the IEPE signal, after being input from the interface, first passes through a three-stage protection filtering system constructed by the protection filter circuit 1 to suppress interference from electrostatic discharge, common-mode noise, and high-frequency noise on the effective signal. Simultaneously, a low-noise adjustable constant current source circuit 2 completes the stable constant current power supply and signal transmission tasks for the sensor, with output ripple controllable at the μV level. The purified signal enters the high-precision operational amplifier circuit 3, where a closed-loop feedback architecture ensures 0.1% linearity, achieving lossless signal amplification. Subsequently, the signal passes through the active low-pass filter circuit 4. Its continuous-time active filtering technology, through rail-to-rail input / output characteristics, retains the effective signal from 0.5Hz to 10kHz while achieving a steep attenuation slope of -40dB / dec for high-frequency (>10kHz) noise. Combined with internal dynamic impedance matching technology, it eliminates the phase distortion of traditional RC filters and controls the system noise floor to the μV level. As the core buffer module in the circuit, the follower plays a crucial role in ensuring signal integrity across the entire link due to its unique characteristics of high input impedance (>1MΩ) and low output impedance (<0.1Ω). As an impedance matching hub, it effectively isolates the dynamic interference between the sensitive signal source in the preceding stage and the load in the following stage, and eliminates waveform distortion caused by signal reflection (overshoot <5%) through a dynamic impedance matching mechanism. At the same time, it achieves lossless signal transmission by relying on a low-noise transmission architecture (noise floor <3μVrms). Finally, the signal is converted from single-ended to differential and enters a high-performance fully differential operational amplifier. Through its fully differential architecture and high bandwidth characteristics (145MHz), it achieves lossless signal conversion and anti-interference optimization. The internal closed-loop feedback mechanism dynamically adjusts the output common-mode voltage, so that the single-ended input signal is accurately split into differential pairs with equal amplitude and strictly out of phase, with a common-mode rejection ratio >120dB, effectively eliminating electromagnetic interference and baseline drift in long-distance transmission.

[0032] The above description is merely a preferred embodiment of this utility model. The protection scope of this utility model is not limited to the above embodiments. All technical solutions falling within the scope of this utility model's concept are protected. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principle of this utility model should also be considered within the protection scope of this utility model.

Claims

1. A full-link signal acquisition and optimization circuit based on IEPE, characterized in that, The circuit includes a protective filter circuit (1), a constant current source adjustable circuit (2), an operational amplifier circuit (3), an active low-pass filter circuit (4), a voltage follower circuit (5), and a differential operational circuit (6). The protective filter circuit (1), operational amplifier circuit (3), active low-pass filter circuit (4), voltage follower circuit (5), and differential operational circuit (6) are connected in sequence. The constant current source adjustable circuit (2) is connected to the protective filter circuit (1). The protective filter circuit (1) is used to electrically connect to the IEPE signal interface. The three-level protective filter system is constructed to suppress interference of the effective signal. The voltage follower circuit (5) ensures the integrity of the effective signal through high input impedance and low output impedance.

2. The end-to-end signal acquisition and optimization circuit based on IEPE according to claim 1, characterized in that, The protection filter circuit (1) includes diode D1, capacitor C1, capacitor C2, capacitor C3, capacitor C4, common-mode filter L1, resistor R3 and resistor R4. Diode D1 and capacitor C1 are connected in parallel to the first and second pins of common-mode filter L1. The third pin of common-mode filter L1 is connected to the constant current adjustable circuit and one end of capacitor C2. The fourth pin of common-mode filter L1 is connected to the other end of capacitor C2 and one end of capacitor C3. The other end of capacitor C3 is connected to one end of resistor R3. The other end of resistor R3 is connected to one end of resistor R4, one end of capacitor C4 and operational amplifier circuit (3). The other end of resistor R4 is connected to the common-mode voltage. The other end of capacitor C4 is grounded.

3. The end-to-end signal acquisition and optimization circuit based on IEPE according to claim 1, characterized in that, The adjustable constant current source circuit (2) includes a constant current source A1, an error amplifier U1, a transistor Q1, a transistor Q2, a resistor R1, and a resistor R2. The non-inverting input terminal of the error amplifier U1 is connected to one end of the constant current source A1 and one end of the resistor R1. The other end of the constant current source A1 is connected to the positive power supply terminal of the error amplifier U1 and the emitter of the transistor Q2, and their common connection terminal is connected to the input voltage. The base of the transistor Q2 is connected to the collector of the transistor Q1. The base of the transistor Q1 is connected to the output terminal of the error amplifier U1. The collector of the transistor Q2 is connected to the emitter of the transistor Q1, one end of the resistor R2, the negative power supply terminal of the error amplifier U1, and the inverting input terminal of the error amplifier U1. The other end of the resistor R2 is connected to one end of the resistor R1 and the protection filter circuit (1).

4. The end-to-end signal acquisition and optimization circuit based on IEPE according to claim 1, characterized in that, The operational amplifier circuit (3) includes an operational amplifier U2, resistors R5, R6 and R7. The non-inverting input terminal of the operational amplifier U2 is connected to one end of resistor R6, and the other end of resistor R6 is connected to the protection filter circuit (1). The inverting input terminal of the operational amplifier U2 is connected to one end of resistor R5 and one end of resistor R7, respectively. The other end of resistor R5 is connected to the common-mode voltage. The other end of resistor R7 is connected to the output terminal of the operational amplifier U2 and the active low-pass filter circuit (4), respectively. The negative power supply terminal of the operational amplifier U2 is grounded, and the positive power supply terminal of the operational amplifier U2 is connected to a 5V voltage.

5. The end-to-end signal acquisition and optimization circuit based on IEPE according to claim 1, characterized in that, The active low-pass filter circuit (4) includes a low-pass filter U5, resistors R16, R17, R18, R19, R20, R21, capacitors C10 and C11. The first pin of the low-pass filter U5 is connected to one end of resistors R16, R17, and R18, respectively. The other end of resistor R16 is connected to the operational amplifier circuit (3). The second pin of the low-pass filter U5 is connected to the other end of resistor R17. The third pin of the low-pass filter U5 is connected to the other end of resistor R18 and one end of resistor R19, respectively. The fourth pin of the low-pass filter U5 is connected to one end of capacitor C11, and its… The common connection terminal is connected to a 5V voltage. The fifth pin of the low-pass filter U5 is connected to the other end of capacitor C11, and its common connection terminal is grounded. The sixth pin of the low-pass filter U5 is connected to one end of capacitor C10, and its common connection terminal is grounded. The seventh pin of the low-pass filter U5 is connected to the other end of capacitor C10, and its common connection terminal is connected to a -5V voltage. The eighth pin of the low-pass filter U5 is connected to one end of the voltage follower circuit (5) and one end of resistor R21. The ninth pin of the low-pass filter U5 is connected to one end of resistor R20. The tenth pin of the low-pass filter U5 is connected to the other ends of resistor R19, resistor R20, and resistor R21.

6. The end-to-end signal acquisition and optimization circuit based on IEPE according to claim 1, characterized in that, The voltage follower circuit (5) includes an operational amplifier U4, resistors R14 and R15, capacitors C8 and C9. The non-inverting input of the operational amplifier U4 is connected to one end of resistor R14. The other end of resistor R14 is connected to one end of resistor R15, one end of capacitor C8, and one end of capacitor C9. The other end of resistor R15 is connected to an active low-pass filter circuit (4). The other end of capacitor C8 is grounded. The other end of capacitor C9 is connected to the output of operational amplifier U4, the inverting input of operational amplifier U4, and the differential operational circuit (6). The negative power supply of operational amplifier U4 is grounded, and the positive power supply of operational amplifier U4 is connected to a 5V voltage.

7. The end-to-end signal acquisition and optimization circuit based on IEPE according to claim 1, characterized in that, The differential operational circuit (6) includes a differential operational amplifier U3, resistors R8, R9, R10, R11, R12, R13, capacitors C5, C6, and C7. The first pin of the differential operational amplifier U3 is connected to one end of resistor R12, one end of capacitor C6, and one end of resistor R10. The other end of resistor R12 is connected to a common-mode voltage. The second pin of the differential operational amplifier U3 is connected to a common-mode voltage. The third pin of the differential operational amplifier U3 is connected to a 5V voltage. The fourth pin of the differential operational amplifier U3 is connected to one end of resistor R8 and the other end of capacitor C6. One end of the resistor R8 is connected to one end of the capacitor C5 and the other end of the resistor R10. The fifth pin of the differential operational amplifier U3 is connected to one end of the capacitor C7 and one end of the resistor R9. The other end of the resistor R9 is connected to the other end of the capacitor C5 and one end of the resistor R11. The sixth pin of the differential operational amplifier U3 is grounded. The seventh pin of the differential operational amplifier U3 is connected to a 5V voltage. The eighth pin of the differential operational amplifier U3 is connected to one end of the resistor R13, the other end of the capacitor C7 and the other end of the resistor R11. The other end of the resistor R13 is connected to a voltage follower circuit (5).

Images