Radio frequency switch matrix

Abstract

The utility model discloses a radio frequency switch matrix, which relates to the field of switches, and comprises a signal coding module, a hardware decoding module, a signal processing module and a signal processing module, the hardware decoding module is used for decoding the coded signal and sending the decoded signal to the NAND calculation module; the NAND calculation module is used for obtaining a logic signal based on the decoded signal and outputting the logic signal to the signal transmitting module; the signal transmitting module is used for outputting a radio frequency signal based on the logic signal and controlling the corresponding port to be conducted; compared with the prior art, the utility model has the beneficial effects that a switch control signal is converted from a coding signal, a decoding signal, a logic signal and a radio frequency signal, the logic control is realized in a hardware coding and decoding mode, the I / O (Input / Output) resource requirement is greatly reduced, great convenience is brought, and the cost is reduced. The size is small, control is easy, use is easy, and universality is high.

Description

Technical Field

[0001] This utility model relates to the field of switches, specifically a radio frequency switch matrix. Background Technology

[0002] In RF chip mass production testing systems, it is often necessary to deal with multiple inputs and multiple outputs. Connecting test equipment such as VST (Vector Signal Transceiver) or VNA (Vector Network Analyzer) only has a single input and single output port. RF switch matrix is ​​a multiplexing device used to automatically switch signal paths in the test system. When facing multi-device testing, it switches different devices under test (DUTs) to VNA or VST.

[0003] To meet the requirements of versatility, most RF switch matrices on the market use Ethernet communication control, resulting in large size and cumbersome operation, which need to be improved. Utility Model Content

[0004] The purpose of this invention is to provide a radio frequency switch matrix to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, this utility model provides the following technical solution:

[0006] A radio frequency switch matrix, comprising:

[0007] The signal encoding module is used to output the encoded signal that is turned on at the corresponding port, and output it to the hardware decoding module;

[0008] The hardware decoding module is used to decode the encoded signal and send the decoded signal to the NAND calculation module;

[0009] The NAND calculation module is used to obtain logic signals based on the decoded signals and output them to the signal transmission module;

[0010] The signal transmitting module is used to output radio frequency signals based on logic signals to control the conduction of corresponding ports;

[0011] The signal encoding module is connected to the hardware decoding module, the hardware decoding module is connected to the NAND module, and the NAND module is connected to the signal transmission module.

[0012] As a further embodiment of this utility model: the signal encoding module includes chip U16 and chip U17, the model of chip U16 and chip U17 is PE42512, pins 12 to 15 of chip U16 are connected to the hardware decoding module, and pins 12 to 15 of chip U17 are also connected to the hardware decoding module.

[0013] As a further embodiment of this utility model: the hardware decoding module includes chip U6 and chip U15, the model of chips U6 and U15 is CD74HC154M96E4, pins 20 to 23 of chip U6 are connected to the signal encoding module, pins 1 to 11 and pins 13 to 17 of chip U6 are connected to the NAND calculation module, pins 20 to 23 of chip U15 are connected to the signal encoding module, and pins 1 to 11 and pins 13 to 17 of chip U15 are connected to the NAND calculation module.

[0014] As a further improvement of this utility model: the NAND calculation module includes multiple NAND calculation units, each including a chip U2, the chip U2 being a 74LVC1G57 chip, pins 1 and 6 of the chip U2 being connected to a hardware decoding module, and pin 4 of the chip U2 being connected to a signal transmission module.

[0015] As a further improvement of this utility model: the signal transmission module includes multiple signal transmission units, and the signal transmission units correspond one-to-one with the NAND computing units. The signal transmission unit includes a chip U18, the model of which is PE42553. Pin 14 of chip U18 is connected to the NAND computing module, and pins 2 and 11 of chip U18 output radio frequency signals respectively.

[0016] Compared with the prior art, the beneficial effects of this utility model are: the switch control signal of this utility model is transformed between encoded signal, decoded signal, logic signal and radio frequency signal, realizing logic control by hardware encoding and decoding method, which greatly reduces the I / O resource requirements, brings great convenience, is small in size, simple to control, easy to use and highly versatile. Attached Figure Description

[0017] Figure 1 This is the circuit diagram of the signal encoding module.

[0018] Figure 2 This is the circuit diagram of the hardware decoding module.

[0019] Figure 3 This is the circuit diagram for the non-computation module.

[0020] Figure 4 This is the circuit diagram of the signal transmission module.

[0021] Figure 5 This is a schematic diagram of the operation of a radio frequency switch matrix. Detailed Implementation

[0022] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present utility model without creative effort are within the protection scope of the present utility model.

[0023] Please see Figures 1 to 4 A radio frequency switch matrix, comprising:

[0024] The signal encoding module is used to output the encoded signal that is turned on at the corresponding port, and output it to the hardware decoding module;

[0025] The hardware decoding module is used to decode the encoded signal and send the decoded signal to the NAND calculation module;

[0026] The NAND calculation module is used to obtain logic signals based on the decoded signals and output them to the signal transmission module;

[0027] The signal transmitting module is used to output radio frequency signals based on logic signals to control the conduction of corresponding ports;

[0028] The signal encoding module is connected to the hardware decoding module, the hardware decoding module is connected to the NAND module, and the NAND module is connected to the signal transmission module.

[0029] In this embodiment: Please refer to Figure 1 The signal encoding module includes chip U16 and chip U17. The model of chip U16 and chip U17 is PE42512. Pins 12 to 15 of chip U16 are connected to the hardware decoding module, and pins 12 to 15 of chip U17 are also connected to the hardware decoding module.

[0030] Pins 12 to 15 of chips U16 and U17 generate encoded signals, which are output to the hardware decoding module. The signals on the four ports can be high or low; therefore, theoretically, chips U16 or U17 can output 16 different encoded signals, corresponding to 16 switches: 0000, 1000, 0100, 1100, 0010, 1010, 0110, 1110, 0001, 1001, 0101, 1101, 0011, 1011, 0111, and 1111. Encoding is a common technique and does not involve any methodological innovation.

[0031] In this embodiment: Please refer to Figure 2The hardware decoding module includes chip U6 and chip U15. The model of chips U6 and U15 is CD74HC154M96E4. Pins 20 to 23 of chip U6 are connected to the signal encoding module, and pins 1 to 11 and pins 13 to 17 of chip U6 are connected to the NAND calculation module. Pins 20 to 23 of chip U15 are connected to the signal encoding module, and pins 1 to 11 and pins 13 to 17 of chip U15 are connected to the NAND calculation module.

[0032] Chips U6 and U15 decode the input encoded signal to obtain the decoded signal, which is then output to the non-computation module. Pins 1 to 11 and pins 13 to 17 of chips U6 and U15, a total of 16 pins, correspond to 16 different encoded signals to complete the decoding output. Decoding is a common technique and does not involve any methodological innovation.

[0033] In this embodiment: Please refer to Figure 3 The NAND calculation module includes multiple NAND calculation units, each including chip U2, model number 74LVC1G57. Pins 1 and 6 of chip U2 are connected to the hardware decoding module, and pin 4 of chip U2 is connected to the signal transmission module.

[0034] Only 12 switches are needed for control here, so 12 NAND calculation units are designed. In practice, up to 16 can be set. Based on the input decoded signal, the corresponding NAND calculation unit receives the signal and outputs the logic signal.

[0035] In this embodiment: Please refer to Figure 4 The signal transmission module includes multiple signal transmission units, which correspond one-to-one with the NAND computing units. Each signal transmission unit includes a chip U18, model PE42553. Pin 14 of chip U18 is connected to the NAND computing module, and pins 2 and 11 of chip U18 output radio frequency signals respectively.

[0036] The number of signal transmitting units corresponds to the number of NAND calculation units. Based on the received logic signal, the corresponding NAND calculation unit controls the corresponding pin to output the radio frequency signal. If it is based on the encoded signal of chip U16, it ultimately controls pin 2 of chip U18 to output the radio frequency signal. If it is based on the encoded signal of chip U17, it ultimately controls pin 11 of chip U18 to output the signal.

[0037] Please see Figure 5 This application can enable the conduction of radio frequency signal A port to ports 1 to 12, and simultaneously enable the conduction of B port to ports 1 to 12 (enables one of A port to ports 1 to 12 to be conducted, and B port cannot be conducted on this port, otherwise it will overwrite the conduction of A port. For example, if A port to 5 is enabled, B port to 5 cannot be set to be enabled).

[0038] In actual production, only 12 ports are needed, so only 12 ports are designed. For example, to enable conduction from port A to port 5, pins 12-15 of chip U16 output 0010 (corresponding to port 5). Simultaneously, to enable conduction from port B to port 6, pins 12-15 of chip U16 output 1010 (corresponding to port 6). The I / O control of these two chips is simultaneously connected to hardware codecs U6 and U15 for decoding. That is, YA4 (pin 5) of chip U6 outputs a high level, and BA5 (pin 6) of chip U15 outputs a high level. The corresponding fifth NAND calculation unit receives a high-level signal YA4, and the sixth NAND calculation unit receives a high-level signal YB5. The second pin of the chip U18 of the fifth signal transmitting unit outputs an RF signal to control the switch from port A to port 5 to be turned on. The eleventh pin of the chip U18 of the sixth signal transmitting unit outputs an RF signal to control the switch from port B to port 6 to be turned on. This achieves perfect control of 2-to-12 (up to 16) RF matrix switches with only 8 I / O control terminals, greatly reducing the I / O resource requirements.

[0039] The working principle of this utility model is as follows: the signal encoding module is used to output the encoded signal corresponding to the port being turned on, and output it to the hardware decoding module; the hardware decoding module is used to decode the encoded signal and send the decoded signal to the NAND calculation module; the NAND calculation module is used to obtain the logic signal based on the decoded signal and output it to the signal transmitting module; the signal transmitting module is used to output the radio frequency signal based on the logic signal and control the corresponding port to be turned on.

[0040] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects.

[0041] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A radio frequency switch matrix, characterized by The radio frequency switch matrix comprises: A signal coding module, configured to output a coded signal corresponding to the conduction of a port, and output the coded signal to a hardware decoding module; The hardware decoding module is configured to decode the coded signal and send the decoded signal to an NAND calculation module; The NAND calculation module is configured to obtain a logic signal based on the decoded signal and output the logic signal to a signal transmitting module; The signal transmitting module is configured to output a radio frequency signal based on the logic signal to control the conduction of the corresponding port; The signal coding module is connected to the hardware decoding module, the hardware decoding module is connected to the NAND calculation module, and the NAND calculation module is connected to the signal transmitting module.

2. The radio frequency switch matrix of claim 1, wherein, The signal coding module comprises a chip U16 and a chip U17, the model numbers of the chip U16 and the chip U17 are PE42512, the 12th to 15th pins of the chip U16 are connected to the hardware decoding module, and the 12th to 15th pins of the chip U17 are connected to the hardware decoding module.

3. The radio frequency switch matrix of claim 1, wherein, The hardware decoding module comprises a chip U6 and a chip U15, the model numbers of the chip U6 and the chip U15 are CD74HC154M96E4, the 20th to 23rd pins of the chip U6 are connected to the signal coding module, the 1st to 11th pins and the 13th to 17th pins of the chip U6 are connected to the NAND calculation module, the 20th to 23rd pins of the chip U15 are connected to the signal coding module, and the 1st to 11th pins and the 13th to 17th pins of the chip U15 are connected to the NAND calculation module.

4. The radio frequency switch matrix of claim 1, wherein, The NAND calculation module comprises a plurality of NAND calculation units, each of the NAND calculation units comprises a chip U2, the model number of the chip U2 is 74LVC1G57, the 1st and 6th pins of the chip U2 are connected to the hardware decoding module, and the 4th pin of the chip U2 is connected to the signal transmitting module.

5. The radio frequency switch matrix of claim 4, wherein, The signal transmitting module comprises a plurality of signal transmitting units, each of the signal transmitting units corresponds to one of the NAND calculation units, each of the signal transmitting units comprises a chip U18, the model number of the chip U18 is PE42553, the 14th pin of the chip U18 is connected to the NAND calculation module, and the 2nd and 11th pins of the chip U18 output radio frequency signals.

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