Power test system for solar cell module
By designing an automated solar cell module testing system, employing high-precision sensors and advanced data processing algorithms, the problems of low testing efficiency and poor accuracy in existing technologies have been solved. This system enables efficient and accurate performance testing of solar cell modules, adapting to modules of different specifications and improving testing efficiency and accuracy.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- 广东兰天动力工程技术有限公司
- Filing Date
- 2025-06-13
- Publication Date
- 2026-05-29
AI Technical Summary
Existing technologies for testing solar cell modules suffer from low efficiency, poor accuracy, and complex operation, failing to meet the demands for efficient and accurate testing.
An automated power testing system was designed, comprising a solar cell module testing module, a data acquisition module, a data preprocessing module, a controller module, an interface module, a memory module, a display module, and a power supply module. It employs high-precision sensors and advanced data processing algorithms, combined with an adjustable light source and a testing platform, to achieve intelligent control and automated testing.
It enables efficient, accurate, and flexible performance testing of solar cell modules, improves testing efficiency, ensures the accuracy of test results, adapts to solar cell modules of different specifications, and realizes automation and intelligence in the testing process.
Smart Images
Figure CN224305743U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of solar cell module testing technology, and in particular to a power testing system for solar cell modules. Background Technology
[0002] Solar photovoltaic power generation technology has a wide range of applications, extending from the military and aerospace fields to industries, commerce, agriculture, communications, home appliances, and public utilities. It is especially widely used in remote areas, high mountains, deserts, islands, and rural areas.
[0003] With the continuous growth of the solar photovoltaic power generation industry, engineers have increasingly higher requirements for testing and measurement solutions for solar cell modules, especially in the field of photovoltaic system application research and testing. Currently, there is no mature and comprehensive testing system that meets user requirements. Furthermore, the current analysis of photovoltaic power plant power generation efficiency relies on environmental data recorded by environmental monitoring instruments. However, conventional environmental monitoring instruments for recording radiation are all thermocouple-based radiation meters. The radiation data recorded by these instruments is inconsistent with the spectral range of solar cells, and there are also discrepancies with the solar cell modules in operation due to factors such as installation angle, temperature characteristics, and surface dust accumulation. This results in certain errors in the analysis of photovoltaic power plant power generation efficiency.
[0004] With the rapid development of solar power generation technology, performance testing of solar cell modules has become a crucial step in ensuring their quality and efficiency. Traditional power testing methods typically rely on manual operation and simple testing equipment, resulting in low efficiency, poor accuracy, and complex operation. Therefore, developing an efficient, accurate, and automated solar cell module power testing system is of significant practical importance. Utility Model Content
[0005] The technical problem to be solved by this utility model is to provide a power testing system for solar cell modules to address the shortcomings of the prior art, thereby solving the problems of low testing efficiency, poor accuracy, and complex operation in the existing technology.
[0006] To solve the above-mentioned technical problems, this utility model adopts the following technical solution:
[0007] A power testing system for solar cell modules includes a solar cell module testing module, a solar data acquisition module, a data preprocessing module, a controller module, an interface module, a clock module, a memory module, a display module, and a power supply module. The output of the solar cell module testing module is connected to the input of the solar data acquisition module, the output of the solar data acquisition module is connected to the input of the data preprocessing module, the output of the data preprocessing module is connected to the input of the controller module, the output of the controller module is connected to the memory module and the display module, and the interface module, clock module, and power supply module are each connected to the controller module.
[0008] As a further preferred embodiment of the power testing system for solar cell modules of this utility model, the solar cell module testing module includes a solar cell module, a module support, a solar data acquisition unit, a temperature sensor, and a photovoltaic cable. The solar cell module is arranged on the module support, the solar data acquisition unit is connected to the solar cell module through the photovoltaic cable, and the temperature sensor is connected to the solar data acquisition unit. The solar data acquisition unit is connected to a data preprocessing module.
[0009] As a further preferred embodiment of the power testing system for the solar cell module of this utility model, the solar data acquisition device includes a detection circuit, an auxiliary power supply, and a control circuit; the detection circuit and the auxiliary power supply are respectively connected to the control circuit, the detection circuit is connected to the temperature sensor, and the auxiliary power supply is connected to the power module; the control circuit includes a chip U2, capacitors C3, C4, and C5, a crystal oscillator X1, a switch S1, and resistors R1, R2, R3, and R4; wherein, one end of capacitor C3 is connected to one end of crystal oscillator X1 and pin 19 of chip U2, the other end of crystal oscillator X1 is connected to one end of capacitor C4 and pin 18 of chip U2, and capacitor C3... The other end of the resistor is grounded, the other end of the capacitor C4 is grounded, one end of the resistor R5 is connected to one end of the capacitor C5, one end of the switch S1, and pin 9 of the chip U2, the other end of the resistor R5 is grounded, the other end of the capacitor C5 is connected to the VCC terminal and the other end of the switch S1, one end of the resistor R1 is connected to pin 39 of the chip U2, the other end of the resistor R1 is connected to the VCC terminal, one end of the resistor R2 is connected to pin 38 of the chip U2, the other end of the resistor R2 is connected to the VCC terminal, one end of the resistor R3 is connected to pin 37 of the chip U2, the other end of the resistor R3 is connected to the VCC terminal, one end of the resistor R4 is connected to pin 36 of the chip U2, and the other end of the resistor R4 is connected to the VCC terminal.
[0010] As a further preferred embodiment of the power testing system for the solar cell module of this utility model, the data preprocessing module includes an amplification circuit and a dual operational amplifier bandpass filter. The amplification circuit comprises an OPA277 operational amplifier and resistors and capacitors. The amplification circuit and dual operational amplifier bandpass filter include a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first operational amplifier, a second operational amplifier, and a third operational amplifier. The signal input (-IN) terminal is connected to one end of the first resistor. The other end of the first resistor is connected to one end of the first capacitor, one end of the third resistor, and the negative power supply pin of the first operational amplifier. The other end of the first capacitor is connected to the other end of the third resistor and the output pin of the first operational amplifier. The +IN input terminal is connected to one end of the second resistor. The other end of the second resistor is connected to the positive power supply pin of the first operational amplifier, one end of the fourth resistor, and one end of the second capacitor. The other end of the second capacitor is connected to the other end of the fourth resistor and grounded. The output pin of the first operational amplifier is connected to one end of the fifth resistor. The other end of the fifth resistor is connected to the positive power supply pin of the second operational amplifier. The negative power supply pin of the second operational amplifier is connected to the negative power supply pin of the third operational amplifier. The positive power supply pin of the third operational amplifier is connected to one end of the eighth resistor and one end of the ninth resistor. The other end of the ninth resistor is grounded. The other end of the eighth resistor is connected to one end of the seventh resistor and the output pin of the second operational amplifier. The other end of the seventh resistor is connected to one end of the fourth capacitor. The other end of the fourth capacitor is connected to one end of the ninth resistor. The other end of the ninth resistor is connected to one end of the third capacitor. The other end of the third capacitor is grounded.
[0011] As a further preferred embodiment of the power testing system for the solar cell module of this utility model, the solar cell module adopts an 18V 330W folded photovoltaic panel.
[0012] As a further preferred embodiment of the power testing system for the solar cell module of this utility model, the power module includes a chip U1, a first resistor R10, a second resistor R11, a third resistor R12, a first diode D4, a second diode D5, a third diode D6, a first capacitor C5, a second capacitor C6, a third capacitor C7, a fourth capacitor C8, a fifth capacitor C9, a sixth capacitor C10, a seventh capacitor C11, a first inductor L4, and a second inductor L5;
[0013] In this circuit, one end of the first resistor R10 is connected to the live wire L, and the other end of the first resistor R10 is connected to the anode of the first diode D4. The cathode of the first diode D4 is connected to one end of the first capacitor C5 and one end of the first inductor L4. The other end of the first inductor L4 is connected to one end of the second capacitor C6 and the Drn pin of the chip U1. The other end of the first capacitor C5 is connected to the other end of the second capacitor C6, the anode of the second diode D5, one end of the sixth capacitor C10, one end of the seventh capacitor C11, and the neutral wire N, and grounded. One end of the third capacitor C7 is connected to the V pin of the chip U1, and the other end of the third capacitor C7 is connected to the core... The Src pin of chip U1, the Sre pin of chip U1, one end of the fourth capacitor C8, one end of the second resistor R11, and one end of the second inductor L5 are connected. The other end of the fourth capacitor C8 is connected to the FB pin of chip U1, the other end of the second resistor R11, and one end of the third resistor R12. The other end of the third resistor R12 is connected to one end of the fifth capacitor C9 and the cathode of the third diode D6. The other end of the fifth capacitor C9 is connected to the cathode of the second diode D5. The anode of the third diode D6 is connected to the other end of the second inductor L5, the other end of the sixth capacitor C10, the other end of the seventh capacitor C11, and the A5V terminal.
[0014] As a further preferred embodiment of the power testing system for the solar cell module of this utility model, the memory module adopts DDR3 memory.
[0015] As a further preferred embodiment of the power testing system for the solar cell module of this utility model, the display module adopts an LCD screen.
[0016] Compared with the prior art, the present invention, by adopting the above technical solution, has the following technical effects:
[0017] This utility model discloses a power testing system for solar cell modules, comprising a solar cell module testing module, a solar data acquisition module, a data preprocessing module, a controller module, an interface module, a clock module, a memory module, a display module, and a power supply module. It features high efficiency, precision, flexibility, and intelligence, meeting the performance testing needs of solar cell modules and possessing broad application prospects. The automated testing process significantly improves testing efficiency. High-precision sensors and advanced data processing algorithms ensure the accuracy of test results. Adjustable light sources and testing platforms adapt to solar cell modules of different specifications. The intelligent control system and data processing module achieve automation and intelligence in the testing process. Attached Figure Description
[0018] Figure 1 This is a schematic diagram of the overall structure of the power testing system for the solar cell module of this utility model;
[0019] Figure 2 This is a schematic diagram of the structure of the solar cell module testing module of this utility model;
[0020] Figure 3 This is a schematic diagram of the structure of the solar data acquisition device of this utility model;
[0021] Figure 4 This is the circuit diagram of the solar energy control circuit of this utility model;
[0022] Figure 5 This is a circuit diagram of the solar energy data preprocessing module of this utility model;
[0023] Figure 6 This is the circuit diagram of the solar power module of this utility model. Detailed Implementation
[0024] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present utility model, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present utility model without creative effort are within the scope of protection of the present utility model.
[0025] Power testing systems for solar cell modules, such as Figure 1 As shown, the system includes a solar cell module testing module, a solar data acquisition module, a data preprocessing module, a controller module, an interface module, a clock module, a memory module, a display module, and a power supply module. The output of the solar cell module testing module is connected to the input of the solar data acquisition module. The output of the solar data acquisition module is connected to the input of the data preprocessing module. The output of the data preprocessing module is connected to the input of the controller module. The output of the controller module is connected to the memory module and the display module. The interface module, clock module, and power supply module are each connected to the controller module.
[0026] like Figure 2 As shown, the solar cell module testing module includes a solar cell module, a module support, a solar data acquisition unit, and a temperature sensor. The solar cell module is arranged on the module support, the solar data acquisition unit is connected to the solar cell module, and the temperature sensor is connected to the solar data acquisition unit. The solar data acquisition unit is also connected to a data preprocessing module.
[0027] The component parameters include open-circuit voltage, short-circuit current, maximum power point voltage and current, and component operating temperature.
[0028] The temperature sensor is a Pt1000 type temperature sensor, which is used to detect the real-time temperature of the solar cell module during the testing process.
[0029] The component support is made of aluminum alloy, but galvanized carbon steel can also be used.
[0030] Seventeen solar cell module test modules were arranged as follows: 11 solar cells were arranged on their respective support brackets with a south-facing orientation, vertical tilt angles of 0°–50°, and a 5° interval between each cell; 4 solar cells were arranged on their respective support brackets with a south-facing orientation, vertical tilt angles of 60°–90°, and a 10° interval between each cell; 1 solar cell was arranged on its corresponding support bracket with an east-facing orientation and a 90° vertical tilt angle; and 1 solar cell was arranged on its corresponding support bracket with a west-facing orientation and a 90° vertical tilt angle. The 5° intervals between the south-facing, 5° tilt angle cells were arranged to maximize test density near the optimal tilt angle, thereby improving the accuracy of the module parameter tests.
[0031] This invention utilizes the electronic load in the solar data acquisition device to achieve synchronous real-time measurement of the parameters of several solar cell modules under actual sunlight and atmospheric conditions using a dual intelligent scanning method.
[0032] like Figure 3 As shown, the solar data acquisition device includes a detection circuit, an auxiliary power supply, and a control circuit; the detection circuit and the auxiliary power supply are respectively connected to the control circuit, the detection circuit is connected to the temperature sensor, and the auxiliary power supply is connected to the power module;
[0033] This invention features high efficiency, precision, flexibility, and intelligence, meeting the performance testing needs of solar cell modules and possessing broad application prospects. Its automated testing process significantly improves testing efficiency; the use of high-precision sensors and advanced data processing algorithms ensures the accuracy of test results; the adjustable light source and testing platform adapt to solar cell modules of different specifications; and the intelligent control system and data processing module achieve automation and intelligence in the testing process.
[0034] like Figure 4As shown, the control circuit includes chip U2, capacitors C3, C4, and C5, crystal oscillator X1, switch S1, and resistors R1, R2, R3, and R4. One end of capacitor C3 is connected to one end of crystal oscillator X1 and pin 19 of chip U2. The other end of crystal oscillator X1 is connected to one end of capacitor C4 and pin 18 of chip U2. The other end of capacitor C3 and capacitor C4 are grounded. One end of resistor R5 is connected to one end of capacitor C5, one end of switch S1, and pin 9 of chip U2. The other end of resistor R5 is grounded, and the other end of capacitor C5 is connected to VCC and the other end of switch S1 respectively. One end of resistor R1 is connected to pin 39 of chip U2 and the other end of resistor R1 is connected to VCC. One end of resistor R2 is connected to pin 38 of chip U2 and the other end of resistor R2 is connected to VCC. One end of resistor R3 is connected to pin 37 of chip U2 and the other end of resistor R3 is connected to VCC. One end of resistor R4 is connected to pin 36 of chip U2 and the other end of resistor R4 is connected to VCC.
[0035] The core component of the control module of this system is the STC89C52 microcontroller. The STC89C52 belongs to the 51 series of microcontrollers, and compared to other 51 series microcontrollers such as the STC89C51, it has advantages such as low power consumption, high operating speed, ISP in-system programming capability, strong anti-interference ability, and two 16-bit programmable timer / counters. Furthermore, the STC89C52 instruction set is fully compatible with the general 51 series microcontroller instruction set, contains 8KB of Flash program storage and 512 bytes of random access memory (RAM), and is also relatively inexpensive. Its minimum system has a simple peripheral circuit.
[0036] like Figure 5As shown, the data preprocessing module includes an amplifier circuit and a dual op-amp bandpass filter. The amplifier circuit consists of an OPA277 operational amplifier and resistors / capacitors. The amplifier circuit and dual op-amp bandpass filter include a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first operational amplifier, a second operational amplifier, and a third operational amplifier. The signal input -IN terminal is connected to one end of the first resistor. The other end of the first resistor is connected to one end of the first capacitor, one end of the third resistor, and the negative power supply pin of the first operational amplifier. The other end of the first capacitor is connected to the other end of the third resistor and the output pin of the first operational amplifier. The signal input +IN terminal is connected to one end of the second resistor. One end of the second resistor is connected to the positive power supply pin of the first operational amplifier, one end of the fourth resistor, and one end of the second capacitor. The other end of the second capacitor is connected to the other end of the fourth resistor and grounded. The output pin of the first operational amplifier is connected to one end of the fifth resistor. The other end of the fifth resistor is connected to the positive power supply pin of the second operational amplifier. The negative power supply pin of the second operational amplifier is connected to the negative power supply pin of the third operational amplifier. The positive power supply pin of the third operational amplifier is connected to one end of the eighth resistor and one end of the ninth resistor. The other end of the ninth resistor is grounded. The other end of the eighth resistor is connected to one end of the seventh resistor and the output pin of the second operational amplifier. The other end of the seventh resistor is connected to one end of the fourth capacitor. The other end of the fourth capacitor is connected to one end of the ninth resistor. The other end of the ninth resistor is connected to one end of the third capacitor. The other end of the third capacitor is grounded.
[0037] An amplifier circuit and a dual op-amp bandpass filter amplify and filter the data acquired by the array sensor before inputting it to the signal conversion circuit, significantly reducing signal noise and loss during measurement. The amplifier circuit consists of an OPA277 operational amplifier and resistors / capacitors, a typical differential amplifier circuit. C3 and R6, and C4 and R7 form a low-pass filter. The dual op-amp bandpass filter, composed of two OPA277 operational amplifiers, has adjustable Q-value and center frequency. Adjusting R9 adjusts the resonant frequency, and adjusting R8 adjusts the Q-value. Notably, after acquiring the signal parameters, a multiplexed analog switch selects the output to the signal processing circuit before inputting it to the AD7794 for digital-to-analog conversion, converting the analog signal to a digital signal, which is beneficial for long-distance wireless signal transmission. It is also worth noting that the 24-bit Σ-Δ analog-to-digital converter AD7794 has a noise level of only 40nV and a power consumption of only 400μA, making it particularly suitable for applications requiring low power consumption and high precision measurement.
[0038] The solar cell module uses an 18V 330W foldable photovoltaic panel.
[0039] like Figure 6 As shown, the power module includes chip U1, first resistor R10, second resistor R11, third resistor R12, first diode D4, second diode D5, third diode D6, first capacitor C5, second capacitor C6, third capacitor C7, fourth capacitor C8, fifth capacitor C9, sixth capacitor C10, seventh capacitor C11, first inductor L4, and second inductor L5.
[0040] In this circuit, one end of the first resistor R10 is connected to the live wire L, and the other end of the first resistor R10 is connected to the anode of the first diode D4. The cathode of the first diode D4 is connected to one end of the first capacitor C5 and one end of the first inductor L4. The other end of the first inductor L4 is connected to one end of the second capacitor C6 and the Drn pin of the chip U1. The other end of the first capacitor C5 is connected to the other end of the second capacitor C6, the anode of the second diode D5, one end of the sixth capacitor C10, one end of the seventh capacitor C11, and the neutral wire N, and grounded. One end of the third capacitor C7 is connected to the V pin of the chip U1, and the other end of the third capacitor C7 is connected to the core... The Src pin of chip U1, the Sre pin of chip U1, one end of the fourth capacitor C8, one end of the second resistor R11, and one end of the second inductor L5 are connected. The other end of the fourth capacitor C8 is connected to the FB pin of chip U1, the other end of the second resistor R11, and one end of the third resistor R12. The other end of the third resistor R12 is connected to one end of the fifth capacitor C9 and the cathode of the third diode D6. The other end of the fifth capacitor C9 is connected to the cathode of the second diode D5. The anode of the third diode D6 is connected to the other end of the second inductor L5, the other end of the sixth capacitor C10, the other end of the seventh capacitor C11, and the A5V terminal.
[0041] This invention provides a 5V, 200mA non-isolated power supply for power supply, enabling precise constant voltage regulation. It uses a self-excited isolated power supply, while high-voltage areas are powered by a non-isolated power supply, preventing 220V AC from entering low-voltage areas and increasing system reliability. The memory module uses DDR3 memory. The display module uses an LCD screen.
[0042] It will be understood by those skilled in the art that, unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It should also be understood that terms such as those defined in general dictionaries should be understood to have the same meaning as in the context of the prior art, and should not be interpreted in an idealized or overly formal sense unless defined as herein.
[0043] The above embodiments are merely illustrative of the technical concept of this utility model and should not be construed as limiting the scope of protection of this utility model. Any modifications made to the technical solution based on the technical concept proposed in this utility model shall fall within the scope of protection of this utility model. The implementation methods of this utility model have been described in detail above, but this utility model is not limited to the above-described implementation methods. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this utility model.
Claims
1. A power testing system for solar cell modules, characterized in that: It includes a solar cell module testing module, a solar data acquisition module, a data preprocessing module, a controller module, an interface module, a clock module, a memory module, a display module, and a power supply module. The output of the solar cell module testing module is connected to the input of the solar data acquisition module, the output of the solar data acquisition module is connected to the input of the data preprocessing module, the output of the data preprocessing module is connected to the input of the controller module, the output of the controller module is connected to the memory module and the display module, and the interface module, clock module, and power supply module are each connected to the controller module.
2. The power testing system for solar cell modules according to claim 1, characterized in that: The solar cell module testing module includes a solar cell module, a module support, a solar data acquisition unit, a temperature sensor, and photovoltaic cables. The solar cell module is arranged on the module support. The solar data acquisition unit is connected to the solar cell module through the photovoltaic cables. The temperature sensor is connected to the solar data acquisition unit. The solar data acquisition unit is also connected to a data preprocessing module.
3. The power testing system for solar cell modules according to claim 2, characterized in that: The solar data acquisition device includes a detection circuit, an auxiliary power supply, and a control circuit; the detection circuit and the auxiliary power supply are respectively connected to the control circuit, the detection circuit is connected to the temperature sensor, and the auxiliary power supply is connected to the power module; the control circuit includes a chip U2, capacitors C3, C4, and C5, a crystal oscillator X1, a switch S1, and resistors R1, R2, R3, and R4. in One end of capacitor C3 is connected to one end of crystal oscillator X1 and pin 19 of chip U2. The other end of crystal oscillator X1 is connected to one end of capacitor C4 and pin 18 of chip U2. The other end of capacitor C3 is grounded. The other end of capacitor C4 is grounded. One end of resistor R5 is connected to one end of capacitor C5, one end of switch S1, and pin 9 of chip U2. The other end of resistor R5 is grounded. The other end of capacitor C5 is connected to VCC and the other end of switch S1. One end of resistor R1 is connected to pin 39 of chip U2 and the other end of resistor R1 is connected to VCC. One end of resistor R2 is connected to pin 38 of chip U2 and the other end of resistor R2 is connected to VCC. One end of resistor R3 is connected to pin 37 of chip U2 and the other end of resistor R3 is connected to VCC. One end of resistor R4 is connected to pin 36 of chip U2 and the other end of resistor R4 is connected to VCC.
4. The power testing system for solar cell modules according to claim 1, characterized in that: The data preprocessing module includes an amplifier circuit and a dual op-amp bandpass filter. The amplifier circuit consists of an OPA277 operational amplifier and resistors / capacitors. The amplifier circuit and dual op-amp bandpass filter include a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a first operational amplifier, a second operational amplifier, and a third operational amplifier. The signal input -IN terminal is connected to one end of the first resistor. The other end of the first resistor is connected to one end of the first capacitor, one end of the third resistor, and the negative power supply pin of the first operational amplifier. The other end of the first capacitor is connected to the other end of the third resistor and the output pin of the first operational amplifier. The signal input +IN terminal is connected to one end of the second resistor. The other end of the second resistor is connected to the positive power supply pin of the first operational amplifier, one end of the fourth resistor, and one end of the second capacitor. The other end of the second capacitor is connected to the other end of the fourth resistor and grounded. The output pin of the first operational amplifier is connected to one end of the fifth resistor. The other end of the fifth resistor is connected to the positive power supply pin of the second operational amplifier. The negative power supply pin of the second operational amplifier is connected to the negative power supply pin of the third operational amplifier. The positive power supply pin of the third operational amplifier is connected to one end of the eighth resistor and one end of the ninth resistor. The other end of the ninth resistor is grounded. The other end of the eighth resistor is connected to one end of the seventh resistor and the output pin of the second operational amplifier. The other end of the seventh resistor is connected to one end of the fourth capacitor. The other end of the fourth capacitor is connected to one end of the ninth resistor. The other end of the ninth resistor is connected to one end of the third capacitor. The other end of the third capacitor is grounded.
5. The power testing system for solar cell modules according to claim 1, characterized in that: The solar cell module uses an 18V 330W foldable photovoltaic panel.
6. The power testing system for solar cell modules according to claim 1, characterized in that: The power module includes a chip U1, a first resistor R10, a second resistor R11, a third resistor R12, a first diode D4, a second diode D5, a third diode D6, a first capacitor C5, a second capacitor C6, a third capacitor C7, a fourth capacitor C8, a fifth capacitor C9, a sixth capacitor C10, a seventh capacitor C11, a first inductor L4, and a second inductor L5. In this circuit, one end of the first resistor R10 is connected to the live wire L, and the other end of the first resistor R10 is connected to the anode of the first diode D4. The cathode of the first diode D4 is connected to one end of the first capacitor C5 and one end of the first inductor L4. The other end of the first inductor L4 is connected to one end of the second capacitor C6 and the Drn pin of the chip U1. The other end of the first capacitor C5 is connected to the other end of the second capacitor C6, the anode of the second diode D5, one end of the sixth capacitor C10, one end of the seventh capacitor C11, and the neutral wire N, and grounded. One end of the third capacitor C7 is connected to the V pin of the chip U1, and the other end of the third capacitor C7 is connected to the core... The Src pin of chip U1, the Sre pin of chip U1, one end of the fourth capacitor C8, one end of the second resistor R11, and one end of the second inductor L5 are connected. The other end of the fourth capacitor C8 is connected to the FB pin of chip U1, the other end of the second resistor R11, and one end of the third resistor R12. The other end of the third resistor R12 is connected to one end of the fifth capacitor C9 and the cathode of the third diode D6. The other end of the fifth capacitor C9 is connected to the cathode of the second diode D5. The anode of the third diode D6 is connected to the other end of the second inductor L5, the other end of the sixth capacitor C10, the other end of the seventh capacitor C11, and the A5V terminal.
7. The power testing system for solar cell modules according to claim 1, characterized in that: The memory module uses DDR3 memory.
8. The power testing system for solar cell modules according to claim 1, characterized in that: The display module uses an LCD screen.