Pcb via structure and pcb board for reserving non-functional pads of specific layers

Abstract

The utility model discloses a kind of PCB via hole structure and PCB board of reserving specific layer non-functional pad, the hole wall of signal via hole is equipped with non-functional pad, at the layer plane of several non-wiring inner layer board, at least one non-functional pad projection area is provided with a line segment, line segment intersects with signal via hole.Such design, under the premise of not changing signal via hole actual connection relationship, make design software or in production process can quickly identify the non-functional pad that need to be retained, not only can improve identification efficiency, also can reduce the probability of error, when output production file, design software can quickly identify the non-functional pad that need to be retained, avoid in automatic layout wiring or DRC false deletion non-functional pad that need to be retained, secondly, when processing non-functional pad, plate factory can quickly identify the non-functional pad that need to be retained by line segment, improve production efficiency.

Description

Technical Field

[0001] This utility model relates to the field of circuit board technology, and more specifically, to a PCB via structure and PCB board that retains non-functional pads of a specific layer. Background Technology

[0002] In PCB design, pads without connections on any layer of signal vias are removed by default (through settings in the design software or by the PCB manufacturer). Pads without connections on any layer of vias are usually called non-functional pads. Non-functional pads (NFPs) are a special type of pad in printed circuit board (PCB) design. Their main characteristic is that they do not have electrical connection functions. They are usually used in the manufacturing process of vias or through holes, but do not participate in the transmission of circuit signals.

[0003] In actual PCB design, for certain special high-speed signal vias, for the sake of signal integrity, such as impedance continuity, the non-functional pads of certain signal vias on specific layers need to be retained to meet signal integrity requirements. However, design software cannot directly set the retention of non-functional pads on specific layers, and it is also quite complicated for board manufacturers to handle. Board manufacturers need to find the via location and the corresponding layer, and then handle it manually, which is not only inefficient but also prone to errors. Utility Model Content

[0004] To overcome the shortcomings of the existing technology, this utility model provides a PCB via structure that retains non-functional pads on specific layers. Without changing the actual connection relationship of the signal vias, it enables design software or the production process to quickly identify the non-functional pads that need to be retained, which not only improves the identification efficiency but also reduces the probability of errors.

[0005] The technical solution of this utility model is as follows: A PCB via structure that retains non-functional pads on a specific layer includes a multilayer board. The multilayer board is provided with signal vias. One end of the signal via is connected to the top layer of the multilayer board, and the other end of the signal via is connected to the bottom layer of the multilayer board and penetrates multiple inner layers of the multilayer board. The wall of the signal via is provided with non-functional pads. On the layer where several non-trace inner layers are located, at least one line segment is provided in the projection area of ​​the non-functional pad, and the line segment intersects with the signal via.

[0006] Furthermore, the length of the line segment is less than the diameter of the non-functional pad.

[0007] Furthermore, a top-level pad is provided at the upper end of the signal via, and a bottom-level pad is provided at the lower end of the signal via. A plurality of non-functional pads are evenly disposed between the top-level pad and the bottom-level pad.

[0008] Furthermore, the top pad, the bottom pad, and the non-functional pad are all circular.

[0009] Furthermore, the diameters of the non-functional pads, the top-level pads, and the bottom-level pads are all equal.

[0010] Furthermore, the multilayer board has no fewer than six layers.

[0011] In addition, this utility model also provides a PCB board, including the above-mentioned PCB via structure.

[0012] According to the above-mentioned solution, the beneficial effects of this utility model are as follows: This utility model provides a PCB via structure that retains non-functional pads of a specific layer, including a multilayer board with no less than six layers. The multilayer board is provided with signal vias. One end of the signal via is connected to the top layer of the multilayer board, and the other end of the signal via is connected to the bottom layer of the multilayer board and penetrates multiple inner layers of the multilayer board. The wall of the signal via is provided with non-functional pads. On the layer where several non-trace inner layers are located, at least one line segment is provided in the projection area of ​​at least one non-functional pad, and the line segment intersects with the signal via. This design, without altering the actual connection relationships of signal vias, enables design software or the production process to quickly identify non-functional pads that need to be retained. This not only improves identification efficiency but also reduces the probability of errors. When outputting production files, the design software can quickly identify non-functional pads that need to be retained, avoiding accidental deletion of such pads during automatic placement and routing or DRC (Design Rule Check). Furthermore, when processing non-functional pads, the PCB manufacturer can quickly identify the non-functional pads that need to be retained using line segments, eliminating the need to painstakingly pick out each one individually, thereby improving production efficiency. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of a PCB via structure that retains non-functional pads on a specific layer, according to an embodiment of this utility model.

[0015] Figure 2 for Figure 1 A magnified schematic diagram of part A.

[0016] In the diagram, 1 is a signal via; 2 is a non-functional pad; and 3 is a line segment. Detailed Implementation

[0017] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following detailed description of the embodiments and the accompanying drawings are used to illustrate the principles of the present invention by way of example, but should not be used to limit the scope of the present invention, that is, the present invention is not limited to the described embodiments.

[0018] To better understand this utility model, the following description, in conjunction with the accompanying drawings and embodiments, will further illustrate the present utility model:

[0019] Non-functional pads (NFPs) are isolated pads formed on copper layers by vias or through-holes in PCB design, which are not electrically connected to signal layers. Their main function is to provide physical support for the via manufacturing process, ensuring the accuracy of drilling positions and the reliability of copper plating on the hole walls. However, since non-functional pads do not have electrical connection functions, they are usually removed during the production stage through design software settings or post-processing at the PCB manufacturer to simplify the PCB structure and reduce manufacturing complexity.

[0020] With the development of high-speed digital circuits (such as PCIe, DDR, USB 3.0+) and high-frequency analog circuits (such as radio frequency signals), signal integrity (SI) has become one of the core design challenges. As the necessary path for signal layer switching, the impedance continuity of vias directly affects signal quality.

[0021] In actual PCB design, for certain special high-speed signal vias, for the sake of signal integrity, such as impedance continuity, the non-functional pads of certain signal vias on specific layers need to be retained to meet signal integrity requirements. However, design software cannot directly set the retention of non-functional pads on specific layers, and it is also quite complicated for board manufacturers to handle. Board manufacturers need to find the via location and the corresponding layer, and then handle it manually, which is not only inefficient but also prone to errors.

[0022] Based on this, the present invention provides a PCB via structure that retains non-functional pads on a specific layer, see [link to relevant documentation]. Figures 1-2As shown, the PCB via structure includes a multilayer board with no less than six layers. A signal via 1 is provided on the multilayer board. One end of the signal via 1 is connected to the top layer of the multilayer board, and the other end of the signal via 1 is connected to the bottom layer of the multilayer board and penetrates multiple inner layers of the multilayer board. The wall of the signal via 1 is provided with a non-functional pad 2. On the layer where several non-trace inner layers are located, at least one line segment 3 is provided in the projection area of ​​at least one non-functional pad 2. The line segment 3 intersects with the signal via 1. This design, without altering the actual connection relationship of the signal via 1, enables design software or the production process to quickly identify the non-functional pads 2 that need to be retained. This not only improves identification efficiency but also reduces the probability of errors. When outputting production files, the design software can quickly identify the non-functional pads 2 that need to be retained, avoiding accidental deletion of the non-functional pads 2 that need to be retained during automatic placement and routing or DRC (Design Rule Check). Furthermore, when processing non-functional pads 2, the board manufacturer can quickly identify the non-functional pads 2 that need to be retained using line segment 3, eliminating the need to painstakingly pick out each non-functional pad 2 that needs to be retained one by one, thereby improving production efficiency.

[0023] Preferably, the length of line segment 3 is less than the diameter of non-functional pad 2.

[0024] Specifically, in PCB design, when the length of line segment 3 connected to signal via 1 is less than the diameter of non-functional pad 2 (NFP), non-functional pad 2 can maintain a complete circular structure. Conversely, if the length of line segment 3 exceeds the diameter of non-functional pad 2, non-functional pad 2 will deform and form an asymmetrical shape. The purpose of this design is to ensure the integrity of the shape of non-functional pad 2 by controlling the geometric relationship between line segment 3 and non-functional pad 2, thereby ensuring signal transmission performance.

[0025] In this embodiment, the thickness of the multilayer board can be designed according to actual production needs and based on meeting the production capacity of the board manufacturer.

[0026] In this embodiment, the impedance of signal via 1 can be designed according to the impedance required by the actual signal. For example, the impedance of signal via 1 can be 42.5 ohm, 50 ohm, 85 ohm, 92 ohm, 95 ohm or 100 ohm, etc.

[0027] In this embodiment, a top-level pad is provided at the upper end of the signal via 1, a bottom-level pad is provided at the lower end of the signal via 1, and multiple non-functional pads 2 are evenly arranged between the top-level pad and the bottom-level pad.

[0028] In this embodiment, the top pad, the bottom pad, and the non-functional pad 2 are all circular.

[0029] In this embodiment, the diameters of the non-functional pad 2, the top pad, and the bottom pad are all equal.

[0030] It should be noted that the indicated orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the product is usually placed in during use, or the orientation or positional relationship that is commonly understood by those skilled in the art, or the orientation or positional relationship that the product is usually placed in during use. It is only for the purpose of facilitating the description of this application and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this application.

[0031] It should be understood that those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

[0032] The present utility model patent has been described above with reference to the accompanying drawings. Obviously, the implementation of the present utility model patent is not limited to the above-described manner. Any improvements made by adopting the inventive concept and technical solution of the present utility model patent, or the direct application of the inventive concept and technical solution of the present utility model patent to other occasions without modification, are all within the protection scope of the present utility model.

Claims

1. A PCB via structure that retains non-functional pads on specific layers, comprising a multilayer board, wherein signal vias are provided on the multilayer board, one end of the signal via is connected to the top layer of the multilayer board, and the other end of the signal via is connected to the bottom layer of the multilayer board and penetrates through multiple inner layers of the multilayer board, characterized in that, The signal via has a non-functional pad on its wall. On the plane of several non-trace inner layers, at least one non-functional pad has a line segment in its projection area, and the line segment intersects with the signal via.

2. A PCB via structure that retains non-functional pads on a specific layer as described in claim 1, characterized in that: The length of the line segment is less than the diameter of the non-functional pad.

3. A PCB via structure that retains non-functional pads on a specific layer as described in claim 1, characterized in that: The signal via has a top pad at its upper end and a bottom pad at its lower end, with multiple non-functional pads evenly distributed between the top pad and the bottom pad.

4. A PCB via structure that retains non-functional pads on a specific layer as described in claim 3, characterized in that: The top pad, the bottom pad, and the non-functional pad are all circular.

5. A PCB via structure that retains non-functional pads on a specific layer as described in claim 4, characterized in that: The diameters of the non-functional pads, the top-level pads, and the bottom-level pads are all equal.

6. A PCB via structure that retains non-functional pads on a specific layer as described in claim 4, characterized in that: The multilayer board has no fewer than six layers.

7. A PCB board, characterized in that, Includes the PCB via structure described in any one of claims 1 to 6.

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