Electromagnetic shielded package structure

Abstract

The utility model relates to an electromagnetic shielding packaging structure, the electromagnetic shielding packaging structure includes: adapter plate, including substrate, the recess in the substrate and the electromagnetic shielding post in the substrate and the electromagnetic shielding post is through the substrate, and a plurality of electromagnetic shielding post surrounds the distribution of the outer periphery of recess, wiring layer, located on the adapter plate, first chip, located in the recess, and first chip with wiring layer electricity is connected, second chip, located above the adapter plate and with wiring layer electricity is connected, the utility model can adopt radio frequency chip as first chip, has expanded the kind of chip that can integrate in packaging structure, and has simplified the manufacturing process of packaging structure, still can greatly reduce the manufacturing cost of packaging structure.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor manufacturing technology, and in particular to an electromagnetic shielding packaging structure. Background Technology

[0002] As various technology industries place increasingly higher demands on the integration and electrical performance of semiconductor devices, packaging technology also needs to adapt and continuously evolve and innovate. When integrating multiple chips using traditional 2D packaging technologies, such as fan-out packaging structures, the size of the package structure (e.g., volume or surface area) increases, limiting its application in products with size constraints. To address this issue, 3D packaging structures have emerged. Current advanced 3D packaging structures increasingly employ die-to-die mounting, with the base die often being an active silicon interposer, and using TMV (Through Molding Via) technology to connect the upper and lower packages. However, this three-dimensional packaging structure has at least the following problems: (1) The base chip is an active chip formed by TSV (Through Silicon Via) process, which has a high processing cost; (2) It does not have electromagnetic shielding function, so it is not suitable for integrating radio frequency chips inside the packaging structure; (3) The chip-to-chip bonding process is a high-cost process, which leads to a significant increase in the manufacturing cost of the packaging structure; (4) The use of TMV process results in a limited number of I / O interfaces, which is not suitable for interconnection that requires a high number of I / O interfaces; (5) The thickness of the entire three-dimensional packaging structure is large, which is not conducive to the miniaturization of the packaging structure.

[0003] Therefore, how to simplify the manufacturing process of packaging structures and reduce their manufacturing costs while expanding their functionality so that they can integrate multiple types of chips is a pressing technical problem that needs to be solved. Summary of the Invention

[0004] This invention provides an electromagnetic shielding packaging structure that simplifies the manufacturing process and reduces the manufacturing cost of the packaging structure while expanding its functionality, enabling the packaging structure to integrate multiple types of chips.

[0005] According to some embodiments, this utility model provides an electromagnetic shielding packaging structure, including:

[0006] An adapter plate includes a substrate, a groove located within the substrate, and electromagnetic shielding pillars located within and penetrating the substrate, wherein a plurality of electromagnetic shielding pillars are distributed around the outer periphery of the groove;

[0007] A wiring layer is located on the adapter board;

[0008] A first chip is located within the groove, and the first chip is electrically connected to the wiring layer;

[0009] The second chip is located above the adapter board and is electrically connected to the wiring layer.

[0010] In some embodiments, the substrate includes a top surface and a bottom surface that are oppositely distributed, and the second chip is located above the top surface of the substrate; the groove includes:

[0011] A bottom groove extends from the bottom of the substrate into the interior of the substrate;

[0012] A top recess is located above the bottom recess. The top recess is independent of the bottom recess and extends from the top of the substrate into the interior of the substrate. A plurality of the first chips are respectively located in the bottom recess and the top recess.

[0013] In some embodiments, the wiring layer includes:

[0014] A top wiring layer is located on the top surface of the substrate, and the second chip is located on the top wiring layer and electrically connected to the top wiring layer;

[0015] A bottom wiring layer is located on the bottom surface of the substrate. The bottom wiring layer is electrically connected to the top wiring layer. The first chip located in the bottom groove is electrically connected to the bottom wiring layer, and the first chip located in the top groove is electrically connected to the top wiring layer.

[0016] In some embodiments, the first chip includes a functional surface and a back surface that are distributed relatively to each other, and a first conductive bump is disposed on the functional surface of the first chip.

[0017] The functional surface of the first chip located in the bottom recess faces the bottom wiring layer, and the first conductive bump on the functional surface of the first chip located in the bottom recess is electrically connected to the bottom wiring layer.

[0018] The functional surface of the first chip located in the top recess faces the top wiring layer, and the first conductive bump on the functional surface of the first chip located in the top recess is electrically connected to the top wiring layer.

[0019] In some embodiments, the adapter plate further includes:

[0020] A conductive connection post penetrates the substrate, one end of the conductive connection post is electrically connected to the top wiring layer and the other end is electrically connected to the bottom wiring layer, and the conductive connection post is distributed outside the groove.

[0021] In some embodiments, a plurality of electromagnetic shielding posts are distributed around the outer periphery of the top groove and the outer periphery of the bottom groove, and the electromagnetic shielding posts are electrically connected to the top wiring layer or the electromagnetic shielding posts are electrically connected to the bottom wiring layer.

[0022] In some embodiments, it also includes:

[0023] An electromagnetic shielding layer is provided, covering the inner wall of the top groove or the inner wall of the bottom groove, and the electromagnetic shielding layer is electrically connected to the wiring layer.

[0024] In some embodiments, the inner wall of the top groove is covered with an electromagnetic shielding layer, and the plurality of electromagnetic shielding pillars are distributed only around the outer periphery of the bottom groove;

[0025] One end of the electromagnetic shielding column is electrically connected to the electromagnetic shielding layer, and the other end is electrically connected to the bottom wiring layer.

[0026] In some embodiments, the width of the top groove is greater than the width of the bottom groove in a direction parallel to the top surface of the substrate;

[0027] One end of the electromagnetic shielding column is electrically connected to the electromagnetic shielding layer on the bottom wall of the top groove, and the other end is electrically connected to the bottom wiring layer.

[0028] In some embodiments, the inner wall of the bottom groove is covered with an electromagnetic shielding layer, and the plurality of electromagnetic shielding pillars are distributed only around the outer periphery of the top groove;

[0029] One end of the electromagnetic shielding column is electrically connected to the electromagnetic shielding layer, and the other end is electrically connected to the top wiring layer.

[0030] In some embodiments, the inner wall of the top groove is covered with an electromagnetic shielding layer;

[0031] The plurality of bottom grooves are arranged at intervals along a direction parallel to the top surface of the substrate, and the plurality of electromagnetic shielding pillars are distributed around the outer periphery of each bottom groove. One end of each electromagnetic shielding pillar is electrically connected to the electromagnetic shielding layer and the other end is electrically connected to the bottom wiring layer.

[0032] In some embodiments, the projection of the top groove on the top surface of the substrate continuously overlaps the projections of the plurality of bottom grooves on the top surface of the substrate;

[0033] One end of the electromagnetic shielding column is electrically connected to the electromagnetic shielding layer on the bottom wall of the bottom groove, and the other end is electrically connected to the bottom wiring layer.

[0034] In some embodiments, the inner wall of the top groove is covered with an electromagnetic shielding layer;

[0035] The plurality of bottom grooves are arranged at intervals along a direction parallel to the top surface of the substrate. A portion of the electromagnetic shielding pillars are distributed around the outer periphery of the top grooves and the outer periphery of all the bottom grooves. Another portion of the electromagnetic shielding pillars are located between two adjacent bottom grooves. The electromagnetic shielding pillars are electrically connected to the electromagnetic shielding layer and the wiring layer.

[0036] In some embodiments, a plurality of bottom grooves are spaced apart along a direction parallel to the top surface of the substrate, a plurality of top grooves are spaced apart along a direction parallel to the top surface of the substrate, and the plurality of top grooves correspond one-to-one with the plurality of bottom grooves;

[0037] Multiple electromagnetic shielding pillars are distributed around the outer periphery of each of the top and bottom grooves. The inner wall of the top groove is covered with an electromagnetic shielding layer. Both the electromagnetic shielding pillars and the electromagnetic shielding layer are electrically connected to the wiring layer.

[0038] In some embodiments, it also includes:

[0039] A first molding layer is filled into the groove and encapsulates multiple of the first chips;

[0040] A second molding layer is located above the adapter board, and the second molding layer encapsulates the second chip.

[0041] The electromagnetic shielding packaging structure provided by this utility model, by setting multiple grooves in the adapter plate and multiple electromagnetic shielding pillars distributed around the outer periphery of the grooves, and mounting multiple first chips in the grooves, allows the first chips to be electromagnetically shielded by the electromagnetic shielding pillars. This enables the use of radio frequency chips as the first chips, expands the types of chips that can be integrated in the packaging structure, and broadens the application field of the packaging structure. Using the electromagnetic shielding pillars to electromagnetically shield the first chips in the grooves, and with the pillars located outside the grooves, avoids occupying the internal space of the grooves and allows for flexible adjustment of the position of the electromagnetic shielding pillars as needed, thereby reducing the difficulty of the packaging structure manufacturing process. The electrical connection between the second chip and the adapter plate, and between the second chip and the first chip, is achieved through the wiring layer, eliminating the need for chip-to-chip bonding. This not only simplifies the packaging structure manufacturing process but also significantly reduces the manufacturing cost and helps reduce the overall thickness of the packaging structure, promoting the miniaturization of packaging structures. By providing multiple grooves within the adapter board and utilizing these grooves to accommodate the first chip, combined with the wiring layer, a large number of I / O interface interconnects can be provided, making it suitable for fabricating package structures requiring a high number of I / O interfaces. This invention eliminates the need for processes such as TMV, thereby further reducing manufacturing costs and complexity. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of this utility model, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0043] Figure 1 This is a first cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0044] Figure 2 This is a schematic diagram of the first cross-section of the adapter plate in a specific embodiment of this utility model;

[0045] Figure 3 This is a second cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0046] Figure 4 This is a second cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model;

[0047] Figure 5This is a third cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0048] Figure 6 This is a third cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model;

[0049] Figure 7 This is a fourth cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0050] Figure 8 This is a fourth cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model;

[0051] Figure 9 This is a fifth cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model;

[0052] Figure 10 This is a fifth cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model;

[0053] Figure 11 This is a sixth cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model. Detailed Implementation

[0054] The specific embodiments of the electromagnetic shielding packaging structure provided by this utility model will be described in detail below with reference to the accompanying drawings.

[0055] This specific embodiment provides an electromagnetic shielding packaging structure. Figure 1 This is a first cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model. Figure 2 This is a schematic cross-sectional view of the adapter plate in a specific embodiment of this utility model. For example... Figure 1 and Figure 2 As shown, the electromagnetic shielding encapsulation structure includes:

[0056] The adapter plate includes a substrate 10, a groove located within the substrate 10, and electromagnetic shielding pillars 13 located within the substrate 10 and penetrating the substrate, wherein a plurality of electromagnetic shielding pillars 13 are distributed around the outer periphery of the groove;

[0057] A wiring layer is located on the adapter board;

[0058] A first chip 11 is located within the groove, and the first chip 11 is electrically connected to the wiring layer;

[0059] The second chip 12 is located above the adapter board and is electrically connected to the wiring layer.

[0060] Specifically, the substrate 10 in the adapter board can be, but is not limited to, a silicon substrate. This specific embodiment uses a silicon substrate as an example for illustration. In one example, by etching the substrate 10, the groove can be formed in the substrate 10, and the first chip 11 is mounted in the groove. A plurality of electromagnetic shielding pillars 13 are spaced apart and distributed around the outer periphery of the groove, forming an electromagnetic shielding wall, thereby providing electromagnetic shielding for the first chip 11 mounted in the groove. This allows the first chip 11 mounted in the groove to be a radio frequency chip, expanding the types of chips that can be integrated into the packaging structure and broadening the application field of the packaging structure. By placing the electromagnetic shielding pillars 13 outside the groove, the internal space of the groove can be avoided, and the position of the electromagnetic shielding pillars can be flexibly adjusted as needed, thereby reducing the difficulty of the packaging structure manufacturing process. In this specific embodiment, "a plurality of" refers to two or more.

[0061] The wiring layer is disposed above the adapter board. In one example, the wiring layer is a high-density wiring layer, and the wiring layer includes a dielectric layer and high-density metal traces located within the dielectric layer. The wiring layer is electrically connected to the adapter board. Multiple first chips 11 and second chips 12 are electrically connected to the wiring layer, thereby achieving electrical connections between the second chips 12 and the adapter board, and between the second chips 12 and the first chips 11, without the need for chip-to-chip bonding. This simplifies the packaging structure manufacturing process, significantly reduces the manufacturing cost of the packaging structure, and helps reduce the overall thickness of the packaging structure, promoting miniaturization. By providing the groove in the substrate 10 and using the groove to accommodate the first chips 11, combined with the wiring layer, a large number of I / O interface interconnects can be provided for the adapter board, suitable for the fabrication of packaging structures requiring a high number of I / O interfaces. In this specific embodiment, processes such as TMV are not required, further reducing manufacturing costs and difficulty. In this specific embodiment, "multiple" refers to two or more.

[0062] In some embodiments, such as Figure 1 and Figure 2 As shown, the substrate 10 includes a top surface 101 and a bottom surface 102 that are distributed opposite to each other, and the second chip 12 is located above the top surface 101 of the substrate 10; the groove includes:

[0063] The bottom groove 30 extends from the bottom surface 102 of the substrate 10 into the interior of the substrate 10;

[0064] The top groove 31 is located above the bottom groove 30. The top groove 31 is independent of the bottom groove 30, and the top groove 31 extends from the top surface 101 of the substrate 10 into the interior of the substrate 10. A plurality of the first chips 11 are respectively located in the bottom groove 30 and the top groove 31.

[0065] For example, such as Figure 1 and Figure 2 As shown, the substrate 10 includes a top surface 101 and a bottom surface 102 that are distributed opposite to each other. The top surface 101 of the substrate 10 serves as the upper surface of the adapter plate, and the bottom surface 102 of the substrate 10 serves as the lower surface of the adapter plate. The substrate 10 has a bottom groove 30 and a top groove 31, which are arranged in a direction perpendicular to the top surface 101 of the substrate 10. The bottom groove 30 and the top groove 31 are separated by the substrate 10 located between the bottom groove 30 and the top groove 31, meaning that the bottom groove 30 and the top groove 31 are vertically separated by a portion of the substrate 10. By providing the bottom groove 30 and the top groove 31 within the substrate 10, the number of the first chips 11 that can be integrated within the adapter plate can be increased without increasing the size of the substrate 10. This not only improves the integration density of the adapter plate but also provides more I / O interfaces for the adapter plate.

[0066] In some embodiments, the wiring layer includes:

[0067] A top wiring layer 21 is located on the top surface 101 of the substrate 10, and the second chip 12 is located on the top wiring layer 21 and electrically connected to the top wiring layer 21.

[0068] The bottom wiring layer 22 is located on the bottom surface 102 of the substrate 10. The bottom wiring layer 22 is electrically connected to the top wiring layer 21. The first chip 11 located in the bottom groove 30 is electrically connected to the bottom wiring layer 22, and the first chip 11 located in the top groove 31 is electrically connected to the top wiring layer 21.

[0069] In some embodiments, the first chip 11 includes a functional surface and a back surface that are distributed oppositely, and a first conductive bump 18 is provided on the functional surface of the first chip 11.

[0070] The functional surface of the first chip 11 located in the bottom groove 30 faces the bottom wiring layer 22, and the first conductive bump 18 on the functional surface of the first chip 11 located in the bottom groove 30 is electrically connected to the bottom wiring layer 22.

[0071] The functional surface of the first chip 11 located in the top recess 31 faces the top wiring layer 21, and the first conductive bump 18 on the functional surface of the first chip 11 located in the top recess 31 is electrically connected to the top wiring layer 21.

[0072] In some embodiments, the adapter plate further includes:

[0073] A conductive connection post 20 penetrates the substrate 10. One end of the conductive connection post 20 is electrically connected to the top wiring layer 21, and the other end is electrically connected to the bottom wiring layer 22. The conductive connection post 20 is distributed outside the groove.

[0074] For example, the second chip 12 is located above the top surface 101 of the substrate 10, the top wiring layer 21 is disposed between the second chip 12 and the substrate 10, and the bottom wiring layer 22 is disposed on the bottom surface 102 of the substrate 10. In one example, the top wiring layer 21 includes a top dielectric layer covering the top surface 101 of the substrate 10 and a top high-density metal trace located inside the top dielectric layer, and the bottom wiring layer 22 includes a bottom dielectric layer covering the bottom surface 102 of the substrate 10 and a bottom high-density metal trace located inside the bottom dielectric layer. Each first chip 11 includes a functional surface and a back surface that are distributed opposite to each other, and a first conductive bump 18 is disposed on the functional surface of each first chip 11. The functional surface of the first chip 11 located in the bottom recess 30 faces the bottom wiring layer 22, and the first conductive bump 18 on the functional surface of the first chip 11 located in the bottom recess 30 is electrically connected to the bottom wiring layer 22. The functional surface of the first chip 11 located in the top recess 31 faces the top wiring layer 21, and the first conductive bump 18 on the functional surface of the first chip 11 located in the top recess 31 is electrically connected to the top wiring layer 21.

[0075] The conductive connection post 20 penetrates the substrate 10 along a direction perpendicular to the upper surface of the adapter plate. One end of the conductive connection post 20 is electrically connected to the top high-density metal trace in the top wiring layer 21, and the other end is electrically connected to the bottom high-density metal trace in the bottom wiring layer 22. The second chip 12 includes a functional surface and a back surface that are distributed opposite to each other. A second conductive bump 19 is provided on the functional surface of the second chip 12, with the functional surface of the second chip 12 facing the top wiring layer 21. One end of the second conductive bump 19 is electrically connected to the second chip 12, and the other end is electrically connected to the top wiring layer 21. By setting the top wiring layer 21, the bottom wiring layer 22, and the first conductive connection post 20, not only can electrical connections between the first chip 11 and the second chip 12, as well as electrical connections between multiple first chips 11, be realized, providing the adapter plate with a greater number of I / O interfaces, but it also helps to simplify the overall circuit structure of the wiring layer and balance the stress on opposite sides of the substrate 10. Moreover, the provision of the top wiring layer 21 and the bottom wiring layer 22 can greatly reduce the thickness of the packaging structure, further contributing to the miniaturization of the packaged product.

[0076] In one example, a plurality of solder balls 14 are spaced apart on the surface of the bottom wiring layer 22 facing away from the substrate 10, and the solder balls 14 are electrically connected to the bottom wiring layer 22. The bottom wiring layer 22 can be electrically connected to the packaging substrate (e.g., a PCB circuit board) through the solder balls 14, so as to enable the output of signals from the bottom wiring layer 22 and the top wiring layer 21 through the solder balls 14, or to transmit control signals to the bottom wiring layer 22 and the top wiring layer 21 through the solder balls 14.

[0077] In some embodiments, a plurality of electromagnetic shielding posts 13 are distributed around the outer periphery of the top groove 31 and the outer periphery of the bottom groove 30, and the electromagnetic shielding posts 13 are electrically connected to the top wiring layer 21 or the electromagnetic shielding posts 13 are electrically connected to the bottom wiring layer 22.

[0078] In some embodiments, the electromagnetic shielding packaging structure further includes:

[0079] An electromagnetic shielding layer 15 is applied to the inner wall of the top groove 31 or the inner wall of the bottom groove 30, and both the electromagnetic shielding layer 15 and the electromagnetic shielding pillar 13 are electrically connected to the wiring layer.

[0080] For example, such as Figure 1 and Figure 2As shown, the electromagnetic shielding layer 15 covers the inner wall of the bottom recess 30 (including the sidewalls and bottom wall of the bottom recess 30). The first chip 11 located in the bottom recess 30 is bonded to the surface of the electromagnetic shielding layer 15 through an adhesive layer on its back side. By providing the electromagnetic shielding layer 15 on the inner wall of the bottom recess 30, not only can the cavity-specific electromagnetic shielding of the first chip 11 in the top recess 31 be achieved through the synergistic effect of the electromagnetic shielding layer 15 and the electromagnetic shielding pillar 13, but the cavity-specific electromagnetic shielding of the first chip 11 in the bottom recess 30 can also be achieved through the electromagnetic shielding layer 15, thereby further ensuring the performance stability and reliability of the electromagnetic shielding packaging structure. By providing the electromagnetic shielding layer 15 only on the inner wall of the bottom recess 30, electromagnetic shielding between the first chip 11 in the top recess 31 and the first chip 11 in the bottom recess 30 can be achieved, thereby helping to further reduce the manufacturing cost of the packaging structure. In one example, a bottom grounding line is provided in the bottom wiring layer 22, and both the electromagnetic shielding layer 15 and the electromagnetic shielding pillar 13 are electrically connected to the bottom grounding line. That is, both the electromagnetic shielding layer 15 and the electromagnetic shielding pillar 13 are grounded through the bottom wiring layer 22, so as to further reduce the manufacturing cost of the electromagnetic shielding packaging structure.

[0081] Figure 3 This is a second cross-sectional schematic diagram of the electromagnetic shielding encapsulation structure in a specific embodiment of this utility model. Figure 4 This is a second cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model. For example, as shown below... Figure 3 and Figure 4 As shown, the electromagnetic shielding layer 15 only covers the inner wall of the top groove 31 (including the side walls and bottom wall of the top groove 31). The first chip 11 located in the top groove 31 is bonded to the surface of the electromagnetic shielding layer 15 through an adhesive layer on its back side. By providing the electromagnetic shielding layer 15 on the inner wall of the top groove 31, not only can the cavity-specific electromagnetic shielding of the first chip 11 in the bottom groove 30 be achieved through the synergistic effect of the electromagnetic shielding layer 15 and the electromagnetic shielding pillar 13, but also the cavity-specific electromagnetic shielding of the first chip 11 in the top groove 31 can be achieved through the electromagnetic shielding layer 15. This further ensures the performance stability and reliability of the electromagnetic shielding packaging structure and helps to further reduce the manufacturing cost of the packaging structure. In one example, a bottom grounding line is provided in the bottom wiring layer 22. One end of the electromagnetic shielding pillar 13 is electrically connected to the electromagnetic shielding layer 15 through the top wiring layer 21, and the other end is electrically connected to the bottom grounding line. That is, both the electromagnetic shielding layer 15 and the electromagnetic shielding pillar 13 are grounded through the bottom wiring layer 22.

[0082] Figure 5 This is a third cross-sectional schematic diagram of the electromagnetic shielding packaging structure in a specific embodiment of this utility model. Figure 6 This is a third cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model. In other embodiments, such as... Figure 5 and Figure 6 As shown, the inner wall of the top groove 31 is covered with an electromagnetic shielding layer 15, and the plurality of electromagnetic shielding pillars 13 are distributed only around the outer periphery of the bottom groove 30.

[0083] One end of the electromagnetic shielding post 13 is electrically connected to the electromagnetic shielding layer 15, and the other end is electrically connected to the bottom wiring layer 22.

[0084] In some embodiments, the width of the top groove 31 is greater than the width of the bottom groove 30 in a direction parallel to the top surface 101 of the substrate 10.

[0085] One end of the electromagnetic shielding post 13 is electrically connected to the electromagnetic shielding layer 15 on the bottom wall of the top groove 31, and the other end is electrically connected to the bottom wiring layer 22.

[0086] For example, such as Figure 5 and Figure 6 As shown, the top groove 31 and the bottom groove 30 are arranged at intervals along a direction perpendicular to the top surface 101 of the substrate 10. Along a direction parallel to the top surface 101 of the substrate 10, the width of the top groove 31 is greater than the width of the bottom groove 30. The electromagnetic shielding pillar 13 is located between the top groove 31 and the bottom wiring layer 22, with one end electrically connected to the electromagnetic shielding layer 15 on the bottom wall of the top groove 31 and the other end electrically connected to the bottom grounding trace within the bottom wiring layer 22. That is, both the electromagnetic shielding layer 15 and the electromagnetic shielding pillar 13 are grounded through the bottom wiring layer 22. The electromagnetic shielding layer 15 is used to achieve cavity-specific electromagnetic shielding for the first chip 11 within the top groove 31. Multiple electromagnetic shielding pillars 13 and the electromagnetic shielding layer 15 work together to achieve cavity-specific electromagnetic shielding for the first chip 11 within the bottom groove 30.

[0087] In other embodiments, the inner wall of the bottom groove 30 is covered with an electromagnetic shielding layer 15, and the plurality of electromagnetic shielding pillars 13 are distributed only around the outer periphery of the top groove 31.

[0088] One end of the electromagnetic shielding pillar 13 is electrically connected to the electromagnetic shielding layer 15, and the other end is electrically connected to the top wiring layer 21.

[0089] For example, in a direction parallel to the top surface 101 of the substrate 10, the width of the bottom recess 30 is greater than the width of the top recess 31, and the electromagnetic shielding pillar 13 is located between the bottom recess 30 and the top wiring layer 21. In one example, one end of the electromagnetic shielding pillar 13 is electrically connected to the electromagnetic shielding layer 15 on the bottom wall of the bottom recess 30, and the other end is electrically connected to the top grounding trace in the top wiring layer 21, that is, both the electromagnetic shielding layer 15 and the electromagnetic shielding pillar 13 are grounded through the top wiring layer 21. In another example, one end of the electromagnetic shielding layer 15 is electrically connected to the electromagnetic shielding pillar 13, and the other end is electrically connected to the bottom grounding trace in the bottom wiring layer 22, that is, both the electromagnetic shielding layer 15 and the electromagnetic shielding pillar 13 are grounded through the bottom wiring layer 22. The electromagnetic shielding layer 15 is used to achieve cavity electromagnetic shielding of the first chip 11 within the bottom recess 30. The multiple electromagnetic shielding pillars 13 and the electromagnetic shielding layer 15 work together to achieve cavity electromagnetic shielding of the first chip 11 within the top groove 31.

[0090] Figure 7 This is a fourth cross-sectional schematic diagram of the electromagnetic shielding encapsulation structure in a specific embodiment of this utility model. Figure 8 This is a fourth cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model. In some other embodiments, such as... Figure 7 and Figure 8 As shown, the inner wall of the top groove 31 is covered with an electromagnetic shielding layer 15;

[0091] Multiple bottom grooves 30 are arranged at intervals along a direction parallel to the top surface 101 of the substrate 10, and multiple electromagnetic shielding pillars 13 are distributed around the outer periphery of each bottom groove 30. One end of each electromagnetic shielding pillar 13 is electrically connected to the electromagnetic shielding layer 15, and the other end is electrically connected to the bottom wiring layer 22.

[0092] In some embodiments, the projection of the top groove 31 on the top surface 101 of the substrate 10 continuously covers the projections of the plurality of bottom grooves 30 on the top surface 101 of the substrate 10;

[0093] One end of the electromagnetic shielding post 13 is electrically connected to the electromagnetic shielding layer 15 on the bottom wall of the bottom groove 30, and the other end is electrically connected to the bottom wiring layer 22.

[0094] For example, such as Figure 7 and Figure 8As shown, multiple bottom grooves 30 are arranged at intervals along a direction parallel to the top surface 101 of the substrate 10. Multiple first chips 11 are mounted one by one in the multiple bottom grooves 30, thereby further increasing the number of chips that can be integrated in the adapter board. The inner wall of the top groove 31 is covered with an electromagnetic shielding layer 15. The electromagnetic shielding pillar 13 is located between the top groove 31 and the bottom wiring layer 22. One end of the electromagnetic shielding pillar 13 is electrically connected to the electromagnetic shielding layer 15 on the bottom wall of the bottom groove 30, and the other end is electrically connected to the bottom grounding trace in the bottom wiring layer 22. That is, both the electromagnetic shielding pillar 13 and the electromagnetic shielding layer 15 are grounded through the bottom wiring layer 22. Multiple electromagnetic shielding pillars 13 are distributed around the outer periphery of each bottom groove 30, that is, multiple electromagnetic shielding pillars 13 are arranged around the outer periphery of each bottom groove 30, and electromagnetic shielding pillars 13 are also arranged between adjacent bottom grooves 30. In this way, electromagnetic interference from the external environment to the first chip 11 in the bottom groove 30 can be shielded, as well as electromagnetic interference between the first chips 11 in adjacent bottom grooves 30.

[0095] Figure 9 This is the fifth cross-sectional schematic diagram of the electromagnetic shielding encapsulation structure in a specific embodiment of this utility model. Figure 10 This is a fifth cross-sectional schematic diagram of the adapter plate in a specific embodiment of this utility model. In some other embodiments, such as... Figure 9 and Figure 10 As shown, the inner wall of the top groove 31 is covered with an electromagnetic shielding layer 15;

[0096] Multiple bottom grooves 30 are arranged at intervals along a direction parallel to the top surface 101 of the substrate 10. A portion of the electromagnetic shielding pillars 13 are distributed around the outer periphery of the top groove 31 and all the outer periphery of the bottom grooves 30. Another portion of the electromagnetic shielding pillars 13 are located between two adjacent bottom grooves 30. The electromagnetic shielding pillars 13 are electrically connected to the electromagnetic shielding layer 15 and the wiring layer.

[0097] For example, electromagnetic shielding is achieved between the first chip 11 in the top groove 31 and the first chip 11 in the bottom groove 30 and the external environment by a plurality of electromagnetic shielding pillars 13 distributed around the outer periphery of the top groove 31 and all the outer peripheries of the bottom grooves 30. Electromagnetic shielding is achieved between the first chips 11 in adjacent bottom grooves 30 by a plurality of electromagnetic shielding pillars 13 located between adjacent bottom grooves 30. Electromagnetic shielding is achieved between the first chips 11 in the top groove 31 and the first chips 11 in the bottom grooves 30 by the electromagnetic shielding layer 15. In one example, the electromagnetic shielding layer 15 is electrically connected to the electromagnetic shielding pillars 13, and the electromagnetic shielding pillars 13 are electrically connected to the bottom ground trace in the bottom wiring layer 22, so that both the electromagnetic shielding layer 15 and the electromagnetic shielding pillars 13 are grounded through the bottom wiring layer 22.

[0098] Figure 11 This is a sixth cross-sectional schematic diagram of the electromagnetic shielding encapsulation structure in a specific embodiment of this utility model. In other embodiments, such as... Figure 11 As shown, a plurality of bottom grooves 30 are arranged at intervals along a direction parallel to the top surface 101 of the substrate 10, and a plurality of top grooves 31 are arranged at intervals along a direction parallel to the top surface 101 of the substrate 10, and the plurality of top grooves 31 correspond one-to-one with the plurality of bottom grooves 30.

[0099] Multiple electromagnetic shielding pillars 13 are distributed around the outer periphery of each top groove 31 and the outer periphery of each bottom groove 30. The inner wall of the top groove 31 is covered with an electromagnetic shielding layer 15. Both the electromagnetic shielding pillars 13 and the electromagnetic shielding layer 15 are electrically connected to the wiring layer.

[0100] For example, multiple top recesses 31 and multiple bottom recesses 30 are distributed in a one-to-one correspondence. The electromagnetic shielding pillars 13 extend along a direction perpendicular to the top surface 101 of the substrate 10, with one end electrically connected to the top wiring layer 21 and the other end electrically connected to the bottom wiring layer 22. Each electromagnetic shielding pillar 13 is continuously distributed between two adjacent top recesses 31 and two adjacent bottom recesses 30, thereby surrounding the outer periphery of each top recess 31 and each bottom recess 30. The multiple electromagnetic shielding pillars 13 can achieve electromagnetic shielding between the first chips 11 in adjacent top recesses 31, between the first chips 11 in adjacent bottom recesses 30, and between the first chips 11 in the top and bottom recesses 30 and the external environment. The electromagnetic shielding layer 15 is used to achieve electromagnetic shielding between the first chips 11 in the top recesses 31 and the first chips 11 in the bottom recesses 30. In one example, both the electromagnetic shielding pillar 13 and the electromagnetic shielding layer 15 are electrically connected to the bottom grounding trace in the bottom wiring layer 22.

[0101] In some embodiments, such as Figure 1 As shown, the electromagnetic shielding packaging structure further includes:

[0102] A first molding layer 16 is filled in the groove and molds multiple first chips 11.

[0103] The second molding layer 17 is located above the adapter board, and the second molding layer 17 molds the second chip 12.

[0104] For example, such as Figure 1 As shown, the first molding compound 16 fills the top recess 31 and the bottom recess 30, and molds the first chip 11. The second molding compound 17 is located above the adapter board and molds the second chip 12. By setting the first molding compound 16 and the second molding compound 17, not only can the first chip 11 and the second chip 12 be protected, but the strength of the adapter board can also be enhanced, and the stress on opposite sides of the top wiring layer 21 can be balanced, reducing or even avoiding large-scale deformation of the top wiring layer 21. In one example, the material of the first molding compound 16 and the material of the second molding compound 17 are the same, for example, both the material of the first molding compound 16 and the material of the second molding compound 17 are epoxy resin molding compound.

[0105] The electromagnetic shielding packaging structure provided in this specific embodiment, by setting multiple grooves in the adapter plate and multiple electromagnetic shielding pillars distributed around the outer periphery of the grooves, and mounting multiple first chips in the grooves, allows the first chips to be electromagnetically shielded by the electromagnetic shielding pillars. This enables the use of radio frequency chips as the first chips, expands the types of chips that can be integrated in the packaging structure, and broadens the application field of the packaging structure. Using the electromagnetic shielding pillars to electromagnetically shield the first chips in the grooves, and with the pillars located outside the grooves, avoids occupying the internal space of the grooves and allows for flexible adjustment of the position of the electromagnetic shielding pillars as needed, thereby reducing the difficulty of the packaging structure manufacturing process. The electrical connection between the second chip and the adapter plate, and between the second chip and the first chip, is achieved through the wiring layer, eliminating the need for chip-to-chip bonding. This not only simplifies the packaging structure manufacturing process but also significantly reduces the manufacturing cost and helps reduce the overall thickness of the packaging structure, promoting the miniaturization of packaging structures. By providing multiple grooves within the adapter board and using these grooves to accommodate the first chip, combined with the wiring layer, a large number of I / O interface interconnects can be provided, making it suitable for fabricating package structures requiring a high number of I / O interfaces. This specific embodiment eliminates the need for processes such as TMV, thereby further reducing manufacturing costs and complexity.

[0106] It should be noted that the terms "comprising" and "having," and their variations, used in this utility model document are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context; it should be understood that such use of data can be interchanged where appropriate. The term "one or more" depends at least in part on the context and can be used to describe features, structures, or characteristics in a singular sense, or in a plural sense to describe combinations of features, structures, or characteristics. The term "based on" can be understood as not necessarily intended to express an exclusive set of factors, but can instead, also at least in part on the context, allow for the presence of other factors that are not necessarily explicitly described. Furthermore, embodiments and features in embodiments of this utility model can be combined with each other without conflict. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this utility model. In the various embodiments described above, each embodiment focuses on the differences from other embodiments; similar / identical parts between embodiments can be referred to mutually.

[0107] The above description is only a preferred embodiment of the present utility model. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present utility model, and these improvements and modifications should also be considered within the protection scope of the present utility model.

Claims

1. An electromagnetic shielding packaging structure, characterized in that, include: An adapter plate includes a substrate, a groove located within the substrate, and electromagnetic shielding pillars located within and penetrating the substrate, wherein a plurality of electromagnetic shielding pillars are distributed around the outer periphery of the groove; A wiring layer is located on the adapter board; A first chip is located within the groove, and the first chip is electrically connected to the wiring layer; The second chip is located above the adapter board and is electrically connected to the wiring layer.

2. The electromagnetic shielding encapsulation structure according to claim 1, characterized in that, The substrate includes a top surface and a bottom surface that are oppositely distributed, and the second chip is located above the top surface of the substrate; the groove includes: A bottom groove extends from the bottom of the substrate into the interior of the substrate; A top recess is located above the bottom recess. The top recess is independent of the bottom recess and extends from the top of the substrate into the interior of the substrate. A plurality of the first chips are respectively located in the bottom recess and the top recess.

3. The electromagnetic shielding packaging structure according to claim 2, characterized in that, The wiring layer includes: a top wiring layer located on the top surface of the substrate, wherein the second chip is located on the top wiring layer and electrically connected to the top wiring layer; A bottom wiring layer is located on the bottom surface of the substrate. The bottom wiring layer is electrically connected to the top wiring layer. The first chip located in the bottom groove is electrically connected to the bottom wiring layer, and the first chip located in the top groove is electrically connected to the top wiring layer.

4. The electromagnetic shielding packaging structure according to claim 3, characterized in that, The first chip includes a functional surface and a back surface that are relatively distributed, and a first conductive bump is provided on the functional surface of the first chip; The functional surface of the first chip located in the bottom recess faces the bottom wiring layer, and the first conductive bump on the functional surface of the first chip located in the bottom recess is electrically connected to the bottom wiring layer. The functional surface of the first chip located in the top recess faces the top wiring layer, and the first conductive bump on the functional surface of the first chip located in the top recess is electrically connected to the top wiring layer.

5. The electromagnetic shielding packaging structure according to claim 3, characterized in that, The adapter plate also includes: A conductive connection post penetrates the substrate, one end of the conductive connection post is electrically connected to the top wiring layer and the other end is electrically connected to the bottom wiring layer, and the conductive connection post is distributed outside the groove.

6. The electromagnetic shielding encapsulation structure according to claim 3, characterized in that, Multiple electromagnetic shielding pillars are distributed around the outer periphery of the top groove and the outer periphery of the bottom groove, and the electromagnetic shielding pillars are electrically connected to the top wiring layer or the electromagnetic shielding pillars are electrically connected to the bottom wiring layer.

7. The electromagnetic shielding encapsulation structure according to claim 6, characterized in that, Also includes: An electromagnetic shielding layer is provided, covering the inner wall of the top groove or the inner wall of the bottom groove, and the electromagnetic shielding layer is electrically connected to the wiring layer.

8. The electromagnetic shielding encapsulation structure according to claim 5, characterized in that, The inner wall of the top groove is covered with an electromagnetic shielding layer, and the plurality of electromagnetic shielding pillars are distributed only around the outer periphery of the bottom groove; One end of the electromagnetic shielding column is electrically connected to the electromagnetic shielding layer, and the other end is electrically connected to the bottom wiring layer.

9. The electromagnetic shielding encapsulation structure according to claim 8, characterized in that, In a direction parallel to the top surface of the substrate, the width of the top groove is greater than the width of the bottom groove; One end of the electromagnetic shielding column is electrically connected to the electromagnetic shielding layer on the bottom wall of the top groove, and the other end is electrically connected to the bottom wiring layer.

10. The electromagnetic shielding encapsulation structure according to claim 5, characterized in that, The inner wall of the bottom groove is covered with an electromagnetic shielding layer, and the plurality of electromagnetic shielding pillars are distributed only around the outer periphery of the top groove; One end of the electromagnetic shielding column is electrically connected to the electromagnetic shielding layer, and the other end is electrically connected to the top wiring layer.

11. The electromagnetic shielding encapsulation structure according to claim 8, characterized in that, The inner wall of the top groove is covered with an electromagnetic shielding layer; The plurality of bottom grooves are arranged at intervals along a direction parallel to the top surface of the substrate, and the plurality of electromagnetic shielding pillars are distributed around the outer periphery of each bottom groove. One end of each electromagnetic shielding pillar is electrically connected to the electromagnetic shielding layer and the other end is electrically connected to the bottom wiring layer.

12. The electromagnetic shielding encapsulation structure according to claim 11, characterized in that, The projection of the top groove on the top surface of the substrate continuously overlaps the projections of the multiple bottom grooves on the top surface of the substrate; One end of the electromagnetic shielding column is electrically connected to the electromagnetic shielding layer on the bottom wall of the bottom groove, and the other end is electrically connected to the bottom wiring layer.

13. The electromagnetic shielding encapsulation structure according to claim 5, characterized in that, The inner wall of the top groove is covered with an electromagnetic shielding layer; The plurality of bottom grooves are arranged at intervals along a direction parallel to the top surface of the substrate. A portion of the electromagnetic shielding pillars are distributed around the outer periphery of the top grooves and the outer periphery of all the bottom grooves. Another portion of the electromagnetic shielding pillars are located between two adjacent bottom grooves. The electromagnetic shielding pillars are electrically connected to the electromagnetic shielding layer and the wiring layer.

14. The electromagnetic shielding packaging structure according to claim 2, characterized in that, The plurality of bottom grooves are arranged at intervals along a direction parallel to the top surface of the substrate, and the plurality of top grooves are arranged at intervals along a direction parallel to the top surface of the substrate, and the plurality of top grooves correspond one-to-one with the plurality of bottom grooves; Multiple electromagnetic shielding pillars are distributed around the outer periphery of each of the top and bottom grooves. The inner wall of the top groove is covered with an electromagnetic shielding layer. Both the electromagnetic shielding pillars and the electromagnetic shielding layer are electrically connected to the wiring layer.

15. The electromagnetic shielding encapsulation structure according to claim 1, characterized in that, Also includes: A first molding layer is filled into the groove and encapsulates a plurality of the first chips; A second molding layer is located above the adapter board, and the second molding layer encapsulates the second chip.

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