Anti-mis-triggering analog signal acquisition circuit

Abstract

This utility model discloses an analog signal acquisition circuit for preventing accidental triggering, relating to the field of signal acquisition. The circuit comprises: a gold-finger button and a contact impedance compensation resistor forming a compensation module corresponding to the button; each voltage divider resistor, or a combination thereof in series with a preceding voltage divider resistor, forming a voltage divider unit for the corresponding button; a reference voltage divider resistor, or a combination thereof in series with a subsequent voltage divider resistor of the corresponding voltage divider unit, forming a reference voltage divider unit for the corresponding button; a voltage divider network is constructed based on the compensation module, voltage divider units, the first voltage divider module, and the reference voltage divider unit; based on the voltage divider network, when any gold-finger button is pressed, the corresponding voltage divider unit and the reference voltage divider unit dynamically combine to form the voltage output range corresponding to the button, and the voltage reference path corresponding to the button is activated, outputting an analog signal through the voltage reference path. Thus, this utility model achieves accurate acquisition of the state of each button even under high contact impedance conditions.

Description

Technical Field

[0001] This utility model relates to the field of signal acquisition, and in particular to an analog signal acquisition circuit that prevents false triggering. Background Technology

[0002] Currently, button designs commonly employ a "gold finger + conductive rubber" process, which includes various manufacturing processes such as "carbon film + carbon particles" and "plated gold + nickel particles." In terms of cost, the "carbon film + carbon particles" solution is the lowest, but due to its material properties, its contact impedance varies significantly, exhibiting considerable instability. Actual testing shows that under light pressure, the contact between the gold finger and the conductive rubber is incomplete, with contact impedance potentially reaching thousands of ohms (kΩ). Under heavy pressure, however, the contact is more complete, and the impedance drops to the level of a few ohms (Ω). This large fluctuation in contact impedance can easily lead to false triggering when multiple buttons share a single ADC acquisition channel, especially when the MCU power supply voltage is 3.3V. Utility Model Content

[0003] To ensure stable and accurate acquisition of button states even under high contact impedance conditions, this invention proposes an anti-false trigger analog signal acquisition circuit for acquiring analog signals corresponding to multiple gold finger buttons; including:

[0004] Contact impedance compensation resistors are connected to all gold finger buttons; the gold finger buttons and the contact impedance compensation resistors form a compensation module corresponding to each button; the compensation module is used to reduce the impact of contact impedance changes on analog signals.

[0005] The first voltage divider module is used to connect to the positive power supply;

[0006] The second voltage divider module includes multiple voltage divider resistors connected in series with the first voltage divider module to form a multi-stage voltage divider resistor; each voltage divider resistor corresponds to a gold finger button, and each voltage divider resistor or its series combination with the preceding voltage divider resistor forms a voltage divider unit for the corresponding button.

[0007] The third voltage divider module includes a reference voltage divider resistor; for each gold finger button, the reference voltage divider resistor or the voltage divider resistor connected in series with the subsequent voltage divider resistor of the corresponding voltage divider unit of the button forms the reference voltage divider unit for the corresponding button; wherein:

[0008] The compensation module is connected in parallel with the corresponding voltage divider unit. The equivalent resistance formed by the parallel connection is connected in series with the first voltage divider module. The total resistance formed by the series connection is connected in series with the corresponding reference voltage divider unit to form a complete voltage divider network.

[0009] Based on the voltage divider network described above, when any gold finger button is pressed, the corresponding voltage divider unit and the reference voltage divider unit dynamically combine to form the voltage output range corresponding to the button, and conduct the voltage reference path corresponding to the button, and output an analog signal within the corresponding voltage output range through the voltage reference path.

[0010] Furthermore, each voltage divider resistor, or its series combination with the preceding voltage divider resistor, forms a voltage divider unit for the corresponding button, specifically:

[0011] The voltage divider resistor closest to the first voltage divider module is the first-stage voltage divider unit. Subsequent voltage divider resistors are connected in series with their preceding voltage divider resistors to form multi-stage voltage divider units corresponding to the buttons.

[0012] Each voltage divider unit corresponds to a gold finger button.

[0013] Furthermore, one end of the reference voltage divider resistor is connected to the last stage voltage divider resistor in the second voltage divider module, and the other end is grounded.

[0014] Furthermore, for each gold finger button, the reference voltage divider resistor or the voltage divider resistor connected in series with the subsequent voltage divider resistor of the corresponding voltage divider unit of the button forms the reference voltage divider unit for the corresponding button, specifically as follows:

[0015] For the gold finger button corresponding to the last stage voltage divider unit, the reference voltage divider resistor forms a separate reference voltage divider unit for that button.

[0016] For other gold finger buttons, the reference voltage divider resistor is connected in series with the subsequent voltage divider resistor of the corresponding voltage divider unit to form the reference voltage divider unit for that button.

[0017] Furthermore, the first voltage divider module is used to adjust the voltage division ratio between the equivalent resistance formed by the compensation module and the corresponding voltage divider unit connected in parallel and the corresponding reference voltage divider unit.

[0018] Furthermore, the voltage reference path of the gold finger button is formed by a connecting line between the first connection point and the second connection point;

[0019] The first connection point is the connection point between the voltage divider unit corresponding to the button and the reference voltage divider unit;

[0020] The second connection point is the connection point between the button and the contact impedance compensation resistor.

[0021] Furthermore, the anti-false triggering analog signal acquisition circuit also includes:

[0022] The noise suppression module, connected in parallel with the gold finger buttons and the contact impedance compensation resistor, is used to filter the analog signal output from the voltage reference path and input it to the analog-to-digital converter.

[0023] Furthermore, the noise suppression module includes: a first capacitor C1, a second capacitor C2, and a sixth resistor R6; wherein:

[0024] One end of the first capacitor C1 is connected to the parallel terminal of the gold finger button and the contact impedance compensation resistor, and one end of the sixth resistor R6; the other end of the sixth resistor R6 is connected to one end of the second capacitor C2 and then connected to the analog-to-digital converter; the other end of the first capacitor C1 and the other end of the second capacitor C2 are grounded.

[0025] Furthermore, the first voltage divider module includes a first resistor R1; one end of the first resistor R1 is connected to the positive power supply, and the other end is connected to the first-stage voltage divider unit.

[0026] Furthermore, the sum of the maximum contact impedances between the sixth resistor R6 and the gold finger button is more than ten times the sum of the resistance values ​​of each voltage divider resistor in the second voltage divider module.

[0027] The resistance of the first resistor R1 is greater than the sum of the resistances of all the voltage divider resistors in the second voltage divider module;

[0028] The resistance of the contact impedance compensation resistor R7 is more than ten times the sum of the maximum contact impedance of the sixth resistor R6 and the gold finger button.

[0029] Compared with the prior art, the present invention has at least the following beneficial effects:

[0030] (1) In this utility model, the gold finger button and the contact impedance compensation resistor form the compensation module corresponding to the button; each voltage divider resistor or its series combination with the preceding voltage divider resistor forms the voltage divider unit corresponding to the button; the reference voltage divider resistor or its series combination with the subsequent voltage divider resistor of the corresponding voltage divider unit forms the reference voltage divider unit corresponding to the button; the compensation module and the corresponding voltage divider unit are connected in parallel, the equivalent resistance formed by the parallel connection is connected in series with the first voltage divider module, and the total resistance formed by the series connection is connected in series with the corresponding reference voltage divider unit to form a complete voltage divider network; based on the above voltage divider network, when any gold finger button is pressed, the corresponding voltage divider unit and the reference voltage divider unit are dynamically combined to form the voltage output range corresponding to the button, and the voltage reference path corresponding to the button is turned on, and the analog signal in the corresponding voltage output range is output through the voltage reference path. Thus, this utility model achieves good compatibility with high contact impedance without changing the existing "carbon film + carbon particles" gold finger process, without adding an additional ADC acquisition channel or changing to an IO matrix scanning scheme, thus reducing hardware costs.

[0031] (2) This utility model uses a unique voltage divider network, including multiple voltage divider resistors in the second voltage divider module and a reference voltage divider resistor in the third voltage divider module, so that each button will form an independent and non-overlapping voltage output range when pressed. This design ensures that even in complex usage environments, the signals generated by different buttons will not interfere with or overlap with each other, thereby effectively preventing the occurrence of false triggering and the problem of misidentification of button signals.

[0032] (3) To address the issue of large variations in contact impedance of gold finger buttons under the "carbon film + carbon particles" process, this invention introduces a contact impedance compensation resistor (R7), whose resistance is designed to be more than ten times the sum of the sixth resistor (R6) and the maximum contact impedance. This design can maintain circuit stability even when the contact impedance is large, avoid signal loss or misidentification due to poor contact, and ensure stable and accurate acquisition of the button status under various pressing pressures.

[0033] (4) In this invention, when any gold finger button is pressed, the corresponding voltage divider unit and the reference voltage divider unit dynamically combine to form the voltage reference path of the button, and the analog signal is filtered by the noise suppression module to remove high-frequency noise before being input to the analog-to-digital converter (ADC). This not only improves the purity of the signal, but also further enhances the circuit's resistance to environmental interference, ensuring the reliability of signal acquisition. Attached Figure Description

[0034] Figure 1 This is a circuit diagram of an analog signal acquisition circuit for preventing false triggering according to an embodiment of the present invention;

[0035] Figure 2 for Figure 1 The corresponding first decomposition diagram;

[0036] Figure 3 for Figure 1 The corresponding second decomposition diagram;

[0037] Figure 4 for Figure 1 The corresponding third decomposition diagram. Detailed Implementation

[0038] The following are specific embodiments of the present invention, which are described in conjunction with the accompanying drawings. However, the present invention is not limited to these embodiments.

[0039] Example 1

[0040] When the microcontroller unit (MCU) is powered by 3.3V, the input range of the AD interface is limited. If changes in contact impedance cause significant voltage signal fluctuations, especially when the voltage signal weakens under high impedance conditions, the AD conversion result may be inaccurate, leading to misjudgment or false triggering of button states. Therefore, designing a new circuit that can effectively handle these impedance changes is crucial. The new circuit needs to ensure a relatively stable voltage signal even under high contact impedance (reaching the kΩ level), guaranteeing accurate button state recognition. This avoids false triggering problems caused by impedance changes, improving system reliability and user experience. This is precisely the core challenge and objective of this invention.

[0041] Therefore, in order to ensure that the state of each button can be stably and accurately acquired even under high contact impedance, this embodiment proposes an anti-false trigger analog signal acquisition circuit for acquiring analog signals corresponding to multiple gold finger buttons;

[0042] To provide a more intuitive and detailed explanation of the circuit of this utility model, as follows: Figure 1 As shown, this embodiment uses a circuit with three gold finger buttons as an example for detailed explanation.

[0043] The anti-false triggering analog signal acquisition circuit includes:

[0044] Contact impedance compensation resistors are connected to all gold finger buttons; the gold finger buttons and the contact impedance compensation resistors form a compensation module corresponding to each button; the compensation module is used to reduce the impact of contact impedance changes on analog signals.

[0045] The first voltage divider module is used to connect to the positive power supply;

[0046] The second voltage divider module includes multiple voltage divider resistors connected in series with the first voltage divider module to form a multi-stage voltage divider resistor; each voltage divider resistor corresponds to a gold finger button, and each voltage divider resistor or its series combination with the preceding voltage divider resistor forms a voltage divider unit for the corresponding button.

[0047] Each voltage divider resistor, or its series combination with the preceding voltage divider resistor, forms the voltage divider unit for the corresponding button, specifically:

[0048] The voltage divider resistor closest to the first voltage divider module is the first-stage voltage divider unit. Subsequent voltage divider resistors are connected in series with their preceding voltage divider resistors to form multi-stage voltage divider units corresponding to the buttons.

[0049] Each voltage divider unit corresponds to a gold finger button.

[0050] The third voltage divider module includes a reference voltage divider resistor; for each gold finger button, the reference voltage divider resistor or the voltage divider resistor connected in series with the subsequent voltage divider resistor of the corresponding voltage divider unit of the button forms the reference voltage divider unit of the corresponding button.

[0051] One end of the reference voltage divider resistor is connected to the last stage voltage divider resistor in the second voltage divider module, and the other end is grounded.

[0052] For each gold finger button, the reference voltage divider resistor or the voltage divider resistor connected in series with the subsequent voltage divider resistor of the corresponding voltage divider unit of the button forms the reference voltage divider unit for the corresponding button, specifically:

[0053] For the gold finger button corresponding to the last stage voltage divider unit, the reference voltage divider resistor forms a separate reference voltage divider unit for that button.

[0054] It should be noted that the reference voltage divider unit corresponding to the gold finger button in the last stage of the voltage divider unit consists only of the reference voltage divider resistor R5, without the need for other resistors in series, to ensure that the voltage output path is the shortest and the resistance is the smallest, which is convenient for forming an independent voltage reference.

[0055] For other gold finger buttons, the reference voltage divider resistor is connected in series with the subsequent voltage divider resistor of the corresponding voltage divider unit to form the reference voltage divider unit for that button.

[0056] For voltage divider units that are not the last stage, their corresponding reference voltage divider unit is formed by connecting the reference voltage divider resistor R5 in series with the subsequent voltage divider resistor of the voltage divider unit corresponding to that button. For example:

[0057] The voltage divider unit corresponding to the gold finger button SW1 is R2, and the reference voltage divider unit is R3+R4+R5.

[0058] The gold finger button SW2 corresponds to voltage divider unit R2+R3, and the reference voltage divider unit is R4+R5.

[0059] The gold finger button SW3 corresponds to the voltage divider unit R2+R3+R4, and the reference voltage divider unit is R5.

[0060] By connecting a series resistor, the resistance values ​​of the reference voltage divider units for different buttons are significantly different, thus forming non-overlapping voltage output ranges.

[0061] The first voltage divider module is used to adjust the voltage division ratio between the equivalent resistance formed by the compensation module and the corresponding voltage divider unit in parallel and the corresponding reference voltage divider unit.

[0062] The first voltage divider module includes a first resistor R1; one end of the first resistor R1 is connected to the positive power supply, and the other end is connected to the first-stage voltage divider unit.

[0063] in:

[0064] The compensation module is connected in parallel with the corresponding voltage divider unit. The equivalent resistance formed by the parallel connection is connected in series with the first voltage divider module. The total resistance formed by the series connection is connected in series with the corresponding reference voltage divider unit to form a complete voltage divider network. Through the parallel design, the compensation module can effectively reduce the influence of contact impedance fluctuations, while the series R1 is used to adjust the overall voltage divider ratio to ensure the stable output of the third voltage divider module.

[0065] Based on the voltage divider network described above, when any gold finger button is pressed, the corresponding voltage divider unit and the reference voltage divider unit dynamically combine to form the voltage output range corresponding to the button, and conduct the voltage reference path corresponding to the button, and output an analog signal within the corresponding voltage output range through the voltage reference path.

[0066] The voltage reference path of the gold finger button is formed by the connecting line between the first connection point and the second connection point.

[0067] The first connection point A is the connection point between the voltage divider unit corresponding to the button and the reference voltage divider unit;

[0068] The second connection point B is the connection point between the button and the contact impedance compensation resistor.

[0069] In other words, by dynamically connecting the reference voltage divider resistor and the subsequent voltage divider resistor in series, an independent (i.e. differentiated) voltage reference path is achieved for different buttons, avoiding voltage overlap caused by contact impedance fluctuations and ensuring that the analog-to-digital converter (ADC) can uniquely identify the button state.

[0070] The analog signal acquisition circuit for preventing false triggering also includes:

[0071] The noise suppression module, connected in parallel with the gold finger buttons and the contact impedance compensation resistor, is used to filter the analog signal output from the voltage reference path and input it to the analog-to-digital converter.

[0072] The noise suppression module includes: a first capacitor C1, a second capacitor C2, and a sixth resistor R6; wherein:

[0073] One end of the first capacitor C1 is connected to the parallel terminal of the gold finger button and the contact impedance compensation resistor, and one end of the sixth resistor R6; the other end of the sixth resistor R6 is connected to one end of the second capacitor C2 and then connected to the analog-to-digital converter; the other end of the first capacitor C1 and the other end of the second capacitor C2 are grounded.

[0074] In the noise suppression module, R6 is a filter resistor, and C1 and C2 are decoupling capacitors. R6 and C1 form an RC low-pass filter unit, which is used to suppress high-frequency noise and stabilize voltage fluctuations at the analog signal input. C2 is used to filter out high-frequency interference on the power line and achieve power supply decoupling. Together, these three components constitute the high-frequency noise suppression module. Through the synergistic effect of filtering and decoupling, the impact of external electromagnetic interference on the analog-to-digital converter (ADC) input signal is reduced, thereby improving the circuit's anti-interference capability and signal acquisition accuracy.

[0075] The analog signal acquisition circuit for preventing false triggering in this embodiment meets the following resistance value design conditions:

[0076] First resistance design condition: The sum of the maximum contact impedance between the sixth resistor R6 and the gold finger button is greater than ten times the sum of the resistance values ​​of each voltage divider resistor in the second voltage divider module;

[0077] By limiting the first resistance value design condition, it is ensured that the high-impedance path (R6 + the maximum contact impedance of the gold finger button) is less than the low-impedance path (the sum of the resistance values ​​of each voltage divider resistor is as follows). Figure 1 The sum of R2+R3+R4 has no significant impact on signal transmission, thus avoiding signal interference or false triggering.

[0078] Second resistance design condition: The resistance value of the first resistor R1 is greater than the sum of the resistance values ​​of all voltage divider resistors in the second voltage divider module;

[0079] In the second resistance design condition, R1 serves as the main control resistor, and its resistance value is significantly higher than the sum of the resistance values ​​of each voltage divider resistor (e.g., ...). Figure 1 The sum of R2, R3, and R4 ensures their dominant position in the circuit, for example, controlling the voltage distribution ratio in a voltage divider network. By limiting the minimum resistance value of R1, circuit instability or overload caused by fluctuations in the sum of the resistance values ​​of the individual voltage divider resistors is prevented.

[0080] The third resistance design condition is that the resistance value of the contact impedance compensation resistor R7 is greater than ten times the sum of the sixth resistor R6 and the maximum contact impedance of the gold finger button.

[0081] In the third resistance design condition, the resistance of R7 is more than ten times the sum of the maximum contact impedance of the sixth resistor R6 and the gold finger button. The high resistance suppresses the influence of contact impedance changes on the analog signal, thereby achieving the function of preventing false triggering.

[0082] When designing buttons using gold fingers that contact conductive rubber, the contact impedance primarily originates from the contact point between the gold fingers and the conductive rubber. This contact impedance varies depending on the pressure applied, being higher with a light press and lower with a heavy press. By connecting these switches to a large resistor (R7), the impact of contact impedance variations on voltage distribution in the circuit can be effectively reduced, thereby ensuring the stability of signal acquisition.

[0083] To clearly demonstrate the detailed voltage division data of the voltage divider network when each gold finger button is pressed, this embodiment utilizes... Figures 2 to 4 one by one Figure 1 The working principle of each gold-finger button in the circuit shown is analyzed in detail. Through these diagrams, it is possible to intuitively understand how the circuit dynamically adjusts the voltage divider path when different buttons are triggered, thereby ensuring that the voltage output range corresponding to each button does not overlap and is stable and reliable. Each diagram focuses on a specific button, showing the combination of its corresponding voltage divider unit and reference voltage divider unit, as well as the resulting voltage change, facilitating a comprehensive understanding of the core technical details of the entire circuit design.

[0084] 1. Based on Figure 2 Analyze the voltage divider network when SW1 is pressed.

[0085] 1.1 Voltage V at point A A Calculation of (i.e., the first connection point)

[0086] Voltage division relationship: When SW1 is pressed, the voltage division relationship in the circuit is as follows: the compensation module (R7+SW1) and the voltage divider unit (R2) are connected in parallel, then connected in series with the first voltage divider module (R1), and finally divided with the reference voltage divider unit (R3+R4+R5). The calculation steps are as follows:

[0087] 1.11 Calculate the equivalent resistance R after (R7+SW1) and (R2) are connected in parallel. eq1 :

[0088] R eq1 =((R7+SW1)×R2) / ((R7+SW1)+R2);

[0089] 1.12, R eq1 Connected in series with R1, the total resistance R is obtained. total1 :

[0090] R total1 =R1+R eq1 ;

[0091] 1.13, R total1 Divide the voltage at point A by dividing the voltage across (R3+R4+R5):

[0092] V A =VDD×((R3+R4+R5) / (R total1 +(R3+R4+R5)));

[0093] 1.2, Voltage V at point B B Calculation of (i.e., the second connection point)

[0094] Voltage division relationship: VDD minus the voltage at point A VA The voltage is divided by SW1 and (R1+R7), where the voltage obtained by SW1 plus the voltage at point A equals the voltage at point B. The specific calculation is as follows:

[0095] 1.21: Calculate the voltage division of SW1 and (R1+R7):

[0096] V B =V A +(VDD-V A )×(SW1 / (SW1+(R1+R7))).

[0097] 2. Based on Figure 3 Analyze the voltage divider network when SW2 is pressed.

[0098] 2.1 Voltage V at point A A Calculation of (i.e., the first connection point)

[0099] Voltage division relationship: The compensation module (SW2+R7) and voltage divider unit (R2+R3) are connected in parallel, then connected in series with the first voltage divider module (R1), and finally divided with the reference voltage divider unit (R4+R5). The calculation steps are as follows:

[0100] 2.11 Calculate the equivalent resistance R of (R7+SW2) and (R2+R3) connected in parallel. eq2 :

[0101] R eq2 =((R2+R3)×(SW2+R7)) / ((R2+R3)+(SW2+R7));

[0102] 2.12, R eq2 Connected in series with R1, the total resistance R is obtained. total2 :

[0103] R total2 =R1+R eq2 ;

[0104] 2.13, R total2 By dividing the voltage with (R4+R5), we obtain the voltage at point A:

[0105] V A =VDD×((R4+R5) / (R total2 +(R4+R5)));

[0106] 2.2 Voltage V at point B B Calculation of (i.e., the second connection point)

[0107] Voltage division relationship: VDD minus the voltage at point A V A The voltage is divided by SW2 and (R1+R7), where the voltage obtained by SW2 plus the voltage at point A equals the voltage at point B. The specific calculation is as follows:

[0108] 2.21: Calculate the voltage division of SW2 and (R1+R7):

[0109] V B =V A +(VDD-V A )×(SW2 / (SW2+(R1+R7))).

[0110] 3. Based on Figure 4 Analysis of the voltage divider network when SW3 is pressed

[0111] 3.1 Voltage V at point A A Calculation of (i.e., the first connection point)

[0112] Voltage division relationship: The compensation module (SW3+R7) and voltage divider unit (R2+R3+R4) are connected in parallel, then in series with the first voltage divider module (R1), and finally divided with the reference voltage divider unit (R5). The calculation steps are as follows:

[0113] 3.11 Calculate the equivalent resistance R of (SW3+R7) and (R2+R3+R4) connected in parallel. eq3 :

[0114] R eq3 =((R2+R3+R4)×(SW3+R7)) / ((R2+R3+R4)+(SW3+R7));

[0115] 3.12, R eq3 Connected in series with R1, the total resistance R is obtained. total3 :

[0116] R total3 =R1+R eq3 ;

[0117] 3.13, R total3 By dividing the voltage with (R5), we obtain the voltage at point A:

[0118] V A =VDD×((R5) / (R total3 +R5));

[0119] 3.2, Voltage V at point B B Calculation of (i.e., the second connection point)

[0120] Voltage division relationship: VDD minus the voltage at point A V A The voltage is divided by SW3 and (R1+R7), where the voltage obtained by SW3 plus the voltage at point A equals the voltage at point B. The specific calculation is as follows:

[0121] 3.21: Calculate the voltage division of SW3 and (R1+R7):

[0122] V B =V A +(VDD-V A )×(SW3 / (SW3+(R1+R7))).

[0123] The purpose of calculating the voltages at points A and B is to demonstrate that, under different button contact impedance conditions, the button signal can still be accurately and stably acquired, and false triggering can be avoided. Through a reasonable resistor network design and voltage divider strategy, a stable voltage output is ensured even with significant changes in contact impedance, thereby achieving reliable button recognition.

[0124] Specifically:

[0125] The voltage measurement at point A is to demonstrate that, through the design of the voltage divider network in this embodiment, the voltage at point A remains relatively stable even under changes in contact impedance (e.g., during light or heavy presses). This ensures that the MCU can correctly identify the button state without being affected by fluctuations in contact impedance.

[0126] The design goal of the voltage at point B is to ensure that it varies within an acceptable range so that the MCU can reliably read the button status.

[0127] To further verify the feasibility and effectiveness of the circuit design of this utility model, this embodiment will be further validated through a series of experimental data. These experimental data cover the circuit's performance under various operating conditions, including but not limited to voltage output when different buttons are pressed, the impact of contact impedance changes on signal acquisition, and noise suppression effects. By comparing and analyzing the experimental results, the high stability and accuracy of the circuit in practical applications can be clearly demonstrated, ensuring accurate identification of each button's state even under high contact impedance conditions. The provided experimental data provides a solid foundation for evaluating the overall performance of the circuit and proves the significant advantages of this design in preventing false triggering and stabilizing signal acquisition.

[0128] Table 1 (records the parameters of each component, set based on resistance design conditions):

[0129]

[0130]

[0131] Table 1 details the parameter values ​​of each electronic component in the circuit. It provides the minimum (min), typical (TYP), and maximum (max) values ​​for each resistor (R1 to R7) and switch (SW1 to SW3), along with their units.

[0132] VDD: Positive power supply, ranging from 3.0V to 3.6V, with a typical value of 3.3V.

[0133] Resistors (R1 to R7): The resistance ranges for each resistor are listed. For example, the resistance range for R1 is 2178Ω to 2222Ω, with a typical value of 2200Ω.

[0134] Switches (SW1 to SW3): The contact resistance range of the switches in the pressed state, typically 0Ω, with a maximum value of 200Ω.

[0135] Table 2 (records the resistance values ​​of the voltage divider network when SW1 is pressed; in the table, " / / " indicates parallel connection and "+" indicates connected connection):

[0136]

[0137]

[0138] In Table 2, the measured data for min, TYP, and max correspond to the parameters for min, TYP, and max in Table 1, respectively. For example, the data in the min column of Table 2 are obtained through experimental testing based on the parameters in the min column of Table 1. R1+R2 / / (SW1+R7) indicates that the compensation module (R7+SW1) and the voltage divider unit (R2) are connected in parallel and then connected in series with the first voltage divider module (R1).

[0139] Table 2 shows the voltage and resistance values ​​at key points in the circuit calculated under three parameter conditions: minimum (min), typical (TYP), and maximum (max) when SW1 is pressed. Specifically, the voltage V at point A... A The voltage at point B ranges from 1.069V to 1.316V under different conditions. B With V A The consistency indicates that even with changes in contact impedance, the voltage output range corresponding to this button remains stable and does not overlap with other buttons. This ensures that the circuit maintains stability and provides accurate signal acquisition even under high contact impedance conditions.

[0140] Table 2-1:

[0141] Contact resistance Ω 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 AD 508 512 516 520 524 528 532 535 539 543 547

[0142] Table 2-1 provides theoretical data calculated based on the typical parameter (TYP), reflecting the change in AD converter readings under different contact impedance conditions when SW1 is pressed. As the contact impedance increases from 0Ω to 10kΩ, the AD reading only increases slightly from 508 to 547, showing that the circuit can still maintain a stable voltage output even under high contact impedance. This design ensures that each button has an independent and defined voltage output range, avoiding false triggering.

[0143] Table 3 (records the resistance values ​​of the voltage divider network when SW2 is pressed; in the table, " / / " indicates parallel connection, and "+" indicates connected connection):

[0144]

[0145]

[0146] In Table 3, the measured data for min, TYP, and max correspond to the parameters for min, TYP, and max in Table 1, respectively. For example, the data in the min column of Table 3 are obtained through experimental testing based on the parameters in the min column of Table 1. R1+(R2+R3) / / (SW2+R7) indicates that the compensation module (SW2+R7) and the voltage divider unit (R2+R3) are connected in parallel and then connected in series with the first voltage divider module (R1).

[0147] Table 3 lists the relevant voltage and resistance values ​​calculated under minimum, typical, and maximum parameter conditions when SW2 is pressed. Voltage at point A V A The voltage at point B, ranging from 0.712V to 0.880V under different conditions, also follows this pattern, indicating that this button has a unique voltage output range and does not overlap with other button signals. This proves that the circuit can provide a reliable and stable voltage output even when the contact impedance fluctuates.

[0148] Table 3-1:

[0149] Contact resistance Ω 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 AD 339 344 349 353 358 363 368 373 377 382 387

[0150] Table 3-1 shows the theoretical data calculated based on the Typical Parameter (TYP), describing the AD converter readings under different contact impedance conditions when SW2 is pressed. The results show that as the contact impedance increases from 0Ω to 10kΩ, the AD reading slightly increases from 339 to 387, further verifying that the circuit of this invention can maintain stable operation under higher contact impedance. This design allows each button to have a clearly distinguishable voltage output range, effectively avoiding false triggering problems caused by contact impedance.

[0151] Table 4 (records the resistance values ​​of the voltage divider network when SW3 is pressed; in the table, " / / " indicates parallel connection and "+" indicates connected connection):

[0152] min TYP max unit (R2+R3+R4) 1514.7 1530 1545.3 Ω (SW3+R7) 217800 220000 222200 Ω (R2+R3+R4) / / (SW3+R7) 1504.24 1519.43 1534.63 Ω R1+(R2+R3+R4) / / (SW3+R7) 3682.24 3719.43 3756.63 Ω R5 504.9 510 515.1 Ω <![CDATA[V A ]]> 0.355 0.398 0.442 V <![CDATA[VDD-V A ]]> 2.645 2.902 3.158 V (R1+R7) 219978 222200.000 224422 Ω <![CDATA[V SW1 ]]> 0 0.000000000 0 V <![CDATA[V B ]]> 0.355 0.398 0.442 V AD 152 170 188

[0153] In Table 4, the measured data for min, TYP, and max correspond to the parameters for min, TYP, and max in Table 1, respectively. For example, the data in the min column of Table 4 are obtained through experimental testing based on the parameters in the min column of Table 1. R1+(R2+R3+R4) / / (SW3+R7) indicates that the compensation module (SW3+R7) and the voltage divider unit (R2+R3+R4) are connected in parallel and then connected in series with the voltage divider module (R1).

[0154] Table 4 records the key voltage and resistance information calculated under three parameter conditions: minimum, typical, and maximum, when SW3 is pressed. Voltage at point A V A The voltage at point B is the same within the 0.355V to 0.442V range, reflecting the unique voltage output range of this button. These values ​​demonstrate that the circuit design has successfully assigned a non-overlapping voltage range to each button, maintaining stable output even when faced with changes in contact impedance. Therefore, this design not only improves system reliability but also enhances the user experience.

[0155] Table 4-1:

[0156] Contact resistance Ω 0 1000 2000 3000 4000 5000 6000 7000 8000 9000 10000 AD 170 170 171 172 173 173 174 175 176 176 177

[0157] Table 4-1 shows the theoretical data calculated based on the typical parameter (TYP), reflecting the changes in the AD converter reading under different contact impedance conditions when SW3 is pressed. Although the contact impedance increases from 0Ω to 10kΩ, the AD reading only slowly increases from 170 to 177, further demonstrating that the circuit maintains good stability and accuracy even under high contact impedance conditions. Each button has its own independent voltage output range, ensuring the uniqueness and accuracy of the signal and effectively reducing the possibility of false triggering. This also confirms the effectiveness and superiority of the anti-false triggering analog signal acquisition circuit proposed in this invention.

[0158] In this invention, the gold finger button and the contact impedance compensation resistor form a compensation module corresponding to the button; each voltage divider resistor or its series combination with the preceding voltage divider resistor forms a voltage divider unit for the corresponding button; the reference voltage divider resistor or its series combination with the subsequent voltage divider resistor of the corresponding voltage divider unit forms a reference voltage divider unit for the corresponding button; the compensation module and the corresponding voltage divider unit are connected in parallel, the equivalent resistance formed by the parallel connection is connected in series with the first voltage divider module, and the total resistance formed by the series connection is connected in series with the corresponding reference voltage divider unit to form a complete voltage divider network; based on the above voltage divider network, when any gold finger button is pressed, the corresponding voltage divider unit and the reference voltage divider unit dynamically combine to form the voltage output range corresponding to the button, and conduct the voltage reference path corresponding to the button, outputting an analog signal within the corresponding voltage output range through the voltage reference path. Thus, this invention achieves good compatibility with high contact impedance without changing the existing "carbon film + carbon particles" gold finger process, without adding an additional ADC acquisition channel or changing to an IO matrix scanning scheme, reducing hardware costs.

[0159] It should be noted that all directional indicators (such as up, down, left, right, front, back, etc.) in this utility model embodiment are only used to explain the relative positional relationship and movement of each component in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicator will also change accordingly.

[0160] Furthermore, in this utility model, the use of terms such as "first," "second," and "a" is for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this utility model, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0161] In this utility model, unless otherwise explicitly specified and limited, the terms "connection," "fixing," etc., should be interpreted broadly. For example, "fixing" can mean a fixed connection, a detachable connection, or an integral part; it can mean a mechanical connection or an electrical connection; it can mean a direct connection or an indirect connection through an intermediate medium; it can mean the internal communication of two components or the interaction between two components, unless otherwise explicitly limited. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0162] Furthermore, the technical solutions of the various embodiments of this utility model can be combined with each other, but only if they are based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

Claims

1. A circuit for preventing false triggering of analog signals, characterized in that, Used to acquire analog signals corresponding to multiple gold finger buttons; including: Contact impedance compensation resistors are connected to all gold finger buttons; the gold finger buttons and the contact impedance compensation resistors form a compensation module corresponding to each button; the compensation module is used to reduce the impact of contact impedance changes on analog signals. The first voltage divider module is used to connect to the positive power supply; The second voltage divider module includes multiple voltage divider resistors connected in series with the first voltage divider module to form a multi-stage voltage divider resistor; each voltage divider resistor corresponds to a gold finger button, and each voltage divider resistor or its series combination with the preceding voltage divider resistor forms a voltage divider unit for the corresponding button. The third voltage divider module includes a reference voltage divider resistor; for each gold finger button, the reference voltage divider resistor or the voltage divider resistor connected in series with the subsequent voltage divider resistor of the corresponding voltage divider unit of the button forms the reference voltage divider unit for the corresponding button; wherein: The compensation module is connected in parallel with the corresponding voltage divider unit. The equivalent resistance formed by the parallel connection is connected in series with the first voltage divider module. The total resistance formed by the series connection is connected in series with the corresponding reference voltage divider unit to form a complete voltage divider network. Based on the voltage divider network described above, when any gold finger button is pressed, the corresponding voltage divider unit and the reference voltage divider unit dynamically combine to form the voltage output range corresponding to the button, and conduct the voltage reference path corresponding to the button, and output an analog signal within the corresponding voltage output range through the voltage reference path.

2. The analog signal acquisition circuit for preventing false triggering according to claim 1, characterized in that, Each voltage divider resistor, or its series combination with the preceding voltage divider resistor, forms the voltage divider unit for the corresponding button, specifically: The voltage divider resistor closest to the first voltage divider module is the first-stage voltage divider unit. Subsequent voltage divider resistors are connected in series with their preceding voltage divider resistors to form multi-stage voltage divider units corresponding to the buttons. Each voltage divider unit corresponds to a gold finger button.

3. The analog signal acquisition circuit for preventing false triggering according to claim 2, characterized in that, One end of the reference voltage divider resistor is connected to the last stage voltage divider resistor in the second voltage divider module, and the other end is grounded.

4. The analog signal acquisition circuit for preventing false triggering according to claim 3, characterized in that, For each gold finger button, the reference voltage divider resistor or the voltage divider resistor connected in series with the subsequent voltage divider resistor of the corresponding voltage divider unit of the button forms the reference voltage divider unit for the corresponding button, specifically: For the gold finger button corresponding to the last stage voltage divider unit, the reference voltage divider resistor forms a separate reference voltage divider unit for that button. For other gold finger buttons, the reference voltage divider resistor is connected in series with the subsequent voltage divider resistor of the corresponding voltage divider unit to form the reference voltage divider unit for that button.

5. The analog signal acquisition circuit for preventing false triggering according to claim 4, characterized in that, The first voltage divider module is used to adjust the voltage division ratio between the equivalent resistance formed by the compensation module and the corresponding voltage divider unit in parallel and the corresponding reference voltage divider unit.

6. The analog signal acquisition circuit for preventing false triggering according to claim 5, characterized in that, The voltage reference path of the gold finger button is formed by the connecting line between the first connection point and the second connection point. The first connection point is the connection point between the voltage divider unit corresponding to the button and the reference voltage divider unit; The second connection point is the connection point between the button and the contact impedance compensation resistor.

7. The analog signal acquisition circuit for preventing false triggering according to claim 6, characterized in that, The analog signal acquisition circuit for preventing false triggering also includes: The noise suppression module, connected in parallel with the gold finger buttons and the contact impedance compensation resistor, is used to filter the analog signal output from the voltage reference path and input it to the analog-to-digital converter.

8. The analog signal acquisition circuit for preventing false triggering according to claim 7, characterized in that, The noise suppression module includes: a first capacitor C1, a second capacitor C2, and a sixth resistor R6; wherein: One end of the first capacitor C1 is connected to the parallel terminal of the gold finger button and the contact impedance compensation resistor, and one end of the sixth resistor R6; the other end of the sixth resistor R6 is connected to one end of the second capacitor C2 and then connected to the analog-to-digital converter; the other end of the first capacitor C1 and the other end of the second capacitor C2 are grounded.

9. The analog signal acquisition circuit for preventing false triggering according to claim 8, characterized in that, The first voltage divider module includes a first resistor R1; one end of the first resistor R1 is connected to the positive power supply, and the other end is connected to the first-stage voltage divider unit.

10. The analog signal acquisition circuit for preventing false triggering according to claim 9, characterized in that, The sum of the maximum contact impedance between the sixth resistor R6 and the gold finger button is greater than ten times the sum of the resistance values ​​of each voltage divider resistor in the second voltage divider module. The resistance of the first resistor R1 is greater than the sum of the resistances of all the voltage divider resistors in the second voltage divider module; The resistance value of the contact impedance compensation resistor R7 is greater than ten times the sum of the sixth resistor R6 and the maximum contact impedance of the gold finger button.

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