A pulse signal acquisition and I2C output circuit based on CD4040 and XL9555

Abstract

This utility model discloses a pulse signal acquisition and I2C output circuit based on CD4040 and XL9555, belonging to the field of pulse signal acquisition technology. The circuit includes the following modules: a pulse signal input module for inputting pulse signals into the circuit; a pulse signal counting module for recording the number of pulses; a parallel input / output signal to I2C output module for converting parallel input / output signals into I2C bus signals and controlling the reset of the pulse signal counting module via the I2C bus signals; an I2C address configuration module for configuring the I2C bus communication address; and an interrupt output module for outputting interrupt signals. By acquiring pulse signals through the pulse counting module and converting the signals into I2C bus signals, the circuit's power consumption is reduced. The frequency of the pulse signals is calculated based on the number of pulse signals and the corresponding time interval, preventing the microcontroller from being frequently triggered when the signal frequency is high.

Description

Technical Field

[0001] This utility model belongs to the field of pulse signal acquisition technology, and specifically relates to a pulse signal acquisition and I2C output circuit based on CD4040 and XL9555. Background Technology

[0002] In today's era of rapid digital and intelligent development, various sensors have become a crucial link connecting the physical world and digital systems. Pulse signal sensors, with their ability to accurately detect changes in physical quantities and convert them into electrical pulse signals, are widely used in numerous fields, including medical equipment (such as heart rate monitoring and blood oxygen detection), industrial control (such as motor speed measurement and flow counting), and communication systems (such as digital signal modulation). From an industrial practice perspective, their applications are diverse. Pulse signals are often used in trigger-based applications (such as object detection on production lines) because only event notification is needed; while measurement applications (such as transmittance detection) may require continuous level signals. Electromagnetic pickups are commonly used in speed acquisition. These sensors utilize the approach and separation of the gear teeth (composed of magnetic materials) to induce a change in magnetic flux, thereby generating an electromotive force to obtain a pulse signal. Their advantages include no power supply required and simple construction. In addition, proximity sensors, eddy current displacement sensors, photoelectric sensors, laser sensors, and other sensors are also widely used to meet the needs for pulse signal acquisition in different scenarios.

[0003] In processing data collected by pulse signal sensors, PLCs or microcontroller systems are traditionally used for direct acquisition. However, these acquisition devices and systems have a significant problem: generally high power consumption. Especially in battery-powered systems, high power consumption severely limits the device's battery life and usage time. For example, in environmental sensor devices requiring long-term field monitoring, using conventional acquisition equipment results in frequent battery replacements, which are not only costly but may also affect the continuity and integrity of data acquisition due to operational inconvenience. To address this dilemma, existing technologies attempt to use microcontrollers that support low-power sleep modes and utilize interrupts to acquire these sensor data. Ideally, when the system is idle, the microcontroller can enter sleep mode, thereby significantly reducing power consumption. However, in practical applications, if the pulse signal frequency is high, the microcontroller's interrupts will be frequently triggered. As a result, the microcontroller cannot enter sleep mode at all, or even if it does, it will be quickly woken up, leading to a sharp increase in power consumption and significantly undermining the original intention of reducing power consumption through low-power sleep modes. Utility Model Content

[0004] The purpose of this invention is to address the aforementioned problems by providing a pulse signal acquisition and I2C output circuit based on CD4040 and XL9555, which aims to improve the situation in existing battery-powered systems where the microcontroller is frequently triggered and consumes a lot of power when the signal frequency is fast.

[0005] The technical solution adopted in this utility model is as follows: a pulse signal acquisition and I2C output circuit based on CD4040 and XL9555, the circuit includes the following modules:

[0006] The pulse signal input module is used to input pulse signals to the circuit. The pulse signal input module is connected to an external pulse signal generator, which inputs pulses to the pulse signal input module through the pulse signal generator.

[0007] Pulse signal counting module, used to record the number of pulses;

[0008] The parallel input / output signal to I2C output module is used to convert parallel input / output signals into I2C bus signals and control the reset of the pulse signal counting module through the I2C bus signals;

[0009] The I2C address configuration module is used to configure the I2C bus communication address.

[0010] Interrupt output module, used to output interrupt signals;

[0011] The pulse signal input module is connected to the pulse signal counting module, the pulse signal counting module is connected to the parallel input / output signal to I2C output module, and the parallel input / output signal to I2C output module is connected to the I2C address configuration module and the interrupt output module, respectively.

[0012] It should be noted that the pulse signal generating device is an existing device.

[0013] Furthermore, in order to calculate the number of pulse signals, the pulse signal counting module includes an integrated circuit U1 and a resistor R8; wherein, the GND pin of the integrated circuit U1 is connected to the power supply GND, and the VCC pin of the integrated circuit U1 is connected to the power supply VCC; the MR pin of the integrated circuit U1 is connected to one end of the resistor R8, and the other end of the resistor R8 is connected to the power supply GND.

[0014] Furthermore, in order to reduce the power consumption of the circuit system, the integrated circuit U1 uses a CD4040 counter, and all counter bits are master-slave flip-flops; the counter counts on the falling edge of the clock; when a high-level signal is connected to the MR pin, the counting state inside the CD4040 counter is reset to 0.

[0015] Furthermore, the pulse signal counting module outputs the pulse signal as a parallel signal to the parallel input / output signal to I2C output module; the parallel input / output signal to I2C output module includes: integrated circuit U2, resistor R6, resistor R7, and I2C communication interface P5;

[0016] The P14 pin of integrated circuit U2 is connected to the MR pin of integrated circuit U1; the P00 pin of integrated circuit U2 is connected to the Q0 pin of integrated circuit U1; the P01 pin of integrated circuit U2 is connected to the Q1 pin of integrated circuit U1; the P02 pin of integrated circuit U2 is connected to the Q2 pin of integrated circuit U1; the P03 pin of integrated circuit U2 is connected to the Q3 pin of integrated circuit U1; the P04 pin of integrated circuit U2 is connected to the Q4 pin of integrated circuit U1; the P05 pin of integrated circuit U2 is connected to the Q5 pin of integrated circuit U1; the P06 pin of integrated circuit U2 is connected to the Q6 pin of integrated circuit U1; the P07 pin of integrated circuit U2 is connected to the Q7 pin of integrated circuit U1; the P10 pin of integrated circuit U2 is connected to the Q8 pin of integrated circuit U1; the P11 pin of integrated circuit U2 is connected to the Q9 pin of integrated circuit U1; the P12 pin of integrated circuit U2 is connected to the Q10 pin of integrated circuit U1; the P13 pin of integrated circuit U2 is connected to the Q11 pin of integrated circuit U1; and the P14 pin of integrated circuit U2 is connected to the MR pin of integrated circuit U1.

[0017] The SDA pin of integrated circuit U2 is connected to one end of resistor R6 and pin 2 of I2C communication interface P5. The SCL pin of integrated circuit U2 is connected to one end of resistor R7 and pin 3 of I2C communication interface P5. The other end of resistor R6 is connected to the other end of resistor R7, pin 1 of I2C communication interface P5, the VCC pin of integrated circuit U2 and power supply VCC. The GND pin of integrated circuit U2 is connected to pin 4 of I2C communication interface P5.

[0018] Furthermore, in order to convert parallel signals into I2C bus protocol signals, integrated circuit U2 uses the XL9555 expansion chip for communication via the I2C bus; the XL9555 expansion chip has two sets of 8-bit configurable ports and supports input / output mode switching;

[0019] Configure pins P00-P07 and P10-P13 of integrated circuit U2 as I / O input mode to obtain the number of pulses output in parallel by the pulse signal counting module, and configure pin P14 of integrated circuit U2 as I / O output mode to reset and clear the pulse counting mode.

[0020] Furthermore, the I2C address configuration module includes jumper interface P1, jumper interface P2, resistor R1, resistor R2, and resistor R3;

[0021] Pin 2 of jumper interface P1 is connected to pin 2 of jumper interface P2 and pin A0 of integrated circuit U2; pin 4 of jumper interface P1 is connected to pin 4 of jumper interface P2 and pin A1 of integrated circuit U2; pin 6 of jumper interface P1 is connected to pin 6 of jumper interface P2 and pin A2 of integrated circuit U2.

[0022] Pin 1 of jumper interface P2 is connected to pins 3 and 5 of jumper interface P2 and the power supply GND. Pin 1 of jumper interface P1 is connected to one end of resistor R1. Pin 3 of jumper interface P1 is connected to one end of resistor R2. Pin 5 of jumper interface P1 is connected to one end of resistor R3. The other end of resistor R1 is connected to the other end of resistor R2, the other end of resistor R3 and the power supply VCC.

[0023] Furthermore, by configuring the jumpers of jumper interfaces P1 and P2 of the I2C address configuration module, the high and low level values ​​of pins A0, A1, and A2 of integrated circuit U2 are set, thereby setting the I2C communication address of the module.

[0024] Furthermore, the interrupt output module includes an interrupt output interface P3 and a resistor R5; pin 1 of the interrupt output interface P3 is connected to one end of the resistor R5 and the INT pin of the integrated circuit U2, the other end of the resistor R5 is connected to the power supply VCC, and pin 2 of the interrupt output interface P3 is connected to the power supply GND.

[0025] In summary, due to the adoption of the above technical solution, the beneficial effects of this utility model are:

[0026] 1. This utility model acquires pulse signals through a pulse counting module and converts the signals into I2C bus signals, thereby reducing the power consumption of the circuit. The circuit also has an interrupt output module. When the number of pulse signals changes, the interrupt output module outputs an interrupt signal, and the external device immediately sends the corresponding instruction through the I2C communication interface to obtain the number of pulse signals. By calculating the number of pulse signals and the corresponding time interval, the frequency of the pulse signals is calculated, avoiding frequent triggering of the microcontroller when the signal frequency is fast.

[0027] 2. This utility model uses CD4040 as a pulse signal counter to count the input pulse signal, and uses XL9555 to acquire the number of pulses recorded by CD4040 and convert it into an I2C bus signal; thus realizing the conversion of pulse signal to I2C bus signal, thereby significantly reducing the power consumption of existing pulse signal acquisition devices and systems, while improving the system response speed. Attached Figure Description

[0028] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this utility model and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of the overall circuit architecture of this utility model;

[0030] Figure 2 This is a circuit structure diagram of the present invention;

[0031] Figure 3 This is a pin diagram of the CD4040 of this utility model;

[0032] Figure 4 This is the pin diagram of the XL9555 of this utility model. Detailed Implementation

[0033] The present invention will now be described in detail with reference to the accompanying drawings.

[0034] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present utility model and are not intended to limit the present utility model.

[0035] Traditionally, PLCs or microcontroller systems are used to directly acquire data from pulse signal sensors. However, these acquisition devices and systems suffer from a significant problem: generally high power consumption. To address this, existing technologies attempt to use microcontrollers that support low-power sleep modes and utilize interrupts to acquire sensor data. Ideally, when the system is idle, the microcontroller can enter sleep mode, significantly reducing power consumption. However, in practical applications, if the pulse signal frequency is high, the microcontroller's interrupts are frequently triggered. As a result, the microcontroller cannot enter sleep mode at all, or even if it does, it is quickly woken up, leading to a sharp increase in power consumption and greatly diminishing the intended effect of reducing power consumption through low-power sleep modes.

[0036] Therefore, this invention proposes a pulse signal acquisition and I2C output circuit based on CD4040 and XL9555. Its working principle is as follows: The external pulse signal is first input to the circuit through the pulse signal input module and directly transmitted to the pulse signal counting module. The CD4040, as a 12-bit binary counter, counts the input pulse signal in real time and stores the pulse count in binary form in an internal 12-bit flip-flop (i.e., the counting result is output through 12 parallel pins). The 12-bit parallel counting signal (representing the total number of pulses) output by the CD4040 is transmitted to the parallel input / output signal to I2C output module. The XL9555 converts the parallel signal into an I2C bus protocol signal, enabling external devices (such as microcontrollers or MCUs) to communicate with the circuit via the I2C interface. When the counting result of the CD4040 changes (i.e., a new pulse is input), the interrupt output module generates an interrupt signal (usually output by the XL9555 after monitoring the count change) and sends it to the external device. After receiving the interrupt, the external device can immediately read the latest pulse count via I2C, achieving a rapid response to pulse changes (without continuous polling). The I2C address configuration module assigns a unique I2C bus address to the XL9555, ensuring that external devices can accurately identify and communicate when multiple devices share the I2C bus (avoiding address conflicts).

[0037] Example 1

[0038] like Figure 1 As shown, one embodiment of this utility model is a pulse signal acquisition and I2C output circuit based on CD4040 and XL9555, characterized in that the circuit includes the following modules:

[0039] The pulse signal input module is used to input pulse signals to the circuit. The pulse signal input module is connected to an external pulse signal generator, which inputs pulses to the pulse signal input module through the pulse signal generator.

[0040] Pulse signal counting module, used to record the number of pulses;

[0041] The parallel input / output signal to I2C output module is used to convert parallel input / output signals into I2C bus signals and control the reset of the pulse signal counting module through the I2C bus signals;

[0042] The I2C address configuration module is used to configure the I2C bus communication address.

[0043] Interrupt output module, used to output interrupt signals;

[0044] The pulse signal input module is connected to the pulse signal counting module, the pulse signal counting module is connected to the parallel input / output signal to I2C output module, and the parallel input / output signal to I2C output module is connected to the I2C address configuration module and the interrupt output module, respectively.

[0045] The signal flow path is as follows: External pulse signals (such as speed, flow rate pulses, and anemometer pulse signals output by sensors) are first connected to the circuit through the pulse signal input module and directly transmitted to the pulse signal counting module. The parallel counting signal output by the pulse signal counting module is transmitted to the parallel input / output signal to I2C output module, which converts the parallel signal into an I2C bus protocol signal, enabling external devices (such as microcontrollers, MCUs, etc.) to communicate with the circuit through the I2C interface. External devices can periodically read the current accumulated pulse count by sending I2C commands to the parallel input / output signal to I2C output module. External devices can also actively reset the count; when a clear command is sent, the parallel input / output signal to I2C output module triggers the reset terminal of the pulse signal counting module, causing the counter to reset and restart counting. When a new pulse is input, the interrupt output module generates an interrupt signal and sends it to the external device. Upon receiving the interrupt, the external device can immediately read the latest pulse count via I2C, achieving a rapid response to pulse changes without continuous polling.

[0046] This embodiment separates the counting from the bus communication, which not only ensures the accuracy of pulse acquisition, but also significantly reduces the power consumption of the entire system by reducing the working time of external devices.

[0047] Example 2

[0048] like Figures 2-3 As shown, another embodiment of this utility model is that the pulse signal counting module includes an integrated circuit U1 and a resistor R8; wherein, the GND (ground) pin of the integrated circuit U1 is connected to the power supply GND to ensure that the circuit has a common ground, and the VCC (power supply) pin of the integrated circuit U1 is connected to the power supply VCC; the MR (clear terminal) pin of the integrated circuit U1 is connected to one end of the resistor R8, and the other end of the resistor R8 is connected to the power supply GND to form a pull-down resistor network.

[0049] The pulse signal counting module counts the pulse signals input from the pulse input module and outputs the counted pulse signals as parallel counting signals. During normal counting, when no external clear command is received, resistor R8 pulls the MR pin of integrated circuit U1 low, and integrated circuit U1 is in counting mode. When a pulse signal is input from the CP pin, integrated circuit U1 counts on the falling edge of the clock signal, and the counting result is output in real time through pins Q1-Q12 of integrated circuit U1. For clear control, when the parallel input / output signal to I2C output module of the subsequent stage sends a clear signal, the control circuit makes the MR pin of integrated circuit U1 high, and integrated circuit U1 immediately clears all counting bits. Pins Q1-Q12 of integrated circuit U1 all output low levels, and counting restarts after the MR pin returns to low level.

[0050] Since resistor R8 only generates a weak current when the MR pin is pulled high, and the static power consumption of integrated circuit U1 is extremely low, the power consumption of the overall pulse signal counting module is negligible and the power consumption is low.

[0051] Example 3

[0052] like Figure 3 As shown, another embodiment of this utility model is that the integrated circuit U1 uses a CD4040 counter, and all counter bits are master-slave flip-flops; and the counter counts on the falling edge of the clock, that is, when the input clock pulse signal changes from high level to low level, the CD4040 will count the pulse. This characteristic determines its response timing to the clock signal; when the MR pin is connected to a high level signal, the counting state inside the CD4040 counter is reset to 0.

[0053] The CD4040 is a 12-bit binary serial counter with an operating voltage range of 3V-18V, suitable for battery-powered or DC regulated power supply scenarios. The CD4040's CP pin serves as the pulse signal input terminal, connected to the output of the preceding pulse signal input module to receive pulse signals from external sensors. The CD4040's Q1-Q12 pins serve as the parallel output terminals for the counting results, connected to the parallel input / output signal to I2C output module of the following stage, used to transmit 12-bit binary counting data.

[0054] Because the CD4040 has extremely low static power consumption, the overall power consumption of this integrated circuit U1 is negligible, thus improving the problem of high power consumption in existing circuits. Furthermore, this pulse signal counting module can be directly integrated into a low-power pulse acquisition system.

[0055] Example 4

[0056] like Figure 2As shown, another embodiment of this utility model is a parallel input / output signal to I2C output module, which includes: integrated circuit U2, resistor R6, resistor R7, and I2C communication interface P5;

[0057] The P14 pin of integrated circuit U2 is connected to the MR pin of integrated circuit U1; the P00 pin of integrated circuit U2 is connected to the Q0 pin of integrated circuit U1; the P01 pin of integrated circuit U2 is connected to the Q1 pin of integrated circuit U1; the P02 pin of integrated circuit U2 is connected to the Q2 pin of integrated circuit U1; the P03 pin of integrated circuit U2 is connected to the Q3 pin of integrated circuit U1; the P04 pin of integrated circuit U2 is connected to the Q4 pin of integrated circuit U1; the P05 pin of integrated circuit U2 is connected to the Q5 pin of integrated circuit U1; the P06 pin of integrated circuit U2 is connected to the Q6 pin of integrated circuit U1; the P07 pin of integrated circuit U2 is connected to the Q7 pin of integrated circuit U1; the P10 pin of integrated circuit U2 is connected to the Q8 pin of integrated circuit U1; the P11 pin of integrated circuit U2 is connected to the Q9 pin of integrated circuit U1; the P12 pin of integrated circuit U2 is connected to the Q10 pin of integrated circuit U1; the P13 pin of integrated circuit U2 is connected to the Q11 pin of integrated circuit U1; and the P14 pin of integrated circuit U2 is connected to the MR pin of integrated circuit U1.

[0058] The SDA pin of integrated circuit U2 is connected to one end of resistor R6 and pin 2 of I2C communication interface P5. The SCL pin of integrated circuit U2 is connected to one end of resistor R7 and pin 3 of I2C communication interface P5. The other end of resistor R6 is connected to the other end of resistor R7, pin 1 of I2C communication interface P5, the VCC pin of integrated circuit U2 and power supply VCC. The GND pin of integrated circuit U2 is connected to pin 4 of I2C communication interface P5.

[0059] Integrated circuit U2 can directly read the 12-bit counting result of integrated circuit U1 and convert the parallel signal into an I2C bus signal through its own function. This allows external devices to obtain counting data through the I2C communication interface without having to directly process multi-line parallel signals, simplifying the hardware interface design of external devices and reducing the complexity of system wiring. At the same time, external devices can respond to dynamic changes in pulse signals in a timely manner, taking into account both low power consumption and real-time data acquisition.

[0060] Example 5

[0061] like Figure 4 As shown, another embodiment of this utility model is that the integrated circuit U2 uses the XL9555 expansion chip and communicates via the I2C bus; the XL9555 expansion chip has two sets of 8-bit configurable ports and supports input / output mode switching;

[0062] Configure pins P00-P07 and P10-P13 of integrated circuit U2 as I / O input mode to obtain the number of pulses output in parallel by the pulse signal counting module, and configure pin P14 of integrated circuit U2 as I / O output mode to reset and clear the pulse counting mode.

[0063] The XL9555 is a 16-bit GPIO expansion chip that communicates via the I2C bus, supports a 400kHz fast mode, and provides two sets of 8-bit configurable ports (Port 0 and Port 1) that support input / output mode switching. The XL9555's function is to convert parallel signals into I2C bus protocol signals, enabling external devices (such as microcontrollers and MCUs) to communicate with the circuit via the I2C interface.

[0064] Because the XL9555 is a low-power chip with extremely low static power consumption, it will not consume too much power even when it is in operation for a long time.

[0065] Example 6

[0066] like Figure 2 As shown, another embodiment of this utility model is that the I2C address configuration module includes jumper interface P1, jumper interface P2, resistor R1, resistor R2 and resistor R3;

[0067] Pin 2 of jumper interface P1 is connected to pin 2 of jumper interface P2 and pin A0 of integrated circuit U2; pin 4 of jumper interface P1 is connected to pin 4 of jumper interface P2 and pin A1 of integrated circuit U2; pin 6 of jumper interface P1 is connected to pin 6 of jumper interface P2 and pin A2 of integrated circuit U2.

[0068] Pin 1 of jumper interface P2 is connected to pins 3 and 5 of jumper interface P2 and the power supply GND. Pin 1 of jumper interface P1 is connected to one end of resistor R1. Pin 3 of jumper interface P1 is connected to one end of resistor R2. Pin 5 of jumper interface P1 is connected to one end of resistor R3. The other end of resistor R1 is connected to the other end of resistor R2, the other end of resistor R3 and the power supply VCC.

[0069] The I2C address configuration module sets the pin levels of integrated circuit U2 through a combination of jumper interfaces P1 and P2 and resistors R1-R3. Since the I2C address is determined by the combination of chip pin levels, the I2C communication address of integrated circuit U2 can be flexibly modified by plugging and unplugging jumpers, avoiding address conflicts and thus improving system compatibility and scalability.

[0070] Example 7

[0071] Another embodiment of this utility model is that by setting the jumpers of the jumper interfaces P1 and P2 of the I2C address configuration module, the high and low level values ​​of the A0, A1, and A2 pins of the integrated circuit U2 are set, thereby setting the I2C communication address of the module.

[0072] The level combinations of the three sets of pins A0, A1, and A2 can generate eight different I2C addresses, which can meet the needs of multiple similar modules working together on the same I2C bus, thus expanding the application range of the circuit.

[0073] Example 8

[0074] like Figure 2 As shown, another embodiment of this utility model is that the interrupt output module includes an interrupt output interface P3 and a resistor R5; pin 1 of the interrupt output interface P3 is connected to one end of the resistor R5 and the INT pin of the integrated circuit U2, the other end of the resistor R5 is connected to the power supply VCC, and pin 2 of the interrupt output interface P3 is connected to the power supply GND.

[0075] The INT pin of integrated circuit U2 is directly connected to the interrupt output interface P3. When the pulse count changes, integrated circuit U2 can output an interrupt signal through the INT pin, which is then transmitted to an external device (such as a microcontroller) via the interrupt output interface P3. Therefore, the external device does not need to continuously poll the counting status; it is only woken up by the interrupt when there is a pulse change. This ensures timely acquisition of the latest count data and reduces unnecessary operations. Resistor R5 stabilizes the interrupt signal level, preventing level fluctuations or distortions caused by interference during signal transmission, ensuring that the external device can reliably identify the interrupt signal, and improving the system's anti-interference capability. The interrupt triggering mechanism allows the external device to remain in sleep mode when there is no pulse change, only briefly waking up when an interrupt signal is received. This significantly reduces the operating time of the external device, thereby reducing the overall system power consumption, making it particularly suitable for low-power battery-powered scenarios.

[0076] The above description is only a preferred embodiment of the present utility model and is not intended to limit the present utility model. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present utility model should be included within the protection scope of the present utility model.

Claims

1. A pulse signal acquisition and I2C output circuit based on CD4040 and XL9555, characterized in that, The circuit includes the following modules: The pulse signal input module is used to input pulse signals to the circuit. The pulse signal input module is connected to an external pulse signal generator, which inputs pulses to the pulse signal input module through the pulse signal generator. Pulse signal counting module, used to record the number of pulses; The parallel input / output signal to I2C output module is used to convert parallel input / output signals into I2C bus signals and control the reset of the pulse signal counting module through the I2C bus signals; The I2C address configuration module is used to configure the I2C bus communication address. Interrupt output module, used to output interrupt signals; The pulse signal input module is connected to the pulse signal counting module, the pulse signal counting module is connected to the parallel input / output signal to I2C output module, and the parallel input / output signal to I2C output module is connected to the I2C address configuration module and the interrupt output module, respectively.

2. The pulse signal acquisition and I2C output circuit based on CD4040 and XL9555 according to claim 1, characterized in that, The pulse signal counting module includes an integrated circuit U1 and a resistor R8; wherein, the GND pin of the integrated circuit U1 is connected to the power supply GND, and the VCC pin of the integrated circuit U1 is connected to the power supply VCC; the MR pin of the integrated circuit U1 is connected to one end of the resistor R8, and the other end of the resistor R8 is connected to the power supply GND.

3. The pulse signal acquisition and I2C output circuit based on CD4040 and XL9555 according to claim 2, characterized in that, Integrated circuit U1 uses a CD4040 counter, with all counter bits being master-slave flip-flops; the counter counts on the falling edge of the clock; when a high-level signal is applied to the MR pin, the internal counting state of the CD4040 counter is reset to 0.

4. The pulse signal acquisition and I2C output circuit based on CD4040 and XL9555 according to claim 2, characterized in that, The parallel input / output signal to I2C output module includes: integrated circuit U2, resistor R6, resistor R7, and I2C communication interface P5; The P14 pin of integrated circuit U2 is connected to the MR pin of integrated circuit U1; the P00 pin of integrated circuit U2 is connected to the Q0 pin of integrated circuit U1; the P01 pin of integrated circuit U2 is connected to the Q1 pin of integrated circuit U1; the P02 pin of integrated circuit U2 is connected to the Q2 pin of integrated circuit U1; the P03 pin of integrated circuit U2 is connected to the Q3 pin of integrated circuit U1; the P04 pin of integrated circuit U2 is connected to the Q4 pin of integrated circuit U1; the P05 pin of integrated circuit U2 is connected to the Q5 pin of integrated circuit U1; the P06 pin of integrated circuit U2 is connected to the Q6 pin of integrated circuit U1; the P07 pin of integrated circuit U2 is connected to the Q7 pin of integrated circuit U1; the P10 pin of integrated circuit U2 is connected to the Q8 pin of integrated circuit U1; the P11 pin of integrated circuit U2 is connected to the Q9 pin of integrated circuit U1; the P12 pin of integrated circuit U2 is connected to the Q10 pin of integrated circuit U1; the P13 pin of integrated circuit U2 is connected to the Q11 pin of integrated circuit U1; and the P14 pin of integrated circuit U2 is connected to the MR pin of integrated circuit U1. The SDA pin of integrated circuit U2 is connected to one end of resistor R6 and pin 2 of I2C communication interface P5. The SCL pin of integrated circuit U2 is connected to one end of resistor R7 and pin 3 of I2C communication interface P5. The other end of resistor R6 is connected to the other end of resistor R7, pin 1 of I2C communication interface P5, the VCC pin of integrated circuit U2 and power supply VCC. The GND pin of integrated circuit U2 is connected to pin 4 of I2C communication interface P5.

5. The pulse signal acquisition and I2C output circuit based on CD4040 and XL9555 according to claim 4, characterized in that, Integrated circuit U2 uses the XL9555 expansion chip and communicates via the I2C bus; the XL9555 expansion chip has two sets of 8-bit configurable ports and supports input / output mode switching; Configure pins P00-P07 and P10-P13 of integrated circuit U2 as I / O input mode to obtain the number of pulses output in parallel by the pulse signal counting module, and configure pin P14 of integrated circuit U2 as I / O output mode to reset and clear the pulse counting mode.

6. The pulse signal acquisition and I2C output circuit based on CD4040 and XL9555 according to claim 4, characterized in that, The I2C address configuration module includes jumper interface P1, jumper interface P2, resistor R1, resistor R2 and resistor R3; Pin 2 of jumper interface P1 is connected to pin 2 of jumper interface P2 and pin A0 of integrated circuit U2; pin 4 of jumper interface P1 is connected to pin 4 of jumper interface P2 and pin A1 of integrated circuit U2; pin 6 of jumper interface P1 is connected to pin 6 of jumper interface P2 and pin A2 of integrated circuit U2. Pin 1 of jumper interface P2 is connected to pins 3 and 5 of jumper interface P2 and the power supply GND. Pin 1 of jumper interface P1 is connected to one end of resistor R1. Pin 3 of jumper interface P1 is connected to one end of resistor R2. Pin 5 of jumper interface P1 is connected to one end of resistor R3. The other end of resistor R1 is connected to the other end of resistor R2, the other end of resistor R3 and the power supply VCC.

7. A pulse signal acquisition and I2C output circuit based on CD4040 and XL9555 according to claim 6, characterized in that, By configuring the jumpers of jumper interfaces P1 and P2 of the I2C address configuration module, the high and low level values ​​of pins A0, A1, and A2 of integrated circuit U2 are set, thereby setting the I2C communication address of the module.

8. The pulse signal acquisition and I2C output circuit based on CD4040 and XL9555 according to claim 1, characterized in that, The interrupt output module includes an interrupt output interface P3 and a resistor R5; pin 1 of the interrupt output interface P3 is connected to one end of the resistor R5 and the INT pin of the integrated circuit U2, the other end of the resistor R5 is connected to the power supply VCC, and pin 2 of the interrupt output interface P3 is connected to the power supply GND.

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