An ultra-thin chip package structure suitable for electronic tags

By introducing locking components and a buffer sealing layer into the electronic tag chip packaging structure, the problems of non-removability and instability are solved, achieving convenient maintenance and high stability, which is suitable for ultra-thin chip packaging.

CN224472040UActive Publication Date: 2026-07-07JIANGSU HONGTAN ELECTRONIC TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
JIANGSU HONGTAN ELECTRONIC TECH CO LTD
Filing Date
2025-09-07
Publication Date
2026-07-07

AI Technical Summary

Technical Problem

The existing electronic tag chip packaging structure is non-removable, resulting in high maintenance costs and environmental pollution. The lack of a limiting and locking mechanism between the packaging cover and the substrate makes it difficult to ensure long-term stable operation.

Method used

A locking assembly, including a positioning insert, a limiting protrusion, and a locking limiting buckle, is set between the packaging substrate and the packaging cover to enable disassembly and repeated assembly. The buffer sealing layer enhances the shock resistance and anti-slip capability, ensuring packaging stability.

Benefits of technology

It enables the chip packaging structure to be detachable and easy to maintain, enhances the stability of the packaging and its shock and anti-slip capabilities, ensures the safety and sealing performance of the chip, and is suitable for high-requirement scenarios such as flexible electronic tags.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the chip packaging technical field, concretely relates to a kind of ultra-thin chip packaging structure suitable for electronic tag, comprising: packaging substrate, the upper side of packaging substrate is equipped with packaging cover, the two sides of packaging substrate and packaging cover side wall are equipped with locking assembly, locking assembly is used to lock packaging cover on packaging substrate, the utility model is to solve the problem of existing chip packaging structure disassembly and inconvenient maintenance replacement by a kind of ultra-thin chip packaging structure suitable for electronic tag.
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Description

Technical Field

[0001] This utility model relates to the field of chip packaging technology, and in particular to an ultra-thin chip packaging structure suitable for electronic tags. Background Technology

[0002] With the rapid development of IoT technology, electronic tags, as an important carrier for information collection, item identification, and data transmission, have been widely used in various fields such as logistics management, product anti-counterfeiting, and smart warehousing. Electronic tags typically require the integration of chips, circuits, and communication structures, encapsulated in thin, small housings to meet the requirements of large-scale application, embedded installation, or flexible scenarios. Especially in ultra-thin electronic tag applications, the chip packaging structure must balance high integration, mechanical strength, and ease of assembly and disassembly, becoming a significant factor restricting the manufacturing efficiency and functional expansion of electronic tags.

[0003] In the existing technology, the structure is not detachable, which means that once the chip is damaged or needs to be upgraded, the entire package needs to be replaced, resulting in high maintenance costs and environmental problems. In traditional packaging structures, the package cover and the package substrate are only connected by mating or adhesive bonding, lacking a limiting and locking mechanism, which makes it difficult to ensure the long-term stable operation of the chip and has poor practicality. Therefore, this utility model discloses an ultra-thin chip packaging structure suitable for electronic tags to solve the problems of non-detachable and inconvenient maintenance and replacement of existing chip packaging structures. Utility Model Content

[0004] The purpose of this invention is to propose an ultra-thin chip packaging structure suitable for electronic tags, so as to solve the problems of existing chip packaging structures being non-removable and inconvenient to maintain and replace.

[0005] To achieve the above objectives, this utility model provides an ultra-thin chip packaging structure suitable for electronic tags, comprising: a packaging substrate, a packaging cover plate on the top of the packaging substrate, and a locking component on both side walls of the packaging substrate and the packaging cover plate, the locking component being used to lock the packaging cover plate onto the packaging substrate.

[0006] Preferably, a mounting groove is formed in the middle of the upper surface of the packaging substrate, an ultra-thin chip is placed in the mounting groove, and an attachment layer is installed on the bottom wall of the mounting groove.

[0007] Preferably, the upper end face of the packaging substrate is provided with multiple sets of wiring grooves at both ends, and one end of the multiple sets of wiring grooves is connected to the mounting groove, and the other end of the multiple sets of wiring grooves is connected to the outer wall of the packaging substrate.

[0008] Preferably, the locking assembly includes multiple sets of positioning plates, each set of positioning plates being disposed at the four corners of the lower end face of the encapsulation cover plate, and the upper end face of the encapsulation substrate having a positioning groove corresponding to the position of each set of positioning plates. A buffer sealing layer is provided at the center of the lower end face of the encapsulation cover plate corresponding to the corner of the upper end face of the ultra-thin chip. A first semi-circular limiting protrusion is provided at the top edge of both sidewalls of the encapsulation substrate, and a second semi-circular limiting protrusion is provided at the bottom edge of the sidewall of the encapsulation cover plate corresponding to the first semi-circular limiting protrusion. A locking limiting buckle is engaged and rotatably sleeved on the first semi-circular limiting protrusion, and only half of the locking limiting buckle is engaged and rotatably sleeved with the first semi-circular limiting protrusion.

[0009] Preferably, the shape of the positioning insert is the same as the shape of the positioning groove, and the length and width dimensions of the positioning insert and the positioning groove are the same.

[0010] Preferably, the first semi-circular limiting protrusion and the second semi-circular limiting protrusion are combined to form a complete circle, and the diameter of the first semi-circular limiting protrusion and the second semi-circular limiting protrusion are the same.

[0011] Preferably, the inner cavity of the locking limit buckle and the outer surfaces of the first semi-circular limiting protrusion and the second semi-circular limiting protrusion are all coated with an anti-slip layer.

[0012] Preferably, the buffer sealing layer is made of a flexible silicone pad.

[0013] The beneficial effects of this utility model are:

[0014] By incorporating a locking component between the packaging substrate and the packaging cover, the chip packaging structure is made detachable and reassembled, solving the problems of non-removable, inconvenient maintenance, and replacement in existing packaging structures, significantly improving ease of use and maintainability. Multiple positioning plates are located at the lower end of the packaging cover, precisely engaging with positioning grooves on the packaging substrate to ensure stable positioning of the packaging cover during assembly, preventing misalignment or loosening. The first and second semi-circular limiting protrusions in the structure are locked together by a locking buckle, enhancing the locking effect between the packaging cover and the substrate. Furthermore, the anti-slip coating further improves the structure's shock absorption and anti-slip capabilities, ensuring stable and reliable packaging during long-term use or transportation. The buffer sealing layer above the chip is made of flexible silicone pads, effectively buffering external impacts, enhancing the chip's safety protection, and providing excellent sealing performance to prevent dust or impurities from entering the chip's working area. In addition, the substrate has multiple wiring grooves to rationally guide the connection between the chip and external circuits, simplifying wiring paths and improving the overall assembly standardization and reliability. Overall, the structure described in this utility model not only maintains the ultra-thin characteristics of chip packaging, but also takes into account structural strength, ease of assembly and disassembly, sealing and stability. It is suitable for scenarios with high requirements for size and performance, such as flexible electronic tags, and has broad application value. Attached Figure Description

[0015] Figure 1 This is a first-view three-dimensional structural diagram of the present invention;

[0016] Figure 2 This is a two-dimensional structural diagram of the present invention from a second perspective;

[0017] Figure 3 This is a three-dimensional enlarged structural diagram of part of the present utility model;

[0018] Figure 4 This utility model Figure 1 Enlarged structural diagram at point A in the middle;

[0019] Figure 5 This utility model Figure 1 Enlarged structural diagram at point B.

[0020] The diagram is marked as follows:

[0021] 1. Encapsulation substrate; 2. Mounting groove; 3. Adhesive layer; 4. Encapsulation cover plate; 5. Wiring groove; 6. Buffer sealing layer; 7. Positioning insert plate; 8. Positioning groove; 9. First semi-circular limiting protrusion; 10. Second semi-circular limiting protrusion; 11. Locking limiting buckle. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to specific embodiments.

[0023] This utility model provides, for example Figures 1 to 5 The ultra-thin chip packaging structure for electronic tags shown includes: a packaging substrate 1, a packaging cover plate 4 on the top of the packaging substrate 1, a locking component on both side walls of the packaging substrate 1 and the packaging cover plate 4, the locking component being used to lock the packaging cover plate 4 onto the packaging substrate 1, a mounting groove 2 in the middle of the upper end face of the packaging substrate 1, an ultra-thin chip being placed in the mounting groove 2, and a ring of adhesive layer 3 being installed on the bottom wall of the mounting groove 2, and multiple sets of wiring grooves 5 being provided at both ends of the upper end face of the packaging substrate 1, one end of the multiple sets of wiring grooves 5 being connected to the mounting groove 2, and the other end of the multiple sets of wiring grooves 5 being connected to the outer wall of the packaging substrate 1.

[0024] By setting a locking component between the packaging substrate 1 and the packaging cover plate 4, the chip packaging structure can be disassembled and reassembled, solving the problems of non-disassembly, inconvenient maintenance and replacement of existing packaging structures, and significantly improving the convenience and maintainability of use. The lower end of the packaging cover plate 4 is provided with multiple sets of positioning inserts 7, which precisely cooperate with the positioning grooves 8 on the packaging substrate 1, effectively ensuring the stable positioning of the packaging cover plate 4 with the substrate during assembly and preventing misalignment or loosening during assembly. The first semi-circular limiting protrusion 9 and the second semi-circular limiting protrusion 10 in the structure are locked together by a locking limiting buckle 11 to achieve rotation. The combination not only enhances the locking effect between the packaging cover 4 and the substrate, but also further improves the structure's shockproof and anti-slip capabilities through the anti-slip material coating, ensuring stable and reliable packaging during long-term use or transportation. The buffer sealing layer 6, located above the chip, is made of flexible silicone pads, which effectively buffers external impacts, enhances the chip's safety protection capabilities, and has good sealing performance, preventing dust or impurities from entering the chip's working area. In addition, the substrate has multiple wiring grooves 5, which rationally guide the connection between the chip and external circuits, simplify wiring paths, and improve the standardization and reliability of the overall assembly. Overall, the structure described in this utility model not only maintains the ultra-thin characteristics of chip packaging, but also takes into account structural strength, ease of assembly and disassembly, sealing, and stability. It is suitable for scenarios with high requirements for size and performance, such as flexible electronic tags, and has broad application value.

[0025] Furthermore, in this example, such as Figure 2 , Figure 3 , Figure 4 and Figure 5As shown, the locking assembly includes multiple sets of positioning plates 7, each set of positioning plates 7 being located at the four corners of the lower end face of the encapsulation cover plate 4. A positioning groove 8 is formed on the upper end face of the encapsulation substrate 1 corresponding to the position of each set of positioning plates 7. A buffer sealing layer 6 is provided at the center of the lower end face of the encapsulation cover plate 4 corresponding to the corner of the upper end face of the ultra-thin chip. First semi-circular limiting protrusions 9 are provided at the top edges of the sidewalls at both ends of the encapsulation substrate 1, and second semi-circular limiting protrusions 10 are provided at the bottom edges of the sidewalls of the encapsulation cover plate 4 corresponding to the first semi-circular limiting protrusions 9. A locking limiting buckle 11 is engaged and rotatably sleeved on the first semi-circular limiting protrusions 9. Furthermore, only half of the locking limit buckle 11 is engaged and rotated with the first semi-circular limit protrusion 9. The shape of the positioning plate 7 is the same as that of the positioning groove 8, and the length and width of the positioning plate 7 and the positioning groove 8 are the same. The shapes of the first semi-circular limit protrusion 9 and the second semi-circular limit protrusion 10 are combined to form a complete circle, and the diameters of the first semi-circular limit protrusion 9 and the second semi-circular limit protrusion 10 are the same. The inner cavity of the locking limit buckle 11 and the outer surfaces of the first semi-circular limit protrusion 9 and the second semi-circular limit protrusion 10 are coated with an anti-slip layer. The buffer sealing layer 6 is made of a flexible silicone pad.

[0026] During assembly, the ultra-thin chip is placed in the mounting groove 2 located in the center of the upper surface of the packaging substrate 1. A ring of adhesive layer 3 is provided on the bottom wall of the mounting groove 2, providing initial fixation for the chip's bottom surface and ensuring a secure embedding within the groove, preventing displacement. Simultaneously, multiple sets of wiring grooves 5 are provided on the upper surfaces of both ends of the packaging substrate 1. Each wiring groove 5 connects to the mounting groove 2 at one end and extends to the outer wall of the packaging substrate 1 at the other end, providing a wiring path for the chip and external circuitry, ensuring a clear electrical connection structure and standardized wiring. Next, the packaging cover plate 4 is placed over the packaging substrate 1 from above, and multiple sets of positioning inserts 7 at the four corners of the lower surface of the packaging cover plate 4 are accurately inserted into the corresponding positioning slots 8 on the upper surface of the packaging substrate 1. The positioning inserts 7 and positioning slots 8 are identical in shape and size, effectively preventing shaking or misalignment during cover plate assembly, achieving accurate positioning and initial engagement between the packaging cover plate 4 and the packaging substrate 1. Furthermore, a first semi-circular limiting protrusion 9 is provided on the top edge of the sidewalls at both ends of the encapsulation substrate 1, and a second semi-circular limiting protrusion 10 is provided on the bottom edge of the sidewall of the encapsulation cover plate 4. When the encapsulation cover plate 4 is completely covered on the encapsulation substrate 1, the first semi-circular limiting protrusion 9 and the second semi-circular limiting protrusion 10 are precisely aligned in a horizontal position, forming a complete circular structure. At this time, the locking limiting buckle 11 is engaged radially from the outside onto the circular structure formed by the first semi-circular limiting protrusion 9 and the second semi-circular limiting protrusion 10, thereby achieving limiting and locking. Since the locking limiting buckle 11 has anti-slip material between its inner cavity and the outer surface of the limiting protrusion, the friction is increased, preventing the locking limiting buckle 11 from rotating, slipping, or loosening during use. At the same time, the sleeved portion of the locking limiting buckle 11 only covers half of the circumference of the circular structure of the limiting protrusion, so after being sleeved, it cannot rotate or detach freely in the axial direction, effectively enhancing the stability and safety of the entire locking structure. In addition, to prevent direct impact from external forces on the chip, a buffer sealing layer 6 is provided in the middle of the lower end face of the package cover 4. This buffer sealing layer 6 is made of flexible silicone pad and is located at the corresponding corner of the upper end face of the chip. After the package cover 4 is closed, the buffer sealing layer 6 presses slightly against the chip surface, which can not only effectively absorb external vibrations and impacts to prevent chip damage, but also form a seal to prevent dust, moisture and other particles from entering the mounting groove 2, thus protecting the cleanliness and operational stability of the chip's working environment.

[0027] Those skilled in the art should understand that the discussion of any of the above embodiments is merely exemplary and is not intended to imply that the scope of the present invention (including the claims) is limited to these examples; within the framework of the present invention, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of the different aspects of the present invention as described above, which are not provided in the details for the sake of brevity.

[0028] This utility model is intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the protection scope of this utility model.

Claims

1. An ultra-thin chip packaging structure suitable for electronic tags, characterized in that, include: A packaging substrate (1) is provided with a packaging cover plate (4) on its upper side. The packaging substrate (1) and the packaging cover plate (4) are provided with locking components on both sides of the packaging substrate (1) and the packaging cover plate (4). The locking components are used to lock the packaging cover plate (4) on the packaging substrate (1). The upper surface of the packaging substrate (1) is provided with a mounting groove (2), an ultra-thin chip is placed in the mounting groove (2), and a ring of adhesive layer (3) is installed on the bottom wall of the mounting groove (2). The upper end face of the encapsulation substrate (1) is provided with multiple sets of wiring grooves (5) at both ends, and one end of the multiple sets of wiring grooves (5) is connected to the mounting groove (2), and the other end of the multiple sets of wiring grooves (5) is connected to the outer wall of the encapsulation substrate (1). The locking assembly includes multiple sets of positioning plates (7). Each set of positioning plates (7) is located at the four corners of the lower end face of the encapsulation cover plate (4). The upper end face of the encapsulation substrate (1) is provided with positioning grooves (8) corresponding to the positions of each set of positioning plates (7). The middle part of the lower end face of the encapsulation cover plate (4) is provided with a buffer sealing layer (6) corresponding to the corner of the upper end face of the ultra-thin chip. The top edge of the sidewalls at both ends of the encapsulation substrate (1) is provided with a first semi-circular limiting protrusion (9). The bottom edge of the sidewall of the encapsulation cover plate (4) corresponding to the first semi-circular limiting protrusion (9) is provided with a second semi-circular limiting protrusion (10). The first semi-circular limiting protrusion (9) is fitted with a locking limiting buckle (11). Only half of the locking limiting buckle (11) is fitted with the first semi-circular limiting protrusion (9).

2. The ultra-thin chip packaging structure suitable for electronic tags according to claim 1, characterized in that, The shape of the positioning plate (7) is the same as that of the positioning groove (8), and the length and width of the positioning plate (7) and the positioning groove (8) are the same.

3. The ultra-thin chip packaging structure suitable for electronic tags according to claim 2, characterized in that, The first semi-circular limiting protrusion (9) and the second semi-circular limiting protrusion (10) are combined to form a complete circle, and the diameter of the first semi-circular limiting protrusion (9) and the second semi-circular limiting protrusion (10) is the same.

4. The ultra-thin chip packaging structure suitable for electronic tags according to claim 3, characterized in that, The inner cavity of the locking limit buckle (11) and the outer surfaces of the first semi-circular limiting protrusion (9) and the second semi-circular limiting protrusion (10) are all coated with an anti-slip layer.

5. The ultra-thin chip packaging structure suitable for electronic tags according to claim 4, characterized in that, The buffer sealing layer (6) is made of a flexible silicone pad.