Aerospace storage system core plate

Abstract

The utility model discloses a kind of aerospace fixed storage system core board, with core board front and core board back, the core board front is provided with the static random access memory type editable array logic device SRAM FPGA device and the editable array logic device FLASH FPGA device of flash type, which are communicatively connected, the SRAM FPGA device is used to complete storage host function, is connected with non-volatile magnetic random access memory MRAM device and multiple double-rate synchronous dynamic random access memory DDR device;The FLASH FPGA device is used to complete SRAM FPGA version loading control function, is connected with multiple NOR device.The utility model can complete software and hardware design verification work of storage core component in advance by modularization design, enhance the reliability and inheritability of satellite storage product.

Description

Technical Field

[0001] The utility model relates to the technical field of aerospace storage systems, in particular to a core board of an aerospace fixed storage system. Background Technique

[0002] Aerospace storage is mainly used for the payload data storage function of satellite spacecraft. When the satellite executes space missions, the memory stores various types of payload data generated in orbit. When the satellite establishes a connection with a ground communication station, the stored payload data can be transmitted to the ground through the data transmission subsystem.

[0003] Currently, commercial aerospace fixed storage basically adopts customized design, that is, satellite storage products are customized according to the requirements of satellite spacecraft. The aerospace storage products designed by this method cannot reduce the product cost due to excessive repetitive work, cannot shorten the product delivery cycle, and more importantly, cannot meet the batch requirements for different satellite assemblies.

[0004] Since there is no standardized organization in the aerospace industry currently, all satellite assemblies adopt their own design standards, and different satellites of the same satellite assembly or the same satellite due to different missions will also result in different hardware and software requirements. This leads to the need for all single machines supporting satellites to adapt to the different requirements of different satellite assemblies.

[0005] Therefore, the following problems will occur when using the existing architecture design: 1. If the payload interface changes (interface type, interface quantity, interface connector model), the entire storage system hardware needs to be redesigned; 2. If the data transmission interface changes, the entire storage system hardware needs to be redesigned; 3. If the command interface changes, the entire storage system hardware needs to be redesigned; 4. If the power interface changes, the entire storage system hardware needs to be redesigned; 5. If the single machine form changes (single machine type or single board type), the entire storage system hardware needs to be redesigned; 6. Once the hardware system needs to be redesigned, it is inevitable to retest the hardware, and at the same time, the delivery cycle of the entire storage system will be increased; in the case of uncertain hardware, the FPGA and software code on the fixed storage system cannot be platformized for management and operation, that is, when hardware modification or uncertainty occurs, it will affect the FPGA and software code development work. Content of the Utility Model

[0006] This invention provides a core board for an aerospace solid-state storage system. The core board has a front and a back. The front of the core board has static random access memory (SRAM) FPGA devices and flash memory (FLASH) FPGA devices that are interconnected. The SRAM FPGA device is used to perform storage master control functions and is connected to non-volatile magnetic random access memory (MRAM) devices and multiple double-rate synchronous dynamic random access memory (DDR) devices. The FLASH FPGA device is used to perform version loading control functions and single-board status management functions for the SRAM FPGA device and is connected to multiple NOR devices to perform version storage functions for the SRAM FPGA device.

[0007] The front side of the core board is also provided with a power conversion device, a latch-up control device, a surge suppression device, and a DC / DC device. The power conversion device is used to provide power control for the devices on the board.

[0008] Optionally, the core board may also include DC / DC devices for power conversion.

[0009] This utility model also provides an aerospace solidification system, the system including the aerospace solidification system core board described in any of the above claims.

[0010] Optionally, the system further includes a power converter (21), a latch-up control device (22), a surge suppression device (23), and a DC / DC device (24), wherein the power converter (21) is used to provide power control for devices on the board.

[0011] Optionally, the system may also include multiple non-volatile storage media.

[0012] Optionally, the system further includes multiple interfaces, including a data input interface, a data output interface, a command interaction interface, and a power input interface.

[0013] The core board of the aerospace solid-state storage system of this utility model adopts a modular design for the hardware system. The independent parts of the storage system are designed as separate hardware, such as the storage core part and the storage array part. The remaining differentiated parts are designed as separate hardware, and are designed separately according to the needs of the satellite mission.

[0014] The core components of this system will not change due to differences in satellite mission requirements. Since the core hardware is unified and the software and FPGA engineering code can be designed and managed on a platform, the hardware and software of the platform can be prepared for production in advance. Then, according to the requirements of the satellite mission, only the interface needs to be adapted, thus achieving the goal of mass production of aerospace storage.

[0015] Compared to traditional solutions, the pre-deployment of standard hardware and software can greatly improve product compatibility and reduce redundant development time, and enable basic aerospace storage products based on the current state of the satellite industry.

[0016] The technical solution of this utility model will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0017] The accompanying drawings are provided to further illustrate the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation thereof. In the drawings:

[0018] Figure 1 An exploded view of the steam-roasting apparatus provided in an embodiment of this utility model;

[0019] Figure 2 This is a front view of the core board of the aerospace solid-state storage system according to an embodiment of the present invention;

[0020] Figure 3 This is a schematic diagram of the back of the core board of the aerospace solid-state storage system according to an embodiment of the present invention;

[0021] Figure 4 This is a schematic diagram of an overall aerospace solid-state storage system according to another embodiment of the present invention;

[0022] Among them, 10-SRAM FPGA device, 20-FLASH FPGA device, 30-MRAM device, 40-DDR device, 50-NOR device, 60-connector, 70-non-volatile storage medium, 11-data input interface, 12-data output interface, 13-instruction interaction interface, 14-power input interface, 21-power conversion device, 22-latch control device, 23-surge suppression device, and 24-DC / DC device. Detailed Implementation

[0023] In this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0024] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0025] Currently, aerospace solid-state storage primarily uses SRAM FPGAs as the storage controller, DDR for data caching, and back-end storage media such as NAND flash, SATA SSDs, eMMC, and NVMe SSDs. One current solid-state storage design scheme used in aerospace is as follows: Figure 1 As shown. The main external interfaces of the aerospace memory are as follows. Figure 1 As shown, it mainly includes four types of interfaces: load interface (data input), data transmission interface (data output), command interface, and power interface. Figure 1 The SRAMFPGA within the central storage system primarily performs storage control functions, including data input / output control, file system management, and back-end storage media array management. DDR handles data caching. Non-volatile storage media handles file list and version loading, while the storage media array handles satellite payload data storage. The power module performs primary power conversion, power surge suppression, power latch-up control, and secondary power conversion.

[0026] The core board architecture of the aerospace solidification system in this embodiment of the utility model is as follows: Figures 2-3 As shown. This utility model provides a core board for an aerospace solid-state storage system, which has a front side and a back side, as shown respectively. Figure 2 , Figure 3 As shown.

[0027] The core board of this embodiment is provided with a static random access memory (SRAM) type programmable array logic device and a flash memory type programmable array logic device (FLASH) type programmable array logic device on the front side. The SRAM FPGA device 10 is used to complete the storage master control function and is connected to a non-volatile magnetic random access memory (MRAM) device and multiple double data rate synchronous dynamic random access memory (DDR) devices. The FLASH FPGA device 20 is used to complete the version loading control function of the SRAM FPGA and is connected to multiple NOR FLASH devices 50, which are non-volatile flash memory devices used to complete the version storage function of the SRAM FPGA device (10).

[0028] Optionally, a DC / DC device is also provided on the front side of the core board to provide power control for the devices on the board. Optionally, multiple connectors 60 are provided on the back side of the core board; the multiple connectors 60 are respectively located around the perimeter of the back side of the core board for use in expanding the external data interface of the storage system. In this embodiment, there are four connectors on the back side of the core board, mainly divided into power input and signal input. The power is connected through an external power supply, and the digital signals are connected to the connectors via SRAM and FPGA.

[0029] Figure 4 This diagram illustrates the overall structure of an aerospace fixed-state storage system according to an embodiment of the present invention. The core board SRAMFPGA device 10 primarily performs storage control functions, including data input / output management, back-end storage array management, file system management, and bit-machine interaction. The DDR device 40 primarily performs data storage buffering functions. The FLASH FPGA device 20 is mainly used for SRAM FPGA version loading control and single-board status management. The NOR FLASH device is used for SRAM FPGA version storage. The MRAM device 30 is used for linked list storage of storage files. Because the core control SRAM FPGA is fixed, the software and FPGA engineering code can also be platformized based on this.

[0030] Optionally, the aerospace storage system in this embodiment also includes a power conversion device 21, a latch-up control device 22, a surge suppression device 23, and a DC / DC converter 24. The power conversion device 21 and the DC / DC converter 24 convert the input power into the input voltage required by the specific components within the core board. The surge suppression device 23 suppresses input power surges and smooths the power-on current. Upon detecting an overcurrent or abnormal condition, the latch-up control device 22 quickly cuts off or limits the current to protect the storage system from damage.

[0031] The aerospace solid-state storage system also features multiple non-volatile storage media 70 and multiple interfaces. These non-volatile storage media may include NOR FLASH and MRAM. The NOR FLASH is connected to the FLASH FPGA for triple-modulus redundancy loading. The MRAM is connected to the SRAM FPGA for file system storage. The interfaces include a data input interface 11, a data output interface 12, a command interaction interface 13, and a power input interface 14. The data input interface 11 and data output interface 12 are connected to the core board connector. The command interaction product uses a CAN interface by default, which is connected to the core board via a dedicated chip. The power interface is input to the system via an external connector. Figure 4In the diagram shown, the boxes (white squares) contain off-the-shelf products that can be mass-produced and validated in advance. The other parts outside the boxes (gray areas) are the differentiated parts, which are designed separately according to the satellite mission requirements, such as interface type and board size.

[0032] Modular design allows for the early completion of hardware and software design verification for core storage components, enhancing the reliability and compatibility of satellite storage products. Mass production of core storage modules can be expedited, significantly reducing costs. In actual projects, only the differentiated hardware development needs to be completed. The development time for satellite solid-state storage products can be shortened from 8-10 months to 2 months. Furthermore, manufacturing core components of satellite storage devices as individual boards shortens product delivery cycles. Locking in the core components enables platformization of FPGAs and software code. The core storage board enhances the compatibility and reliability of satellite storage products.

[0033] Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.

Claims

1. A core board for an aerospace solid-state storage system, characterized in that, The aerospace solid-state storage system core board has a front and a back. The front of the core board is provided with a static random access memory type programmable array logic device SRAM FPGA device (10) and a flash memory type programmable array logic device FLASH FPGA device (20) that are interconnected. The SRAM FPGA device (10) is used to complete the storage master control function and is connected to a non-volatile magnetic random access memory MRAM device (30) and multiple double rate synchronous dynamic random access memory DDR devices (40). The FLASH FPGA device (20) is used to complete the version loading control function and single board status management function of the SRAM FPGA and is connected to multiple NOR devices (50) to complete the version storage function of the SRAM FPGA device (10).

2. The core board of the aerospace solid-state storage system according to claim 1, characterized in that, The core board has multiple connectors (60) on its back side; the multiple connectors (60) are respectively located around the edges of the back side of the core board for functional expansion.

3. The core board of the aerospace solid-state storage system according to claim 1, characterized in that, The core board also includes DC / DC devices for power conversion.

4. A spaceborne solid-state storage system, characterized in that, The system includes the aerospace solid-state system core board as described in any one of claims 1-3.

5. The spaceborne solid-state storage system according to claim 4, characterized in that, The system also includes a power converter (21), a latch-up control device (22), a surge suppression device (23), and a DC / DC device (24), wherein the power converter (21) is used to provide power control for devices on the board.

6. The spaceborne solid-state storage system according to claim 4, characterized in that, The system also includes multiple non-volatile storage media (70).

7. The spaceborne solid-state storage system according to claim 4, characterized in that, The system also includes multiple interfaces, including a data input interface (11), a data output interface (12), an instruction interaction interface (13), and a power input interface (14).

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