A high speed laser chip structure
By independently setting the waveguides of the laser and modulator chips and setting a multi-sloped tip structure on the end face, the problem of crosstalk between semiconductor laser and modulator signals is solved, enabling longer-distance optical signal transmission and more efficient packaging.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- 杰创半导体(苏州)有限公司
- Filing Date
- 2025-07-07
- Publication Date
- 2026-07-07
AI Technical Summary
In existing technologies, semiconductor lasers and modulators are fabricated together, and the signal crosstalk problem cannot meet the requirements for optical signal modulation in quantum communication applications.
Independently configured laser chip waveguides and modulator chip waveguides are constructed on the underlying structure, with multi-sloped tip structures on the end face to avoid back-and-forth transmission of signals and optical signals between the laser and modulator. At the same time, multi-sloped tip structures are set on the end face of the optical fiber to ensure unidirectional propagation of the optical signal.
It reduces signal crosstalk and optical crosstalk, improves signal transmission distance and signal quality, simplifies packaging process, and reduces packaging cost.
Smart Images
Figure CN224472920U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of laser development technology, and in particular to a high-speed laser chip structure. Background Technology
[0002] With the rapid development of fields such as optical communication, artificial intelligence (AI), data centers and autonomous driving, the requirements for signal transmission rate and transmission distance are getting higher and higher, as are the requirements for increasing the 3dB bandwidth of the light-emitting device itself and reducing external interference to the modulation signal.
[0003] For long-distance applications, external modulators are used to overcome the effects of chirp. Among various optical modulators, electro-absorption modulators based on the quantum-confined Stark effect in semiconductor multi-quantum-well structures have significant advantages and broad application prospects. This is due to the many characteristics of this device, such as small size, compact structure, easy monolithic integration with semiconductor DFB lasers, low operating voltage, low power consumption, simple and efficient optical coupling between the laser and modulator, and more stable and efficient coupling between the entire EML device and the optical fiber.
[0004] Electro-absorption modulated distributed feedback semiconductor lasers (EMLs) are a primary optical signal generating element in optical communication systems, especially in long-haul trunk networks. Research has shown that conventional EML chips consist of two parts: a laser chip and an EML modulator chip, both epitaxially grown on the same substrate and sharing the same N-electrode. However, in quantum communication, lasers typically emit light at a negative voltage, making the modulator voltage highly susceptible to influence from the laser voltage. Therefore, conventional EML chip designs cannot meet the requirement of modulating optical signals without affecting laser emission in quantum communication applications.
[0005] To address the problems in the existing technology, this utility model provides a high-speed laser chip structure. Utility Model Content
[0006] The purpose of this invention is to provide a high-speed laser chip structure to solve the technical problem of signal crosstalk when semiconductor lasers and modulators are fabricated together in the prior art.
[0007] The technical solution of this utility model is: a high-speed laser chip structure, including a bottom layer structure, on which a first waveguide step for constructing a laser chip waveguide and a second waveguide step for constructing a modulator chip waveguide are arranged in parallel and independently; the first waveguide step includes, from bottom to top, a first waveguide layer, a first grating layer, a first spacer layer, a first quantum well layer, and a second spacer layer; the second waveguide step includes, from bottom to top, a second waveguide layer, a second grating layer, a third spacer layer, a second quantum well layer, and a fourth spacer layer.
[0008] Preferably, the end face of the laser chip waveguide near the modulator is designated as the second end face, and the end face of the modulator chip waveguide near the laser is designated as the third end face. At least one of the second and third end faces is constructed as a multi-sloping tip structure to avoid signal transmission back and forth between the laser and the modulator.
[0009] The end face of the modulator chip waveguide near the external optical fiber is set as the fourth end face. The fourth end face is constructed as a multi-sloping tip structure to avoid the optical signal from being transmitted back and forth between the modulator and the optical fiber.
[0010] Preferably, the underlying structure comprises, from bottom to top, a substrate, a buffer layer, and a chemical etching barrier layer;
[0011] The corresponding N-electrode is set on the chemical etching barrier layer on the surface of the underlying structure in the corresponding region of the laser chip waveguide and the modulator chip waveguide.
[0012] Preferably, a P-type ohmic contact layer is provided on the surface of the first waveguide step, including a first P-type waveguide confinement layer and a first ohmic contact layer;
[0013] A laser P-electrode is fabricated on the surface of the first ohmic contact layer at the top of the laser chip waveguide.
[0014] Preferably, a first current blocking layer is filled on both sides of the first waveguide step and between the bottom layer and the first P-type waveguide confinement layer. The first current blocking layer includes a first Si-InP layer and a first Fe-InP layer.
[0015] Preferably, a P-type ohmic contact layer is provided on the surface of the second waveguide step, including a second P-type waveguide confinement layer and a second ohmic contact layer;
[0016] A laser P-electrode is fabricated on the surface of the second ohmic contact layer at the top of the modulator chip waveguide.
[0017] Preferably, a second current blocking layer is filled on both sides of the second waveguide step and between the bottom layer and the second P-type waveguide confinement layer. The second current blocking layer includes a second Si-InP layer and a second Fe-InP layer.
[0018] Preferably, the band width of the second quantum well layer is not less than the band width of the first quantum well layer.
[0019] Compared with the prior art, the advantages of this utility model are:
[0020] By fabricating the laser grating below the quantum well layer, compared to fabricating the grating above the quantum well, the accumulation effect of holes in the grating layer is reduced, the hole injection efficiency is increased, the threshold current of the laser is reduced, and the output power of the laser is increased.
[0021] By completely separating the laser and modulator of the chip waveguide, and fabricating corresponding electrodes on the independent laser and modulator respectively, crosstalk between the electrical signals of the laser and modulator can be avoided.
[0022] By setting the end face of the laser near the modulator and the end face of the modulator near the optical fiber as multi-sloping tip structures, the optical path is changed. The light that would normally be reflected back to the laser or modulator is reflected back out, preventing it from reaching the laser or modulator. This ensures unidirectional light propagation between the laser, modulator, and optical fiber, with no back reflection. It avoids optical crosstalk between the laser, modulator, and optical fiber, reduces chirp noise generated by the modulator during optical fiber propagation, and further reduces signal dispersion during optical fiber propagation, enabling the optical signal to be transmitted over a longer distance.
[0023] Furthermore, due to the multi-sloping tip structure, unidirectional light propagation can be achieved without the use of an isolator between the modulator and the optical fiber, simplifying the packaging process and reducing packaging costs. Attached Figure Description
[0024] The present invention will be further described below with reference to the accompanying drawings and embodiments:
[0025] Figure 1 A side view schematic diagram of a waveguide layer, a grating layer, a first quantum well structure, and a second quantum well structure layer disposed on the surface of the underlying structure, which is provided by this utility model.
[0026] Figure 2 A schematic cross-sectional view of the waveguide step formed after etching, provided by this utility model;
[0027] Figure 3 A cross-sectional schematic diagram of a waveguide step filled with current blocking layers on both sides and a P-type ohmic contact layer provided on top, for the present invention.
[0028] Figure 4 A schematic diagram of the cross-section of the chip waveguide when the laser waveguide and modulator waveguide are not disconnected, as provided by this utility model;
[0029] Figure 5A three-dimensional schematic diagram of the chip waveguide provided by this utility model when the laser waveguide and modulator waveguide are not disconnected;
[0030] Figure 6 A top view schematic diagram showing the laser waveguide and modulator waveguide disconnected as provided in this utility model;
[0031] Figure 7 A schematic diagram of the three-dimensional structure of the chip after the P-type and N-type electrodes of the laser and modulator are respectively completed for this utility model;
[0032] Among them: 1. First waveguide step; 2. Second waveguide step; 3. Bottom layer structure;
[0033] 11. First waveguide layer; 12. First grating layer; 13. First spacer layer; 14. First quantum well layer; 15. Second spacer layer; 16. First P-type waveguide confinement layer; 17. First ohmic contact layer; 18. First Si-InP layer; 19. First Fe-InP layer; 20. Second end face;
[0034] 21. Second waveguide layer; 22. Second grating layer; 23. Third spacer layer; 24. Second quantum well layer; 25. Fourth spacer layer; 26. Second P-type waveguide confinement layer; 27. Second ohmic contact layer; 28. Second Si-InP layer; 29. Second Fe-InP layer; 30. Third end face;
[0035] 31. Substrate; 32. Buffer layer; 33. Chemical corrosion barrier layer; 40. Fourth end face. Detailed Implementation
[0036] The present invention will be further described in detail below with reference to specific embodiments:
[0037] This utility model provides a high-speed laser chip structure, as shown in the attached figure. Figure 7 As shown, the structure includes a bottom layer 3, on which a first waveguide step 1 for constructing a laser chip waveguide and a second waveguide step 2 for constructing a modulator chip waveguide are arranged side-by-side and independently. The first waveguide step 1, from bottom to top, includes a first waveguide layer 11, a first grating layer 12, a first spacer layer 13, a first quantum well layer 14, and a second spacer layer 15; the second waveguide step 2, from bottom to top, includes a second waveguide layer 21, a second grating layer 22, a third spacer layer 23, a second quantum well layer 24, and a fourth spacer layer 25.
[0038] The bottom layer 3, from bottom to top, includes a substrate 31, a buffer layer 32, and a chemical etching barrier layer 33;
[0039] The N-electrode of the modulator and laser is disposed on the surface of the chemical corrosion barrier layer 33.
[0040] Corresponding N-electrodes are fabricated on the chemical etching barrier layer 33 on the surface of the underlying structure in the corresponding regions of the laser chip waveguide and the modulator chip waveguide. Because the electrodes are fabricated on the chemical etching barrier layer 33, parasitic capacitance is reduced, and the operating speed of the device is improved.
[0041] The laser wavelength is determined by the grating period. This structure is mainly used to enable the laser to operate in single-mode, meeting the basic requirement for long-distance light transmission in optical fibers. Placing the grating below the light-emitting region avoids the hole accumulation effect caused by the grating being above the light-emitting region, thus increasing carrier injection efficiency.
[0042] See appendix Figure 7 As shown, by independently disconnecting the P-type materials of the laser and modulator, and partially disconnecting the N-type materials, the threshold current of the laser is reduced, and mutual interference between the electrical signals of the laser and modulator is avoided, allowing the signal generated by the chip to be transmitted over a longer distance in the optical fiber. This waveguide structure can further reduce the parasitic capacitance of the modulator, increase the 3dB modulation bandwidth of the modulator, and improve the operating speed of the device.
[0043] Furthermore, the end face of the laser chip waveguide near the modulator is designated as the second end face 20, and the end face of the modulator chip waveguide near the laser is designated as the third end face 30. At least one of the end faces, the second end face 20 and the third end face 30, is constructed as a multi-sloping tip structure to prevent the signal from being transmitted back and forth between the laser and the modulator. The end face of the modulator chip waveguide near the external optical fiber is designated as the fourth end face 40, and the fourth end face 40 is constructed as a multi-sloping tip structure to prevent the optical signal from being transmitted back and forth between the modulator and the optical fiber.
[0044] For example, see Appendix Figure 6 As shown, the disconnected end face of the laser is end face 2 (second end face 20), the disconnected end face of the modulator is end face 3 (third end face 30), the outer edge of the laser is end face 1, and the outer edge of the modulator is end face 4 (fourth end face 40). The second end face 20 and the fourth end face 40 are formed into a multi-beveled tip structure by cutting.
[0045] Because the laser and modulator are etched apart, and the etched end faces are each equipped with a multi-sloped tip structure, the light cannot maintain its original parallel path of propagation and cannot return to the chip, thus avoiding the problem of "oscillation" crosstalk between the modulator and the laser.
[0046] Furthermore, due to the multi-sloping tip structure, which blocks light reflection propagation, the interference of light reflected from the optical fiber to the modulator can be reduced, further reducing the interference of external signals to the modulator, ensuring unidirectional light propagation between the laser, modulator and optical fiber, and making both optical and electrical signals "cleaner".
[0047] Because of the multi-sloping tip structure, it is possible to achieve unidirectional light propagation without using an isolator between the modulator and the optical fiber (in conventional technology, an isolator is placed between the modulator and the optical fiber to prevent light from reflecting off each other at the interface), which simplifies the packaging process and reduces packaging costs.
[0048] End facets 2 and 4, through their pointed design and AR coating, avoid optical signal interference caused by reflected light between the laser and modulator, and between the modulator and the optical fiber. This reduces dispersion loss during signal transmission in the optical fiber and increases the signal transmission distance.
[0049] A P-type ohmic contact layer, including a first P-type waveguide confinement layer 16 and a first ohmic contact layer 17, is provided on the surface of the first ohmic contact layer 17 at the top of the laser chip waveguide; a laser P electrode is fabricated on the surface of the first ohmic contact layer 17.
[0050] A P-type ohmic contact layer is provided on the surface of the second waveguide step 2, including a second P-type waveguide confinement layer 26 and a second ohmic contact layer 27; a laser P-electrode is fabricated on the surface of the second ohmic contact layer 27 at the top of the modulator chip waveguide.
[0051] A first current blocking layer is filled on both sides of the first waveguide step 1 and between the bottom structure and the first P-type waveguide confinement layer 16. The first current blocking layer includes a first Si-InP layer 18 and a first Fe-InP layer 19.
[0052] A second current blocking layer is filled between the two sides of the second waveguide step 2 and between the bottom structure 3 and the second P-type waveguide confinement layer 26. The second current blocking layer includes a second Si-InP layer 28 and a second Fe-InP layer 29.
[0053] By adding a current blocking layer to block the current flowing through the chip, the threshold current of the laser can be reduced, improving the modulator spot size. The light exiting the modulator end face becomes closer to a circular spot, which is beneficial for the coupling between the modulator and the optical fiber, reducing optical coupling loss. Furthermore, it can also reduce the parasitic capacitance of the modulator and increase the chip's 3dB modulation bandwidth.
[0054] The second quantum well layer 24 is used to fabricate the modulator, and the band width of the second quantum well layer 24 is not less than the band width of the first quantum well layer 14, with the specific difference determined by the modulation voltage. The wavelength range of the first quantum well layer 14 is 1310 nm to 1550 nm.
[0055] The lengths of the laser region and the modulator region are determined by the requirements for the laser output power and the modulator speed. Generally, the laser waveguide length is greater than the modulator length. The longer the laser waveguide, the greater its output power. In general, the shorter the modulation region, the faster the modulator's operating speed.
[0056] This utility model further provides a method for fabricating a chip structure, the process of which is as follows:
[0057] (1) Fabrication of the underlying structure on the substrate: A buffer layer 32, a chemical etching barrier layer 33, and a first waveguide layer 11 are sequentially grown (from bottom to top) on the substrate 31 using MOCVD or MBE epitaxial growth technology. (See attached diagram) Figure 1 As shown, the buffer layer 32 is an N-type InP layer used to remove substrate defects and serves as an N-type waveguide layer for the device; the chemical etching barrier layer 33 is used for chemical selective etching.
[0058] (2) Fabrication of the grating layer: A grating pattern is fabricated on the surface of the buffer layer 32 using Ebeam writing or holographic technology, and then etched using ICP etching (inductively coupled plasma etching) process. The etching depth is between 100-200 nm. The result of the grating structure etching is shown in the attached figure. Figure 2 As shown, the grating pattern only covers a portion of the N-type InP layer surface (laser region).
[0059] An InGaAsP layer for filling the grating is epitaxially grown on the surface of the grating pattern and the N-type InP layer using MOCVD or EBM epitaxial growth techniques. The InGaAsP layer covers the laser region and the modulator region, thus obtaining the grating layer.
[0060] (3) Fabrication of quantum well structures;
[0061] a. A first quantum well structure, including a first spacer layer 13, a first quantum well layer 14, and a second spacer layer 15, is sequentially epitaxially grown on the surface of the grating layer using MOCVD or EBM epitaxial growth technology. The first quantum well structure is used to fabricate the gain material of a laser.
[0062] b. Part of the first spacer layer 13, the first quantum well layer 14, and the second spacer layer 15 are removed using PECVD, photolithography, RIE, and ICP etching processes. The remaining space is designated as a laser region for growing a second quantum well structure, which is docked with the first quantum well structure and used to fabricate a modulator. (See Appendix) Figure 1 As shown. (Combined with the appendix) Figure 5 Or attached Figure 7 As shown, the second quantum well structure and the retained first quantum well structure are arranged side by side along the length direction.
[0063] c. A first dielectric film is deposited on the surface of the second spacer layer 15 of the first quantum well structure using PECVD. The dielectric film is generally made of silicon oxide, silicon nitride, etc., to play a protective role. Then, the quantum well structure of the modulator is epitaxially grown to prevent the first quantum well structure from being disturbed.
[0064] d. Using MOCVD or EBM epitaxial growth techniques, sequentially grow the third spacer layer 23, the second quantum well layer 24, and the fourth spacer layer 25 of the second quantum well structure in the reserved modulator region. The fabricated structure is shown in the attached figure. Figure 1 As shown.
[0065] e. in Figure 1 Based on this, the first dielectric film is removed by RIE etching technology (reactive ion etching);
[0066] Then, a second dielectric film is deposited using PECVD technology. The second dielectric film covers the second spacer layer 15 in the laser region and the fourth spacer layer 25 in the modulator region.
[0067] f. Waveguide steps are formed by etching using photolithography, RIE, and ICP processes, as shown in the attached diagram. Figure 2 As shown, etching is performed from top to bottom until the surface of the chemical etching barrier layer 33 is exposed. The etching removes the outer edges of the first quantum well structure, the second quantum well structure, the grating layer, and the waveguide layer along their length. The first and second quantum well structures are retained and arranged side by side, with each structural layer arranged in a one-to-one correspondence. This forms a waveguide step structure that protrudes from the surface of the underlying structure.
[0068] In the waveguide stepped structure, the grating is placed below the quantum well in the light-emitting region, which can avoid the hole accumulation effect caused by placing the grating above the quantum well, increase the carrier injection efficiency, and improve the chip's output power.
[0069] (4) Fabricate the current blocking layer and the P-type ohmic contact layer;
[0070] exist Figure 2 Based on this, Fe-InP and Si-InP layers are grown on both sides of the waveguide step using MOCVD or EBM epitaxial growth techniques (no layers are grown on either side of the second dielectric film). The Fe-InP layer is a non-conductive material, and the Si-InP layer is placed on top of the Fe-InP layer.
[0071] The second dielectric film is removed by etching. A P-InP waveguide confinement layer and an ohmic contact layer are sequentially grown on the surface of the Si-InP layer using MOCVD or EBM epitaxial growth techniques. The Si-InP layer isolates the Fe-InP layer and the P-InP waveguide confinement layer. The P-InP waveguide confinement layer confines light propagation outwards, while the Si-InP layer isolates the diffusion of P-type doping between the Fe-InP layer and the P-type waveguide confinement layer. The fabrication results are shown in the appendix. Figure 3 As shown.
[0072] (6) Fabrication of chip waveguides;
[0073] In the appendix Figure 3Based on this, chip waveguides are fabricated using photolithography, ICP, and chemical etching processes. The specific operations are as follows:
[0074] The current blocking layer and the P-type ohmic contact layer are etched from top to bottom, removing both sides of the edge portions until the surface of the chemical etching barrier layer 33 is exposed. The edges of the current blocking layer and the P-type ohmic contact layer along the length direction are etched away, retaining the middle region of the parallel contacts. A protruding chip waveguide structure is formed on top of the underlying structure. (See attached diagram.) Figure 4 As shown.
[0075] Trenches are etched from top to bottom, extending beyond the first waveguide layer 11 until the surface of the chemical etching barrier layer 33 is exposed. The length of the trench is not less than the width of the chip waveguide. (See attached diagram.) Figure 5 As shown by the double dashed lines in the provided 3D schematic diagram of the chip waveguide, etching is performed along the double dashed lines, and the trench length is equal to the width of the chip waveguide.
[0076] See attached document Figure 6 As shown, the second end face 20 of the laser (near the modulator side) and the fourth end face 40 of the modulator are formed into a multi-beveled tip structure by cutting.
[0077] (7) Fabrication of electrodes;
[0078] The N-electrodes of the laser and modulator are fabricated in the laser region and modulator region corresponding to the chemical etching barrier layer 33 by photolithography, Ebeam evaporation sputtering technology or RTA process, and the P-electrodes of the laser and modulator are fabricated on the surface of the ohmic contact layer corresponding to the laser and modulator.
[0079] (8) Post-processing;
[0080] Bar strips are made through thinning and cleavage processes. HR reflective film is applied to the end face 1 of the laser. AR antireflective film is deposited on the second end face 20 of the laser, the third end face 30 and the fourth end face 40 of the modulator, respectively. The chip process is then completed.
[0081] The above embodiments are only for illustrating the technical concept and features of this utility model, and are intended to enable those skilled in the art to understand the content of this utility model and implement it accordingly. They should not be construed as limiting the scope of protection of this utility model. It is obvious to those skilled in the art that this utility model is not limited to the details of the above exemplary embodiments, and that it can be implemented in other specific forms without departing from the spirit or basic characteristics of this utility model. Therefore, the embodiments should be considered exemplary and non-limiting in all respects. The scope of this utility model is defined by the appended claims rather than the foregoing description, and therefore, all changes falling within the meaning and scope of the equivalents of the claims are intended to be included within this utility model.
Claims
1. A high-speed laser chip structure, characterized in that, The underlying structure (3) includes a first waveguide step (1) for constructing a laser chip waveguide and a second waveguide step (2) for constructing a modulator chip waveguide, which are arranged in parallel and independently on the underlying structure (3). The first waveguide step (1) includes, from bottom to top, a first waveguide layer (11), a first grating layer (12), a first spacer layer (13), a first quantum well layer (14), and a second spacer layer (15). The second waveguide step (2) includes, from bottom to top, a second waveguide layer (21), a second grating layer (22), a third spacer layer (23), a second quantum well layer (24), and a fourth spacer layer (25).
2. The high-speed laser chip structure according to claim 1, characterized in that, The end face of the laser chip waveguide near the modulator is set as the second end face (20), and the end face of the modulator chip waveguide near the laser is set as the third end face (30). At least one of the second end face (20) and the third end face (30) is constructed as a multi-sloping tip structure to avoid the signal being transmitted back and forth between the laser and the modulator. The end face of the modulator chip waveguide near the external optical fiber is set as the fourth end face (40), and the fourth end face (40) is constructed as a multi-sloping tip structure to avoid the optical signal from being transmitted back and forth between the modulator and the optical fiber.
3. The high-speed laser chip structure according to claim 1, characterized in that, The underlying structure (3) includes, from bottom to top, a substrate (31), a buffer layer (32), and a chemical corrosion barrier layer (33). The corresponding N electrode is set on the chemical etching barrier layer (33) on the surface of the underlying structure of the corresponding region of the laser chip waveguide and the modulator chip waveguide.
4. The high-speed laser chip structure according to claim 1, characterized in that, A P-type ohmic contact layer is provided on the surface of the first waveguide step (1), including a first P-type waveguide confinement layer (16) and a first ohmic contact layer (17). A laser P electrode is fabricated on the surface of the first ohmic contact layer (17) at the top of the laser chip waveguide.
5. A high-speed laser chip structure according to claim 4, characterized in that, A first current blocking layer is filled between the two sides of the first waveguide step (1) and between the bottom structure (3) and the first P-type waveguide confinement layer (16). The first current blocking layer includes a first Si-InP layer (18) and a first Fe-InP layer (19).
6. The high-speed laser chip structure according to claim 1, characterized in that, A P-type ohmic contact layer is provided on the surface of the second waveguide step (2), including a second P-type waveguide confinement layer (26) and a second ohmic contact layer (27). A laser P-electrode is fabricated on the surface of the second ohmic contact layer (27) at the top of the modulator chip waveguide.
7. A high-speed laser chip structure according to claim 6, characterized in that, A second current blocking layer is filled between the second waveguide step (2) and the bottom layer (3) and the second P-type waveguide confinement layer (26). The second current blocking layer includes a second Si-InP layer (28) and a second Fe-InP layer (29).
8. The high-speed laser chip structure according to claim 1, characterized in that, The band width of the second quantum well layer (24) is not less than the band width of the first quantum well layer (14).