SiC mosfet driving circuit of LED driving power supply

By designing a SiC MOSFET driver circuit for an LED driver power supply, the driving signal voltage is boosted to 18.7V using the main control chip U1 and logic control sub-circuit, solving the problem of high on-resistance of SiC MOSFETs and achieving low-cost and high-efficiency SiC MOSFET control.

CN224473452UActive Publication Date: 2026-07-07GUANGDONG LYFORD TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
GUANGDONG LYFORD TECH CO LTD
Filing Date
2025-04-28
Publication Date
2026-07-07

AI Technical Summary

Technical Problem

In the current LED lighting industry, the driving voltage of SiC MOSFETs can usually only reach 12V, resulting in a large on-resistance and failing to fully utilize the advantage of low on-resistance of SiC MOSFETs.

Method used

A SiC MOSFET driver circuit for an LED driver power supply was designed, including a power supply module, a main control module, a logic control sub-circuit, and a SiC MOSFET Q5. The main control chip U1 generates a PWM square wave signal, and the driving signal voltage is boosted to 18.7V using MOSFETs Q1, Q2, NPN transistor Q3, PNP transistor Q4, and resistors R1 and R2, thereby achieving effective control of the SiC MOSFET Q5.

Benefits of technology

This method achieves a gate voltage of 18V for SiC MOSFETs, with relatively low on-resistance, a simple circuit structure, and low cost, effectively utilizing the advantage of low on-resistance of SiC MOSFETs.

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Abstract

The utility model belongs to the technical field of electronic circuit, provide a SiC MOSFE drive circuit of LED drive power supply, include: power module, main control module, logic control subcircuit and SiC MOSFET pipe Q5, power module and main control module are connected logic control subcircuit respectively, logic control subcircuit connects SiC MOSFET pipe Q5, the utility model discloses the SiC MOSFE drive circuit realization simple, low in cost, the gate voltage of SiC MOSFET pipe in SiC MOSFE drive circuit can reach 18V, and the on resistance of SiC MOSFET pipe is relatively small.
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Description

Technical Field

[0001] This utility model relates to the field of electronic circuit technology, and in particular to a SiC MOSFE driving circuit for an LED driving power supply. Background Technology

[0002] Compared to Si CoolMOS, SiC MOSFETs offer advantages such as high voltage and high temperature resistance, fast switching speed, and low on-resistance. Furthermore, with the maturation of SiC MOSFET manufacturing technology and cost reduction, they are gradually being applied in the LED lighting industry. The Rds(on) of a SiC MOSFET decreases as its gate voltage increases. When the gate voltage reaches 18V, the Rds(on) is relatively small. However, most existing chips in the LED lighting industry only provide a drive voltage of around 12V. Using these chips to directly drive SiC MOSFETs results in a relatively large Rds(on), failing to fully utilize their low on-resistance advantage.

[0003] Therefore, it is necessary to provide a SiC MOSFE driving circuit for LED driving power supply. Utility Model Content

[0004] This invention provides a SiC MOSFE driving circuit for LED driving power supply. The proposed SiC MOSFE driving circuit is simple to implement and low in cost. The gate voltage of the SiC MOSFET in the SiC MOSFE driving circuit can reach 18V, and the on-resistance of the SiC MOSFET is relatively small.

[0005] This utility model provides a SiC MOSFE driving circuit for an LED driver power supply, comprising:

[0006] The system includes a power supply module, a main control module, a logic control sub-circuit, and a SiC MOSFET Q5. The power supply module and the main control module are connected to the logic control sub-circuit, which is connected to the SiC MOSFET Q5.

[0007] Furthermore, the power supply module is used to provide a stable 18.7V voltage for the SiC MOSFE drive circuit.

[0008] Furthermore, the main control module includes a main control chip U1; the main control chip U1 is used to generate a PWM square wave signal to provide a drive signal for the SiCMOS FE drive circuit.

[0009] Furthermore, the logic control sub-circuit includes MOSFETs Q1 and Q2, NPN transistors Q3 and Q4, resistors R1 and R2; MOSFETs Q1 and Q2 are used to boost the drive signal voltage to 18.7V; NPN transistors Q3 and Q4 are used to amplify the drive signal; resistors R1 and R2 are used to limit the current of the SiC MOSFET drive circuit.

[0010] Furthermore, the main control chip U1 is connected to the gate of MOSFET Q1, the source of MOSFET Q1 is grounded, and the drain of MOSFET Q1 is connected to the gate of MOSFET Q2 and the other end of resistor R1. The source of MOSFET Q2 is grounded. The drain of MOSFET Q2 is connected to the base of NPN transistor Q3, the base of PNP transistor Q4, and the other end of resistor R2. The collector of PNP transistor Q4 is grounded. The emitter of PNP transistor Q4 is connected to the emitter of NPN transistor Q3 and the gate of SiC MOSFET Q5. The drain of SiC MOSFET Q5 is grounded. The source of SiC MOSFET Q5 is connected to an external power supply. The power supply module is connected to one end of resistor R1, one end of resistor R2, and the collector of NPN transistor Q3.

[0011] Furthermore, when the main control chip U1 outputs a 12V high level, MOSFET Q1 is turned on, the gate of MOSFET Q2 is pulled to a low level, and MOSFET Q2 is turned off; the current of the power supply module flows through R2 to the base of NPN transistor Q3 and PNP transistor Q4, NPN transistor Q3 is turned on, PNP transistor Q4 is turned off, and the gate of SiC MOSFET Q5 receives an 18V drive voltage;

[0012] When the main control chip U1 outputs a low level, MOSFET Q1 is turned off, and the current from the power supply module flows through R1 to the gate of MOSFET Q2, turning on MOSFET Q2. The bases of NPN transistor Q3 and PNP transistor Q4 are pulled low, NPN transistor Q3 is turned off, and PNP transistor Q4 turns on to discharge the gate of SiC MOSFET Q5, pulling the gate of SiC MOSFET Q5 low.

[0013] Furthermore, MOSFETs Q1 and Q2 are used to accelerate the current flow rate of the SiC MOSFE drive circuit.

[0014] Furthermore, when the gate voltage of the SiC MOSFE transistor Q5 reaches 18V, its on-resistance reaches a relatively small value.

[0015] Furthermore, it also includes a component monitoring sub-circuit; the component monitoring sub-circuit is connected to the logic control sub-circuit and the SiC MOSFET Q5; the component monitoring sub-circuit is used to monitor the operating status of MOSFET Q1, MOSFET Q2, NPN transistor Q3 and PNP transistor Q4 in the logic control sub-circuit, as well as to monitor the operating status of SiC MOSFET Q5.

[0016] Furthermore, it also includes a current regulation circuit; the current regulation circuit is connected to the logic control sub-circuit; the current regulation circuit includes a control power supply, a current adder, and a current subtractor; the current adder is used to generate a current addition signal, the current subtractor is used to generate a current subtraction signal, the current addition signal and the current subtraction signal are subtracted to generate a regulation current, and the control power supply controls the regulation current to flow through MOSFET Q1 and MOSFET Q2.

[0017] Compared with the prior art, this utility model has the following advantages and beneficial effects: the proposed SiC MOSFE driving circuit is simple to implement and low in cost; the gate voltage of the SiC MOSFET in the SiC MOSFE driving circuit can reach 18V; and the on-resistance of the SiC MOSFET is relatively small.

[0018] Other features and advantages of this invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained by means of the structures particularly pointed out in the written description and the accompanying drawings.

[0019] The technical solution of this utility model will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0020] The accompanying drawings are provided to further illustrate the present invention and form part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation thereof. In the drawings:

[0021] Figure 1 A schematic diagram of the SiC MOSFE driving circuit structure for LED driver power supply;

[0022] Figure 2 A schematic diagram of the SiC MOSFE driver circuit structure for LED driver power supply;

[0023] Figure 3 This is a schematic diagram of the control logic sub-circuit of the main control chip U1. Detailed Implementation

[0024] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0025] This invention provides a SiC MOSFE driving circuit for an LED driver power supply, such as... Figure 1 As shown, it includes: a power supply module, a main control module, a logic control sub-circuit, and a SiC MOSFET Q5; the power supply module and the main control module are respectively connected to the logic control sub-circuit; the logic control sub-circuit is connected to the SiC MOSFET Q5.

[0026] The working principle of the above technical solution is as follows: In order to realize the SiC MOSFET driving circuit of the LED driver power supply, this utility model proposes a power supply module, a main control module, a logic control sub-circuit and a SiC MOSFET Q5; wherein, the power supply module and the main control module are respectively connected to the logic control sub-circuit; the logic control sub-circuit is connected to the SiC MOSFET Q5.

[0027] The beneficial effects of the above technical solution are as follows: the SiC MOSFE drive circuit is simple to implement and low in cost. The gate voltage of the SiC MOSFET in the SiC MOSFE drive circuit can reach 18V, and the on-resistance of the SiC MOSFET is relatively small.

[0028] In one embodiment, the power supply module is used to provide a stable 18.7V voltage to the SiC MOSFE drive circuit.

[0029] The working principle of the above technical solution is as follows: the power supply module can provide a stable 18.7V voltage to the SiC MOSFE drive circuit.

[0030] The beneficial effects of the above technical solution are as follows: by adopting the solution provided in this embodiment, a stable power supply can be guaranteed for the SiC MOSFE drive circuit through the power supply module.

[0031] In one embodiment, the main control module includes a main control chip U1; the main control chip U1 is used to generate a PWM square wave signal to provide a drive signal for the SiC MOSFE drive circuit.

[0032] The working principle of the above technical solution is as follows: In order to realize the control of the SiC MOSFE driving circuit, this utility model proposes a main control module; the main control module includes a main control chip U1; the main control chip U1 is used to generate a PWM square wave signal to provide a driving signal for the SiC MOSFE driving circuit.

[0033] The beneficial effects of the above technical solution are as follows: by adopting the solution provided in this embodiment, the main control chip U1 generates a PWM square wave signal to provide a drive signal for the SiC MOSFE drive circuit.

[0034] In one embodiment, the logic control sub-circuit includes MOSFETs Q1 and Q2, NPN transistor Q3 and PNP transistor Q4, resistors R1 and R2; MOSFETs Q1 and Q2 are used to boost the drive signal voltage to 18.7V; NPN transistors Q3 and PNP transistor Q4 are used to amplify the drive signal; resistors R1 and R2 are used to limit the current of the SiC MOSFET drive circuit.

[0035] The working principle of the above technical solution is as follows: In order to control the SiC MOSFE driving circuit, this utility model proposes a logic control sub-circuit, which includes MOS transistors Q1 and Q2, NPN transistors Q3 and Q4, resistors R1 and R2; MOS transistors Q1 and Q2 are used to boost the driving signal voltage to 18.7V; NPN transistors Q3 and Q4 are used to amplify the driving signal; resistors R1 and R2 are used to limit the current of the SiC MOSFE driving circuit.

[0036] The beneficial effects of the above technical solution are as follows: by adopting the solution provided in this embodiment, the control of MOSFET Q1, MOSFET Q2, NPN transistor Q3, PNP transistor Q4, resistor R1 and resistor R2 can be realized through the function of the logic control sub-circuit.

[0037] In one embodiment, such as Figure 2 As shown, the main control chip U1 is connected to the gate of MOSFET Q1, the source of MOSFET Q1 is grounded, and the drain of MOSFET Q1 is connected to the gate of MOSFET Q2 and the other end of resistor R1. The source of MOSFET Q2 is grounded. The drain of MOSFET Q2 is connected to the base of NPN transistor Q3, the base of PNP transistor Q4, and the other end of resistor R2. The collector of PNP transistor Q4 is grounded. The emitter of PNP transistor Q4 is connected to the emitter of NPN transistor Q3 and the gate of SiC MOSFET Q5. The drain of SiC MOSFET Q5 is grounded. The source of SiC MOSFET Q5 is connected to an external power supply. The power supply module is connected to one end of resistor R1, one end of resistor R2, and the collector of NPN transistor Q3.

[0038] The working principle of the above technical solution is as follows: In order to realize the function of the circuit, the connection structure of the components of this utility model is as follows: the main control chip U1 is connected to the gate of MOS transistor Q1, the source of MOS transistor Q1 is grounded, the drain of MOS transistor Q1 is connected to the gate of MOS transistor Q2 and the other end of resistor R1 respectively; the source of MOS transistor Q2 is grounded; the drain of MOS transistor Q2 is connected to the base of NPN transistor Q3, the base of PNP transistor Q4 and the other end of resistor R2 respectively; the collector of PNP transistor Q4 is grounded; the emitter of PNP transistor Q4 is connected to the emitter of NPN transistor Q3 and the gate of SiC MOSFET Q5 respectively; the drain of SiC MOSFET Q5 is grounded; the source of SiC MOSFET Q5 is connected to an external power supply; the power supply module is connected to one end of resistor R1, one end of resistor R2 and the collector of NPN transistor Q3 respectively.

[0039] The beneficial effects of the above technical solution are as follows: by using the solution provided in this embodiment, the basic functions of the circuit can be realized by connecting the components in the circuit structure.

[0040] In one embodiment, such as Figure 3 As shown, when the main control chip U1 outputs a 12V high level, MOSFET Q1 is turned on, the gate of MOSFET Q2 is pulled to a low level, and MOSFET Q2 is turned off; the current of the power supply module flows through R2 to the base of NPN transistor Q3 and PNP transistor Q4, NPN transistor Q3 is turned on, PNP transistor Q4 is turned off, and the gate of SiC MOSFET Q5 receives an 18V drive voltage;

[0041] When the main control chip U1 outputs a low level, MOSFET Q1 is turned off, and the current from the power supply module flows through R1 to the gate of MOSFET Q2, turning on MOSFET Q2. The bases of NPN transistor Q3 and PNP transistor Q4 are pulled low, NPN transistor Q3 is turned off, and PNP transistor Q4 turns on to discharge the gate of SiC MOSFET Q5, pulling the gate of SiC MOSFET Q5 low.

[0042] The working principle of the above technical solution is as follows: The principle of the control logic control sub-circuit of the control module of this utility model is as follows: When the main control chip U1 outputs a 12V high level, the MOS transistor Q1 is turned on, the gate of the MOS transistor Q2 is pulled to a low level, and the MOS transistor Q2 is turned off; the current of the power supply module passes through R2 to the base of the NPN transistor Q3 and the PNP transistor Q4, the NPN transistor Q3 is turned on, the PNP transistor Q4 is turned off, and the gate of the SiC MOSFET Q5 receives an 18V driving voltage;

[0043] When the main control chip U1 outputs a low level, MOSFET Q1 is turned off, and the current from the power supply module flows through R1 to the gate of MOSFET Q2, turning on MOSFET Q2. The bases of NPN transistor Q3 and PNP transistor Q4 are pulled low, NPN transistor Q3 is turned off, and PNP transistor Q4 turns on to discharge the gate of SiC MOSFET Q5, pulling the gate of SiC MOSFET Q5 low.

[0044] The beneficial effects of the above technical solution are as follows: by using the solution provided in this embodiment, the main control chip U1 outputs different high and low levels to control the cut-off or conduction of MOSFETs Q1 and Q2, thereby realizing the control of SiC MOSFET Q5.

[0045] In one embodiment, MOSFETs Q1 and Q2 are used to accelerate the current flow in the SiC MOSFE drive circuit.

[0046] The working principle of the above technical solution is as follows: by realizing the functions of MOSFET Q1 and MOSFET Q2, the current speed of the SiCMOS FE driving circuit can be accelerated.

[0047] The beneficial effects of the above technical solution are as follows: by using the solution provided in this embodiment, the current speed of the SiC MOSFE drive circuit can be accelerated through the use of MOS transistors Q1 and Q2.

[0048] In one embodiment, when the gate voltage of the SiC MOSFE transistor Q5 reaches 18V, its on-resistance reaches a relatively small value.

[0049] The working principle of the above technical solution is as follows: when the gate voltage of SiC MOSFE transistor Q5 reaches 18V, the on-resistance of SiC MOSFE transistor Q5 can reach a relatively small value.

[0050] The beneficial effects of the above technical solution are as follows: by applying an 18V gate voltage to the SiC MOSFE transistor Q5, the on-resistance of the SiC MOSFE transistor Q5 can be made relatively small.

[0051] In one embodiment, the system further includes a component monitoring sub-circuit; the component monitoring sub-circuit is connected to the logic control sub-circuit and the SiC MOSFET Q5; the component monitoring sub-circuit is used to monitor the operating status of MOSFET Q1, MOSFET Q2, NPN transistor Q3 and PNP transistor Q4 in the logic control sub-circuit, as well as to monitor the operating status of the SiC MOSFET Q5.

[0052] The working principle of the above technical solution is as follows: In order to monitor the working status of the logic control sub-circuit and the SiC MOSFET Q5, this utility model proposes a component monitoring sub-circuit; the component monitoring sub-circuit is connected to the logic control sub-circuit and the SiC MOSFET Q5; the component monitoring sub-circuit is used to monitor the working status of MOSFET Q1, MOSFET Q2, NPN transistor Q3 and PNP transistor Q4 in the logic control sub-circuit, as well as to monitor the working status of SiC MOSFET Q5.

[0053] The beneficial effects of the above technical solution are as follows: by adopting the solution provided in this embodiment, the working status monitoring of the logic control sub-circuit and the SiC MOSFET Q5 can be realized by proposing a component monitoring sub-circuit.

[0054] In one embodiment, a current regulation circuit is also included; the current regulation circuit is connected to the logic control sub-circuit; the current regulation circuit includes a control power supply, a current adder, and a current subtractor; the current adder is used to generate a current addition signal, the current subtractor is used to generate a current subtraction signal, the current addition signal and the current subtraction signal are subtracted to generate a regulation current, and the control power supply controls the regulation current to flow through MOSFET Q1 and MOSFET Q2.

[0055] The working principle of the above technical solution is as follows: In order to achieve stable regulation of current, this utility model proposes a current regulation circuit; the current regulation circuit is connected to the logic control sub-circuit; the current regulation circuit includes a control power supply, a current adder, and a current subtractor; the current adder is used to generate a current addition signal, the current subtractor is used to generate a current subtraction signal, the current addition signal and the current subtraction signal are subtracted to generate a regulation current, and the control power supply controls the regulation current to flow through MOSFET Q1 and MOSFET Q2.

[0056] The beneficial effects of the above technical solution are as follows: by adopting the solution provided in this embodiment, the current can be stably regulated through the design of the current regulation circuit.

[0057] Obviously, those skilled in the art can make various modifications and variations to this utility model without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this utility model and their equivalents, this utility model also intends to include these modifications and variations.

Claims

1. A SiC MOSFE driving circuit for an LED driver power supply, characterized in that, include: Power supply module, main control module, logic control sub-circuit and SiC MOSFET Q5; The power supply module and the main control module are respectively connected to the logic control sub-circuit; The logic control sub-circuit is connected to SiC MOSFET Q5; The power supply module is used to provide a stable 18.7V voltage for the SiC MOSFE drive circuit; The logic control sub-circuit includes MOSFETs Q1 and Q2, NPN transistor Q3 and PNP transistor Q4, and resistors R1 and R2. MOSFETs Q1 and Q2 are used to boost the drive signal voltage to 18.7V; NPN transistors Q3 and PNP transistor Q4 are used to amplify the drive signal; and resistors R1 and R2 are used to limit the current of the SiC MOSFET drive circuit. The main control chip U1 is connected to the gate of MOSFET Q1, the source of MOSFET Q1 is grounded, and the drain of MOSFET Q1 is connected to the gate of MOSFET Q2 and the other end of resistor R1. The source of MOSFET Q2 is grounded. The drain of MOSFET Q2 is connected to the base of NPN transistor Q3, the base of PNP transistor Q4, and the other end of resistor R2. The collector of PNP transistor Q4 is grounded. The emitter of PNP transistor Q4 is connected to the emitter of NPN transistor Q3 and the gate of SiC MOSFET Q5. The drain of SiC MOSFET Q5 is grounded. The source of SiC MOSFET Q5 is connected to an external power supply. The power supply module is connected to one end of resistor R1, one end of resistor R2, and the collector of NPN transistor Q3.

2. The SiC MOSFE driving circuit for an LED driving power supply according to claim 1, characterized in that, The main control module includes a main control chip U1; the main control chip U1 is used to generate a PWM square wave signal to provide a drive signal for the SiC MOSFE drive circuit.

3. The SiC MOSFE driving circuit for an LED driving power supply according to claim 1, characterized in that, When the main control chip U1 outputs a 12V high level, MOSFET Q1 is turned on, the gate of MOSFET Q2 is pulled to a low level, and MOSFET Q2 is turned off; the current of the power supply module flows through R2 to the base of NPN transistor Q3 and PNP transistor Q4, NPN transistor Q3 is turned on, PNP transistor Q4 is turned off, and the gate of SiC MOSFET Q5 receives an 18V drive voltage; When the main control chip U1 outputs a low level, MOSFET Q1 is turned off, and the current from the power supply module flows through R1 to the gate of MOSFET Q2, turning on MOSFET Q2. The bases of NPN transistor Q3 and PNP transistor Q4 are pulled low, NPN transistor Q3 is turned off, and PNP transistor Q4 turns on to discharge the gate of SiC MOSFET Q5, pulling the gate of SiC MOSFET Q5 low.

4. The SiC MOSFE driving circuit for an LED driving power supply according to claim 1, characterized in that, MOSFETs Q1 and Q2 are used to accelerate the current flow in the SiC MOSFET drive circuit.

5. The SiC MOSFE driving circuit for an LED driving power supply according to claim 1, characterized in that, When the gate voltage of the SiCMOS FE transistor Q5 reaches 18V, its on-resistance reaches a relatively small value.

6. The SiC MOSFE driving circuit for an LED driving power supply according to claim 1, characterized in that, It also includes a component monitoring sub-circuit; the component monitoring sub-circuit is connected to the logic control sub-circuit and the SiC MOSFET Q5; the component monitoring sub-circuit is used to monitor the operating status of MOSFET Q1, MOSFET Q2, NPN transistor Q3 and PNP transistor Q4 in the logic control sub-circuit, as well as to monitor the operating status of SiC MOSFET Q5.

7. The SiC MOSFE driving circuit for an LED driving power supply according to claim 1, characterized in that, It also includes a current regulation circuit; the current regulation circuit is connected to the logic control sub-circuit; the current regulation circuit includes a control power supply, a current adder, and a current subtractor; the current adder is used to generate a current addition signal, the current subtractor is used to generate a current subtraction signal, the current addition signal and the current subtraction signal are subtracted to generate a regulation current, and the control power supply controls the regulation current to flow through MOSFET Q1 and MOSFET Q2.