Tbc solar cell with an introduced perforated structure

Abstract

This invention discloses a TBC solar cell with a perforated structure, belonging to the field of solar cell technology. It includes a silicon substrate with several first regions and several second regions on the back side. A first perforated region is located within the non-electrode region of the first region. The first perforated region consists of multiple textured perforations penetrating a first tunneling passivation layer, a first doped layer, and a first antireflection layer. Multiple textured perforations penetrating a second tunneling passivation layer, a second doped layer, and a second antireflection layer are located within the non-electrode region of the second region. These second textured perforations are inverted pyramid shapes. The first perforated regions and the second textured perforations are arranged in an equidistant array on both sides of the metal electrode. By setting an array of first textured perforations in the non-electrode region of the P-type region and inverted pyramid-shaped second textured perforations in the non-electrode region of the N-type region, the carrier transport path and light management mechanism are synergistically reconstructed, optimizing the back-side light capture capability and improving the bifaciality factor.

Description

Technical Field

[0001] This utility model pertains to solar cells, specifically a TBC solar cell with a perforated structure. Background Technology

[0002] Back-contact solar cells (such as IBCs) are among the most efficient crystalline silicon solar cells currently on the market. They place both positive and negative metal electrodes on the back of the cell, completely eliminating light loss due to shading from the front grid lines, while optimizing the back electrode design to reduce series resistance and improve the fill factor. However, this structure is limited by recombination losses in the metal-semiconductor contact area and the surface passivation effect, hindering further efficiency improvements.

[0003] TOPCon solar cells significantly reduce surface recombination and metal-to-metal recombination by introducing a passivated contact structure consisting of a tunneling silicon oxide layer (SiOx) and a heavily doped polycrystalline silicon layer (polySi) on the back of the cell, thereby improving open-circuit voltage and conversion efficiency. Although TOPCon technology has achieved high efficiency, the polycrystalline silicon layer exhibits significant parasitic absorption of long-wavelength light (>1000nm), making it difficult to apply to the front surface of the cell and limiting further efficiency improvements.

[0004] TBC solar cells combine the advantages of back-contact structures and TOPCon passivation contact technology, sequentially constructing an ultrathin tunneling passivation layer and a doped polycrystalline silicon layer on the back side of a silicon substrate. By combining the passivation contact technology of back-contact solar cells with that of TOPCon cells, TBC solar cells can further improve solar energy conversion efficiency. The main steps in TBC solar cells are to add an ultrathin tunneling passivation layer between the back side of the silicon substrate and the doped layer, and then deposit a doped polycrystalline silicon layer on the tunneling passivation layer. Most existing research and applications of TBC solar cells with doped polycrystalline silicon layers are based on TOPCon cells. They utilize the passivation contact structure characteristics composed of an ultrathin tunneling passivation layer (SiOx) and a heavily doped silicon thin film layer (polySi) to promote carrier transport. However, this is extremely sensitive to the heavily doped silicon thin film layer (polySi) and has very high thickness requirements. The heavily doped silicon thin film layer (polySi) generally needs to be above 120nm to achieve a good passivation effect. Once the threshold is exceeded, the conversion efficiency will drop rapidly. An excessively thick poly passivation layer will prolong the carrier transport path and increase parasitic absorption in the long wavelength range, reducing the short-circuit current density. An excessively thin layer will weaken the passivation effect and increase the risk of burn-through. Utility Model Content

[0005] To overcome the problems in existing technologies where excessively thick poly passivation layers prolong carrier transport paths and increase parasitic absorption in long-wavelength bands, thus reducing short-circuit current density, while excessively thin layers weaken the passivation effect and increase burn-through, this invention provides a TBC solar cell with a perforated structure, as detailed below:

[0006] A perforated TBC solar cell includes a silicon substrate. The back side of the silicon substrate has several first and second regions. The first and second regions have opposite polarities and are arranged alternately in the lateral direction. A third region for isolation is provided at each connection point. The first, second, and third regions on the back side of the silicon substrate all extend outwards. The first region includes a first tunneling passivation layer, a first doped layer, and a first antireflection layer sequentially stacked on the back side of the silicon substrate. The second region includes a second tunneling passivation layer, a second doped layer, and a second antireflection layer sequentially stacked on the back side of the silicon substrate. A metal electrode is disposed in the center of both the first and second antireflection layers. The thickness of both the first and second doped layers is 150~300 nm. The height difference between the outer surfaces of the first region 2 and the second region 3 is 1~5 μm.

[0007] The first region has a first perforation region in the non-electrode region, which is composed of a plurality of first textured perforations that penetrate the first tunneling passivation layer, the first doped layer and the first antireflection layer. The second region has a plurality of second textured perforations that penetrate the second tunneling passivation layer, the second doped layer and the second antireflection layer in the non-electrode region, and the second textured perforations are in the shape of an inverted pyramid. The first perforation region and the second textured perforations are arranged in an equidistant array on both sides of the metal electrode.

[0008] Furthermore, the density of the first perforated region is 8.2 × 10⁻⁶. 4 ~3×10 5 The density of the second pile perforation is 8.2 × 10⁻⁶ / cm². 4 ~3×10 5 pcs / cm²

[0009] Furthermore, the diameter of the first perforated area and the second velvet perforation is 0.5~5μm.

[0010] Furthermore, the density ratio of the first pile perforation to the second pile perforation is (1.5-2.0):1.

[0011] Furthermore, the total area of ​​the first perforated area and the second textured perforated area accounts for 5-20% of the total area of ​​the non-electrode area.

[0012] Furthermore, both the first and second textured perforations have submicron-level textured structures on their inner walls.

[0013] Furthermore, the submicron-scale textured surface structure increases the reflectivity of long-wavelength light in the 1100~1200nm band by 15%.

[0014] Furthermore, the inner wall roughness of the first and second textured perforations is 0.5~2µm.

[0015] The beneficial effects of adopting the technical solution of this utility model are as follows:

[0016] (1) The present invention provides a first textured perforated array in the non-electrode region of the P-type region and an inverted pyramid-shaped second textured perforated array in the non-electrode region of the N-type region. This collaboratively reconstructs the carrier transport path and the light management mechanism. The perforated structure directly reduces the material volume of the thickened polycrystalline silicon layer, breaks its optical barrier to long-wavelength light, and reduces the parasitic absorption loss of long-wavelength light. The submicron textured structure formed by chemical etching of the inner wall of the perforation significantly enhances the light scattering ability, improves the long-wavelength reflectivity, optimizes the back light capture ability, and improves the bifacial factor.

[0017] (2) The perforation penetrates the polysilicon layer directly to the silicon substrate, providing a vertical short path channel for charge carriers, shortening the transmission distance and greatly reducing the probability of bulk recombination; the thickened polysilicon layer completely avoids the risk of burn-through, ensures the stability of passivation contact, and improves the open circuit voltage.

[0018] (3) Laser engraving technology precisely controls the morphology of the perforation. By using a partitioning strategy of large spot overlap to induce etching (P-type region) and small spot direct ablation (N-type region), the simultaneous preparation of perforations with different morphologies can be achieved. This process is highly compatible with the existing TOPCon production line. It can improve the conversion efficiency without adding complex equipment, and breaks through the limitation of the thickness sensitive range of polycrystalline silicon layer, so as to optimize the passivation reliability and photoelectric performance. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a cross-sectional structural diagram of the TBC solar cell of this utility model;

[0021] Figure 2 This is a schematic diagram of the carrier transport path in the TBC battery of the present invention;

[0022] Wherein, 1, silicon substrate; 2, first region; 3, second region; 4, third region; 5, first tunneling passivation layer; 6, first doped layer; 7, first antireflection layer; 8, second tunneling passivation layer; 9, second doped layer; 10, second antireflection layer; 11, metal electrode; 12, perforation region; 13, first textured perforation; 14, second textured perforation. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions in the embodiments of this utility model will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this utility model, not all of them. Therefore, the following detailed description of the embodiments of this utility model provided in the accompanying drawings is not intended to limit the scope of the claimed utility model, but merely to represent selected embodiments of this utility model. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without inventive effort are within the scope of protection of this utility model.

[0024] This embodiment effectively breaks the optical barrier of the thickened polycrystalline silicon layer by introducing a first perforated region and a second textured perforation in the non-electrode region, directly reducing the volume of polycrystalline silicon material and significantly reducing parasitic absorption losses in the long-wavelength light band. The submicron-level textured structure formed on the inner walls of the first and second textured perforations enhances light scattering and improves back reflectivity. At the same time, the textured perforations optimize light trapping and carrier collection, significantly improving the bifacial factor. The specific implementation is as follows:

[0025] Reference Figures 1-2 As shown, a TBC solar cell with a perforated structure includes a silicon substrate 1. The back side of the silicon substrate 1 is provided with a plurality of first regions 2 and a plurality of second regions 3. The first regions 2 and the second regions 3 have opposite polarities and are arranged alternately in the lateral direction. A third region 4 for isolation is provided at the connection point. The first regions 2, second regions 3 and third regions 4 on the back side of the silicon substrate 1 all extend outward. The first region 2 includes a first tunneling passivation layer 5, a first doped layer 6 and a first antireflection layer 7 stacked sequentially on the back side of the silicon substrate 1. The second region 3 includes a second tunneling passivation layer 8, a second doped layer 9 and a second antireflection layer 10 stacked sequentially on the back side of the silicon substrate 1. A metal electrode 11 is provided in the middle of the first antireflection layer 7 and the second antireflection layer 10. The thickness of the first doped layer 6 and the second doped layer 9 is 150~300nm.

[0026] The first region 2 has a first perforation region 12 in the non-electrode region. The first perforation region 12 is composed of a plurality of first textured perforations 13 that penetrate the first tunneling passivation layer 5, the first doped layer 6 and the first antireflection layer 7. The second region 3 has a plurality of second textured perforations 14 that penetrate the second tunneling passivation layer 8, the second doped layer 9 and the second antireflection layer 10. The second textured perforations 14 are inverted pyramid shape. The first perforation region 12 and the second textured perforations 14 are arranged in an equidistant array on both sides of the metal electrode 11.

[0027] Here, the non-electrode region refers to the back surface area not covered by the metal electrode 11. The first region 2 refers to, for example, a P-type doped region (corresponding to B doping), and the second region 3 refers to, for example, an N-type doped region (corresponding to P doping).

[0028] In a preferred embodiment, the density of the first perforated region 12 is 8.2 × 10⁻⁶. 4 ~3×10 5 / cm², the density of the second pile perforation 14 is 8.2×10⁻⁶. 4 ~3×10 5 pcs / cm²

[0029] Here, when the thickness of the first doped layer 6 or the second doped layer 9 is 180 nm, the density of the first perforated region 12 and the second textured perforated region 14 is 250,000 to 270,000 per cm².

[0030] In a preferred embodiment, the diameter of the first perforated area 12 and the second velvet perforation 14 is 0.5~5μm.

[0031] Here, the diameter of the first perforated area 12 and the second textured perforation 14 is 0.5~5μm, which can ensure that the textured holes uniformly cover the non-electrode area. The diameter, spacing and area ratio together constitute the triangular constraint of optical, electrical and mechanical stability.

[0032] In a preferred embodiment, the density ratio of the first pile perforation 13 to the second pile perforation 14 is 1.5-2.0:1.

[0033] In a preferred embodiment, the total area of ​​the first perforated region 12 and the second textured perforated region 14 accounts for 5-20% of the total area of ​​the non-electrode region.

[0034] In a preferred embodiment, both the first velvet perforation 13 and the second velvet perforation 14 have a submicron-level velvet structure on their inner walls.

[0035] In a preferred embodiment, the submicron-level textured structure of the inner walls of the first textured perforation 13 and the second textured perforation 14 is formed by chemical etching. The submicron-level textured structure increases the reflectivity of long-wavelength light in the 1100~1200nm band by 15%.

[0036] Here, by forming a textured surface through chemical etching, the first textured perforation 13 and the second textured perforation 14 are upgraded from passive openings to active reflection structures, which directionally improves the reflectivity in the 1100~1200nm long-wavelength band, compensates for the optical loss caused by the thickening of the polycrystalline silicon layer, and significantly improves back-side light capture.

[0037] In a preferred embodiment, the inner wall roughness of the first textured perforation 13 and the second textured perforation 14 is 0.5~2 μm.

[0038] Example 1

[0039] The preparation method of a TBC solar cell includes the following steps:

[0040] Step 1: Select a single-crystal silicon wafer with a resistivity of 30 Ω·cm and polish it in a tank-type NaOH alkaline solution.

[0041] Step 2: Sequentially deposit a 5nm first passivation layer and a 180nm first doped layer 6 on the entire back side of the single-crystal silicon wafer. The doping element is boron, and the doping concentration is 7E19cm⁻¹. -3 ;

[0042] Step 3: Deposit another 50nm thick BSG layer on the back of the single-crystal silicon wafer;

[0043] Step 4: A laser beam is used to ablate the BSG layer in the third region (isolation region) 4 of the textured silicon substrate 1, which isolates the N-type region (second region) doped with boron on the back side of the single-crystal silicon wafer and the P-type region (first region) doped with boron. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 6 × 10⁻⁶. 3 J / m 2 The overlap rate is 30%; NaOH is used to etch the single crystal silicon wafer, and a 20nm BSG layer exists on the surface of the P-type region. The P-type region and the third region 4 expose the single crystal silicon wafer, and the surface height of the P-type region is 2μm higher than that of the N-type region.

[0044] Step 5: Sequentially deposit a 5nm second passivation layer and a 180nm second doped layer 9 on the entire back side of the single-crystal silicon wafer. The doping element is phosphorus (P), and the doping concentration is 1E21cm⁻¹. -3 And a PSG layer with a thickness of 50nm;

[0045] Step Six: Ablate the PSG layer in the P-type region and the third region 4 on the back side of the single-crystal silicon wafer using a laser beam. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 4 × 10⁻⁶. 3 J / m 2 The overlap rate of the light spots is 10%. Due to the multiple laser applications, the overlapping areas of the light spots will experience a perforation effect in the P-type region during subsequent alkaline etching. HF and HNO3 are used to etch the front and side surfaces of the single-crystal silicon wafer to expose the front and side surfaces of the single-crystal silicon wafer, respectively.

[0046] Step 7: Perform laser ablation on the PSG in the N-type region. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 0.5 μm, and an energy density of 4 × 10⁻⁶. 3 J / m 2 The overlap rate of the light spots is 10%;

[0047] Step 8: Using alkaline solution and strong acid, the front side, third region 4, the overlapping area of ​​the P-type region's light spot, and the laser-affected area of ​​the N-type region of the single-crystal silicon wafer are cleaned sequentially, and texturing is performed to form the first textured perforation 13 and the second textured perforation 14. After texturing, the textured reflectivity of the front side of the silicon substrate 1 is 8%, the density of the first perforation area 12 in the P-type region's overlapping area, and the density of the second textured perforation 14 in the N-type region's laser-affected area are approximately 8.2 × 10⁻⁶. 4 The surface height of the P-type and N-type regions is 2 μm higher than that of the third region 4.

[0048] Step 9: Deposit a passivation layer with a thickness of 5nm on the front and back sides of the single crystal silicon wafer using the ALD process.

[0049] Step 10: Deposit antireflection layers with a thickness of 70nm on the front and back sides of the single-crystal silicon wafer using PECVD process.

[0050] Step 11: Print paste and sinter metal on the single-crystal silicon wafer.

[0051] Example 2

[0052] The preparation method of a TBC solar cell includes the following steps:

[0053] Step 1: Select a single-crystal silicon wafer with a resistivity of 30 Ω·cm and polish it in a tank-type NaOH alkaline solution.

[0054] Step 2: Sequentially deposit a 5nm first passivation layer and a 180nm first doped layer 6 on the entire back side of the single-crystal silicon wafer. The doping element is boron, and the doping concentration is 7E19cm⁻¹. -3 ;

[0055] Step 3: Deposit another 50nm thick BSG layer on the back of the single-crystal silicon wafer;

[0056] Step 4: A laser beam is used to ablate the BSG layer in the third region 4 of the textured silicon substrate 1, which isolates the N-type region doped with boron and the P-type region doped with boron on the back side of the single-crystal silicon wafer. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 6 × 10⁻⁶. 3 J / m 2 The light spot overlap rate is 50%; NaOH is used to etch the single crystal silicon wafer. A 20nm BSG layer exists on the surface of the P-type region, and the N-type region and the third region 4 expose the single crystal silicon wafer. The surface height of the P-type region is 2μm higher than that of the N-type region.

[0057] Step 5: Sequentially deposit a 5nm second passivation layer and a 180nm second doped layer 9 on the entire back side of the single-crystal silicon wafer. The doping element is phosphorus (P), and the doping concentration is 1E21cm⁻¹. -3 And a PSG layer with a thickness of 50nm;

[0058] Step Six: Ablate the PSG layer in the P-type region and the third region 4 on the back side of the single-crystal silicon wafer using a laser beam. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 4 × 10⁻⁶. 3 J / m 2 The overlap rate of the light spots is 30%. Due to the multiple laser applications, the overlapping areas of the light spots will experience a perforation effect in the P-type region during subsequent alkaline etching. HF and HNO3 are used to etch the front and side surfaces of the single-crystal silicon wafer to expose the front and side surfaces of the single-crystal silicon wafer, respectively.

[0059] Step 7: Perform laser ablation on the PSG in the N-type region. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 0.5 μm, and an energy density of 4 × 10⁻⁶. 3 J / m 2 The overlap rate of the light spots is 20%;

[0060] Step 8: Using alkaline solution and strong acid, the front side, third region 4, the overlapping area of ​​the P-type region's light spot, and the laser-affected area of ​​the N-type region of the single-crystal silicon wafer are cleaned sequentially, and texturing is performed to form the first textured perforation 13 and the second textured perforation 14. After texturing, the textured reflectivity of the front side of the silicon substrate 1 is 8%, the density of the first perforation area 12 in the P-type region's overlapping area, and the density of the second textured perforation 14 in the N-type region's laser-affected area are approximately 2.6 × 10⁻⁶. 5 The surface height of the P-type and N-type regions is 2 μm higher than that of the third region 4.

[0061] Here, the first region (P-type region) 2 is perforated: the PSG layer is ablated by a large spot overlapping laser in step six (spot overlap rate 10%~50%), so that the overlapping region is preferentially penetrated in the chemical etching in step eight, forming the first textured perforation 13; the second region (N-type region) 3 is perforated: the PSG layer is directly ablated by a small spot laser in step seven (spot size 0.5~5μm), and it is expanded into the second textured perforation 14 in the chemical etching in step eight.

[0062] Step 9: Deposit a passivation layer with a thickness of 5nm on the front and back sides of the single crystal silicon wafer using the ALD process.

[0063] Step 10: Deposit antireflection layers with a thickness of 70nm on the front and back sides of the single-crystal silicon wafer using PECVD process.

[0064] Step 11: Print paste and sinter metal on the single-crystal silicon wafer.

[0065] Example 3

[0066] The preparation method of a TBC solar cell includes the following steps:

[0067] Step 1: Select a single-crystal silicon wafer with a resistivity of 30 Ω·cm and polish it in a tank-type NaOH alkaline solution.

[0068] Step 2: Sequentially deposit a 5nm first passivation layer and a 180nm first doped layer 6 on the entire back side of the single-crystal silicon wafer. The doping element is boron, and the doping concentration is 7E19cm⁻¹. -3 ;

[0069] Step 3: Deposit another 50nm thick BSG layer on the back of the single-crystal silicon wafer;

[0070] Step 4: A laser beam is used to ablate the BSG layer in the third region 4 of the textured silicon substrate 1, which isolates the N-type region doped with boron and the P-type region doped with boron on the back side of the single-crystal silicon wafer. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 6 × 10⁻⁶. 3 J / m 2 The light spot overlap rate is 50%; NaOH is used to etch the single crystal silicon wafer. A 20nm BSG layer exists on the surface of the P-type region, and the N-type region and the third region 4 expose the single crystal silicon wafer. The surface height of the P-type region is 2μm higher than that of the N-type region.

[0071] Step 5: Sequentially deposit a 5nm second passivation layer and a 180nm second doped layer 9 on the entire back side of the single-crystal silicon wafer, with a doping concentration of 1E21cm⁻¹. -3 And a PSG layer with a thickness of 50nm;

[0072] Step Six: Ablate the PSG layer in the P-type region and the third region 4 on the back side of the single-crystal silicon wafer using a laser beam. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 4 × 10⁻⁶. 3 J / m 2 The overlap rate of the light spots is 50%. Due to the multiple laser applications, the overlapping areas of the light spots will experience a perforation effect in the P-type region during subsequent alkaline etching. HF and HNO3 are used to etch the front and side surfaces of the single-crystal silicon wafer to expose the front and side surfaces of the single-crystal silicon wafer, respectively.

[0073] Step 7: Perform laser ablation on the PSG in the N-type region. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 5 μm, and an energy density of 4 × 10⁻⁶. 3 J / m 2 The overlap rate of the light spots is 30%;

[0074] Step 8: Using alkaline solution and strong acid, the front side of the single-crystal silicon wafer, the third region 4, the overlapping area of ​​the P-type region in Step 6, and the laser-affected area of ​​the N-type region in Step 7 are cleaned and texturized to form the first textured perforation 13 and the second textured perforation 14. After texturing, the textured reflectivity of the front side of the silicon substrate 1 is 8%, the density of the first perforation area 12 of the overlapping P-type region, and the density of the second textured perforation 14 in the laser-affected area of ​​the N-type region are approximately 3.0 × 10⁻⁶. 5 The surface height of the P-type and N-type regions is 2 μm higher than that of the third region 4.

[0075] Step 9: Deposit a passivation layer with a thickness of 5nm on the front and back sides of the single crystal silicon wafer using the ALD process.

[0076] Step 10: Deposit antireflection layers with a thickness of 70nm on the front and back sides of the single-crystal silicon wafer using PECVD process.

[0077] Step 11: Print paste and sinter metal on the single-crystal silicon wafer.

[0078] Comparative Example 1

[0079] The preparation method of a TBC solar cell includes the following steps:

[0080] Step 1: Select a single-crystal silicon wafer with a resistivity of 30 Ω·cm and polish it in a tank-type NaOH alkaline solution.

[0081] Step 2: Sequentially deposit a 5nm first passivation layer and a 100nm first doped layer 6 on the entire back side of the single-crystal silicon wafer. The doping element is boron, and the doping concentration is 7E19cm⁻¹. -3 ;

[0082] Step 3: Deposit another 50nm thick BSG layer on the back of the single-crystal silicon wafer;

[0083] Step 4: A laser beam is used to ablate the BSG layer in the third region 4 of the textured silicon substrate 1, which isolates the N-type region doped with boron and the P-type region doped with boron on the back side of the single-crystal silicon wafer. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 6 × 10⁻⁶. 3 J / m 2 The light spot overlap rate is 50%; NaOH is used to etch the single crystal silicon wafer. A 20nm BSG layer exists on the surface of the P-type region, and the N-type region and the third region 4 expose the single crystal silicon wafer. The surface height of the P-type region is 2μm higher than that of the N-type region.

[0084] Step 5: Sequentially deposit a 5nm second passivation layer and a 100nm second doped layer 9 on the entire back side of the single-crystal silicon wafer, with a doping concentration of 1E21cm⁻¹. -3 And a PSG layer with a thickness of 50nm;

[0085] Step Six: Ablate the PSG layer in the P-type region and the third region 4 on the back side of the single-crystal silicon wafer using a laser beam. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 4 × 10⁻⁶. 3 J / m 2The overlap rate of the light spots is 0%. Since the overlap rate of the light spots is 0% at this time, the first region 2 will not have a perforation effect during subsequent alkaline etching. HF and HNO3 are used to etch the front and side surfaces of the single crystal silicon wafer to expose the front and side surfaces of the single crystal silicon wafer respectively.

[0086] Step 7: Clean and texturize the front side and third region 4 of the single crystal silicon wafer sequentially with alkaline solution and strong acid. After texturization, the surface reflectivity of the textured surface of the silicon substrate 1 is 8%, and the surface height of the N-type region is 2μm higher than that of the third region 4.

[0087] Step 8: Deposit a passivation layer with a thickness of 5nm on the front and back sides of the single-crystal silicon wafer using the ALD process.

[0088] Step 9: Deposit antireflection layers with a thickness of 70nm on the front and back sides of the single-crystal silicon wafer using PECVD process.

[0089] Step 10: Print paste and sinter metal on the single-crystal silicon wafer.

[0090] Comparative Example 2

[0091] The preparation method of a TBC solar cell includes the following steps:

[0092] Step 1: Select a single-crystal silicon wafer with a resistivity of 30 Ω·cm and polish it in a tank-type NaOH alkaline solution.

[0093] Step 2: Sequentially deposit a 5nm first passivation layer and a 180nm first doped layer 6 on the entire back side of the single-crystal silicon wafer. The doping element is boron, and the doping concentration is 7E19cm⁻¹. -3 ;

[0094] Step 3: Deposit another 50nm thick BSG layer on the back of the single-crystal silicon wafer;

[0095] Step 4: A laser beam is used to ablate the BSG layer in the third region 4 of the textured silicon substrate 1, which isolates the N-type region doped with boron and the P-type region doped with boron on the back side of the single-crystal silicon wafer. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 6 × 10⁻⁶. 3 J / m 2 The light spot overlap rate is 50%; NaOH is used to etch the single crystal silicon wafer. A 20nm BSG layer exists on the surface of the P-type region, and the N-type region and the third region 4 expose the single crystal silicon wafer. The surface height of the P-type region is 2μm higher than that of the N-type region.

[0096] Step 5: Sequentially deposit a 5nm second passivation layer and a 180nm second doped layer 9 on the entire back side of the single-crystal silicon wafer. The doping element is phosphorus (P), and the doping concentration is 1E21cm⁻¹. -3 And a PSG layer with a thickness of 50nm;

[0097] Step Six: Ablate the PSG layer in the P-type region and the third region 4 on the back side of the single-crystal silicon wafer using a laser beam. The laser beam is a pulsed laser with a pulse width of 5 ps, a wavelength of 532 nm, a spot size of 200 μm, and an energy density of 4 × 10⁻⁶. 3 J / m 2 The light spot overlap rate is 0%, and HF and HNO3 are used to etch the front and side of the single crystal silicon wafer to expose the front and side of the single crystal silicon wafer, as well as the single crystal silicon wafer in the third region 4.

[0098] Step 7: The front side and the third region 4 of the single crystal silicon wafer are cleaned and texturized in sequence using alkaline solution and strong acid. After texturing, the surface reflectivity of the textured surface of the silicon substrate 1 is 8%, the surface height of the N-type region is 2μm higher than the surface height of the third region 4, the overlap rate of the light spot is 0%, and no perforation effect will occur in the P-type region during alkaline etching.

[0099] Step 8: Deposit a passivation layer with a thickness of 5nm on the front and back sides of the single-crystal silicon wafer using the ALD process.

[0100] Step 9: Deposit antireflection layers with a thickness of 70nm on the front and back sides of the single-crystal silicon wafer using PECVD process.

[0101] Step 10: Print paste and sinter metal on the single-crystal silicon wafer.

[0102] The TBC solar cells prepared by the methods described in Examples 1-3 and Comparative Examples 1-2 were then subjected to performance tests, and the test data are shown in Table 1:

[0103] Table 1. Performance data of TBC solar cells in the examples and comparative examples.

[0104] Test Items Example 1 Example 2 Example 3 Comparative Example 1 Comparative Example 2 Density of perforations in the first perforation area and the second pile surface (perforations / cm²) <![CDATA[8.2×10 4 ]]> <![CDATA[2.6×10 5 ]]> <![CDATA[3.0×10 5 ]]> 0 0 Polycrystalline silicon thickness (nm) 180 180 180 100 180 Carrier transport path (μm) 100-130 100-130 100-130 120-150 120-150 Parasitic absorption rate (%) 6.20 4.50 3.60 8.20 12.50 Double-sidedness (%) 73.40 75.80 76.10 68.50 60.80 Passivation layer burn-through rate (%) 0.10 0.10 0.10 2.20 0.10 Conversion efficiency (%) 26.75 26.88 26.82 26.63 26.53 Open-circuit voltage Voc (mV) 746 745 742 745 749 Current density Jsc (mA / cm²) 41.9 42.06 42.08 41.82 41.68 Fill factor FF (%) 85.60 85.80 85.90 85.50 85.00

[0105] As can be seen from Table 1, without the introduction of the first and second textured perforated structures, increasing the thickness of the doped layer is beneficial to improving the passivation effect, but it will bring additional parasitic absorption, resulting in a decrease in overall efficiency.

[0106] When the first and second pile perforation structures are introduced, the density of the first perforation area and the second pile perforation area is 2.6 × 10⁻⁶. 5 When the density is increased by 0.25% per cm², the overall performance is optimal, and the density is increased to 3.0 × 10⁻⁶. 5When the number of particles per cm² is increased, the optical performance is enhanced, but the passivation performance shows a significant downward trend, resulting in no efficiency advantage.

[0107] Among them, Comparative Example 2 (polycrystalline silicon thickness 180nm+ without perforations) showed a parasitic absorption rate as high as 12.50%, proving that thickening the polycrystalline silicon layer requires a perforated structure to offset optical losses; Example 2 had a perforation density of 2.6×10⁻⁶. 5 The efficiency is optimal when the number of units per cm² is 26.88%.

[0108] The present invention has been further described above with reference to specific embodiments. However, it should be understood that the specific description herein should not be construed as limiting the substance and scope of the present invention. Various modifications made by those skilled in the art to the above embodiments after reading this specification are all within the scope of protection of the present invention.

Claims

1. A TBC solar cell with a perforated structure, comprising a silicon substrate (1), wherein the back side of the silicon substrate (1) is provided with a plurality of first regions (2) and second regions (3), the first regions (2) and second regions (3) having opposite polarities and alternating laterally, and a third region (4) for isolation is provided at each connection point, wherein the first regions (2), second regions (3) and third regions (4) on the back side of the silicon substrate (1) all extend outward, characterized in that, The first region (2) includes a first tunneling passivation layer (5), a first doped layer (6) and a first antireflection layer (7) stacked sequentially on the back side of the silicon substrate (1). The second region (3) includes a second tunneling passivation layer (8), a second doped layer (9) and a second antireflection layer (10) stacked sequentially on the back side of the silicon substrate (1). A metal electrode (11) is provided in the middle of the first antireflection layer (7) and the second antireflection layer (10). The thickness of the first doped layer (6) and the second doped layer (9) is 150~300nm. The height difference between the outer surfaces of the first region (2) and the second region (3) is 1~5μm. The first region (2) has a first perforation region (12) in the non-electrode region. The first perforation region (12) is composed of a plurality of first textured perforations (13) that penetrate the first tunneling passivation layer (5), the first doped layer (6) and the first antireflection layer (7). The second region (3) has a plurality of second textured perforations (14) that penetrate the second tunneling passivation layer (8), the second doped layer (9) and the second antireflection layer (10). The second textured perforations (14) are inverted pyramid shape. The first perforation region (12) and the second textured perforations (14) are arranged in an equidistant array on both sides of the metal electrode (11).

2. The TBC solar cell according to claim 1, characterized in that, The density of the first perforated region (12) is 8.2 × 10⁻⁶. 4 ~3×10 5 The density of the second pile perforation (14) is 8.2 × 10⁻⁶ / cm². 4 ~3×10 5 pcs / cm² 3. The TBC solar cell according to claim 1, characterized in that, The diameters of the first perforated area (12) and the second velvet perforation (14) are 0.5~5μm.

4. The TBC solar cell according to claim 1, characterized in that, The density ratio of the first pile perforation (13) to the second pile perforation (14) is (1.5-2.0):

1.

5. The TBC solar cell according to claim 1, characterized in that, The total area of ​​the first perforated area (12) and the second textured perforated area (14) accounts for 5-20% of the total area of ​​the non-electrode area.

6. The TBC solar cell according to claim 1, characterized in that, Both the first velvet perforation (13) and the second velvet perforation (14) have a submicron-level velvet structure on their inner walls.

7. The TBC solar cell according to claim 6, characterized in that, The submicron-scale textured surface structure increases the reflectivity of long-wavelength light in the 1100-1200nm band by 15%.

8. The TBC solar cell according to claim 6, characterized in that, The inner wall roughness of the first textured perforation (13) and the second textured perforation (14) is 0.5~2um.

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